Control circuit based on parallel bus and keyboard with control circuit

Abstract

The utility model relates to the technical field of keyboard control circuits, in particular to a control circuit based on a parallel bus and a keyboard with the control circuit, and is characterized in that the control circuit comprises a main control module and a plurality of groups of auxiliary control units, the main control module comprises a plurality of connecting ends, each connecting end is connected with at least one group of auxiliary control units in parallel through an SPI bus, and the auxiliary control units are connected with the main control module. Therefore, the plurality of auxiliary control units form a parallel architecture. In the invention, a plurality of auxiliary control units are connected in parallel to form a parallel architecture, so that the bus data transmission delay is small, for example, when the auxiliary control units need to receive 3 byte data, the maximum delay is equal to 3 * 30 = 90 byte period when the parallel series is 30; besides, when the control circuit is applied to the magnetic axis keyboard, the main control chip can meet the requirement that the number of keys of the keyboard is larger by adding the auxiliary control unit under the condition that the number of SPIs is limited, for example, when the keyboard needs 75 keys, only three SPIs are needed, and the requirement for 75-byte period delay can be met.

Description

Technical Field

[0001] The present application relates to the technical field of keyboard control circuits, and in particular to a control circuit based on a parallel bus and a keyboard having the control circuit. Background Art

[0002] With the rapid development of electronic products, people's demand for product functionality and interactive experience is getting higher and higher. Among them, keyboards, as an important input device, have been widely used in various electronic products. Among the many types of keyboards, magnetic axis keyboards are popular among users for their excellent feel and efficient response speed.

[0003] At present, the control circuit of the magnetic axis keyboard usually adopts the serial bus architecture. Figure 1 The main control MCU is connected to the key control chip chip_X through the I / O interface to realize the control of each key in the magnetic axis keyboard. The advantage of this control circuit is that the architecture is simple and the main control MCU requires relatively few I / O ports.

[0004] However, as the number of keyboard keys increases and the requirements for data transmission efficiency increase, the delay problem of serial bus data transmission gradually becomes prominent. In one possible case, when the number of series connection levels increases, the delay will increase exponentially. For example, if each chip_X needs to receive 3 bytes of data, then when the number of series connection levels is 15, the maximum delay is equal to 3*15*15=675 byte cycles, which has a great impact on data transmission efficiency, so it needs to be improved. Summary of the invention

[0005] The present application provides a control circuit based on a parallel bus and a keyboard equipped with the control circuit, which is helpful to solve the problem of data transmission delay of keyboard keys.

[0006] The first object of the invention of this application is achieved through the following technical solutions:

[0007] The control circuit based on the parallel bus includes a main control module and multiple groups of sub-control units. The main control module includes multiple connection terminals, each of which is connected in parallel with at least one group of sub-control units through an SPI bus, so that the multiple sub-control units form a parallel architecture.

[0008] Standard SPI is synchronous in transmission and reception. When sending data, it also receives data synchronously. Therefore, general SPI data transmission requires waiting for the data transmission to be completed before reading the data in the receiving register. The waiting process here will reduce the data transmission efficiency. This application minimizes the reduction of communication efficiency by sending multiple SPIs at the same time and then waiting for the transmission to be completed in turn. It is measured that at a rate of 8M / bit, it only takes 3.5us for multiple SPIs to read and write 3 bytes, which is much less than the time required for multiple SPIs to read and write 3 bytes separately.

[0009] Preferably, the model of the main control module is GD32F303RGT6.

[0010] Preferably, the sub-control unit includes a sub-control MCU chip, and the model of the sub-control MCU chip is FT32F030F6AP7.

[0011] Preferably, the sub-control unit also includes a light-emitting diode module, a Hall sensor and three groups of switch sub-units. The receiving end of the sub-control MCU chip is connected to the output end of the Hall sensor, and the output end of the sub-control MCU chip is connected to the light-emitting diode module through the switch sub-unit to drive the light-emitting diode module to light up or off to form different visual effects.

[0012] The Hall sensor can accurately detect the change of magnetic field, so as to accurately judge the pressing and releasing action of the key. In the above scheme, when the Hall sensor is used to detect the state of the key, when the key is pressed, the corresponding Hall sensor will detect the change of magnetic field and transmit the signal to the sub-control MCU chip. The sub-control MCU chip identifies the depth of the key pressing according to the received signal and sends this information to the main control chip U1. The main control chip U1 drives the light-emitting diode module through the SPI bus and the sub-control unit to produce different light-emitting effects.

[0013] The main control module controls the LED module of the sub-control MCU through the SPI bus; the magnetic induction intensity of each Hall sensor is obtained through the SPI bus, and converted into the degree of pressing of the key shaft through the conversion relationship; the obtained degree of pressing of the key is determined by software calculation to determine whether the key is pressed, and then the corresponding key value, such as key A, is notified to the computer through the USB interface; the quick trigger function is realized by changing the depth of the key pressing.

[0014] Preferably, the switch subunit includes an NPN transistor and several resistors, the base of the NPN transistor is connected to the output end of the sub-control MCU chip through a resistor, the emitter of the NPN transistor is grounded, and the emitter of the NPN transistor and the base of the NPN transistor are connected in parallel with a resistor, the collector of the NPN transistor is connected to the cathode of the light-emitting diode module through a resistor; the anode of the light-emitting diode module is connected to a power supply.

[0015] Preferably, the model of the Hall sensor is OH44E-S.

[0016] In the above scheme, the signal fed back by the Hall sensor is a voltage value of 0~VCC. The sub-control MCU chip samples the voltage signal from the Hall sensor through ADC to obtain the depth of the button being pressed. The light-emitting state of the light-emitting diode is controlled by the main control module through the SPI bus, and different lighting effects can be produced according to the encoding of the main control module, such as gradient, wave, etc.

[0017] Preferably, the main control module is connected to the three groups of sub-control units respectively through three SPI buses.

[0018] In the above solution, when there are more keyboard keys, the main control module can increase the number of keyboard keys by adding parallel sub-control units when the number of connection ends is limited, so as to meet the demand for more keyboard keys with a small increase in delay. For example, when the keyboard needs 75 keys, only 3 SPI channels are needed to meet the delay of 75 bytes cycle, which is much lower than the serial solution.

[0019] The second invention objective of this application is achieved through the following technical solutions:

[0020] A keyboard comprises the parallel bus-based control circuit described in the above technical solution.

[0021] In the above scheme, the control circuit is applied to the keyboard, and a parallel architecture can be used to improve the data transmission efficiency. The main control module can meet the demand for more keyboard keys when the delay is small by adding a sub-control unit when the number of SPI interfaces is limited. For example, when the keyboard requires 75 keys, only 3 SPI channels are needed to meet the delay of 75 bytes, which is much lower than the serial solution. Even for a 104-key full keyboard, the delay can be controlled within 105 bytes when only 3 SPI channels are needed. Moreover, the main control module requires 3 SPI channels. There are many types of main control modules on the market that can meet the demand, the cost will be lower, and the risk of production and material preparation will be smaller.

[0022] In summary, the beneficial technical effects of this application are:

[0023] 1. The main control module controls the LED module of the sub-control MCU through the SPI bus; the magnetic induction intensity of each Hall sensor is obtained through the SPI bus, and converted into the depth of the key axis being pressed through the conversion relationship; the obtained depth of the key being pressed is determined by software calculation to determine whether the key is pressed, and then the corresponding key value is notified to the computer through the USB interface, such as key A; the quick trigger function is realized by changing the depth of the key being pressed.

[0024] 2. When there are more keyboard keys, the main control module can meet the demand for more keyboard keys with a limited number of connection terminals by adding parallel sub-control units while increasing the delay less. For example, when the keyboard needs 75 keys, only 3 SPI channels are needed to meet the delay of 75 bytes cycle, which is much lower than the serial solution.

[0025] 3. The signal fed back by the Hall sensor is a voltage value of 0 ~ VCC. The sub-control MCU chip samples the voltage signal from the Hall sensor through ADC to obtain the depth of the button being pressed; the light-emitting state of the light-emitting diode is controlled by the main control module through the SPI bus, and different lighting effects can be produced according to the coding of the main control module, such as gradient, wave, etc. BRIEF DESCRIPTION OF THE DRAWINGS

[0026] Figure 1 It is a schematic diagram of the circuit structure of the prior art in this application.

[0027] Figure 2 It is a schematic diagram of the overall module of the control circuit based on the parallel bus of the present application.

[0028] Figure 3 It is a schematic diagram of the circuit structure of the main control module of this application.

[0029] Figure 4 It is a schematic diagram of the circuit structure of the main control chip U1 of this application.

[0030] Figure 5 This is a schematic diagram of the circuit structure when the sub-control MCU chip in the sub-control unit of this application is in position U9.

[0031] Figure 6 It is a schematic diagram of the circuit structure when the sub-control MCU chip in the sub-control unit of this application is in position U2.

[0032] Figure 7 It is a schematic diagram of the circuit structure when the sub-control MCU chip in the sub-control unit of this application is in position U4.

[0033] Figure 8 This is a schematic diagram of the circuit structure when the sub-control MCU chip in the sub-control unit of this application is in position U5.

[0034] Fig. 9This is a schematic diagram of the circuit structure when the sub-control MCU chip in the sub-control unit of this application is in position U6.

[0035] Fig.10 This is a schematic diagram of the circuit structure when the sub-control MCU chip in the sub-control unit of this application is in position U7.

[0036] Fig.11 This is a schematic diagram of the circuit structure when the sub-control MCU chip in the sub-control unit of this application is in position U8.

[0037] Fig.12 This is a schematic diagram of the circuit structure when the sub-control MCU chip in the sub-control unit of this application is in position U10.

[0038] Fig.13 It is a schematic diagram of the circuit structure when the sub-control MCU chip in the sub-control unit of this application is in position U11.

[0039] Description of reference numerals:

[0040] 1. Main control module; 2. Sub-control unit; 21. Switch sub-unit. DETAILED DESCRIPTION

[0041] The following combination Figure 1-Figure 13 This application is described in further detail.

[0042] In conventional technology, the control circuit of the magnetic axis keyboard usually adopts a serial bus architecture, see Figure 1 , connect the main control MCU to the key control chip chip_X through the I / 0 interface to form a serial architecture to realize the control of each key in the magnetic axis keyboard. The advantage of this control circuit is that the architecture is simple and the main control MCU requires relatively few I / O ports. However, with the increase in the number of keyboard keys and the improvement in the requirements for data transmission efficiency, the delay problem of serial bus data transmission has gradually become prominent. Specifically, each frame of data in the serial bus architecture contains 30 bytes, the SPI rate is 8M / bit, and it takes about 30us to transmit a frame of data. According to the serial bus with 15 keys, the delay is at least 30us*15=450us. However, this method greatly affects the user's experience in some application scenarios of magnetic axis keyboards (such as playing games). Therefore, an embodiment of the present application provides a control circuit based on a parallel bus.

[0043] See also Figure 2 and Figure 3, the control circuit based on the parallel bus includes a main control module 1 and multiple groups of sub-control units 2. The sub-control unit 2 is used to detect whether a key is pressed and can perform related operations when the key is pressed. The main control module 1 includes multiple connection terminals, each of which is connected in parallel with at least one group of sub-control units 2 through an SPI bus. When the number of parallel sub-control units 2 is large, multiple sub-control units 2 can form a parallel architecture to reduce the delay generated during the data transmission between the main control module 1 and the multiple sub-control units 2. The three SPIs use different data lines (CLK, MISO, MOSI). The pins of the main control chip U1 can connect multiple sub-control units through one SPI, that is, by controlling the same pin to select the three sub-control units distributed on different SPI buses, and realize communication with the three sub-control units at the same time. Therefore, the main control module 1 has three connection terminals. In this way, the more keyboard keys are set, the main control module 1 can meet the demand for more keyboard keys when the delay increase is small by increasing the number of parallel sub-control units 2 when the number of connection terminals is limited. In addition, the standard SPI is synchronous in transmission and reception, that is, it receives data synchronously while sending data. Therefore, general SPI data transmission requires waiting for the data transmission to be completed before reading the data in the receiving register. The waiting process here will reduce the data transmission efficiency. However, the present application minimizes the reduction in communication efficiency by sending multiple SPIs at the same time and then waiting for the transmission to be completed in turn. It is measured that at a rate of 8M / bit, it only takes 3.5us for multiple SPIs to read and write 3 bytes, which is much less than the time required for multiple SPIs to read and write 3 bytes separately.

[0044] See also Figure 4 and Figure 5 The main control module 1 includes a main control chip U1, and the sub-control unit 2 includes a sub-control MCU chip, a light-emitting diode module, a Hall sensor, and three switch sub-units 21. The sub-control MCU chip mainly realizes the function of being an SPI slave device; samples the magnetic induction intensity through ADC; and uses PWM output to control the light-emitting diode module. The light-emitting diode module is a three-color LED.

[0045] In this application, the data content sent by the main control module to the sub-control MCU chip via the SPI bus is used to control the color of the light-emitting diode module in the sub-control unit; the data content sent back by the sub-control MCU chip to the main control chip U1 includes the intensity of magnetic induction and the checksum.

[0046] Specifically, the main control chip U1 controls the light-emitting diode module through the SPI bus and the sub-control unit; obtains the magnetic induction intensity of each Hall sensor through the SPI bus, and converts it into the depth of the key shaft being pressed through the conversion relationship; the obtained depth of the key being pressed is determined by software calculation to determine whether the key is pressed, and then informs the computer of the corresponding key value through the USB interface, such as key A; the rapid trigger function is realized by changing the depth of the key being pressed. Among them, the conversion relationship and software calculation are existing technologies and will not be repeated here.

[0047] In this embodiment, the model of the main control chip U1 is GD32F303RGT6. The model of the sub-control MCU chip is FT32F030F6AP7. The main control chip U1 is connected to the sub-control MCU chip through multiple connection terminals. In this embodiment, the number of connection terminals of the main control chip U1 is three. For ease of understanding, the three connection terminals are named as: the first connection terminal, the second connection terminal and the third connection terminal. Among them, the pins of the main control chip U1 corresponding to the first connection end are: PA4_SPI0-NSS pin, PA5_SPI0-SCK pin, PA6_SPI0-MISO pin and PA7_SPI0-MOSI pin; the pins of the main control chip U1 corresponding to the second connection end are: PB12_SPI1-NSS pin, PB13_SPI1-SCK pin, PB14_SPI1-MISO pin and PB15_SPI1-MOSI pin; the pins of the main control chip U1 corresponding to the third connection end are: SPI2-NSS pin, PB3_SPI2-SCK pin, PB4_SPI2-MISO pin and PB5_SPI2-MOSI pin.

[0048] Since the SPI bus connects the connection end of the main control chip U1 and the sub-control MCU chip, the following takes the connection relationship between one SPI bus (SPI0) connecting the first connection end of the main control chip U1 and the sub-control MCU chip U9 as an example for explanation. The connection relationship between the second connection end and the third connection end of the main control chip U1 and the SPI bus and other sub-control MCU chips (such as the sub-control MCU chip U4) can be seen in Figure 4-Figure 13 .

[0049] The CS1 line (low-level valid slave select line) in the SPI0 bus is used to connect the PA4_SPI0-NSS pin with the NSS pin (i.e., the 10th pin) of the slave-control MCU chip U9; the SCK line (serial clock line) in the SPI0 bus is used to connect the PA5_SPI0-SCK pin with the SCK pin (i.e., the 11th pin) of the slave-control MCU chip U9, the MISO line (host input / slave output data line) in the SPI0 bus is used to connect the PA6_SPI0-MISO pin with the MISO pin (i.e., the 12th pin) of the slave-control MCU chip U9, and the MOSI line (host output / slave input data line) in the SPI0 bus is used to connect the PA7_SPI0-MOSI pin with the MOSI pin (i.e., the 13th pin) of the slave-control MCU chip U9.

[0050] It should be noted that multiple slave control MCU chips under the same SPI bus need to obtain data through the MOIS line when selected and send data through MISO. Since the same MISO line is shared as the slave data transmission, the MISO of each slave control MCU chip is configured as an open-drain output state, and the connection end of the main control chip U1 is connected to the slave control MCU chip with a pull-up resistor (for example Figure 4 R9, R10, R11 and R16).

[0051] Since each SPI bus can connect multiple groups of sub-control units 2, multiple groups of sub-control MCU chips on the same SPI bus can be connected to the pins corresponding to the connection ends of the main control chip U1 through the 10th, 11th, 12th and 13th pins, so that multiple groups of sub-control units 2 are connected in parallel to form a parallel architecture to improve the efficiency and synchronization of data transmission from the main control chip U1 to the sub-control MCU chip, and further reduce delays. Figure 4-Figure 13 The following table shows the connection relationship between the three connection terminals of the main control chip U1 and the pins of multiple groups of sub-control MCU chips:

[0052] Main control chip U1 first connection terminal Sub-control MCU chip U2 Auxiliary control MCU chip U4 Sub-control MCU chip U9 PA4_SPI0 - NSS pin Pin 10 Pin 10 Pin 10 PA5_SPI0 - SCK pin Pin 11 Pin 11 Pin 11 PA6_SPI0 - MISO pin Pin 12 Pin 12 Pin 12 PA7_SPI0 - MOSI pin Pin 13 Pin 13 Pin 13

[0053] Second connection terminal of main control chip U1 Sub-control MCU chip U5 Sub-control MCU chip U6 Sub-control MCU chip U7 PB12_SPI1-NSS pin Pin 10 Pin 10 Pin 10 PB13_SPI1-SCK pin Pin 11 Pin 11 Pin 11 PB14_SPI1 - MISO pin Pin 12 Pin 12 Pin 12 PB15_SPI1-MOSI pin Pin 13 Pin 13 Pin 13

[0054] Main control chip U1 third connection terminal Sub-control MCU chip U8 Sub-control MCU chip U10 Sub-control MCU chip U11 SPI2-NSS pin Pin 10 Pin 10 Pin 10 PB3_SPI2-SCK pin Pin 11 Pin 11 Pin 11 PB4_SPI2 - MISO pin Pin 12 Pin 12 Pin 12 PB5_SPI2-MOSI pin Pin 13 Pin 13 Pin 13

[0055] See also Figure 5, the model of the Hall sensor is OH44E-S. Each group of switch subunits 21 is used to detect the on and off of the light-emitting diode. The Hall sensor can accurately detect the change of the magnetic field, so as to accurately judge the pressing and releasing actions of the key. When the key is pressed, the corresponding Hall sensor will detect the change of the magnetic field and transmit the signal to the sub-control MCU chip. The sub-control MCU chip identifies the depth of the key pressing based on the received signal and sends this information to the main control chip U1. The main control chip U1 drives the light-emitting diode module through the SPI bus and the sub-control unit to produce different light-emitting effects.

[0056] The following description takes the connection relationship between the sub-control MCU chip U9 and the light-emitting diode module D3, the Hall sensor Q1, and the switch sub-unit 21 as an example. The receiving end of the sub-control MCU chip U9 is connected to the output end (OUT pin) of the Hall sensor Q1, and the output end of the sub-control MCU chip U9 is connected to the light-emitting diode module D3 through the switch sub-unit 21 to drive the light-emitting diode module to light up or off.

[0057] See also Figure 5 The switch subunit 21 includes an NPN transistor and several resistors. The base of the NPN transistor is connected to the output end of the sub-control MCU chip through a resistor, the emitter of the NPN transistor is grounded, and the emitter of the NPN transistor and the base of the NPN transistor are connected in parallel with a resistor. The collector of the NPN transistor is connected to the cathode of the light-emitting diode module through a resistor; the anode of the light-emitting diode module is connected to the power supply.

[0058] Specifically, since each sub-control unit 2 has three groups of switch sub-units 21, the PA10 pin (i.e., the 18th pin), the PA9 pin (i.e., the 17th pin) and the PB1 pin (i.e., the 14th pin) of the sub-control MCU chip U9 are respectively connected to the three groups of switch sub-units 21.

[0059] More specifically, the PA10 pin of the sub-control MCU chip U9 is connected to the base b of the NPN transistor Q13 through a resistor R81, the emitter e of the NPN transistor Q13 is grounded, and the emitter e of the NPN transistor and the base b of the NPN transistor Q13 are connected in parallel with a resistor R82, and the collector c of the NPN transistor Q13 is connected to the cathode of the light-emitting diode B in the light-emitting diode module D3 through a resistor R36; the anode of the light-emitting diode B is connected to the power supply (USB5V).

[0060] The PA9 pin of the sub-control MCU chip U9 is connected to the base b of the NPN transistor Q14 through a resistor R83, the emitter e of the NPN transistor Q14 is grounded, and the emitter e of the NPN transistor Q14 and the base b of the NPN transistor are connected in parallel with a resistor R84, and the collector c of the NPN transistor Q14 is connected to the cathode of the light-emitting diode G in the light-emitting diode module D3 through a resistor R35; the anode of the light-emitting diode G is connected to the power supply (USB5V).

[0061] The PB1 pin of the sub-control MCU chip U9 is connected to the base b of the NPN transistor Q15 through a resistor R85, the emitter e of the NPN transistor Q15 is grounded, and the emitter e of the NPN transistor Q15 and the base b of the NPN transistor are connected in parallel with a resistor R86, and the collector c of the NPN transistor Q15 is connected to the cathode of the light-emitting diode R in the light-emitting diode module D3 through a resistor R34; the anode of the light-emitting diode R is connected to the power supply (USB5V).

[0062] In summary, in the present application, multiple sub-control units 2 are connected in parallel to form a parallel architecture, so that the bus data transmission delay is small. For example, each sub-control unit 2 needs to receive 3 bytes of data. Then when the parallel number is 30, the maximum delay is equal to 3*30=90 byte cycles. In addition, when the control circuit is applied to a magnetic axis keyboard, when the more keys on the keyboard, the main control chip can increase the number of keyboard keys by adding sub-control units 2 while increasing the delay less under the condition of a limited number of SPI interfaces. For example, when the keyboard requires 75 keys, only 3 SPI channels are needed to meet the delay of 75 byte cycles.

[0063] As for the advantage of reducing delay, it is mentioned above that each frame of data in the serial bus architecture contains 30 bytes, the SPI rate is 8M / bit, and it takes about 30us to transmit a frame of data. According to the 15 buttons on the serial bus, the delay is at least 30us*15=450us. The parallel bus also uses the SPI rate of 8M / bit, and each button transmits 3 bytes. According to the 30 buttons on the parallel bus, the delay can reach at least 3us*30=90us. Compared with the delay of 450us in the serial architecture, the parallel architecture adopted in this application can greatly reduce the delay.

[0064] In addition, when the serial architecture uses 5-way SPI, at most 5*15=75 keys can be used, and when the parallel architecture uses 3-way SPI, 3*30=90 keys can be used, thereby increasing the applicability of the control circuit.

[0065] The embodiment of the present application also provides a keyboard, which has a parallel bus-based control circuit as defined in the above embodiment. The control circuit is applied to the key control of the magnetic axis keyboard, and a parallel architecture can be used to improve data transmission efficiency. The main control module 1 can, when the number of SPI interfaces is limited, meet the demand for a larger number of keyboard keys when the delay increase is small by adding a sub-control unit 2. For example, when the keyboard requires 75 keys, only 3 SPI channels are required to meet the delay of 75 byte cycles, which is much lower than the serial solution; even for a 104-key full keyboard, when only 3 SPI channels are required, the delay can be controlled within 105 byte cycles; and the main control module 1 requires 3 SPI channels, and there are many models of main control modules 1 on the market that can meet the demand, the cost will be lower, and the production and material preparation risk will be smaller.

[0066] The above embodiments are only used to illustrate the technical solutions of the present application, rather than to limit them. Although the present application has been described in detail with reference to the aforementioned embodiments, those skilled in the art should understand that they can still modify the technical solutions described in the aforementioned embodiments, or make equivalent replacements for some of the technical features therein. These modifications or replacements do not deviate the essence of the corresponding technical solutions from the spirit and scope of the technical solutions of the embodiments of the present application, and should all be included in the protection scope of the present application.

Claims

1. A control circuit based on a parallel bus, characterized in that: The invention comprises a main control module (1) and a plurality of groups of auxiliary control units (2), wherein the main control module (1) comprises a plurality of connection terminals, each of the connection terminals being connected in parallel to at least one group of the auxiliary control units (2) via an SPI bus, so that the plurality of the auxiliary control units (2) form a parallel architecture.

2. The parallel bus-based control circuit according to claim 1, characterized in that: The model of the main control module (1) is GD32F303RGT6.

3. The parallel bus-based control circuit according to claim 2, characterized in that: The auxiliary control unit (2) comprises an auxiliary control MCU chip, and the model of the auxiliary control MCU chip is FT32F030F6AP7.

4. The parallel bus-based control circuit according to claim 3, characterized in that: The auxiliary control unit (2) further comprises a light emitting diode module, a Hall sensor and three groups of switch sub-units (21); the receiving end of the auxiliary control MCU chip is connected to the output end of the Hall sensor; the output end of the auxiliary control MCU chip is connected to the light emitting diode module via the switch sub-unit (21) to drive the light emitting diode module to light up or light down.

5. The parallel bus-based control circuit according to claim 4, characterized in that: The switch subunit (21) comprises an NPN transistor and a plurality of resistors, the base of the NPN transistor being connected to the output end of the auxiliary control MCU chip via a resistor, the emitter of the NPN transistor being grounded, and a resistor being connected in parallel between the emitter of the NPN transistor and the base of the NPN transistor, the collector of the NPN transistor being connected to the cathode of the light emitting diode module via a resistor; and the anode of the light emitting diode module being connected to a power supply.

6. The parallel bus-based control circuit according to claim 4, characterized in that: The model of the Hall sensor is OH44E-S.

7. The parallel bus-based control circuit according to any one of claims 1 to 6, characterized in that: The main control module (1) is connected to the three groups of auxiliary control units (2) respectively via three SPI buses.

8. A keyboard, characterized in that: It comprises a parallel bus-based control circuit as described in any one of claims 1 to 7.

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