Power output module based on support self-protection

By introducing the IO pins of comparator, op amp and FPGA into the power output module, self-protection of power output is achieved, solving the problems of high power consumption and steep drop in the output voltage of low dropout linear regulators in the prior art, and improving the safety and stability of the system.

CN222547180UActive Publication Date: 2025-02-28TIANJIN SIASUN INTELLIGENT TECH CO LTD
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Patent Information

Application Number
CN202322415414.8
Authority / Receiving Office
CN · China
Patent Type
Utility models(China)
Current Assignee / Owner
Filing Date
2023-09-06
Publication Date
2025-02-28
Estimated Expiration
2033-09-06

AI Technical Summary

Technical Problem

Existing low dropout linear regulators consume too much power when active frequency compensation, while when passive frequency compensation and increase output resistance to improve stability, the output voltage drops sharply due to the increase in resistance.

Method used

A power output module based on self-protection is designed, using the IO pins of the comparator, op amp and FPGA to achieve output protection, and protect the power output through hardware circuits to ensure safety, reliability and stability.

Benefits of technology

Through the design of this module, effective protection of power output is achieved, faults caused by overcurrent or overvoltage are avoided, and the safety and stability of the system are improved.

✦ Generated by Eureka AI based on patent content.

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Abstract

The utility model discloses a power output module based on support self protection. The power output module comprises a core board ox horn buckle connector, an intelligent MOS (Metal Oxide Semiconductor) BTS724G, a reserved N-MOS 2N7002, a voltage detection N-MOS 2N7002, a TE6437288-3, an MCU (Microprogrammed Control Unit), a half-bridge driver EG2104, an N channel MOS NCEP15T14D, an H-bridge driver, a voltage detection high-speed optocoupler EL0631, a current sensor CC6900, an N-MOS NCEP15T14D, a 2N7002, a comparator EG393 and an operational amplifier LM324ADR. According to the utility model, the purpose of output protection is achieved by utilizing the comparator, the operational amplifier and the IO pin of the FPGA, and the power output is protected by utilizing a hardware circuit, so that the circuit is safe, reliable and high in stability.
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Description

Technical Field

[0001] The utility model relates to the field of power output modules, in particular to a power output module based on supporting self-protection. Background Art

[0002] With the development and progress of science and technology, mobile phones, digital cameras, tablet computers, laptops and other mobile electronic devices have become indispensable tools in people's lives. In order to save power consumption of electronic devices, linear regulators with the ability to provide stable output voltage are widely used in various portable electronic products. Low-dropout linear regulators are widely used now. The output voltage of low-dropout linear regulators can be very close to the input voltage, but the power consumption of active frequency-compensated low-dropout regulators is too high. Passive frequency-compensated low-dropout regulators add resistors to the output end to increase the stability of the circuit, but the voltage at the output end drops sharply as the resistance increases. Summary of the invention

[0003] In order to solve the above problems, the utility model provides a power output module based on supporting self-protection.

[0004] The technical solution adopted by this utility model:

[0005] A power output module based on supporting self-protection, including a core board horn buckle connector, an intelligent MOS BTS724G, a reserved N-MOS 2N7002, a voltage detection N-MOS 2N7002, a TE6437288-3, an MCU, a half-bridge driver EG2104, an N-channel MOS NCEP15T14D, an H-bridge driver, a voltage detection high-speed optocoupler EL0631, a current sensor CC6900, an N-MOS NCEP15T14D, a 2N7002, a comparator EG393, and an operational amplifier LM324ADR;

[0006] The core board horn buckle connector is connected to the reserved N-MOS2N7002 through the DI interface, the reserved N-MOS 2N7002 is connected to the intelligent MOS BTS724G, and a wire is connected between the input and output ends of the reserved N-MOS2N7002, the intelligent MOS BTS724G is connected to TE6437288-3, the output end of the intelligent MOS BTS724G is connected to the voltage detection N-MOS2N7002, and the voltage detection N-MOS2N7002 is connected to the core board horn buckle connector through the DO interface;

[0007] The core board horn buckle connector is bidirectionally connected to the MCU through the UART interface and the CAN interface respectively, the MCU is bidirectionally connected to the H-bridge driver EG2126, the H-bridge driver EG2126 is connected to the N-MOS NCEP15T14D, the N-MOS NCEP15T14D is connected to the TE6437288-3, and a current sensor CC6900 is connected between the output end of the N-MOS NCEP15T14D and the H-bridge driver EG2126;

[0008] The core board buckle connector is connected to the half-bridge driver EG2104 through the DI interface, the half-bridge driver EG2104 is connected to the N-channel MOS NCEP15T14D, the N-channel MOS NCEP15T14D is connected to the TE6437288-3, the output end of the N-channel MOS NCEP15T14D is connected to the voltage detection high-speed optocoupler EL0631, and the voltage detection high-speed optocoupler EL0631 is connected to the core board buckle connector through the DI interface;

[0009] One output end of the comparator EG393 is connected to a 2N7002, the output end of the 2N7002 is connected to the smart MOS BTS724G, and is connected to the core board horn buckle connector through the IO interface; the other output end of the comparator EG393 is connected to another 2N7002, the output end of the 2N7002 is connected to the half-bridge driver EG2104, and is connected to the core board horn buckle connector through the IO interface;

[0010] The output end of the smart MOS BTS724G is connected to the non-inverting input ends of the two operational amplifiers LM324ADR respectively, the output end of the N-channel MOSNCEP15T14D is connected to the inverting input ends of the above two operational amplifiers LM324ADR respectively, the output end of one operational amplifier LM324ADR is connected to the MCU and the comparator EG393 respectively, and the output end of the other operational amplifier LM324ADR is connected to the comparator EG393.

[0011] The H-bridge driver EG2126 outputs 4 high and low signals from the MCU chip BF7006AM64-LBTX to control 4 N-MOS, and one signal line controls one N-MOS.

[0012] Beneficial effects of the utility model: the utility model utilizes a comparator, an operational amplifier and an IO pin of an FPGA to achieve the purpose of output protection, utilizes a hardware circuit to protect the power output, and is safe, reliable and highly stable. BRIEF DESCRIPTION OF THE DRAWINGS

[0013] Figure 1 This is a framework diagram of the utility model. DETAILED DESCRIPTION

[0014] A power output module based on supporting self-protection includes a MOS switch control circuit and an output state acquisition circuit. The output state acquisition circuit is an overcurrent fault detection circuit. The overcurrent fault detection circuit is implemented by a comparator. The output of the half-bridge driver and the H-bridge driver is turned off by abnormal voltage detection and overcurrent feedback.

[0015] Including core board horn buckle connector, intelligent MOS BTS724G, reserved N-MOS2N7002, voltage detection N-MOS2N7002, TE6437288-3, MCU, half-bridge driver EG2104, N-channel MOS NCEP15T14D, H-bridge driver, voltage detection high-speed optocoupler EL0631, current sensor CC6900, N-MOS NCEP15T14D, 2N7002, comparator EG393, op amp LM324ADR;

[0016] The core board horn buckle connector is connected to the reserved N-MOS2N7002 through the DI interface, the reserved N-MOS 2N7002 is connected to the intelligent MOS BTS724G, and a wire is connected between the input and output ends of the reserved N-MOS2N7002, the intelligent MOS BTS724G is connected to TE6437288-3, the output end of the intelligent MOS BTS724G is connected to the voltage detection N-MOS2N7002, and the voltage detection N-MOS2N7002 is connected to the core board horn buckle connector through the DO interface;

[0017] The core board horn buckle connector is bidirectionally connected to the MCU through the UART interface and the CAN interface respectively, the MCU is bidirectionally connected to the H-bridge driver EG2126, the H-bridge driver EG2126 is connected to the N-MOS NCEP15T14D, the N-MOS NCEP15T14D is connected to the TE6437288-3, and a current sensor CC6900 is connected between the output end of the N-MOS NCEP15T14D and the H-bridge driver EG2126;

[0018] The core board buckle connector is connected to the half-bridge driver EG2104 through the DI interface, the half-bridge driver EG2104 is connected to the N-channel MOS NCEP15T14D, the N-channel MOS NCEP15T14D is connected to the TE6437288-3, the output end of the N-channel MOS NCEP15T14D is connected to the voltage detection high-speed optocoupler EL0631, and the voltage detection high-speed optocoupler EL0631 is connected to the core board buckle connector through the DI interface;

[0019] One output end of the comparator EG393 is connected to a 2N7002, the output end of the 2N7002 is connected to the smart MOS BTS724G, and is connected to the core board horn buckle connector through the IO interface; the other output end of the comparator EG393 is connected to another 2N7002, the output end of the 2N7002 is connected to the half-bridge driver EG2104, and is connected to the core board horn buckle connector through the IO interface;

[0020] The output end of the smart MOS BTS724G is connected to the non-inverting input ends of the two operational amplifiers LM324ADR respectively, the output end of the N-channel MOSNCEP15T14D is connected to the inverting input ends of the above two operational amplifiers LM324ADR respectively, the output end of one operational amplifier LM324ADR is connected to the MCU and the comparator EG393 respectively, and the output end of the other operational amplifier LM324ADR is connected to the comparator EG393.

[0021] The control circuit is composed of a half-bridge driver EG2104 to control two N-MOS NCEP15T14D to achieve a 24V / 4A PWM output. After the DO function pin of the CPLD outputs high and low logic to control the 2PIN-IN of the half-bridge driver EG2104, the 5PIN-LO of the half-bridge driver EG2104 controls the two N-MOS middle lower tubes to turn on according to the input low-level signal, and the 6PIN-HO of the half-bridge driver EG2104 controls the two N-MOS middle upper tubes to turn on according to the input high-level signal. The two N-MOS are turned on according to the waveform output by the CPLD logic to realize PWM output. The H-bridge output uses the H-bridge driver EG2126 and 4 N-MOS NCEP15T14D to realize 24V / 4A motor forward and reverse control.

[0022] The overcurrent fault detection of the output state acquisition circuit is realized by the comparator integrated with the current sensor CC6900 and the H-bridge driver EG2126. The H-bridge driver EG2126 is controlled by the MCU chip BF7006AM64-LBTX outputting 4 high and low signals to control 4 N-MOS. One signal line controls one N-MOS. The output state acquisition circuit collects the voltage of 8 power outputs and the current voltage of 16 PWM outputs. The current is collected by a 1% precision sampling resistor and then sent to the 12-bit precision MCU chip BF7006AM64-LBTX through the operational amplifier LM324ADR. The BF7006AM64-LBTX chip sends the collected current information to the main control MCU through the serial port. The voltage state of the output state acquisition circuit is collected by using a resistor divider to control the MOS switch state to feedback to the main control MCU. The sampling resistor and op amp are used to collect the output current, and then the voltage amplified by the op amp is compared with 3.3V by a comparator. When the current exceeds the limit voltage, the comparator will output a high signal. After detecting the high signal, the FPGA will turn off the enable pin of the output circuit. When the current drops below the set value, the comparator will output a low level, and the FPGA will open the enable pin of the output circuit.

[0023] The above is a detailed description of the embodiments of the utility model, but the contents are only preferred embodiments of the utility model and cannot be considered to limit the scope of implementation of the utility model. All equivalent changes and improvements made within the scope of application of the utility model should still fall within the scope of the patent coverage of the utility model.

Claims

1. A power output module based on supporting self-protection, characterized in that: Including core board horn buckle connector, intelligent MOS BTS724G, reserved N-MOS2N7002, voltage detection N-MOS2N7002, TE6437288-3, MCU, half-bridge driver EG2104, N-channel MOS NCEP15T14D, H-bridge driver, voltage detection high-speed optocoupler EL0631, current sensor CC6900, N-MOS NCEP15T14D, 2N7002, comparator EG393, op amp LM324ADR; The core board horn buckle connector is connected to the reserved N-MOS2N7002 through the DI interface, the reserved N-MOS 2N7002 is connected to the intelligent MOS BTS724G, and a wire is connected between the input and output ends of the reserved N-MOS2N7002, the intelligent MOS BTS724G is connected to TE6437288-3, the output end of the intelligent MOS BTS724G is connected to the voltage detection N-MOS2N7002, and the voltage detection N-MOS2N7002 is connected to the core board horn buckle connector through the DO interface; The core board horn buckle connector is bidirectionally connected to the MCU through the UART interface and the CAN interface respectively, the MCU is bidirectionally connected to the H-bridge driver EG2126, the H-bridge driver EG2126 is connected to the N-MOS NCEP15T14D, the N-MOS NCEP15T14D is connected to the TE6437288-3, and a current sensor CC6900 is connected between the output end of the N-MOS NCEP15T14D and the H-bridge driver EG2126; The core board buckle connector is connected to the half-bridge driver EG2104 through the DI interface, the half-bridge driver EG2104 is connected to the N-channel MOS NCEP15T14D, the N-channel MOS NCEP15T14D is connected to the TE6437288-3, the output end of the N-channel MOS NCEP15T14D is connected to the voltage detection high-speed optocoupler EL0631, and the voltage detection high-speed optocoupler EL0631 is connected to the core board buckle connector through the DI interface; One output end of the comparator EG393 is connected to a 2N7002, the output end of the 2N7002 is connected to the smart MOS BTS724G, and is connected to the core board horn buckle connector through the IO interface; the other output end of the comparator EG393 is connected to another 2N7002, the output end of the 2N7002 is connected to the half-bridge driver EG2104, and is connected to the core board horn buckle connector through the IO interface; The output end of the smart MOS BTS724G is connected to the non-inverting input ends of the two operational amplifiers LM324ADR respectively, the output end of the N-channel MOSNCEP15T14D is connected to the inverting input ends of the above two operational amplifiers LM324ADR respectively, the output end of one operational amplifier LM324ADR is connected to the MCU and the comparator EG393 respectively, and the output end of the other operational amplifier LM324ADR is connected to the comparator EG393.

2. The power output module based on supporting self-protection according to claim 1, characterized in that: The H-bridge driver EG2126 outputs 4 high and low signals from the MCU chip BF7006AM64-LBTX to control 4 N-MOS, and one signal line controls one N-MOS.