Power supply circuit for coprocessor

Abstract

The utility model provides a power supply circuit for a coprocessor, which is a power supply circuit for supplying power to an FMQL45T900 coprocessor, and comprises a voltage reduction and stabilization chip D19 for providing a power supply voltage VCC1.8 V, a power supply voltage VCC1.5 V, a power supply voltage VCC1.05 V and a power supply voltage VCC3.3 V; wherein the power supply voltage VCC3.3 V is used for supplying power to the voltage monitoring module, the clock generator, the flash memory chip and the coprocessor, and the power supply voltage VCC1.8 V, the power supply voltage VCC1.5 V and the power supply voltage VCC1.05 V are used for supplying power to the coprocessor; wherein the power supply voltage VCC1.8 V is 1.8 V voltage, the power supply voltage VCC1.5 V is 1.5 V voltage, the power supply voltage VCC1.05 V is 1.05 voltage, and the power supply voltage VCC3.3 V is 3.3 V voltage.

Description

Technical Field

[0001] The utility model relates to the field of power supply circuit design, in particular to a power supply circuit for a coprocessor. Background Art

[0002] Coprocessors are often used to accelerate specific types of computing tasks, especially in scenarios that require parallel processing or specific hardware acceleration. Designing a dedicated power supply for a coprocessor can improve system reliability, performance, and security, while also helping to reduce long-term operating costs. Therefore, a power supply circuit for a coprocessor needs to be designed accordingly. Utility Model Content

[0003] The utility model aims to at least solve the technical problems existing in the prior art, and in particular innovatively proposes a power supply circuit for a coprocessor.

[0004] In order to achieve the above-mentioned purpose of the utility model, the utility model provides a power supply circuit for a coprocessor, which is used to power the FMQL45T900 coprocessor, and the power supply circuit includes: a step-down voltage regulator chip D19 that provides a power supply voltage VCC1.8V, a power supply voltage VCC1.5V, a power supply voltage VCC1.05V, and a power supply voltage VCC3.3V; the step-down voltage regulator chip D19 is used to power a voltage monitoring module, a clock generator, and a flash memory chip; wherein the power supply voltage VCC3.3V is used to power the voltage monitoring module, the clock generator, the flash memory chip and the coprocessor, and the power supply voltage VCC1.8V, the power supply voltage VCC1.5V, and the power supply voltage VCC1.05V are used to power the coprocessor;

[0005] Among them, the power supply voltage VCC1.8V is 1.8V voltage, the power supply voltage VCC1.5V is 1.5V voltage, the power supply voltage VCC1.05V is 1.05 voltage, and the power supply voltage VCC3.3V is 3.3V voltage.

[0006] Furthermore, the step-down voltage regulator chip D19 providing the power supply voltage VCC1.8V, the power supply voltage VCC1.5V, the power supply voltage VCC1.05V, and the power supply voltage VCC3.3V includes:

[0007] The voltage output pin VOUT1_0 of the buck regulator chip D19, the voltage output pin VOUT1_1 of the buck regulator chip D19 and the voltage output pin VOUT1_2 of the buck regulator chip D19 output the power supply voltage VCC1.8V and are connected to the first end of the capacitor C514 and the first end of the capacitor C567, the second end of the capacitor C514 and the second end of the capacitor C567 are grounded, the feedback pin FB1 of the buck regulator chip D19 is connected to the first end of the resistor R235, the second end of the resistor R235 is grounded, the voltage tracking and soft start pin TRACK|SS1 of the buck regulator chip D19 is connected to the first end of the capacitor C511, the second end of the capacitor C511 is grounded, the power good indication pin PGOOD1 of the buck regulator chip D19 is connected to the first end of the resistor R231, and the second end of the resistor R231 is connected to the internal power pin INTVCC1 of the buck regulator chip D19;

[0008] The voltage output pin VOUT2_0 of the buck regulator chip D19, the voltage output pin VOUT2_1 of the buck regulator chip D19 and the voltage output pin VOUT2_2 of the buck regulator chip D19 output the power supply voltage VCC1.5V and are connected to the first end of the capacitor C515 and the first end of the capacitor C568, the second end of the capacitor C515 and the second end of the capacitor C568 are grounded, the feedback pin FB2 of the buck regulator chip D19 is connected to the first end of the resistor R236, the second end of the resistor R236 is grounded, the voltage tracking and soft start pin TRACK|SS2 of the buck regulator chip D19 is connected to the first end of the capacitor C512, the second end of the capacitor C512 is grounded, the power good indication terminal PGOOD2 of the buck regulator chip D19 is connected to the first end of the resistor R232; the first end of the resistor R232 is connected, and the second end of the resistor R232 is connected to the internal power pin INTVCC2 of the buck regulator chip D19;

[0009] The voltage output pin VOUT3_0 of the buck regulator chip D19, the voltage output pin VOUT3_1 of the buck regulator chip D19, and the voltage output pin VOUT3_2 of the buck regulator chip D19 output the power supply voltage VCC1.05V and are connected to the first end of the capacitor C516 and the first end of the capacitor C569, the second end of the capacitor C516 and the second end of the capacitor C569 are grounded, the feedback pin FB3 of the buck regulator chip D19 is connected to the first end of the resistor R237, the second end of the resistor R237 is grounded, the voltage tracking and soft start pin TRACK|SS3 of the buck regulator chip D19 is connected to the first end of the capacitor C513, the second end of the capacitor C513 is grounded, the power good indication terminal PGOOD3 of the buck regulator chip D19 is connected to the first end of the resistor R233, and the second end of the resistor R233 is connected to the internal power pin INTVCC3 of the buck regulator chip D19;

[0010] The voltage output pin VOUT4_0 of the buck regulator chip D19, the voltage output pin VOUT4_1 of the buck regulator chip D19 and the voltage output pin VOUT4_2 of the buck regulator chip D19 output the power supply voltage VCC3.3V and are connected to the first end of the capacitor C301 and the first end of the capacitor C302, the second end of the capacitor C301 and the second end of the capacitor C302 are grounded, the feedback pin FB4 of the buck regulator chip D19 is connected to the first end of the resistor R138, the second end of the resistor R138 is grounded, the voltage tracking and soft start pin TRACK|SS4 of the buck regulator chip D19 is connected to the first end of the capacitor C300, the second end of the capacitor C300 is grounded, the power good indication terminal PGOOD4 of the buck regulator chip D19 is connected to the first end of the resistor R137; the first end of the resistor R137 is connected, and the second end of the resistor R137 is connected to the internal power pin INTVCC4 of the buck regulator chip D19;

[0011] The voltage input pin VIN1_0 of the buck regulator chip D19, the voltage input pin VIN1_1 of the buck regulator chip D19, and the voltage input pin SVIN1 of the buck regulator chip D19 are connected to the power supply voltage VCC12V and the first end of the capacitor C507, the second end of the capacitor C507 is grounded, and the power good indication terminal PGOOD3 of the buck regulator chip D19 is connected to the enable terminal RUN1 of the buck regulator chip D19;

[0012] The voltage input pin VIN2_0 of the buck regulator chip D19, the voltage input pin VIN2_1 of the buck regulator chip D19, and the voltage input pin SVIN2 of the buck regulator chip D19 are connected to the power supply voltage VCC12V and the first end of the capacitor C508, and the second end of the capacitor C508 is grounded; the power good indication terminal PGOOD1 of the buck regulator chip D19 is connected to the enable terminal RUN2 of the buck regulator chip D19;

[0013] The voltage input pin VIN3_0 of the buck regulator chip D19, the voltage input pin VIN3_1 of the buck regulator chip D19, and the voltage input pin SVIN3 of the buck regulator chip D19 are connected to the power supply voltage VCC12V and the first end of the capacitor C509, and the second end of the capacitor C509 is grounded;

[0014] The voltage input pin VIN4_0 of the buck regulator chip D19, the voltage input pin VIN4_1 of the buck regulator chip D19, the voltage input pin SVIN4 of the buck regulator chip D19, and the enable pin RUN4 of the buck regulator chip D19 are connected to the power supply voltage VCC12V and the first end of the capacitor C510, and the second end of the capacitor C510 is grounded; the power good indication terminal PGOOD2 of the buck regulator chip D19 is connected to the enable terminal RUN4 of the buck regulator chip D19;

[0015] The internal power pin INTVCC1 of the buck regulator chip D19 is connected to the working mode configuration pin MODE1 of the buck regulator chip D19, and the internal power pin INTVCC2 of the buck regulator chip D19 is connected to the working mode configuration pin MODE2 of the buck regulator chip D19; the internal power pin INTVCC3 of the buck regulator chip D19 is connected to the working mode configuration pin MODE3 of the buck regulator chip D19, and the internal power pin INTVCC4 of the buck regulator chip D19 is connected to the working mode configuration pin MODE4 of the buck regulator chip D19;

[0016] The ground pin SGND of the buck regulator chip D19, the ground pin GND_0 of the buck regulator chip D19, the ground pin GND_1 of the buck regulator chip D19, the ground pin GND_2 of the buck regulator chip D19, the ground pin GND_3 of the buck regulator chip D19, the ground pin GND_4 of the buck regulator chip D19, the ground pin GND_5 of the buck regulator chip D19, the ground pin GND_6 of the buck regulator chip D19, the ground pin GND_7 of the buck regulator chip D19, the ground pin GND_8 of the buck regulator chip D19, the ground pin GND_9 of the buck regulator chip D The ground pin GND_10 of step-down voltage regulator chip D19, the ground pin GND_11 of step-down voltage regulator chip D19, the ground pin GND_12 of step-down voltage regulator chip D19, the ground pin GND_13 of step-down voltage regulator chip D19, the ground pin GND_14 of step-down voltage regulator chip D19, the ground pin GND_15 of step-down voltage regulator chip D19, the ground pin GND_16 of step-down voltage regulator chip D19, the ground pin GND_17 of step-down voltage regulator chip D19, the ground pin GND_18 of step-down voltage regulator chip D19, the ground pin GND_19 of step-down voltage regulator chip D19, and the ground pin GND_20 of step-down voltage regulator chip D19 are all grounded.

[0017] Furthermore, the ground terminal GND of the power monitoring chip D20 is connected to the first end of the capacitor C8 and the first end of the capacitor C9, the manual reset input terminal MR of the power monitoring chip D20 is connected to the first end of the capacitor C7, the first end of the resistor R10, and the reset control signal end of the coprocessor D2, the second end of the capacitor C7 is connected to the power ground, the second end of the resistor R10, the second end of the capacitor C8, the second end of the capacitor C9, the power supply voltage input terminal VCC of the coprocessor D2, and the first end of the resistor R14 are connected to the power supply VCC3.3V, the second end of the resistor R14 is connected to the reset output terminal RESET of the coprocessor D2, the first end of the capacitor C10, and the reset end of the coprocessor D2, and the second end of the capacitor C10 is connected to the power ground.

[0018] The power monitoring chip can ensure that the coprocessor can be safely reset when the power supply voltage is abnormal, preventing system instability or damage caused by power problems. This is crucial to ensuring the reliability and stability of the entire system, especially in the complex power supply scenario where the coprocessor D2 of this application has output power supply voltage VCC1.8V, power supply voltage VCC1.5V, power supply voltage VCC1.05V, and power supply voltage VCC3.3V, and there are multiple circuit outputs. Through the monitoring of the power monitoring chip, the coprocessor can reliably restart after the power is restored and continue to execute the task.

[0019] Furthermore, the circuit of the clock generator includes:

[0020] The frequency modulation end VCON of the clock generator G1 is connected to the first end of the resistor R4, and the second end of the resistor R4 and the first end of the magnetic bead L1 are connected to the power supply VCC3.3V; the second end of the magnetic bead L1 is connected to the first end of the capacitor C3 and the power supply end +VCC of the clock generator G1, and the second end of the capacitor C3 is connected to the power ground; the ground end of the clock generator G1 is connected to the power ground; the clock signal output end OUTPUT of the clock generator G1 is connected to the first end of the resistor R114, and the second end of the resistor R114 is connected to the clock signal end of the coprocessor D2.

[0021] Furthermore, the power supply of the flash memory chip includes:

[0022] The chip select terminal CS_N of the SPI flash memory chip D3 is connected to the first end of the resistor R7, the hold terminal HOLD of the SPI flash memory chip D3 is connected to the first end of the resistor R6, the write protection terminal of the SPI flash memory chip D3 is connected to the first end of the resistor R5, the second end of the resistor R5, the second end of the resistor R6, the second end of the resistor R7, the power supply terminal VCC of the SPI flash memory chip D3, and the first end of the capacitor C6 are connected to the power supply VCC3.3V, and the second end of the capacitor C6 and the ground terminal GND of the SPI flash memory chip D3 are connected to the power ground;

[0023] The clock terminal SCLK, the data transmission terminal SI|SIO0, the data transmission terminal SI|SIO01, and the reset terminal RESET_N of the SPI flash memory chip D3 are connected to the data transmission terminal and the control terminal of the coprocessor D2.

[0024] Furthermore, it also includes:

[0025] The power supply voltage VCC1.5V is connected to the first end of the resistor R69 and the first end of the capacitor C52. The second end of the resistor R69, the second end of the capacitor C52, the first end of the resistor R70, and the first end of the capacitor C53 output the reference voltage PS_DDR3_VREF (to ensure the accuracy of data transmission) and are connected to the coprocessor D2. The second end of the resistor R70 and the second end of the capacitor C53 are connected to the power ground.

[0026] Connecting a power supply voltage VCC1.5V to first ends of at least 10 parallel capacitors, and connecting second ends of the 10 parallel capacitors to a power supply ground;

[0027] Furthermore, the model of the buck regulator chip D19 is LTM4644EY#PBF.

[0028] Furthermore, the model of the power monitoring chip D20 is MAX811TEUS.

[0029] Furthermore, the model of the SPI flash memory chip D3 is W25Q256FVF1G.

[0030] In summary, due to the adoption of the above technical solution, the utility model can meet the power supply requirements of the FMQL45T900 coprocessor, thereby ensuring the reliability, performance and safety of the FMQL45T900 coprocessor, and also helps to reduce long-term operating costs.

[0031] Additional aspects and advantages of the present invention will be given in part in the following description, and in part will become apparent from the following description, or will be learned through the practice of the present invention. BRIEF DESCRIPTION OF THE DRAWINGS

[0032] The above and / or additional aspects and advantages of the present invention will become apparent and easily understood from the description of the embodiments in conjunction with the following drawings, in which:

[0033] Figure 1 It is a connection schematic block diagram of the utility model.

[0034] Figure 2 It is a circuit connection diagram of the power module of the utility model.

[0035] Figure 3 The utility model is a circuit connection diagram of a clock generator.

[0036] Figure 4 It is a circuit connection diagram of the voltage monitoring module of the utility model.

[0037] Figure 5 It is a circuit connection diagram of some coprocessors of the utility model.

[0038] Figure 6 It is a circuit connection diagram of some coprocessors of the utility model.

[0039] Figure 7 The utility model is a circuit connection diagram of the flash memory chip. DETAILED DESCRIPTION

[0040] The embodiments of the present invention are described in detail below, and examples of the embodiments are shown in the accompanying drawings, wherein the same or similar reference numerals throughout represent the same or similar elements or elements having the same or similar functions. The embodiments described below with reference to the accompanying drawings are exemplary and are only used to explain the present invention, and cannot be understood as limiting the present invention.

[0041] The utility model provides a power supply circuit for a coprocessor, such as Figure 1 As shown, it includes: a coprocessor, a flash memory chip, a power module, a voltage monitoring module, and a clock generator, wherein the power module is connected to the coprocessor, the flash memory chip, the voltage monitoring module, and the clock generator to provide power for the coprocessor, the flash memory chip, the voltage monitoring module, and the clock generator; the flash memory chip, the voltage monitoring module, and the clock generator are all connected to the coprocessor.

[0042] The circuit connection diagram of the power module is as follows: Figure 2 As shown:

[0043] The voltage output pin VOUT1_0 of the buck regulator chip D19, the voltage output pin VOUT1_1 of the buck regulator chip D19 and the voltage output pin VOUT1_2 of the buck regulator chip D19 output the power supply voltage VCC1.8V and are connected to the first end of the capacitor C514 and the first end of the capacitor C567, the second end of the capacitor C514 and the second end of the capacitor C567 are grounded, the feedback pin FB1 of the buck regulator chip D19 is connected to the first end of the resistor R235, the second end of the resistor R235 is grounded, the voltage tracking and soft start pin TRACK|SS1 of the buck regulator chip D19 is connected to the first end of the capacitor C511, the second end of the capacitor C511 is grounded, the power good indication pin PGOOD1 of the buck regulator chip D19 is connected to the first end of the resistor R231, and the second end of the resistor R231 is connected to the internal power pin INTVCC1 of the buck regulator chip D19;

[0044] The voltage output pin VOUT2_0 of the buck regulator chip D19, the voltage output pin VOUT2_1 of the buck regulator chip D19 and the voltage output pin VOUT2_2 of the buck regulator chip D19 output the power supply voltage VCC1.5V and are connected to the first end of the capacitor C515 and the first end of the capacitor C568, the second end of the capacitor C515 and the second end of the capacitor C568 are grounded, the feedback pin FB2 of the buck regulator chip D19 is connected to the first end of the resistor R236, the second end of the resistor R236 is grounded, the voltage tracking and soft start pin TRACK|SS2 of the buck regulator chip D19 is connected to the first end of the capacitor C512, the second end of the capacitor C512 is grounded, the power good indication terminal PGOOD2 of the buck regulator chip D19 is connected to the first end of the resistor R232; the first end of the resistor R232 is connected, and the second end of the resistor R232 is connected to the internal power pin INTVCC2 of the buck regulator chip D19;

[0045] The voltage output pin VOUT3_0 of the buck regulator chip D19, the voltage output pin VOUT3_1 of the buck regulator chip D19, and the voltage output pin VOUT3_2 of the buck regulator chip D19 output the power supply voltage VCC1.05V and are connected to the first end of the capacitor C516 and the first end of the capacitor C569, the second end of the capacitor C516 and the second end of the capacitor C569 are grounded, the feedback pin FB3 of the buck regulator chip D19 is connected to the first end of the resistor R237, the second end of the resistor R237 is grounded, the voltage tracking and soft start pin TRACK|SS3 of the buck regulator chip D19 is connected to the first end of the capacitor C513, the second end of the capacitor C513 is grounded, the power good indication terminal PGOOD3 of the buck regulator chip D19 is connected to the first end of the resistor R233, and the second end of the resistor R233 is connected to the internal power pin INTVCC3 of the buck regulator chip D19;

[0046] The voltage output pin VOUT4_0 of the buck regulator chip D19, the voltage output pin VOUT4_1 of the buck regulator chip D19 and the voltage output pin VOUT4_2 of the buck regulator chip D19 output the power supply voltage VCC3.3V and are connected to the first end of the capacitor C301 and the first end of the capacitor C302, the second end of the capacitor C301 and the second end of the capacitor C302 are grounded, the feedback pin FB4 of the buck regulator chip D19 is connected to the first end of the resistor R138, the second end of the resistor R138 is grounded, the voltage tracking and soft start pin TRACK|SS4 of the buck regulator chip D19 is connected to the first end of the capacitor C300, the second end of the capacitor C300 is grounded, the power good indication terminal PGOOD4 of the buck regulator chip D19 is connected to the first end of the resistor R137; the first end of the resistor R137 is connected, and the second end of the resistor R137 is connected to the internal power pin INTVCC4 of the buck regulator chip D19;

[0047] The voltage input pin VIN1_0 of the buck regulator chip D19, the voltage input pin VIN1_1 of the buck regulator chip D19, and the voltage input pin SVIN1 of the buck regulator chip D19 are connected to the power supply voltage VCC12V and the first end of the capacitor C507, the second end of the capacitor C507 is grounded, and the power good indication terminal PGOOD3 of the buck regulator chip D19 is connected to the enable terminal RUN1 of the buck regulator chip D19;

[0048] The voltage input pin VIN2_0 of the buck regulator chip D19, the voltage input pin VIN2_1 of the buck regulator chip D19, and the voltage input pin SVIN2 of the buck regulator chip D19 are connected to the power supply voltage VCC12V and the first end of the capacitor C508, and the second end of the capacitor C508 is grounded; the power good indication terminal PGOOD1 of the buck regulator chip D19 is connected to the enable terminal RUN2 of the buck regulator chip D19;

[0049] The voltage input pin VIN3_0 of the buck regulator chip D19, the voltage input pin VIN3_1 of the buck regulator chip D19, and the voltage input pin SVIN3 of the buck regulator chip D19 are connected to the power supply voltage VCC12V and the first end of the capacitor C509, and the second end of the capacitor C509 is grounded;

[0050] The voltage input pin VIN4_0 of the buck regulator chip D19, the voltage input pin VIN4_1 of the buck regulator chip D19, the voltage input pin SVIN4 of the buck regulator chip D19, and the enable pin RUN4 of the buck regulator chip D19 are connected to the power supply voltage VCC12V and the first end of the capacitor C510, and the second end of the capacitor C510 is grounded; the power good indication terminal PGOOD2 of the buck regulator chip D19 is connected to the enable terminal RUN4 of the buck regulator chip D19;

[0051] The internal power pin INTVCC1 of the buck regulator chip D19 is connected to the working mode configuration pin MODE1 of the buck regulator chip D19, and the internal power pin INTVCC2 of the buck regulator chip D19 is connected to the working mode configuration pin MODE2 of the buck regulator chip D19; the internal power pin INTVCC3 of the buck regulator chip D19 is connected to the working mode configuration pin MODE3 of the buck regulator chip D19, and the internal power pin INTVCC4 of the buck regulator chip D19 is connected to the working mode configuration pin MODE4 of the buck regulator chip D19;

[0052] The ground pin SGND of the buck regulator chip D19, the ground pin GND_0 of the buck regulator chip D19, the ground pin GND_1 of the buck regulator chip D19, the ground pin GND_2 of the buck regulator chip D19, the ground pin GND_3 of the buck regulator chip D19, the ground pin GND_4 of the buck regulator chip D19, the ground pin GND_5 of the buck regulator chip D19, the ground pin GND_6 of the buck regulator chip D19, the ground pin GND_7 of the buck regulator chip D19, the ground pin GND_8 of the buck regulator chip D19, the ground pin GND_9 of the buck regulator chip D The ground pin GND_10 of step-down voltage regulator chip D19, the ground pin GND_11 of step-down voltage regulator chip D19, the ground pin GND_12 of step-down voltage regulator chip D19, the ground pin GND_13 of step-down voltage regulator chip D19, the ground pin GND_14 of step-down voltage regulator chip D19, the ground pin GND_15 of step-down voltage regulator chip D19, the ground pin GND_16 of step-down voltage regulator chip D19, the ground pin GND_17 of step-down voltage regulator chip D19, the ground pin GND_18 of step-down voltage regulator chip D19, the ground pin GND_19 of step-down voltage regulator chip D19, and the ground pin GND_20 of step-down voltage regulator chip D19 are all grounded.

[0053] The model of the buck regulator chip D19 is LTM4644EY#PBF.

[0054] The circuit connection diagram of the clock generator is as follows Figure 3 As shown: the frequency modulation end VCON of the clock generator G1 is connected to the first end of the resistor R4, the second end of the resistor R4 and the first end of the magnetic bead L1 are connected to the power supply VCC3.3V; the second end of the magnetic bead L1 is connected to the first end of the capacitor C3 and the power supply end +VCC of the clock generator G1, and the second end of the capacitor C3 is connected to the power ground; the ground end of the clock generator G1 is connected to the power ground; the clock signal output end OUTPUT of the clock generator G1 is connected to the first end of the resistor R114, and the second end of the resistor R114 is connected to the clock signal end of the coprocessor D2.

[0055] The circuit connection diagram of the voltage monitoring module is as follows: Figure 4As shown. The ground terminal GND of the power monitoring chip D20 is connected to the first end of the capacitor C8 and the first end of the capacitor C9, the manual reset input terminal MR of the power monitoring chip D20 is connected to the first end of the capacitor C7, the first end of the resistor R10, and the reset control signal terminal of the coprocessor D2, the second end of the capacitor C7 is connected to the power ground, the second end of the resistor R10, the second end of the capacitor C8, the second end of the capacitor C9, the power supply voltage input terminal VCC of the coprocessor D2, and the first end of the resistor R14 are connected to the power supply VCC3.3V, the second end of the resistor R14 is connected to the reset output terminal RESET of the coprocessor D2, the first end of the capacitor C10, and the reset terminal of the coprocessor D2, and the second end of the capacitor C10 is connected to the power ground.

[0056] The model of the power monitoring chip D20 is MAX811TEUS, which has a voltage comparator inside, which is used to continuously monitor the input power supply voltage (VCC) and compare it with the preset threshold voltage. If the power supply voltage (VCC) drops below the threshold voltage, the comparator will trigger the output, causing the reset pin (!RESET) to output a low level. This low-level reset signal notifies the coprocessor to reset. The power monitoring chip can ensure that the coprocessor can be safely reset when the power supply voltage is abnormal, preventing system instability or damage caused by power problems. This is crucial to ensuring the reliability and stability of the entire system, especially in complex power supply scenarios where the coprocessor D2 of this application has multiple circuit outputs. Through the monitoring of the power monitoring chip, the coprocessor can reliably restart and continue to execute tasks after the power is restored.

[0057] The circuit connection diagram of the coprocessor is as follows Figure 5-6 As shown: the power input terminals VCCAUX_R10, VCCAUX_P11, VCCAUX_N10, and VCCAUX_L10 of the coprocessor D2 are connected to the first end of capacitor C93, the first end of capacitor C95, the first end of capacitor C97, the first end of capacitor C99, the first end of capacitor C101, the first end of capacitor C103, the first end of capacitor C105, the first end of capacitor C107, the first end of capacitor C110, the first end of capacitor C113, and the first end of capacitor C116 with the power supply VCC1.8V; the second end of capacitor C93, the second end of capacitor C95, the second end of capacitor C97, the second end of capacitor C99, the second end of capacitor C101, the second end of capacitor C103, the second end of capacitor C105, the second end of capacitor C107, the second end of capacitor C110, the second end of capacitor C113, and the second end of capacitor C116 are connected to the power ground;

[0058] The power input terminals VCCPAUX_T9, VCCPAUX_P9, VCCPAUX_M9 and VCCPAUX_K9 of the coprocessor D2 are connected to the first end of capacitor C94, the first end of capacitor C96, the first end of capacitor C98, the first end of capacitor C100, the first end of capacitor C102, the first end of capacitor C104, the first end of capacitor C106, the first end of capacitor C108, the first end of capacitor C111, the first end of capacitor C114 and the first end of capacitor C117 and the power supply VCC1.8V; the second end of capacitor C94, the second end of capacitor C96, the second end of capacitor C98, the second end of capacitor C100, the second end of capacitor C102, the second end of capacitor C104, the second end of capacitor C106, the second end of capacitor C108, the second end of capacitor C111, the second end of capacitor C114 and the second end of capacitor C117 are connected to the power ground;

[0059] The PLL-related power input terminal VCCPLL_H10 of the coprocessor D2 is connected to the first end of capacitor C109, the first end of capacitor C112, the first end of capacitor C115, the first end of capacitor C118, and the first end of the multilayer chip resistor L9. The second end of the multilayer chip resistor L9 is connected to the power supply VCC1.8V, and the second end of capacitor C109, the second end of capacitor C112, the second end of capacitor C115, and the second end of capacitor C118 are connected to the power ground; wherein, the multilayer chip resistor L9 is used for power supply filtering, signal coupling, and resonant circuit.

[0060] The power input terminals VCCPINT_R8, VCCPINT_N8, VCCPINT_L8, VCCPINT_J8, VCCPINT_H9 and VCCPINT_G8 of the coprocessor D2 are connected to the first end of the capacitor C119, the first end of the capacitor C122, the first end of the capacitor C125, the first end of the capacitor C128, the first end of the capacitor C131, the first end of the capacitor C134, the first end of the capacitor C137, the first end of the capacitor C139, the first end of the capacitor C141, the first end of the capacitor C143 and the first end of the capacitor C145 and the power supply VCC 1.05V; the second end of the capacitor C119, the second end of the capacitor C122, the second end of the capacitor C125, the second end of the capacitor C128, the second end of the capacitor C131, the second end of the capacitor C134, the second end of the capacitor C137, the second end of the capacitor C139, the second end of the capacitor C141, the second end of the capacitor C143 and the second end of the capacitor C145 are connected to the power ground;

[0061] The internal power supply voltage input terminals CCINT_R14, VCCINT_P13, VCCINT_N14, VCCINT_M13, VCCINT_L14, and VCCINT_K13 of the coprocessor D2 and the first end of the capacitor C120, the first end of the capacitor C123, the first end of the capacitor C126, the first end of the capacitor C129, the first end of the capacitor C132, the first end of the capacitor C135, the first end of the capacitor C138, the first end of the capacitor C140, and the first end of the capacitor C141. The first end of C142, the first end of capacitor C144, and the first end of capacitor C146 are connected to the power supply VCC1.05V; the second end of capacitor C120, the second end of capacitor C123, the second end of capacitor C126, the second end of capacitor C129, the second end of capacitor C132, the second end of capacitor C135, the second end of capacitor C138, the second end of capacitor C140, the second end of capacitor C142, the second end of capacitor C144, and the second end of capacitor C146 are connected to the power supply ground;

[0062] The random access memory power supply voltage input terminals VCCBRAM_J10 and VCCBRAM_H11 of the coprocessor D2 are connected to the first end of capacitor C121, the first end of capacitor C124, the first end of capacitor C127, the first end of capacitor C130, the first end of capacitor C133, and the first end of capacitor C136, and the second end of capacitor C121, the second end of capacitor C124, the second end of capacitor C127, the second end of capacitor C130, the second end of capacitor C133, and the second end of capacitor C136 are connected to the power ground.

[0063] The model of coprocessor D2 is FMQL45T900. Several parallel resistors are connected to the power line of the coprocessor. This is because the interference ripple frequency in the circuit is very wide. A certain type of capacitor can only filter out interference ripples in a certain frequency band due to the existence of parasitic inductance. Therefore, a power supply needs a combination of capacitors with different capacitance values ​​to filter out the interference ripple on the power supply. In addition, there are many power PINs of coprocessor D2, and at least one capacitor is required for each PIN. Therefore, there are multiple capacitors on the power supply.

[0064] The circuit connection diagram of the flash memory chip is as follows Figure 7 As shown: the chip select terminal CS_N of the SPI flash memory chip D3 is connected to the first end of the resistor R7, the hold terminal HOLD of the SPI flash memory chip D3 is connected to the first end of the resistor R6, the write protection terminal of the SPI flash memory chip D3 is connected to the first end of the resistor R5, the second end of the resistor R5, the second end of the resistor R6, the second end of the resistor R7, the power supply terminal VCC of the SPI flash memory chip D3, and the first end of the capacitor C6 are connected to the power supply VCC3.3V, and the second end of the capacitor C6 and the ground terminal GND of the SPI flash memory chip D3 are connected to the power ground;

[0065] The clock terminal SCLK, the data transmission terminal SI|SIO0, the data transmission terminal SI|SIO01, and the reset terminal RESET_N of the SPI flash memory chip D3 are connected to the data transmission terminal and the control terminal of the coprocessor D2;

[0066] Among them, the model of SPI flash memory chip D3 is W25Q256FVF1G.

[0067] SPI flash memory chip is a non-volatile memory that uses SPI protocol for communication. It can keep the stored data from being lost when power is off.

[0068] Although the embodiments of the present invention have been shown and described, those skilled in the art will appreciate that various changes, modifications, substitutions and variations may be made to the embodiments without departing from the principles and spirit of the present invention, and that the scope of the present invention is defined by the claims and their equivalents.

Claims

1. A power supply circuit for a coprocessor, characterized in that: A power supply circuit for powering the FMQL45T900 coprocessor, the power supply circuit comprising: a step-down voltage regulator chip D19 providing power supply voltages VCC1.8V, VCC1.5V, VCC1.05V and VCC3.3V; wherein the power supply voltage VCC3.3V is used to power a voltage monitoring module, a clock generator, a flash memory chip and a coprocessor, and the power supply voltages VCC1.8V, VCC1.5V and VCC1.05V are used to power the coprocessor; Among them, the power supply voltage VCC1.8V is 1.8V voltage, the power supply voltage VCC1.5V is 1.5V voltage, the power supply voltage VCC1.05V is 1.05 voltage, and the power supply voltage VCC3.3V is 3.3V voltage.

2. A power supply circuit for a coprocessor according to claim 1, characterized in that: The step-down voltage regulator chip D19 that provides power supply voltage VCC1.8V, power supply voltage VCC1.5V, power supply voltage VCC1.05V, and power supply voltage VCC3.3V includes: The voltage output pin VOUT1_0 of the buck regulator chip D19, the voltage output pin VOUT1_1 of the buck regulator chip D19 and the voltage output pin VOUT1_2 of the buck regulator chip D19 output the power supply voltage VCC1.8V and are connected to the first end of the capacitor C514 and the first end of the capacitor C567, the second end of the capacitor C514 and the second end of the capacitor C567 are grounded, the feedback pin FB1 of the buck regulator chip D19 is connected to the first end of the resistor R235, the second end of the resistor R235 is grounded, the voltage tracking and soft start pin TRACK|SS1 of the buck regulator chip D19 is connected to the first end of the capacitor C511, the second end of the capacitor C511 is grounded, the power good indication pin PGOOD1 of the buck regulator chip D19 is connected to the first end of the resistor R231, and the second end of the resistor R231 is connected to the internal power pin INTVCC1 of the buck regulator chip D19; The voltage output pin VOUT20 of the buck regulator chip D19, the voltage output pin VOUT21 of the buck regulator chip D19 and the voltage output pin VOUT22 of the buck regulator chip D19 output the power supply voltage VCC1.5V and are connected to the first end of the capacitor C515 and the first end of the capacitor C568, the second end of the capacitor C515 and the second end of the capacitor C568 are grounded, the feedback pin FB2 of the buck regulator chip D19 is connected to the first end of the resistor R236, the second end of the resistor R236 is grounded, the voltage tracking and soft start pin TRACK|SS2 of the buck regulator chip D19 is connected to the first end of the capacitor C512, the second end of the capacitor C512 is grounded, the power good indication terminal PGOOD2 of the buck regulator chip D19 is connected to the first end of the resistor R232; the first end of the resistor R232 is connected, and the second end of the resistor R232 is connected to the internal power pin INTVCC2 of the buck regulator chip D19; The voltage output pin VOUT30 of the buck regulator chip D19, the voltage output pin VOUT31 of the buck regulator chip D19, and the voltage output pin VOUT32 of the buck regulator chip D19 output the power supply voltage VCC1.05V and are connected to the first end of the capacitor C516 and the first end of the capacitor C569, the second end of the capacitor C516 and the second end of the capacitor C569 are grounded, the feedback pin FB3 of the buck regulator chip D19 is connected to the first end of the resistor R237, the second end of the resistor R237 is grounded, the voltage tracking and soft start pin TRACK|SS3 of the buck regulator chip D19 is connected to the first end of the capacitor C513, the second end of the capacitor C513 is grounded, the power good indication terminal PGOOD3 of the buck regulator chip D19 is connected to the first end of the resistor R233, and the second end of the resistor R233 is connected to the internal power pin INTVCC3 of the buck regulator chip D19; The voltage output pin VOUT40 of the buck regulator chip D19, the voltage output pin VOUT41 of the buck regulator chip D19 and the voltage output pin VOUT42 of the buck regulator chip D19 output the power supply voltage VCC3.3V and are connected to the first end of the capacitor C301 and the first end of the capacitor C302, the second end of the capacitor C301 and the second end of the capacitor C302 are grounded, the feedback pin FB4 of the buck regulator chip D19 is connected to the first end of the resistor R138, the second end of the resistor R138 is grounded, the voltage tracking and soft start pin TRACK|SS4 of the buck regulator chip D19 is connected to the first end of the capacitor C300, the second end of the capacitor C300 is grounded, the power good indication terminal PGOOD4 of the buck regulator chip D19 is connected to the first end of the resistor R137; the first end of the resistor R137 is connected, and the second end of the resistor R137 is connected to the internal power pin INTVCC4 of the buck regulator chip D19; The voltage input pin VIN1_0 of the buck regulator chip D19, the voltage input pin VIN1_1 of the buck regulator chip D19, and the voltage input pin SVIN1 of the buck regulator chip D19 are connected to the power supply voltage VCC12V and the first end of the capacitor C507, the second end of the capacitor C507 is grounded, and the power good indication terminal PGOOD3 of the buck regulator chip D19 is connected to the enable terminal RUN1 of the buck regulator chip D19; The voltage input pin VIN20 of the buck regulator chip D19, the voltage input pin VIN21 of the buck regulator chip D19, and the voltage input pin SVIN2 of the buck regulator chip D19 are connected to the power supply voltage VCC12V and the first end of the capacitor C508, and the second end of the capacitor C508 is grounded; the power good indication terminal PGOOD1 of the buck regulator chip D19 is connected to the enable terminal RUN2 of the buck regulator chip D19; The voltage input pin VIN30 of the buck regulator chip D19, the voltage input pin VIN31 of the buck regulator chip D19, and the voltage input pin SVIN3 of the buck regulator chip D19 are connected to the power supply voltage VCC12V and the first end of the capacitor C509, and the second end of the capacitor C509 is grounded; The voltage input pin VIN40 of the buck voltage regulator chip D19, the voltage input pin VIN41 of the buck voltage regulator chip D19, the voltage input pin SVIN4 of the buck voltage regulator chip D19, and the enable pin RUN4 of the buck voltage regulator chip D19 are connected to the power supply voltage VCC12V and the first end of the capacitor C510, and the second end of the capacitor C510 is grounded; the power good indication terminal PGOOD2 of the buck voltage regulator chip D19 is connected to the enable terminal RUN4 of the buck voltage regulator chip D19; The internal power pin INTVCC1 of the buck regulator chip D19 is connected to the working mode configuration pin MODE1 of the buck regulator chip D19, and the internal power pin INTVCC2 of the buck regulator chip D19 is connected to the working mode configuration pin MODE2 of the buck regulator chip D19; the internal power pin INTVCC3 of the buck regulator chip D19 is connected to the working mode configuration pin MODE3 of the buck regulator chip D19, and the internal power pin INTVCC4 of the buck regulator chip D19 is connected to the working mode configuration pin MODE4 of the buck regulator chip D19; The ground pin SGND of the buck regulator chip D19, the ground pin GND 0 of the buck regulator chip D19, the ground pin GND 1 of the buck regulator chip D19, the ground pin GND 2 of the buck regulator chip D19, the ground pin GND 3 of the buck regulator chip D19, the ground pin GND 4 of the buck regulator chip D19, the ground pin GND_5 of the buck regulator chip D19, the ground pin GND_6 of the buck regulator chip D19, the ground pin GND_7 of the buck regulator chip D19, the ground pin GND_8 of the buck regulator chip D19, the ground pin GND_9 of the buck regulator chip D19, the ground pin GND_10 of the buck regulator chip D19, the ground pin GND_11 of the buck regulator chip D19, the ground pin GND_12 of the buck regulator chip D19, The ground pin GND_13 of the buck regulator chip D19, the ground pin GND_14 of the buck regulator chip D19, the ground pin GND_15 of the buck regulator chip D19, the ground pin GND_16 of the buck regulator chip D19, the ground pin GND_17 of the buck regulator chip D19, the ground pin GND_18 of the buck regulator chip D19, the ground pin GND_19 of the buck regulator chip D19, and the ground pin GND_20 of the buck regulator chip D19 are all grounded.

3. A power supply circuit for a coprocessor according to claim 1, characterized in that: The voltage monitoring module comprises: The ground terminal GND of the power monitoring chip D20 is connected to the first end of the capacitor C8 and the first end of the capacitor C9. The manual reset input terminal MR of the power monitoring chip D20 is connected to the first end of the capacitor C7, the first end of the resistor R10, and the reset control signal end of the coprocessor D2. The second end of the capacitor C7 is connected to the power ground. The second end of the resistor R10, the second end of the capacitor C8, the second end of the capacitor C9, the power supply voltage input terminal VCC of the coprocessor D2, and the first end of the resistor R14 are connected to the power supply VCC3.3V. The second end of the resistor R14 is connected to the reset output terminal RESET of the coprocessor D2, the first end of the capacitor C10, and the reset end of the coprocessor D2. The second end of the capacitor C10 is connected to the power ground.

4. A power supply circuit for a coprocessor according to claim 1, characterized in that: The circuit of the clock generator comprises: The frequency modulation end VCON of the clock generator G1 is connected to the first end of the resistor R4, and the second end of the resistor R4 and the first end of the magnetic bead L1 are connected to the power supply VCC3.3V; the second end of the magnetic bead L1 is connected to the first end of the capacitor C3 and the power supply end +VCC of the clock generator G1, and the second end of the capacitor C3 is connected to the power ground; the ground end of the clock generator G1 is connected to the power ground; the clock signal output end OUTPUT of the clock generator G1 is connected to the first end of the resistor R114, and the second end of the resistor R114 is connected to the clock signal end of the coprocessor D2.

5. The power supply circuit for a coprocessor according to claim 1, characterized in that: The power supply of the flash memory chip includes: The chip select terminal CS_N of the SPI flash memory chip D3 is connected to the first end of the resistor R7, the hold terminal HOLD of the SPI flash memory chip D3 is connected to the first end of the resistor R6, the write protection terminal of the SPI flash memory chip D3 is connected to the first end of the resistor R5, the second end of the resistor R5, the second end of the resistor R6, the second end of the resistor R7, the power supply terminal VCC of the SPI flash memory chip D3, and the first end of the capacitor C6 are connected to the power supply VCC3.3V, and the second end of the capacitor C6 and the ground terminal GND of the SPI flash memory chip D3 are connected to the power ground; The clock terminal SCLK, the data transmission terminal SI|SIO0, the data transmission terminal SI|SIO01, and the reset terminal RESET_N of the SPI flash memory chip D3 are connected to the data transmission terminal and the control terminal of the coprocessor D2.

6. The power supply circuit for a coprocessor according to claim 1, characterized in that: Also includes: The power supply voltage VCC1.5V is connected to the first end of the resistor R69 and the first end of the capacitor C52. The second end of the resistor R69, the second end of the capacitor C52, the first end of the resistor R70, and the first end of the capacitor C53 output the reference voltage PSDDR3_VREF and connect to the coprocessor D2. The second end of the resistor R70 and the second end of the capacitor C53 are connected to the power ground. A power supply voltage VCC1.5V is connected to first ends of at least 10 parallel capacitors, and second ends of the 10 parallel capacitors are connected to a power supply ground.

7. A power supply circuit for a coprocessor according to claim 1, characterized in that: The model of the buck regulator chip D19 is LTM4644EY#PBF.

8. The power supply circuit for a coprocessor according to claim 3, characterized in that: The model of the power monitoring chip D20 is MAX811TEUS.

9. The power supply circuit for a coprocessor according to claim 5, characterized in that: The model of SPI flash memory chip D3 is W25Q256FVF1G.

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