Server

Abstract

The embodiment of the utility model belongs to the technical field of computing equipment, and provides a server. The server comprises a mainboard, a function daughter board, a board end connector and a cable, wherein the mainboard is provided with a processor; one board end connector is arranged close to the processor, the other board end connector is arranged close to the function daughter board, the cable comprises a lead and cable connectors located at the two ends of the lead, and the two cable connectors are connected with the two board end connectors in an inserted mode respectively so as to electrically connect the function daughter board and the processor; the cable connector comprises an identification pin pair and a plurality of differential pin pairs, and the plurality of differential pin pairs are symmetrically arranged on the two sides of the identification pin pair. The pins in the board end connector and the pins in the cable connector are arranged in a one-to-one correspondence manner. According to the server provided by the embodiment of the invention, a large number of function daughter boards can be electrically connected with the mainboard through cables of a small number of models.

Description

Technical Field

[0001] The embodiments of the present application relate to the technical field of computing devices, and in particular, to a server. Background Art

[0002] With the rise of big data, cloud computing and artificial intelligence, the requirements for signal transmission rates between various components inside the server are getting higher and higher.

[0003] The server includes a mainboard and multiple PCIE sub-boards, and the PCIE sub-boards and the mainboard can be electrically connected through cables. In servers of different specifications, the spacing between the mainboard and the PCIE sub-boards is different, so servers of different specifications need to be configured with different types of cables. In addition, in servers of the same specification, different types of cables are also required between different PCIE sub-boards and the mainboard, so different types of cables are also required in servers of the same specification.

[0004] In the related art, there are many types of cables in servers. Utility Model Content

[0005] An embodiment of the present application provides a server in which a larger number of functional sub-boards can be electrically connected to a main board through cables of fewer types.

[0006] In the first aspect, an embodiment of the present application provides a server, including a main board, a functional sub-board, a board-end connector and a cable, wherein the main board has a processor; one board-end connector is arranged close to the processor, and the other board-end connector is arranged close to the functional sub-board, the cable includes a lead and a cable connector located at both ends of the lead, the two cable connectors are respectively plugged into the two board-end connectors to electrically connect the functional sub-board and the processor; the cable connector includes an identification pin pair and multiple pairs of differential pin pairs, and the multiple pairs of differential pin pairs are symmetrically arranged on both sides of the identification pin pair; the pins in the board-end connector are arranged in a one-to-one correspondence with the pins in the cable connector.

[0007] The server provided in the embodiment of the present application is provided with a mainboard, a functional sub-board, a board-end connector and a cable, wherein the mainboard has a processor; one board-end connector is provided close to the processor, and the other board-end connector is provided close to the functional sub-board; the cable includes a lead and a cable connector located at both ends of the lead, and the two cable connectors are respectively plugged with the two board-end connectors to electrically connect the functional sub-board and the processor; the cable connector includes an identification pin pair and a plurality of differential pin pairs, and the plurality of differential pin pairs are symmetrically arranged on both sides of the identification pin pair; the pins in the board-end connector are arranged in a one-to-one correspondence with the pins in the cable connector, so that when the cable connector and the board-end connector are forwardly inserted and reversely inserted, the differential pin pairs in the cable connector and the differential pin pairs in the board-end connector can correspond to each other and be plugged in one by one, providing a physical basis for signal transmission; regardless of whether the cable connector and the board-end connector are forwardly inserted or reversely inserted, the identification pin pairs in the cable connector can contact the identification pin pairs of the board-end connector, so that when forwardly inserted, the signal can be transmitted in the sequence of forward insertion, and when reversely inserted, the signal can be transmitted in the sequence of reverse insertion, so that the cable connector and the board-end connector can be forwardly and reversely inserted. Therefore, when the orientation of the board-end connector is different, there is no need to flip the cable, so that the functional sub-boards with the same spacing as the processor can use the same type of cable to connect to the processor, thereby reducing the type of cables in the server.

[0008] In a possible implementation, the server provided in the embodiment of the present application has multiple functional sub-boards, and the multiple functional sub-boards are electrically connected to the main board through cables.

[0009] In a possible implementation, in the server provided by the embodiment of the present application, the identification pin pair includes a first identification pin and a second identification pin, and the first identification pin and the second identification pin are rotationally symmetric.

[0010] In a possible implementation manner, in the server provided by the embodiment of the present application, the board-end connector includes a mainboard-end connector and a daughterboard-end connector, the mainboard-end connector is arranged on the mainboard close to the processor, and the daughterboard-end connector is arranged close to the functional daughterboard; the cable connector includes a first cable connector and a second cable connector, the first cable connector is plugged into the mainboard-end connector, and the second cable connector is plugged into the daughterboard-end connector;

[0011] The server also includes a signal processing module, which is arranged at one end of the first cable connector and is electrically connected to the processor.

[0012] In a possible implementation, in the server provided in the embodiment of the present application, the signal processing module is disposed on the mainboard, and the mainboard-side connector and the processor are both electrically connected to the signal processing module.

[0013] In a possible implementation, in the server provided in the embodiment of the present application, the signal processing module is disposed between the first cable connector and the lead, and the lead and the first cable connector are both electrically connected to the signal processing module.

[0014] In a possible implementation, in the server provided in the embodiment of the present application, an identification label is provided on a side of the cable close to the first cable connector.

[0015] In a possible implementation, in the server provided in the embodiment of the present application, the cable connector further includes a plurality of pairs of grounding pins, and the plurality of pairs of grounding pins are symmetrically arranged on both sides of the identification pin pair.

[0016] In a possible implementation, in the server provided in the embodiment of the present application, the functional sub-board is a PCIE sub-board.

[0017] In a possible implementation, the server provided in the embodiment of the present application further includes a backplane, and multiple functional sub-boards are plugged into the backplane. The backplane is provided with multiple sub-board end connectors, and the sub-board end connectors are arranged one-to-one correspondingly to the functional sub-boards. BRIEF DESCRIPTION OF THE DRAWINGS

[0018] Figure 1 Schematic diagram of the structure of the server provided in the embodiment of the present application Figure 1 ;

[0019] Figure 2 Schematic diagram of the structure of the cable in the server provided in the embodiment of the present application Figure 1 ;

[0020] Figure 3 Schematic diagram of the internal structure of the cable connector in the server provided in the embodiment of the present application Figure 1 ;

[0021] Figure 4 A schematic diagram comparing the forward and reverse insertion of a cable connector in a server provided in an embodiment of the present application;

[0022] Figure 5 Schematic diagram of the internal structure of the cable connector in the server provided in the embodiment of the present application Figure 2 ;

[0023] Figure 6 Schematic diagram of the structure of the server provided in the embodiment of the present application Figure 2 ;

[0024] Figure 7 for Figure 6 A top view of

[0025] Figure 8 Schematic diagram of the structure of the server provided in the embodiment of the present application Figure 3 ;

[0026] Fig. 9 A schematic diagram of the connection between the signal processing module and the lead and cable connector in the server provided in an embodiment of the present application;

[0027] Fig.10 Schematic diagram of the structure of the cable in the server provided in the embodiment of the present application Figure 2 ;

[0028] Fig.11 Schematic diagram of the structure of the server provided in the embodiment of the present application Figure 4 .

[0029] Description of reference numerals:

[0030] 100. Server;

[0031] 110, motherboard; 111, processor;

[0032] 120, functional sub-board; 121, first functional sub-board; 122, second functional sub-board; 123, third functional sub-board; 124, fourth functional sub-board;

[0033] 130, board end connector;

[0034] 131, mainboard-side connector; 1311, first mainboard-side connector; 1312, second mainboard-side connector; 1313, third mainboard-side connector; 1314, fourth mainboard-side connector;

[0035] 132, daughter board end connector; 1321, first daughter board end connector; 1322, second daughter board end connector; 1323, third daughter board end connector; 1324, fourth daughter board end connector;

[0036] 140. Cable; 141. First cable;

[0037] 1411, lead wire; 1411a, wire core; 1411b, shielding sheath;

[0038] 1412, cable connector; 1412a, first cable connector; 1412b, second cable connector;

[0039] 1413, identification pin pair; 1413a, first identification pin; 1413b, second identification pin;

[0040] 1414, differential pin pair; 1414a, first differential pin; 1414b, second differential pin;

[0041] 1415, ground pin pair;

[0042] 1416, other pin pairs;

[0043] 142. second cable; 143. third cable; 144. fourth cable; 145. identification tag;

[0044] 150, signal processing module; 151, first pad; 152, second pad;

[0045] 160, back panel;

[0046] A. First side;

[0047] B, second side;

[0048] D1, first spacing;

[0049] D2, second spacing;

[0050] D3, third spacing;

[0051] D4, fourth distance. DETAILED DESCRIPTION

[0052] The terms used in the implementation method part of this application are only used to explain the specific embodiments of this application, and are not intended to limit this application. The implementation method of the embodiments of this application will be described in detail below with reference to the accompanying drawings.

[0053] With the rise of big data, cloud computing and artificial intelligence (AI), the requirements for signal transmission rates between various components inside the server are getting higher and higher.

[0054] The server includes a main board and multiple PCIE sub-boards. A processor is arranged on the main board. The PCIE sub-board and the main board can be electrically connected through cables, thereby being electrically connected to the processor through the internal wiring of the main board. The PCIE sub-board and the main board can also be electrically connected through a multi-layer circuit board. The transmission quality and rate of the cable are higher than those of the multi-layer circuit board. Therefore, with the increase of the transmission rate requirements between the PCIE sub-board and the processor, more and more PCIE sub-boards are electrically connected to the main board through cables.

[0055] In servers of different specifications, the distance between the mainboard and the PCIE sub-board is different. Therefore, servers of different specifications need to be configured with different types of cables. In addition, in servers of the same specification, the distance between each PCIE sub-board and the mainboard may be different or may be different.

[0056] Take the example of a server including four PCIE sub-boards, the four PCIE sub-boards are respectively a first PCIE sub-board, a second PCIE sub-board, a third PCIE sub-board and a fourth PCIE sub-board. The cable includes a first cable, a second cable, a third cable and a fourth cable. There is a processor socket at one end close to the processor, and the processor socket includes a first processor socket, a second processor socket, a third processor socket and a fourth processor socket. There is a sub-board socket near one end of the PCIE sub-board, and the sub-board socket includes a first sub-board socket, a second sub-board socket, a third sub-board socket and a fourth sub-board socket.

[0057] The following takes the first PCIE daughter board as an example to illustrate the electrical connection between the PCIE daughter board and the processor.

[0058] One end of the first cable is plugged into the first daughter board socket, and the first daughter board socket is electrically connected to the first PCIE daughter board through the internal wiring of the mainboard; the other end of the first cable is plugged into the first processor socket, and the first processor socket is electrically connected to the processor through the internal wiring of the mainboard; thereby, the first PCIE daughter board is electrically connected to the processor.

[0059] The distance between the first daughter board socket and the first processor socket is a first distance, the distance between the second daughter board socket and the second processor socket is a second distance, the first distance may be equal to the second distance, and the first distance and the second distance may be approximately 20 cm.

[0060] The cable and the daughterboard socket or the processor socket do not support forward and reverse plugging when plugged in. The first daughterboard socket and the second daughterboard socket have different orientations. Therefore, the end of the first cable does not need to be flipped when plugged in to the first daughterboard socket to match. The length of the first cable can be set to 25cm; the end of the second cable needs to be flipped when plugged in to the second daughterboard socket to match. Flipping will increase the length of the second cable, especially when transmitting high-speed signals, the diameter of the cable is larger, and the length increase caused by flipping is greater. The length of the second cable can be 50cm. Therefore, although the first spacing is equal to the second spacing, because the end of the cable does not support forward and reverse plugging, the length of the second cable is different from that of the first cable. For the same spacing, two types of cables need to be equipped.

[0061] The distance between the third daughter board socket and the third processor socket is the third distance, the distance between the fourth daughter board socket and the fourth processor socket is the fourth distance, the third distance may be equal to the fourth distance, and the third distance and the fourth distance may be approximately 70 cm.

[0062] The cable and the daughter board socket or the processor socket do not support forward and reverse plugging when plugged in. The third daughter board socket and the fourth daughter board socket have different orientations. Therefore, the end of the third cable does not need to be flipped when plugged in to the third daughter board socket to match. The length of the third cable can be set to 75cm; the end of the fourth cable needs to be flipped when plugged in to the fourth daughter board socket to match. Flipping will increase the length of the fourth cable, especially when transmitting high-speed signals, the diameter of the cable is larger, and the length increase caused by flipping is greater. The length of the fourth cable can be 100cm. Therefore, although the third spacing is equal to the fourth spacing, because the end of the cable does not support forward and reverse plugging, the length of the fourth cable is different from that of the third cable. For the same spacing, two types of cables need to be equipped.

[0063] That is, there are two different distances between the daughterboard socket and the processor socket, and four types of cables are required, which increases the types of cables in the server. The large number of cable types results in more cable codes and a small amount of cables with a single code, making cable management more complicated.

[0064] Based on this, an embodiment of the present application provides a server in which a larger number of functional sub-boards can be electrically connected to a main board through fewer types of cables.

[0065] Figure 1 Schematic diagram of the structure of the server provided in the embodiment of the present application Figure 1 ; Figure 2 Schematic diagram of the structure of the cable in the server provided in the embodiment of the present application Figure 1 ; Figure 3 Schematic diagram of the internal structure of the plug in the server provided in the embodiment of the present application Figure 1 ; Figure 4 A schematic diagram comparing the forward and reverse insertion of a plug in a server provided in an embodiment of the present application.

[0066] See also Figures 1 to 4 As shown, the server 100 provided in the embodiment of the present application includes a mainboard 110, a functional sub-board 120, a board-side connector 130 and a cable 140. The mainboard 110 has a processor 111; one board-side connector 130 is arranged close to the processor 111, and the other board-side connector 130 is arranged close to the functional sub-board 120. The cable 140 includes a lead 1411 and a cable connector 1412 located at both ends of the lead 1411. The two cable connectors 1412 are respectively plugged into the two board-side connectors 130 to electrically connect the functional sub-board 120 and the processor 111; the cable connector 1412 includes an identification pin pair 1413 and a plurality of pairs of differential pin pairs 1414, and the plurality of pairs of differential pin pairs 1414 are symmetrically arranged on both sides of the identification pin pair 1413; the pins in the board-side connector 130 are arranged in a one-to-one correspondence with the pins in the cable connector 1412.

[0067] The server 100 may be a desktop server, a blade server, a rack server, a high-density server, a whole cabinet server, etc. The server 100 may also include a housing (not shown), in which the mainboard 110, the functional sub-board 120, the board connector 130 and the cable 140 are all arranged.

[0068] The motherboard 110 can be mounted on the bottom wall of the housing. The motherboard 110 is provided with a processor 111. The processor 111 can be a general term for various processors such as a CPU (Central Processing Unit), a GPU (Graphics Processing Unit) or a TPU (Tensor Processing Unit), referred to as XPU. The motherboard 110 is also provided with a memory and other electronic components. The processor 111 is the core working part for the server 100 to perform calculations. The processor 111 works in conjunction with the memory on the motherboard 110 and other electronic components on the motherboard 110.

[0069] The functional sub-board 120 may be a PCIE sub-board, where PCIE is the abbreviation of peripheral component interconnect express, which is a high-speed serial computer expansion bus standard. A PCIE sub-board refers to a sub-board connected via a high-speed serial computer expansion bus. The functional sub-board 120 may also be a network card or a hard disk.

[0070] The functional sub-board 120 can also be arranged on the main board 110. Figure 1 In the illustrated embodiment, the functional sub-board 120 is electrically connected to the processor 111 via a cable 140 , which may be a high-speed cable. By electrically connecting the functional sub-board 120 and the processor 111 via the cable 140 , the signal transmission rate between the processor 111 and the functional sub-board 120 may be increased.

[0071] There may be multiple functional sub-boards 120. Figure 1 Four functional sub-boards 120 are shown, namely a first functional sub-board 121, a second functional sub-board 122, a third functional sub-board 123 and a fourth functional sub-board 124. The first functional sub-board 121 and the second functional sub-board 122 are arranged on one side of the processor 111, and the third functional sub-board 123 and the fourth functional sub-board 124 are arranged on the other side of the processor 111.

[0072] The board-side connector 130 disposed near the processor 111 is a mainboard-side connector 131 , and the mainboard-side connector 131 includes a first mainboard-side connector 1311 , a second mainboard-side connector 1312 , a third mainboard-side connector 1313 and a fourth mainboard-side connector 1314 .

[0073] The board-end connector 130 disposed near the functional daughter board 120 is a daughter board-end connector 132 , and the daughter board-end connector 132 includes a first daughter board-end connector 1321 , a second daughter board-end connector 1322 , a third daughter board-end connector 1323 and a fourth daughter board-end connector 1324 .

[0074] The cable 140 is used to electrically connect the function sub-board 120 and the processor 111, and the cable 140 includes a first cable 141, a second cable 142, a third cable 143 and a fourth cable 144. The first cable 141 is used to electrically connect the first function sub-board 121 and the processor 111, the second cable 142 is used to electrically connect the second function sub-board 122 and the processor 111, the third cable 143 is used to electrically connect the third function sub-board 123 and the processor 111, and the fourth cable 144 is used to electrically connect the fourth function sub-board 124 and the processor 111.

[0075] The structure of the cable 140 and the specific method of electrically connecting the processor 111 and the functional sub-board 120 through the cable 140 are described below by taking the first cable 141 as an example.

[0076] Please continue to see Figure 2 As shown, the first cable 141 includes a lead 1411 and two cable connectors 1412. The lead 1411 may include multiple cores 1411a and a shielding sheath 1411b sleeved outside the multiple cores 1411a, and the cores 1411a are electrically connected to the pins in the cable connector 1412 in a one-to-one correspondence.

[0077] The two cable connectors 1412 are respectively a first cable connector 1412a and a second cable connector 1412b, and the first cable connector 1412a and the second cable connector 1412b have the same structure. The second cable connector 1412b is used to be plugged with the first sub-board connector 1321, and the first sub-board connector 1321 is electrically connected to the first functional sub-board 121 through the internal wiring of the mainboard 110; the first cable connector 1412a is used to be plugged with the first mainboard connector 1311, and the first mainboard connector 1311 is electrically connected to the processor 111 through the internal wiring of the mainboard 110, so that the first functional sub-board 121 is electrically connected to the processor 111.

[0078] Next, the structure of the cable connector 1412 will be described.

[0079] Please continue to see Figure 3 and Figure 4 As shown, the cable connector 1412 includes an identification pin pair 1413 and a plurality of differential pin pairs 1414 .

[0080] The differential pin pair 1414 includes a first differential pin 1414a and a second differential pin 1414b. The first differential pin 1414a and the second differential pin 1414b transmit two equal and opposite signals through the two wire cores 1411a of the lead 1411. This signal is a differential signal, which has a strong anti-interference ability. Figure 3 and Figure 4 In the figure, eight pairs of differential pin pairs 1414 are schematically shown, four pairs of differential pin pairs 1414 are arranged on the first side A of the identification pin pair 1413, and four pairs of differential pin pairs 1414 are arranged on the second side B of the identification pin pair 1413, that is, multiple pairs of differential pin pairs 1414 are symmetrically arranged on both sides of the identification pin pair 1413. The pins in the cable connector 1412 are arranged in a one-to-one correspondence with the middle pins of the board connector 130. When the cable connector 1412 is plugged with the board connector 130, the four pairs of differential pin pairs 1414 on the first side A of the cable connector 1412 are plugged in a one-to-one correspondence with the four pairs of pin pairs on the first side of the board connector 130, and the four pairs of differential pin pairs 1414 on the second side B of the cable connector 1412 are plugged in a one-to-one correspondence with the four pairs of pin pairs on the second side of the board connector 130. This plugging method is positive plugging.

[0081] Please continue to see Figure 4 As shown, after the cable connector 1412 is rotated 180°, when the cable connector 1412 is plugged into the board connector 130, the four pairs of differential pin pairs 1414 on the second side B of the cable connector 1412 are plugged into the four pairs of pin pairs on the first side of the board connector 130 in a one-to-one correspondence, and the four pairs of differential pin pairs 1414 on the first side A of the cable connector 1412 are plugged into the four pairs of pin pairs on the second side of the board connector 130 in a one-to-one correspondence. This plugging method is called reverse plugging. It should be noted that, when plugged in the right direction, the identification pin pair 1413 in the cable connector 1412 contacts the identification pin pair in the board connector 130, and it can be identified that the cable connector 1412 and the board connector 130 are plugged in the right direction. Therefore, the cable connector 1412 and the board connector 130 transmit signals in the right direction sequence; when plugged in the wrong direction, since the identification pin pair 1413 in the cable connector 1412 and the identification pin pair in the board connector 130 are both centered, after reverse plugging, the identification pin pair 1413 in the cable connector 1412 is aligned with and contacts the identification pin pair in the board connector 130, and it can be identified that the cable connector 1412 and the board connector 130 are plugged in the wrong direction. Therefore, the cable connector 1412 and the board connector 130 transmit signals in the reverse direction sequence.

[0082] That is to say, by symmetrically arranging the differential pin pair 1414 on both sides of the identification pin pair 1413, when the cable connector 1412 and the board-end connector 130 are inserted forward or reversely, the differential pin pair 1414 in the cable connector 1412 and the differential pin pair in the board-end connector 130 can correspond one to one and be plugged in, providing a physical basis for signal transmission; since the identification pin pair 1413 is centrally arranged, when the cable connector 1412 and the board-end connector 130 are inserted forward or reversely, the identification pin pair 1413 in the cable connector 1412 can contact the identification pin pair of the board-end connector 130, so that when inserted forward, the signal can be transmitted in the sequence of forward insertion, and when inserted reversely, the signal can be transmitted in the sequence of reverse insertion, so that the cable connector 1412 and the board-end connector 130 can be inserted forward and reversely.

[0083] Please continue to see Figure 1 As shown, the spacing between the first sub-board end connector 1321 and the first main board end connector 1311 is a first spacing D1, and the spacing between the second sub-board end connector 1322 and the second main board end connector 1312 is a second spacing D2. The first spacing D1 can be equal to the second spacing D2, and the first spacing D1 and the second spacing D2 can be approximately 20 cm.

[0084] The first cable connector 1412a in the first cable 141 can be inserted forward or backward when plugged into the first mainboard connector 1311 or the first sub-board connector 1321; the first cable connector 1412a in the second cable 142 can be inserted forward or backward when plugged into the second mainboard connector 1312 or the second sub-board connector 1322. Therefore, even if the first sub-board connector 1321 and the second sub-board connector 1322 are in different directions, since they support forward and reverse plugging during plugging, there is no need to flip the lead 1411 of the first cable 141 or the second cable 142, and the length of the first cable 141 and the second cable 142 can be set to 25 cm; therefore, for a spacing of 20 cm, only one type of cable 140 with a length of 25 cm is required.

[0085] The distance between the third sub-board end connector 1323 and the third main board end connector 1313 is the third distance D3, the distance between the fourth sub-board end connector 1324 and the fourth main board end connector 1314 is the fourth distance D4, the third distance D3 can be equal to the fourth distance D4, and the third distance D3 and the fourth distance D4 can be approximately 70cm.

[0086] The first cable connector 1412a in the third cable 143 can be inserted forward or backward when plugged into the third mainboard connector 1313 or the third sub-board connector 1323; the first cable connector 1412a in the fourth cable 144 can be inserted forward or backward when plugged into the fourth mainboard connector 1314 or the fourth sub-board connector 1324. Therefore, even if the third sub-board connector 1323 and the fourth sub-board connector 1324 are in different directions, since they support forward and reverse plugging during plugging, there is no need to flip the lead 1411 of the third cable 143 or the fourth cable 144, and the length of the third cable 143 and the fourth cable 144 can be set to 75cm; therefore, for a spacing of 70cm, only one type of cable 140 with a length of 75cm is needed.

[0087] That is to say, by positive and negative insertion between the cable connector 1412 and the board-end connector 130 , the size of the cable 140 can be reduced.

[0088] Please continue to see Figure 3 and Figure 4 As shown, the cable connector 1412 further includes a plurality of ground pin pairs 1415 , and the plurality of ground pin pairs 1415 are symmetrically arranged on both sides of the identification pin pair 1413 .

[0089] The ground pins in the cable connector 1412 are also arranged in pairs to form ground pin pairs 1415, and multiple pairs of ground pin pairs 1415 are symmetrically arranged on both sides of the identification pin pair 1413. Figure 3 Schematically shows four pairs of ground pin pairs 1415, of which two pairs of ground pin pairs 1415 are symmetrically arranged at both ends of the cable connector 1412, and the other two pairs of ground pin pairs 1415 are symmetrically arranged on both sides of the identification pin pair 1413, and the ground pin pairs in the board connector 130 correspond to the ground pin pairs 1415 in the cable connector 1412. Therefore, after the cable connector 1412 is rotated 180°, the ground pin pairs 1415 in the cable connector 1412 and the ground pin pairs in the board connector 130 can still correspond to each other.

[0090] Figure 5 Schematic diagram of the internal structure of the plug in the server provided in the embodiment of the present application Figure 2 .

[0091] As shown in the figure, the cable connector 1412 also includes multiple pairs of other pin pairs 1416, which can be used to transmit low-speed signals or defined according to actual usage requirements. Multiple pairs of other pin pairs 1416 are symmetrically arranged on both sides of the identification pin pair 1413, and the other pin pairs in the board connector 130 are arranged one-to-one with the other pin pairs 1416 in the cable connector 1412. After the cable connector 1412 is rotated 180°, the other pin pairs 1416 in the cable connector 1412 can still correspond one-to-one with the other pin pairs in the board connector 130. It should be noted that a ground pin pair 1415 can also be set between the other pin pair 1416 and the adjacent differential pin pair 1414, as long as the ground pin pair 1415 is symmetrically arranged on both sides of the identification pin pair 1413.

[0092] The server 100 provided in the embodiment of the present application is provided with a mainboard 110, a functional sub-board 120, a board-end connector 130 and a cable 140. The mainboard 110 has a processor 111; one board-end connector 130 is provided close to the processor 111, and the other board-end connector 130 is provided close to the functional sub-board 120. The cable 140 includes a lead 1411 and a cable connector 1412 located at both ends of the lead 1411. The two cable connectors 1412 are respectively plugged with the two board-end connectors 130 to electrically connect the functional sub-board 120 and the processor 111; the cable connector 1412 includes an identification pin pair 1413 and a plurality of pairs of differential pin pairs 1414, and the plurality of pairs of differential pin pairs 1414 are symmetrically provided on both sides of the identification pin pair 1413; The pins in the connector 130 are arranged in a one-to-one correspondence with the pins in the cable connector 1412. Therefore, when the cable connector 1412 and the board-end connector 130 are plugged in forward or reverse, the differential pin pair 1414 in the cable connector 1412 and the differential pin pair in the board-end connector 130 can correspond to each other and be plugged in, providing a physical basis for signal transmission; no matter whether the cable connector 1412 and the board-end connector 130 are plugged in forward or reverse, the identification pin pair 1413 in the cable connector 1412 can contact the identification pin pair of the board-end connector 130, and when plugged in forward, the signal can be transmitted in the sequence of forward plugging, and when plugged in reverse, the signal can be transmitted in the sequence of reverse plugging, so that the cable connector 1412 and the board-end connector 130 can be plugged in forward and reverse. Therefore, when the orientation of the board-end connector 130 is different, there is no need to flip the cable 140, so that the functional sub-boards 120 with the same spacing as the processor 111 can use the same type of cable 140 to electrically connect to the processor 111, thereby reducing the type of cable 140 in the server 100.

[0093] Please continue to see Figure 3 and Figure 4As shown, the identification pin pair 1413 includes a first identification pin 1413 a and a second identification pin 1413 b , and the first identification pin 1413 a and the second identification pin 1413 b are rotationally symmetrical.

[0094] Specifically, when the cable connector 1412 is not rotated, the first identification pin 1413a in the cable connector 1412 contacts the first identification pin in the board connector 130, and the second identification pin 1413b in the cable connector 1412 contacts the second identification pin in the board connector 130. The identification pin pair 1413 transmits a signal to the processor 111. The processor 111 determines that the cable connector 1412 and the board connector 130 are properly plugged in, and the signal can be transmitted between the processor 111 and the functional sub-board 120.

[0095] When the plug is rotated 180°, the first identification pin 1413a and the second identification pin 1413b are rotationally symmetrical, the first identification pin 1413a in the cable connector 1412 contacts the second identification pin in the board connector 130, and the second identification pin 1413b in the cable connector 1412 contacts the first identification pin in the board connector 130. The identification pin pair 1413 transmits a signal to the processor 111, determining that the cable connector 1412 and the board connector 130 are reversely plugged in, and the signal needs to be re-encoded before being transmitted between the processor 111 and the functional sub-board 120.

[0096] It should be noted that the two pins near the first identification pin 1413a and the second identification pin 1413b may be vacant pins, and the user may define these two vacant pins according to usage requirements.

[0097] Figure 6 Schematic diagram of the structure of the server provided in the embodiment of the present application Figure 2 ; Figure 7 for Figure 6 A top view of Figure 8 Schematic diagram of the structure of the server provided in the embodiment of the present application Figure 3 ; Fig. 9 This is a schematic diagram of the connection between the signal processing module, the lead wire and the plug in the server provided in the embodiment of the present application. Figures 6 to 8 A functional daughter board is shown in each.

[0098] See also Figures 6 to 9 As shown, the server 100 further includes a signal processing module 150 , which is disposed at one end of the first cable connector 1412 a , and is electrically connected to the processor 111 .

[0099] When the signal is transmitted from the functional sub-board 120 to the processor 111, attenuation occurs. The signal processing module 150 is electrically connected to the processor 111 and can be used to enhance the signal. The signal processing module 150 is also used to receive the signal of the identification pin pair 1413. When the cable connector 1412 and the board connector 130 are determined to be inserted in the right direction, the signal is transmitted normally between the processor 111 and the functional sub-board 120. When the cable connector 1412 and the board connector 130 are determined to be inserted in the wrong direction, the signal needs to be re-encoded by the signal processing module 150 before being transmitted between the processor 111 and the functional sub-board 120.

[0100] Please continue to see Figure 6 and Figure 7 As shown, the signal processing module 150 is disposed on the mainboard 110 , and the mainboard-side connector 131 and the processor 111 are both electrically connected to the signal processing module 150 .

[0101] The signal processing module 150 can be soldered on the mainboard 110, and is electrically connected to the mainboard connector 131 and the processor 111 through the internal wiring of the mainboard 110. The signal of the functional daughter board 120 is transmitted to the mainboard connector 131 via the cable 140, and then processed by the signal processing module 150 and transmitted to the processor 111.

[0102] By disposing the signal processing module 150 on the mainboard 110 , the transmission length of the signal processed by the signal processing module 150 within the circuit board can be reduced, thereby improving the quality and rate of signal transmission.

[0103] Please continue to see Figure 8 and Fig. 9 As shown, the signal processing module 150 is disposed between the first cable connector 1412 a and the lead 1411 , and the lead 1411 and the first cable connector 1412 a are both electrically connected to the signal processing module 150 .

[0104] The signal processing module 150 may be a circuit board enclosed in the shielding sheath 1411b of the lead 1411. The signal processing module 150 is provided with a plurality of first solder pads 151 on the side facing the lead 1411, and the first solder pads 151 are welded one-to-one with the plurality of wire cores 1411a in the lead 1411; the signal processing module 150 is provided with a plurality of second solder pads 152 on the side facing the first cable connector 1412a, and the second solder pads 152 are welded one-to-one with the pins in the first cable connector 1412a, thereby the signal processing module 150 may be electrically connected between the lead 1411 and the first cable connector 1412a. This is equivalent to the signal processing module 150 being provided in the cable 140, thereby reducing the number of components on the mainboard 110.

[0105] Fig.10Schematic diagram of the structure of the cable in the server provided in the embodiment of the present application Figure 2 .

[0106] See also Fig.10 As shown, the cable 140 is provided with an identification label 145 on one side near the first cable connector 1412a.

[0107] When the cable 140 is provided with a signal processing module 150 on the side close to the first cable connector 1412a, an identification label 145 can be provided on the side close to the first cable connector 1412a, and the identification label 145 can be wrapped around the outside of the shielding sheath 1411b to prevent the first cable connector 1412a from being plugged into the daughter board end connector 132.

[0108] Fig.11 Schematic diagram of the structure of the server provided in the embodiment of the present application Figure 4 .

[0109] See also Fig.11 As shown, the server 100 also includes a backplane 160 , and multiple functional sub-boards 120 are plugged into the backplane 160 . The backplane 160 is provided with multiple sub-board end connectors 132 , and the sub-board end connectors 132 are provided in a one-to-one correspondence with the functional sub-boards 120 .

[0110] exist Fig.11 , a first functional sub-board 121, a second functional sub-board 122, a third functional sub-board 123 and a fourth functional sub-board 124 are shown, the first functional sub-board 121 and the first sub-board end connector 1321 are arranged on opposite sides of the backplane 160, and the first functional sub-board 121 and the first sub-board end connector 1321 are electrically connected through the internal wiring of the backplane 160; the second functional sub-board 122 and the second sub-board end connector 1322 are arranged on opposite sides of the backplane 160, and the second functional sub-board 122 and the second sub-board end connector 1322 are electrically connected through the internal wiring of the backplane 160. Connector 1322 is electrically connected through the internal wiring of the backplane 160; the third functional sub-board 123 and the third sub-board end connector 1323 are arranged on opposite sides of the backplane 160, and the third functional sub-board 123 and the third sub-board end connector 1323 are electrically connected through the internal wiring of the backplane 160; the fourth functional sub-board 124 and the fourth sub-board end connector 1324 are arranged on opposite sides of the backplane 160, and the fourth functional sub-board 124 and the fourth sub-board end connector 1324 are electrically connected through the internal wiring of the backplane 160.

[0111] The first sub-board connector 1321 is connected to the first main board connector 1311 through the first cable 141, the second sub-board connector 1322 is connected to the second main board connector 1312 through the second cable 142, the third sub-board connector 1323 is connected to the third main board connector 1313 through the third cable 143, and the fourth sub-board connector 1324 is connected to the fourth main board connector 1314 through the fourth cable 144. The main board connector 131 is shown on the main board 110 to represent the first main board connector 1311, the second main board connector 1312, the third main board connector 1313 or the fourth main board connector 1314.

[0112] The length of the first cable 141 may be the same as that of the second cable 142 , and the length of the third cable 143 may be the same as that of the fourth cable 144 .

[0113] In the description of the embodiments of the present application, it should be noted that, unless otherwise clearly specified and limited, the terms "installed", "connected", and "connected" should be understood in a broad sense, for example, it can be a fixed connection, or it can be an indirect connection through an intermediate medium, it can be the internal connection of two elements or the interaction relationship between two elements. For ordinary technicians in this field, the specific meanings of the above terms in the embodiments of the present application can be understood according to specific circumstances.

[0114] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the embodiments of the present application, rather than to limit them. Although the embodiments of the present application have been described in detail with reference to the aforementioned embodiments, those skilled in the art should understand that they can still modify the technical solutions described in the aforementioned embodiments, or replace some or all of the technical features therein by equivalents. These modifications or replacements do not cause the essence of the corresponding technical solutions to deviate from the scope of the technical solutions of the embodiments of the present application.

Claims

1. A server, characterized in that: It includes a main board, a functional sub-board, a board-end connector and a cable, wherein the main board has a processor; One of the board-end connectors is arranged close to the processor, and the other of the board-end connectors is arranged close to the functional sub-board. The cable includes a lead and cable connectors located at both ends of the lead. The two cable connectors are respectively plugged with the two board-end connectors to electrically connect the functional sub-board and the processor. The cable connector comprises an identification pin pair and a plurality of differential pin pairs, wherein the plurality of differential pin pairs are symmetrically arranged on both sides of the identification pin pair; the pins in the board-end connector are arranged in a one-to-one correspondence with the pins in the cable connector.

2. The server according to claim 1, characterized in that: There are multiple functional sub-boards, and all of the multiple functional sub-boards are electrically connected to the main board through the cable.

3. The server according to claim 2, characterized in that: The identification pin pair includes a first identification pin and a second identification pin, and the first identification pin and the second identification pin are rotationally symmetrical.

4. The server according to claim 3, characterized in that: The board-side connector includes a mainboard-side connector and a daughterboard-side connector, wherein the mainboard-side connector is arranged on the mainboard close to the processor, and the daughterboard-side connector is arranged close to the functional daughterboard; the cable connector includes a first cable connector and a second cable connector, wherein the first cable connector is plugged into the mainboard-side connector, and the second cable connector is plugged into the daughterboard-side connector; The server further includes a signal processing module, which is disposed at one end of the first cable connector and is electrically connected to the processor.

5. The server according to claim 4, characterized in that: The signal processing module is arranged on the mainboard, and the mainboard-side connector and the processor are both electrically connected to the signal processing module.

6. The server according to claim 4, characterized in that: The signal processing module is disposed between the first cable connector and the lead wire, and both the lead wire and the first cable connector are electrically connected to the signal processing module.

7. The server according to claim 6, characterized in that: The cable is provided with an identification label on a side close to the first cable connector.

8. The server according to any one of claims 1 to 7, characterized in that: The cable connector further includes a plurality of ground pin pairs, and the plurality of ground pin pairs are symmetrically arranged on both sides of the identification pin pair.

9. The server according to any one of claims 1 to 7, characterized in that: The functional sub-board is a PCIE sub-board.

10. The server according to claim 4, characterized in that: The server further comprises a backplane, and the plurality of functional sub-boards are plugged into the backplane. The backplane is provided with a plurality of sub-board end connectors, and the sub-board end connectors are arranged in a one-to-one correspondence with the functional sub-boards.

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