Universal flash memory test equipment based on FPGA (Field Programmable Gate Array)

Abstract

The utility model relates to the technical field of universal flash memory test equipment, and particularly discloses universal flash memory test equipment based on an FPGA (Field Programmable Gate Array), which comprises a test board card, the upper end surface of the test board card is fixedly connected with a test seat, the upper side of the test seat is rotatably connected with an upper cover, and the middle part of the upper end surface of the test seat is provided with a lifting groove; a lifting test board is slidably connected to the inner side of the lifting groove, a plurality of spring probes are fixedly connected to the interior of the lifting groove, the lifting test board comprises a seat body, a plurality of test holes are formed in the inner side of the seat body, the plurality of spring probes are in one-to-one correspondence with the hole positions of the plurality of test holes, and the spring probes are in one-to-one correspondence with the hole positions of the plurality of test holes. Telescopic grooves are formed in the four corners of the lower end face of the base body, and guide rods are slidably arranged in the telescopic grooves in a sleeved mode. According to the utility model, after the test is completed, the lifting test bench can be lifted from the interior of the lifting groove, so that the chip can be taken and placed more conveniently, the pins of the chip can be in full contact with the spring probes in the chip, and the occurrence of poor contact is reduced.

Description

Technical Field

[0001] The utility model relates to the technical field of universal flash memory testing equipment, in particular to universal flash memory testing equipment based on FPGA. Background Art

[0002] FPGA, or field programmable gate array, has strong programmability and flexibility. Users can program and reconfigure its logic functions according to their needs, and can quickly adapt to different application scenarios and functions. Using FPGA boards to test universal flash memory chips can quickly program and adjust test logic and functions according to the test requirements of different flash memory chips, adapting to a variety of test scenarios and requirements.

[0003] When testing the current universal flash memory chip, a chip test socket is required. Due to the small size of the chip, it is inconvenient to manually take and place the chip, which can easily reduce the test efficiency. In addition, due to the manufacturing tolerance of the chip pins, there will be slight differences in the height of each pin. During the test, it is not easy for the pins to fully contact the probes of the test socket, which will affect the transmission of the signal. Therefore, those skilled in the art provide a universal flash memory test device based on FPGA to solve the problems raised in the above background technology. Utility Model Content

[0004] The purpose of the utility model is to provide a universal flash memory test device based on FPGA to solve the following technical problems:

[0005] How to improve the test efficiency of flash memory chips during testing and ensure that the chip pins are in full contact with the probes of the test socket.

[0006] The purpose of the utility model can be achieved through the following technical solutions:

[0007] A universal flash memory test device based on FPGA comprises a test board, the upper end surface of the test board is fixedly connected with a test seat, the upper side of the test seat is rotatably connected with an upper cover, a lifting slot is provided at the middle of the upper end surface of the test seat, a lifting test platform is slidably connected to the inner side of the lifting slot, and a plurality of spring probes are fixedly connected to the inside of the lifting slot;

[0008] The lifting test platform comprises a base body, a plurality of test holes are opened on the inner side of the base body, and the plurality of spring probes correspond to the positions of the plurality of test holes one by one respectively;

[0009] The four corners of the lower end surface of the seat body are all provided with telescopic grooves, the internal sliding sleeve of the telescopic groove is provided with a guide rod, the lower end of the guide rod is fixedly connected to the lifting groove, and a first spring is arranged between the guide rod and the telescopic groove.

[0010] Furthermore, the spring probe comprises a sleeve, and the upper and lower ends of the sleeve are both slidably sleeved with contact heads, and a third spring is arranged inside the sleeve, and the two ends of the third spring are respectively in contact with the two contact heads;

[0011] Furthermore, the contact head located at the bottom extends out of the lower end surface of the test socket and is electrically connected to the test board;

[0012] Furthermore, grooves are provided on both inner walls of the lifting slot, and positioning components are provided inside the grooves;

[0013] Furthermore, the positioning assembly comprises a limiting rod, the inner end of the limiting rod is fixedly connected to the groove, the outer end of the limiting rod is slidably sleeved with a head, and a second spring is arranged between the head and the groove;

[0014] Furthermore, a contact seat is fixedly connected to the lower end surface of the upper cover, a heat sink is fixedly connected to the upper end surface of the contact seat, and the heat sink extends out of the upper end surface of the upper cover;

[0015] Furthermore, a locking piece is connected to the front end of the upper cover, a card slot is provided at the front end of the test socket, and the lower end of the locking piece is engaged with the card slot;

[0016] Beneficial effects of the utility model:

[0017] The FPGA-based universal flash memory test device proposed in the utility model has a lifting test platform and a spring probe, so that when the test device is in use, after the test is completed, the lifting test platform can be lifted from the inside of the lifting slot, so that the universal flash memory chip can be directly lifted out, which is more convenient when taking and placing the chip, and can improve the test efficiency. At the same time, the lifting test platform that can change the height also makes it easy for the chip pins to fully contact with the internal spring probes, can adapt to the manufacturing tolerance of the chip pin height, ensure good contact, reduce the occurrence of poor contact, and ensure that the test signal is accurately transmitted to and from the chip. It is easy to use and has strong reliability. BRIEF DESCRIPTION OF THE DRAWINGS

[0018] The utility model is further described below in conjunction with the accompanying drawings.

[0019] Figure 1 It is a closed structural diagram of the upper cover of the FPGA-based universal flash memory testing device proposed by the utility model;

[0020] Figure 2 This is a structural diagram of the opening of the upper cover of the FPGA-based universal flash memory testing device proposed by the utility model;

[0021] Figure 3 It is a cross-sectional view of a test socket of a universal flash memory test device based on FPGA proposed by the utility model;

[0022] Figure 4 It is a cross-sectional view of a spring probe of a universal flash memory test device based on FPGA proposed by the utility model;

[0023] Figure 5 yes Figure 3 Enlarged view of point A in the middle.

[0024] Reference numerals:

[0025] 1. Test board; 2. Test seat; 3. Upper cover; 4. Heat sink; 5. Locking piece; 6. Contact seat; 7. Lifting slot; 8. Lifting test table; 81. Seat body; 82. Test hole; 83. Telescopic slot;

[0026] 84. first spring; 85. guide rod; 9. slot; 10. groove; 11. positioning assembly; 111. top head; 112. limit rod; 113. second spring; 12. spring probe; 121. sleeve; 122. contact head; 123. third spring. DETAILED DESCRIPTION

[0027] The following will be combined with the drawings in the embodiments of the utility model to clearly and completely describe the technical solutions in the embodiments of the utility model. Obviously, the described embodiments are only part of the embodiments of the utility model, not all of the embodiments. Based on the embodiments of the utility model, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the utility model.

[0028] Please see attached Figures 1 to 5 As shown, the FPGA-based universal flash memory testing device in the embodiment of the utility model includes a test board 1, the upper end surface of the test board 1 is fixedly connected with a test socket 2, the upper side of the test socket 2 is rotatably connected with an upper cover 3, a lifting groove 7 is opened in the middle of the upper end surface of the test socket 2, the inner side of the lifting groove 7 is slidably connected with a lifting test platform 8, and the inside of the lifting groove 7 is fixedly connected with a plurality of spring probes 12. The set test board 1 is an FPGA board with good programmability and flexibility. During testing, the chip is placed on the lifting test platform 8 of the test socket 2, and the lifting test platform 8 can move downward, so that the spring probe 12 can fully contact with the pins of the universal flash memory chip, thereby reducing the occurrence of poor contact and ensuring that the test signal is accurately transmitted to and from the chip.

[0029] The lifting test platform 8 includes a base 81 , and a plurality of test holes 82 are opened on the inner side of the base 81 . The plurality of spring probes 12 correspond one-to-one to the positions of the plurality of test holes 82 , respectively. The spring probes 12 corresponding one-to-one to the positions of the test holes 82 will not interfere with the movement of the lifting test platform 8 .

[0030] Telescopic grooves 83 are provided at the four corners of the lower end surface of the seat body 81. The internal sliding sleeve of the telescopic groove 83 is provided with a guide rod 85. The lower end of the guide rod 85 is fixedly connected to the lifting groove 7. A first spring 84 is provided between the guide rod 85 and the telescopic groove 83. The elastic force provided by the set first spring 84 enables the lifting test platform 8 to pop out again after being lowered. When the seat body 81 moves, the set guide rod 85 can ensure that the seat body 81 moves up and down stably.

[0031] The spring probe 12 includes a sleeve 121, and contact heads 122 are slidably sleeved at both upper and lower ends of the sleeve 121. A third spring 123 is arranged inside the sleeve 121, and both ends of the third spring 123 are respectively in contact with the two contact heads 122. When the spring probe 12 is in use, the two contact heads 122 can be elastically extended and retracted through the third spring 123.

[0032] The contact head 122 located at the bottom extends out of the lower end surface of the test socket 2 and is electrically connected to the test board 1 .

[0033] Grooves 10 are provided on the inner walls of both sides of the lifting groove 7, and a positioning assembly 11 is arranged inside the groove 10. The positioning assembly 11 includes a limit rod 112, the inner end of the limit rod 112 is fixedly connected to the groove 10, and the outer end is slidably sleeved with a head 111, and a second spring 113 is arranged between the head 111 and the groove 10. The positioning assembly 11 is arranged to clamp and position the chip above it after the lifting test platform 8 is lowered to prevent the chip from shaking. Specifically, the upper cover 3 is closed, and the lifting test platform 8 is pressed down to move downward. After the obstruction of the groove 10 is released, the head 111 is ejected, thereby positioning the chip through the side, wherein the end of the head 111 is sloped, and when the lifting test platform 8 is raised, the head 111 can be pushed back into the groove 10 by the lifting test platform 8.

[0034] The lower end surface of the upper cover 3 is fixedly connected with a contact seat 6, and the upper end surface of the contact seat 6 is fixedly connected with a heat sink 4. The heat sink 4 extends out of the upper end surface of the upper cover 3. The contact seat 6 contacts the chip after the upper cover 3 is closed to ensure a stable chip connection. The heat sink 4 is provided to facilitate heat dissipation and temperature reduction to prevent the chip temperature from being too high during testing.

[0035] A locking piece 5 is connected to the front end of the upper cover 3, and a slot 9 is provided at the front end of the test socket 2. The lower end of the locking piece 5 is engaged with the slot 9. After the upper cover 3 is closed, the locking piece 5 is engaged with the slot 9 of the test socket 2, thereby locking the upper cover 3 and the test socket 2.

[0036] Working principle: When in use, the chip is placed on the lifting test platform 8 of the test socket 2, and the pins of the chip are aligned with the test holes 82. Then, the upper cover 3 is covered. After the upper cover 3 is closed, it contacts the chip and presses down the lifting test platform 8. The lifting test platform 8 can move downward, so that the spring probe 12 can fully contact the pins of the universal flash memory chip, reducing the occurrence of poor contact and ensuring that the test signal is accurately transmitted to and from the chip. After the upper cover 3 is opened, the elastic force provided by the first spring 84 is set, so that the lifting test platform 8 can be lifted from the inside of the lifting slot 7 after being lowered, thereby directly lifting the universal flash memory chip, making it more convenient to take and place the chip, and improving the test efficiency.

[0037] The above is a detailed description of an embodiment of the utility model, but the content is only a preferred embodiment of the utility model and cannot be considered to limit the scope of implementation of the utility model. All equivalent changes and improvements made within the scope of application of the utility model should still fall within the scope of the patent coverage of the utility model.

Claims

1. A universal flash memory test device based on FPGA, comprising a test board (1), characterized in that: The upper end surface of the test board (1) is fixedly connected to a test seat (2), the upper side of the test seat (2) is rotatably connected to an upper cover (3), a lifting groove (7) is provided at the middle of the upper end surface of the test seat (2), a lifting test platform (8) is slidably connected to the inner side of the lifting groove (7), and a plurality of spring probes (12) are fixedly connected to the interior of the lifting groove (7); The lifting test platform (8) comprises a base body (81), a plurality of test holes (82) are provided on the inner side of the base body (81), and the plurality of spring probes (12) correspond to the positions of the plurality of test holes (82) one by one respectively; The four corners of the lower end surface of the seat body (81) are each provided with a telescopic groove (83), the internal sliding sleeve of the telescopic groove (83) is provided with a guide rod (85), the lower end of the guide rod (85) is fixedly connected to the lifting groove (7), and a first spring (84) is provided between the guide rod (85) and the telescopic groove (83).

2. The FPGA-based universal flash memory testing device according to claim 1, characterized in that: The spring probe (12) comprises a sleeve (121), the upper and lower ends of the sleeve (121) are slidably sleeved with contact heads (122), a third spring (123) is arranged inside the sleeve (121), and the two ends of the third spring (123) are respectively in contact with two contact heads (122).

3. The FPGA-based universal flash memory testing device according to claim 2, characterized in that: The contact head (122) located at the bottom extends out of the lower end surface of the test socket (2) and is electrically connected to the test board (1).

4. The FPGA-based universal flash memory testing device according to claim 1, characterized in that: Grooves (10) are provided on the inner walls on both sides of the lifting groove (7), and a positioning assembly (11) is arranged inside the groove (10).

5. The FPGA-based universal flash memory testing device according to claim 4, characterized in that: The positioning assembly (11) comprises a limiting rod (112), the inner end of the limiting rod (112) is fixedly connected to the groove (10), the outer end is slidably sleeved with a top head (111), and a second spring (113) is provided between the top head (111) and the groove (10).

6. The FPGA-based universal flash memory testing device according to claim 1, characterized in that: The lower end surface of the upper cover (3) is fixedly connected to a contact seat (6), the upper end surface of the contact seat (6) is fixedly connected to a heat sink (4), and the heat sink (4) extends out of the upper end surface of the upper cover (3).

7. The FPGA-based universal flash memory testing device according to claim 1, characterized in that: The front end of the upper cover (3) is connected to a locking piece (5), the front end of the test seat (2) is provided with a locking slot (9), and the lower end of the locking piece (5) is locked with the locking slot (9).

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