Packaging-oriented universal chip test carrier plate

Abstract

The utility model discloses a packaging-oriented universal chip test carrier plate, comprising a carrier plate frame and a PCB fixed on the carrier plate frame, the PCB is provided with a contact corresponding to an ATE spring needle and a test seat, the PCB is provided with a wire harness locker, and the wire harness locker is connected with the test seat through internal wiring of the PCB; a pin of a chip to be tested is connected to the wire harness locker through a wire harness. The test carrier plate provided by the utility model is strong in universality, packaged chips with the same number as the pins of the test seat can be tested in a matched manner, no matter how an internal chip circuit is designed and how pins are distributed, the packaged chips can be connected to the test carrier plate for testing, the test coverage rate can reach 99%, and the design and development time of hardware is greatly reduced; meanwhile, use is convenient, and other auxiliary hardware is not needed.

Description

Technical Field

[0001] The utility model belongs to the technical field of chip testing, and in particular relates to a universal chip testing carrier board oriented to packaging. Background Art

[0002] ATE is the abbreviation of Automatic Test Equipment, which is used to perform automated testing on integrated circuits (ICs). In the chip testing process, ATE plays a key role and can perform a variety of tests efficiently and accurately to verify the performance and quality of the chip. Figure 1 This is a schematic diagram of the basic structure of Advantest's V93000 test, which mainly consists of a workstation, test head, bracket, and display.

[0003] The medium for ATE to connect to the outside is the test head. When starting the test, put the chip into the test socket, connect all its pins to the probes of the test socket, and then connect it to the ATE test head through the test load board to establish a signal connection channel. The test load board is loaded on the test head and is a mechanical and circuit interface that connects ATE to the chip to be tested. The test socket is a static connector between the IC and the test load board. The chip can be loaded and removed by directly plugging and unplugging, so that there is no need to repeatedly load / remove the chip by welding, which may cause damage to the chip or the test load board, thereby achieving fast and efficient testing.

[0004] Due to the differences in functions and pins of different chips, ATE needs to be connected to different Load Boards to realize its test functions. Load Boards are often developed by each tester. Therefore, even if two chips have the same functions, the Load Boards designed by different testers may be different.

[0005] Take NOR FLASH chip as an example. Even if they are of the same SOP8 package type, the functions of each pin are different due to different internal circuit designs and processes of different chip manufacturers. In addition, even if they are of the same SOP8 package type, there are different pin spacings such as 208mil, 173mil, and 150mil. Therefore, even for the same SOP8 package type, different LoadBoards need to be designed during testing, and they need to be customized by the tester. This is an unnecessary waste in terms of both test cost and test time. The R&D cost of integrated circuits is mainly labor cost, which is relatively fixed. However, the testing costs of chips from development to production vary greatly due to different test methods and requirements. Therefore, in the life cycle cost of a chip, how to control and reduce the test cost is an important part of the operation of chip companies. Utility Model Content

[0006] Aiming at the problem that test carriers in existing chip tests are all designed and processed according to specific chips, have poor universality, and lead to increased chip testing costs, the utility model proposes a universal chip test carrier for packaging.

[0007] A universal chip test carrier for packaging, comprising a carrier frame and a PCB board fixed thereon, wherein the PCB board is provided with contacts corresponding to ATE spring pins and a test socket, and the PCB board is provided with a harness locker, wherein the harness locker is connected to the test socket through internal wiring of the PCB; and the pins of a chip to be tested are connected to the harness locker through a harness.

[0008] Furthermore, the wiring harness is temporarily welded to the pins of the chip to be tested by soldering.

[0009] Furthermore, the wiring harness locker adopts a PCB terminal or a chip locking socket.

[0010] Furthermore, each hole position of the PCB board corresponding to the wiring harness locker is marked with a silk screen of the corresponding connected functional pin.

[0011] The test carrier board proposed by the utility model has strong versatility, and all packaged chips with the same number of pins as the test socket can cooperate in the test. No matter how the internal chip circuit is designed or how the pins are allocated, they can be connected to the test carrier board for testing. The test coverage rate can reach 99%, greatly reducing the design and development time of the hardware; at the same time, it is easy to use and does not require other auxiliary hardware. BRIEF DESCRIPTION OF THE DRAWINGS

[0012] Figure 1 This is a diagram of the basic structure of Advantest's V93000 test;

[0013] Figure 2 This is a schematic diagram of the basic structure of the test carrier;

[0014] Figure 3 This is a wiring diagram for the front and back sides of the PCB board;

[0015] Figure 4 A photo of the test head loaded with a test carrier. DETAILED DESCRIPTION

[0016] The present invention is further described in detail below in conjunction with the accompanying drawings and specific embodiments. The embodiments of the present invention are provided for the purpose of illustration and description, and are not intended to be exhaustive or to limit the present invention to the disclosed forms. Many modifications and variations are obvious to those of ordinary skill in the art. The embodiments are selected and described in order to better illustrate the principles and practical applications of the present invention, and to enable those of ordinary skill in the art to understand the present invention and thereby design various embodiments with various modifications suitable for specific purposes.

[0017] Example 1

[0018] A general chip test carrier for packaging, such as Figure 2 As shown, it includes a carrier frame 1 and a PCB board 2 fixed thereon, and the PCB board 2 is provided with contacts 3 corresponding to ATE spring pins and a test socket 4.

[0019] Pogo pins are commonly used connectors in ATE for electrical connection and test signal transmission with the device under test (DUT). Pogo pins consist of a spring and a conductive pin, usually mounted on a test fixture, and are inserted into the test point of the DUT or the test board by pressure to establish an electrical connection.

[0020] The test socket was originally the interface between the ATE test machine and the packaged chip, which facilitates direct plugging and unplugging to achieve chip loading and removal. However, after the PCB board is completed, the internal routing is fixed, and the internal circuit design and process of different chip manufacturers are different, which also leads to different functions of each pin. There are also different pin spacings such as 208mil, 173mil, and 150mil. This means that even if the items to be tested are exactly the same, due to the above reasons, a matching PCB board must be customized before testing can be carried out.

[0021] To this end, this embodiment breaks the conventional thinking in the industry, and a harness locker 5 is provided on the PCB board 2, and the harness locker 5 is connected to the test socket 4 through the internal wiring of the PCB. The pins of the chip to be tested are connected to the harness locker 5 through a harness (i.e., flying wire).

[0022] The fixing between the flying wire and the chip to be tested can be done by temporary soldering, which is very simple and easy to operate and will not damage the pins. In addition, the testing of packaged chips based on ATE is mainly experimental or verification testing, and flying wire welding also increases too much workload.

[0023] The harness locker 5 can be a PCB terminal or a chip locking seat. The PCB terminal is firm and stable, but each flying wire needs to be tightened one by one with a screwdriver; while the chip locking seat can be locked at one time after all flying wires are in place, which is relatively more convenient.

[0024] Based on the flexibility of the flying wire, the connection relationship with each hole of the harness locker can be adjusted according to the actual situation, so there is no need to customize the PCB board separately. In order to facilitate the clear relationship between the chip pins and the holes of the harness locker, the silk screen of the corresponding connected functional pins can be set at each hole of the harness locker on the PCB board.

[0025] The PCB board in this embodiment is designed for the SOP8 package product of NOR FLASH. Without affecting its use function, the hardware area is compressed to the minimum size acceptable to the machine. The test of the SOP8 package chip of NOR FLASH can be completed using only 1 / 4 of the space of the machine. Other PCB boards can be added in the remaining space for testing other packaged chips.

[0026] Obviously, the described embodiments are only some embodiments of the utility model, not all embodiments. Based on the embodiments of the utility model, all other embodiments obtained by ordinary technicians in this field and related fields without creative work should fall within the scope of protection of the utility model.

Claims

1. A general chip test carrier for packaging, comprising a carrier frame and a PCB board fixed thereon, wherein the PCB board is provided with contacts corresponding to ATE spring pins and a test socket, characterized in that: The PCB board is provided with a harness locker, and the harness locker is connected to the test socket through internal wiring of the PCB; the pins of the chip to be tested are connected to the harness locker through a harness.

2. The universal chip test carrier for packaging according to claim 1, characterized in that: The wiring harness is temporarily welded to the pins of the chip to be tested by soldering.

3. The packaging-oriented universal chip test carrier according to claim 1 or 2, characterized in that: The wire harness locker adopts a PCB terminal.

4. The packaging-oriented universal chip test carrier according to claim 1 or 2, characterized in that: The wire harness locker adopts a chip locking seat.

5. The universal chip test carrier for packaging according to claim 1, characterized in that: The PCB board is marked with silk screens of corresponding connected functional pins at each hole position of the wire harness locker.

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