Circuit for delay detection of hot plug interface

Abstract

The utility model provides a circuit for hot plug interface delay detection, which comprises a hot plug equipment insertion detection circuit, a detection signal delay transmission circuit and a detection signal receiving feedback circuit, and is characterized in that the input end of the hot plug equipment insertion detection circuit can be connected into hot plug equipment; the output end of the hot plug equipment insertion detection circuit is connected with the input end of the detection signal delay transmission circuit, the output end of the detection signal delay transmission circuit is connected with the input end of the detection signal receiving feedback circuit, and the output end of the detection signal receiving feedback circuit can be in feedback connection with a central processing unit of a computer. The hot plug device has the advantages that signal communication can be carried out after the hot plug device is completely inserted into the hot plug interface of the computer and completely contacted with the hot plug interface, and unstable signal communication or communication failure is avoided.

Description

Technical Field

[0001] The utility model relates to the technical field of circuits, in particular to a circuit for delay detection of a hot plug interface. Background Art

[0002] Hot swapping (English: Hot swapping or Hot plugging) means "plugging and unplugging with power on", which means that hardware can be plugged in or unplugged while the computer is running. With the appropriate software, peripheral devices that support hot swapping can be plugged in or unplugged without turning off the power, which will not cause the host or peripheral devices to burn out and can detect and use new devices in real time. Compared with Plug-and-Play, the requirements for software and hardware for hot swapping also include the contact sequence of power, signal and ground wires.

[0003] With the continuous development of science and technology, more and more interfaces are used in computers. However, various situations may occur during the hot-swap use of computer interfaces. Existing computer interfaces cannot take into account the operations of all users. For example, the insertion speed of TF card (memory card) is sometimes fast or slow, and the insertion speed of HDMI interface may be crooked. Insertion at multiple angles or different insertion speeds may affect the transmission of signals. When a TF card is inserted, a detect pin is generally used to detect whether it is inserted. The detect pin is a mechanical structure. It is on the front side of the TF card holder, so the detect pin will be triggered first when it is inserted into the computer interface. When the insertion is too slow, the computer central processor may have detected the insertion signal, but the actual communication signal of the TF card has not yet been fully contacted. At this time, communication failure may occur, that is, the TF card is not recognized. Similarly, HDMI may also have such a situation. Utility Model Content

[0004] In order to solve the problems in the prior art, the utility model provides a circuit for hot-plug interface delay detection. By arranging a hot-plug device insertion detection circuit, a detection signal delay transmission circuit and a detection signal receiving feedback circuit that cooperate with each other in the hot-plug interface of a computer, signal communication can be performed after the hot-plug device is fully inserted into the hot-plug interface of the computer and the contact is complete, thereby avoiding unstable signal communication or communication failure, and solving the problem of communication failure or unstable communication in the prior art when the hot-plug device is inserted into the hot-plug interface of the computer.

[0005] The utility model provides a circuit for hot-plug interface delay detection, which is arranged in the hot-plug interface of a computer and comprises a hot-plug device insertion detection circuit, a detection signal delay transmission circuit and a detection signal receiving feedback circuit. The input end of the hot-plug device insertion detection circuit can be connected to the hot-plug device, the output end of the hot-plug device insertion detection circuit is connected to the input end of the detection signal delay transmission circuit, the output end of the detection signal delay transmission circuit is connected to the input end of the detection signal receiving feedback circuit, the output end of the detection signal receiving feedback circuit can be connected to the central processing unit of the computer for feedback, and the hot-plug device insertion detection circuit can generate a detection signal when the hot-plug interface of the computer is connected to the hot-plug device, and the detection signal is transmitted to the detection signal receiving feedback circuit after delay by the detection signal delay transmission circuit, and finally output to the central processing unit of the computer to complete the insertion action of the hot-plug device.

[0006] The utility model is further improved in that the hot-swap device insertion detection circuit is provided with a resistor R3, one end of the resistor R3 is connected to the input end of the detection signal delay transmission circuit and the ground pin of the hot-swap device, and the other end of the resistor R3 is connected to a 3.3V bias voltage source.

[0007] The utility model is further improved, the detection signal delayed transmission circuit is provided with a field effect tube Q1, a field effect tube Q2, a resistor R2 and a capacitor C3, wherein the gate of the field effect tube Q2 is connected to one end of the resistor R3 and the ground pin of the hot plug device, the drain of the field effect tube Q2 is connected to one end of the resistor R2, one end of the capacitor C3, and the gate of the field effect tube Q1, the drain of the field effect tube Q1 is connected to the input end of the detection signal receiving feedback circuit, the other end of the resistor R2 is connected to a 3.3V bias voltage source, and the other end of the capacitor C3, the source of the field effect tube Q1, and the source of the field effect tube Q2 are grounded.

[0008] The utility model is further improved in that the detection signal receiving feedback circuit is provided with a resistor R1, one end of the resistor R1 is connected to the drain of the field effect tube Q1 and the central processing unit of the computer, and the other end of the resistor R1 is connected to a 3.3V bias voltage source.

[0009] The utility model is further improved in that the models of the field effect tube Q1 and the field effect tube Q2 are both WNM2030-3 / TR.

[0010] The utility model is further improved in that the resistance value of the resistor R3 is 100KΩ.

[0011] The utility model is further improved in that the resistance value of the resistor R2 is 1MΩ, and the capacitance value of the capacitor C3 is 4.7uF.

[0012] The utility model is further improved in that the resistance value of the resistor R1 is 100KΩ.

[0013] Compared with the prior art, the beneficial effects of the utility model are: providing a circuit for hot-plug interface delay detection, by arranging mutually coordinated hot-plug device insertion detection circuit, detection signal delay transmission circuit and detection signal receiving feedback circuit in the hot-plug interface of the computer, the hot-plug device insertion detection circuit can generate a detection signal when the hot-plug interface of the computer is connected to the hot-plug device, and after the detection signal delay transmission circuit delays, the detection signal is transmitted to the detection signal receiving feedback circuit, and finally output to the central processing unit of the computer to complete the insertion action of the hot-plug device, and can realize signal communication after the hot-plug device is fully inserted into the hot-plug interface of the computer and the contact is complete, avoiding unstable signal communication or communication failure, and is suitable for TF memory cards, HDMI interfaces, headphone interfaces, and U disks, and solves the problem of communication failure or unstable communication in the prior art when the hot-plug device is inserted into the hot-plug interface of the computer. BRIEF DESCRIPTION OF THE DRAWINGS

[0014] In order to more clearly illustrate the solutions in the present invention or the prior art, a brief introduction is given below to the drawings required for use in the embodiments or the description of the prior art. Obviously, the drawings described below are some embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying any creative work.

[0015] Figure 1 This is a principle block diagram of a circuit for hot-plug interface delay detection of the utility model;

[0016] Figure 2 A circuit diagram of a circuit for hot-plug interface delay detection according to the utility model;

[0017] Figure 3 The utility model is a circuit diagram of a circuit for hot-plug interface delay detection when connected to a TF card. DETAILED DESCRIPTION

[0018] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as those commonly understood by technicians in the technical field of the present utility model; the terms used in the specification of the application herein are only for the purpose of describing specific embodiments and are not intended to limit the present utility model; the terms "including" and "having" and any variations thereof in the specification and claims of the present utility model and the above-mentioned drawings are intended to cover non-exclusive inclusions. The terms "first", "second", etc. in the specification and claims of the present utility model or the above-mentioned drawings are used to distinguish different objects, rather than to describe a specific order.

[0019] Reference to "embodiments" herein means that a particular feature, structure, or characteristic described in conjunction with the embodiments may be included in at least one embodiment of the present invention. The appearance of the phrase in various locations in the specification does not necessarily refer to the same embodiment, nor is it an independent or alternative embodiment that is mutually exclusive with other embodiments. It is explicitly and implicitly understood by those skilled in the art that the embodiments described herein may be combined with other embodiments.

[0020] In order to enable those skilled in the art to better understand the solution of the utility model, the technical solution in the embodiments of the utility model will be clearly and completely described below in conjunction with the accompanying drawings.

[0021] like Figure 1-3 As shown, the utility model provides a circuit for hot-plug interface delay detection, which is arranged in the hot-plug interface of the computer, including a hot-plug device insertion detection circuit, a detection signal delay transmission circuit and a detection signal receiving feedback circuit. The input end of the hot-plug device insertion detection circuit can be connected to the hot-plug device, the output end of the hot-plug device insertion detection circuit is connected to the input end of the detection signal delay transmission circuit, the output end of the detection signal delay transmission circuit is connected to the input end of the detection signal receiving feedback circuit, and the output end of the detection signal receiving feedback circuit can be connected to the central processing unit of the computer for feedback. In this embodiment, the hot-plug device insertion detection circuit can generate a detection signal when the hot-plug interface of the computer is connected to the hot-plug device, and the detection signal is transmitted to the detection signal receiving feedback circuit after the delay of the detection signal delay transmission circuit, and finally output to the central processing unit of the computer to complete the insertion action of the hot-plug device, and can realize signal communication after the hot-plug device is fully inserted into the hot-plug interface of the computer and the contact is complete, so as to avoid unstable signal communication or communication failure, and is suitable for TF memory card, HDMI interface, headphone interface, and U disk.

[0022] like Figure 2 As shown, the hot-swap device insertion detection circuit is provided with a resistor R3, one end of the resistor R3 is connected to the input end of the detection signal delay transmission circuit and the ground pin of the hot-swap device, the other end of the resistor R3 is connected to a 3.3V bias voltage source, and the resistance value of the resistor R3 is 100KΩ. In this embodiment, the hot-swap device insertion detection circuit can generate a detection signal when the hot-swap device is connected to the hot-swap interface of the computer.

[0023] like Figure 2As shown, the detection signal delayed transmission circuit is provided with a field effect transistor Q1, a field effect transistor Q2, a resistor R2 and a capacitor C3, wherein the gate of the field effect transistor Q2 is connected to one end of the resistor R3 and the ground pin of the hot-swap device, the drain of the field effect transistor Q2 is connected to one end of the resistor R2, one end of the capacitor C3 and the gate of the field effect transistor Q1, the drain of the field effect transistor Q1 is connected to the input end of the detection signal receiving feedback circuit, the other end of the resistor R2 is connected to a 3.3V bias voltage source, the other end of the capacitor C3, the source of the field effect transistor Q1 and the source of the field effect transistor Q2 are grounded, the models of the field effect transistor Q1 and the field effect transistor Q2 are both WNM2030-3 / TR, the resistance value of the resistor R2 is 1MΩ, and the capacitance value of the capacitor C3 is 4.7uF. In this embodiment, the detection signal delayed transmission circuit is used to transmit the detection signal to the detection signal receiving feedback circuit after delaying it for a certain period of time. As Figure 3 As shown in the figure, when the TF card is not inserted, SD_CD is high, the field effect tube Q2 works in the saturation area, the SD_CD_R signal is pulled low, the field effect tube Q1 works in the cut-off area, and the CPU_CD is high; when the TF card is inserted, SD_CD is low, the field effect tube Q2 works in the cut-off area, and the capacitor C3 starts to charge. After a period of time, SD_CD_R is high, the field effect tube Q1 works in the saturation area, and the CPU_CD signal is pulled low. The computer's central processing unit detects a low level, which means that the TF card has completed the insertion action and started to communicate with the TF card. Principle of the delay circuit: The models of field effect transistors Q1 and Q2 are both WNM2030-3 / TR. When Vgs>1.2V, they work in the saturation area. A delay circuit can be made using the charging time of 0~1.2V. When the SD_CD signal is pulled low, the Vgs of field effect transistor Q2=0V, and field effect transistor Q2 immediately works in the cut-off area. Capacitor C3 starts to charge from 0V. When capacitor C3 is charged to 1.2V, Vgs of field effect transistor Q1=1.2V, and field effect transistor Q1 works in the saturation area. CPU_CD is immediately pulled low, and the computer's central processing unit completes the detection.

[0024] The Vgs of FET Q1 is equal to the voltage of capacitor C3. The charge of capacitor C3 is calculated as follows:

[0025] Vt: real-time voltage of the capacitor

[0026] E: pull-up voltage of the resistor

[0027] R: resistance of the pull-up resistor

[0028] C: Capacitance of charging capacitor

[0029] Vt=E*[1-exp(-t / RC)]=1.2V

[0030] When Vgs of FET Q1 is 1.2V, capacitor C3 reaches 1.2V, so Vt is 1.2V.

[0031] Vt=E*[1-exp(-t / RC)]

[0032] t=RCLn[E / (E-Vt)]

[0033] t=1*106*4.7*10-6*Ln[3.3 / (3.3-1.2)]

[0034] t=2.1s

[0035] Therefore, the delay circuit can achieve a 2.1s delay detection. When the user inserts the TF card, there is a 2.1s time interval from triggering the detection signal to completing the insertion. This is enough for the user to fully insert the TF card, and can completely solve the communication anomaly caused by slowly inserting the TF card. If you need to shorten the delay time, you can adjust the capacitor and resistor to the appropriate value.

[0036] like Figure 2 As shown, the detection signal receiving feedback circuit is provided with a resistor R1, one end of the resistor R1 is connected to the drain of the field effect transistor Q1 and the central processing unit of the computer, and the other end of the resistor R1 is connected to a 3.3V bias voltage source, and the resistance value of the resistor R1 is 100KΩ. In this embodiment, the detection signal receiving feedback circuit is used to feed back the detection signal to the central processing unit of the computer.

[0037] As can be seen from the above, the utility model provides a circuit for hot-plug interface delay detection. By arranging a hot-plug device insertion detection circuit, a detection signal delay transmission circuit and a detection signal receiving feedback circuit that cooperate with each other in the hot-plug interface of a computer, the hot-plug device insertion detection circuit can generate a detection signal when the hot-plug interface of the computer is connected to the hot-plug device. After the detection signal is delayed by the detection signal delay transmission circuit, the detection signal is transmitted to the detection signal receiving feedback circuit, and finally output to the central processing unit of the computer to complete the insertion action of the hot-plug device. Signal communication can be achieved after the hot-plug device is fully inserted into the hot-plug interface of the computer and the contact is complete, thereby avoiding unstable signal communication or communication failure. The utility model is suitable for TF memory cards, HDMI interfaces, headphone interfaces, and U disks, and solves the problem of communication failure or unstable communication in the prior art when the hot-plug device is inserted into the hot-plug interface of the computer.

[0038] The specific implementation methods described above are preferred implementation methods of the present utility model, and are not intended to limit the specific implementation scope of the present utility model. The scope of the present utility model includes but is not limited to the specific implementation methods. All equivalent changes made in accordance with the present utility model are within the protection scope of the present utility model.

Claims

1. A circuit for hot-plug interface delay detection, arranged in the hot-plug interface of a computer, characterized in that: The invention comprises a hot-plug device insertion detection circuit, a detection signal delay transmission circuit and a detection signal receiving feedback circuit. The input end of the hot-plug device insertion detection circuit can be connected to the hot-plug device, the output end of the hot-plug device insertion detection circuit is connected to the input end of the detection signal delay transmission circuit, the output end of the detection signal delay transmission circuit is connected to the input end of the detection signal receiving feedback circuit, the output end of the detection signal receiving feedback circuit can be connected to the central processing unit of the computer for feedback. When the hot-plug device is connected to the hot-plug interface of the computer, the hot-plug device insertion detection circuit can generate a detection signal, which is transmitted to the detection signal receiving feedback circuit after delay by the detection signal delay transmission circuit and finally output to the central processing unit of the computer to complete the insertion action of the hot-plug device.

2. The circuit for hot-plug interface delay detection according to claim 1, characterized in that: The hot-swap device insertion detection circuit is provided with a resistor R3, one end of the resistor R3 is connected to the input end of the detection signal delay transmission circuit and the ground pin of the hot-swap device, and the other end of the resistor R3 is connected to a 3.3V bias voltage source.

3. The circuit for hot-plug interface delay detection according to claim 2, characterized in that: The detection signal delayed transmission circuit is provided with a field effect transistor Q1, a field effect transistor Q2, a resistor R2 and a capacitor C3, wherein the gate of the field effect transistor Q2 is connected to one end of the resistor R3 and the ground pin of the hot plug device, the drain of the field effect transistor Q2 is connected to one end of the resistor R2, one end of the capacitor C3, and the gate of the field effect transistor Q1, the drain of the field effect transistor Q1 is connected to the input end of the detection signal receiving feedback circuit, the other end of the resistor R2 is connected to a 3.3V bias voltage source, and the other end of the capacitor C3, the source of the field effect transistor Q1, and the source of the field effect transistor Q2 are grounded.

4. The circuit for hot-plug interface delay detection according to claim 3, characterized in that: The detection signal receiving feedback circuit is provided with a resistor R1, one end of the resistor R1 is connected to the drain of the field effect transistor Q1 and the central processing unit of the computer, and the other end of the resistor R1 is connected to a 3.3V bias voltage source.

5. The circuit for hot-plug interface delay detection according to claim 4, characterized in that: The models of the field effect transistor Q1 and the field effect transistor Q2 are both WNM2030-3 / TR.

6. The circuit for hot-plug interface delay detection according to claim 5, characterized in that: The resistance value of the resistor R3 is 100KΩ.

7. The circuit for hot-plug interface delay detection according to claim 6, characterized in that: The resistance value of the resistor R2 is 1MΩ, and the capacitance value of the capacitor C3 is 4.7uF.

8. The circuit for hot-plug interface delay detection according to claim 7, characterized in that: The resistance value of the resistor R1 is 100KΩ.

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