Display substrate and display device

Abstract

The utility model discloses a display substrate and a display device. The display substrate includes a plurality of data lines extending in a first direction; the plurality of grid lines extend along a second direction, and the first direction and the second direction are crossed; the plurality of grid lines and the plurality of data lines are crossed to define a plurality of sub-pixel regions; a plurality of sub-pixels, wherein a single sub-pixel is located in the single sub-pixel region; at least one sub-pixel in the plurality of sub-pixels comprises a driving circuit, a first electrode and a second electrode which are arranged on the substrate, and the first electrode and the second electrode are at least partially overlapped in the direction away from the substrate; the driving circuit is electrically connected with one grid line, one data line and the first electrode respectively, and is arranged to transmit an electric signal of the data line to the first electrode under the control of the grid line; wherein the orthographic projection of the second electrode on the substrate covers the orthographic projection of the grid line on the substrate.

Description

Technical Field

[0001] The utility model relates to display technology, and more specifically, to a display substrate and a display device. Background Art

[0002] Liquid crystal display (LCD) has the characteristics of small size, low power consumption and no radiation, and has been developed rapidly. The liquid crystal display panel includes a thin film transistor array (TFT) substrate and a color filter (CF) substrate of a cell. Liquid crystal (LC) molecules are arranged between the array substrate and the color filter substrate. The electric field that drives the liquid crystal deflection is formed by controlling the common electrode and the pixel electrode to realize grayscale display.

[0003] However, liquid crystal display devices have a problem of defective scratches. Utility Model Content

[0004] An embodiment of the utility model provides a display substrate, comprising: a plurality of data lines extending along a first direction; a plurality of gate lines extending along a second direction, the first direction and the second direction intersecting; a plurality of the gate lines and a plurality of the data lines intersecting to define a plurality of sub-pixel regions; a plurality of sub-pixels, a single sub-pixel being located within the single sub-pixel region; at least one of the plurality of sub-pixels comprising a driving circuit, a first electrode and a second electrode arranged on a substrate, the first electrode and the second electrode at least partially overlapping in a direction away from the substrate; the driving circuit is electrically connected to one of the gate lines, one of the data lines and the first electrode, respectively, and is arranged to transmit the electrical signal of the data line to the first electrode under the control of the gate line; wherein the orthographic projection of the second electrode on the substrate covers the orthographic projection of the gate line on the substrate.

[0005] In an exemplary embodiment, the first electrode includes a plurality of slits, and at least two of the plurality of slits extend in the same direction.

[0006] In an exemplary embodiment, the slit includes a middle portion, a first end portion, and a second end portion connected to each other, and the first end portion and the second end portion are respectively located at both sides of the middle portion along the first direction.

[0007] In an exemplary embodiment, an angle between the extension direction of the first end and the second direction is a first angle a1, and the first angle a1 is less than or equal to 55 degrees.

[0008] In an exemplary embodiment, the first length L1 of the first end portion is the maximum distance between two opposite ends of the first end portion in its own extension direction; the first depth V1 of the first end portion is greater than or equal to 3.5 micrometers, V1=L1*sin(a1).

[0009] In an exemplary embodiment, an angle between an extending direction of the second end portion and the second direction is a second angle a2, and the second angle a2 is less than or equal to 55 degrees.

[0010] In an exemplary embodiment, the second length L2 of the second end portion is the maximum distance between two opposite ends of the second end portion in its own extension direction; the second depth V2 of the second end portion is greater than or equal to 3.5 microns, V2=L2*sin(a2).

[0011] In an exemplary embodiment, the plurality of slits are arranged in sequence along the second direction; along the second direction, the first ends of at least two of the slits are flush with each other on one side away from the middle portion, and the second ends of at least two of the slits are flush with each other on one side away from the middle portion.

[0012] In an exemplary embodiment, the plurality of slits are arranged in sequence along the second direction; the first ends of at least two adjacent slits along the second direction are arranged in a stepped manner away from an edge of one side of the middle portion, and / or the second ends of at least two adjacent slits along the second direction are arranged in a stepped manner away from an edge of one side of the middle portion.

[0013] In an exemplary embodiment, when the first ends of at least two adjacent slits along the second direction are arranged in a stepped manner away from the edge of one side of the middle portion, the distance between the first ends of adjacent slits is less than or equal to 6 microns; the distance between the first ends of adjacent slits is the distance between the first ends of adjacent slits away from the edge of one side of the middle portion along the first direction.

[0014] In an exemplary embodiment, when the second ends of at least two adjacent slits along the second direction are arranged in a stepped manner away from the edge of one side of the middle portion, the distance between the second ends of adjacent slits is less than or equal to 6 microns; the distance between the second ends of adjacent slits is the distance between the second ends of adjacent slits away from the edge of one side of the middle portion along the first direction.

[0015] In an exemplary embodiment, the driving circuit includes a first transistor, the gate line is connected to the gate electrodes of a plurality of the first transistors located in its own extension direction, the first electrode of the first transistor is connected to the data line, and the second electrode of the first transistor is connected to the first electrode; the orthographic projection of the second electrode on the substrate exposes the orthographic projection of the gate electrode of the first transistor on the substrate.

[0016] In an exemplary embodiment, the sum of the overlapping areas of the orthographic projection of the second electrode on the substrate and the orthographic projections of the gate line and the gate electrode on the substrate is a first area, and the sum of the areas of the orthographic projections of the gate line and the gate electrode on the substrate is a second area; and a ratio of the first area to the second area is greater than or equal to 65% and less than or equal to 95%.

[0017] In an exemplary embodiment, the gate line and the gate electrodes of the plurality of first transistors located in the gate line's extension direction are an integrated structure.

[0018] In an exemplary embodiment, the plurality of sub-pixels include a plurality of sub-pixel columns arranged along the first direction and a plurality of sub-pixel rows arranged along the second direction; two gate lines are distributed between two adjacent sub-pixel rows along the first direction, and the sub-pixels within a single sub-pixel row are electrically connected to the two adjacent gate lines along the first direction, respectively.

[0019] An embodiment of the utility model further provides a display device, comprising the aforementioned display substrate, an opposite substrate, and a liquid crystal layer arranged between the display substrate and the opposite substrate.

[0020] In an exemplary embodiment, the dielectric constant of the liquid crystal material of the liquid crystal layer is less than or equal to 8; or, the liquid crystal material of the liquid crystal layer is a negative liquid crystal.

[0021] The display substrate proposed in the embodiment of the utility model is configured such that the orthographic projection of the second electrode of the sub-pixel on the substrate covers the orthographic projection of the gate line on the substrate, so that the second electrode can shield the electric field of the gate line, thereby preventing the electric field of the gate line from affecting the arrangement of liquid crystal molecules, helping to avoid scratches and improving the display effect. The problem of scratches on liquid crystal display devices is solved.

[0022] Other features and advantages of the utility model will be described in the following description, and partly become apparent from the description, or understood by implementing the utility model. The purpose and other advantages of the utility model can be realized and obtained through the structures particularly pointed out in the description and the drawings. BRIEF DESCRIPTION OF THE DRAWINGS

[0023] The accompanying drawings are used to provide a further understanding of the technical solution of the utility model and constitute a part of the specification. Together with the embodiments of the present application, they are used to explain the technical solution of the utility model and do not constitute a limitation on the technical solution of the utility model.

[0024] Figure 1 is a schematic diagram of a cross-sectional structure of a display device;

[0025] Figure 2 It is a schematic diagram of a planar structure of a display substrate;

[0026] Figure 3 is a schematic plan view of a display substrate using a double-gate structure in an exemplary embodiment;

[0027] Figure 4 A schematic diagram of the arrangement of liquid crystal molecules in a sub-pixel when a scratch defect occurs;

[0028] Figure 5 In some embodiments Figure 4 An enlarged schematic diagram of the dotted area G;

[0029] Figure 6 In the exemplary embodiment of the present utility model Figure 4 an enlarged view of a first region G;

[0030] Figure 7 is a top view of a pixel electrode of a sub-pixel in an exemplary embodiment;

[0031] Figure 8 In yet another exemplary embodiment Figure 4 an enlarged view of a first region G;

[0032] Fig. 9 is an orthographic projection relationship diagram of liquid crystal molecules and pixel electrodes on a display substrate in an exemplary embodiment;

[0033] Fig. 10A is a schematic structural diagram of a sub-pixel in an exemplary embodiment;

[0034] Fig. 10B for Fig. 10A Light path diagram of neutron pixel;

[0035] Fig.11A is a schematic structural diagram of a sub-pixel in yet another exemplary embodiment;

[0036] Fig. 11B for Fig.11A Light path diagram of neutron pixel;

[0037] Fig.12 is a top view of a pixel electrode of a sub-pixel in yet another exemplary embodiment;

[0038] Fig.13A is a top view of a pixel electrode of a sub-pixel in an exemplary embodiment;

[0039] Fig. 13B is a top view of a pixel electrode of a sub-pixel in another exemplary embodiment;

[0040] Fig. 13C is a top view of a pixel electrode of a sub-pixel in another exemplary embodiment;

[0041] Fig.13D is a top view of a pixel electrode of a sub-pixel in another exemplary embodiment;

[0042] Fig.14 In the exemplary embodiment Figure 2 A cross-sectional view of a display substrate along the CC direction. DETAILED DESCRIPTION

[0043] In order to make the purpose, technical solution and advantages of the utility model more clear, the embodiments of the utility model will be described in detail with reference to the accompanying drawings. It should be noted that the embodiments and features in the embodiments of the present application can be combined with each other arbitrarily without conflict.

[0044] In the description of the present invention, it should be noted that the terms "upper", "lower", "one side", "the other side", "one end", "the other end", "side", "relative", "four corners", "periphery", "'mouth'-shaped structure" and the like indicate orientations or positional relationships based on the orientations or positional relationships shown in the accompanying drawings, and are only for the convenience of describing the 'present' utility model and simplifying the description, and do not indicate or imply that the structure referred to has a specific orientation, is constructed and operated in a specific orientation, and therefore cannot be understood as a limitation on the present invention.

[0045] In the description of the embodiments of the present utility model, unless otherwise clearly specified and limited, the terms "connection", "direct connection", "indirect connection", "fixed connection", "installation", and "assembly" should be understood in a broad sense, for example, it can be a fixed connection, a detachable connection, or an integral connection; the terms "installation", "connection", and "fixed connection" can be a direct connection, or an indirect connection through an intermediate medium, or the internal communication of two components. For ordinary technicians in this field, the specific meanings of the above terms in the present utility model can be understood according to specific circumstances.

[0046] In the drawings, the size of one or more components, the thickness of a layer, or an area is sometimes exaggerated for the sake of clarity. Therefore, one embodiment of the present invention is not necessarily limited to this size, and the shape and size of one or more components in the drawings do not reflect the true proportion. In addition, the drawings schematically show ideal examples, and one embodiment of the present invention is not limited to the shapes or values ​​shown in the drawings. The proportions of the drawings in the present invention can be used as a reference in actual processes, but are not limited to this. For example: the width-to-length ratio of the channel, the thickness and spacing of the film layer, and the width and spacing of the signal line can be adjusted according to actual needs.

[0047] The ordinal numbers such as "first", "second", "third" and the like in this specification are provided to avoid confusion of constituent elements, rather than to limit the quantity. The "plurality" in this utility model means two or more.

[0048] In this specification, for the sake of convenience, the words and phrases indicating the orientation or positional relationship such as "middle", "upper", "lower", "front", "back", "vertical", "horizontal", "top", "bottom", "inside", "outside" and the like are used to illustrate the positional relationship of the constituent elements with reference to the drawings. This is only for the convenience of describing this specification and simplifying the description, and does not indicate or imply that the device or element referred to must have a specific orientation, be constructed and operate in a specific orientation, and therefore cannot be understood as a limitation on the present utility model. The positional relationship of the constituent elements is appropriately changed according to the orientation of the constituent elements being described. Therefore, it is not limited to the words and phrases described in the specification and can be appropriately replaced according to the circumstances.

[0049] In this specification, unless otherwise clearly specified and limited, the terms "installed", "connected" and "connected" should be understood in a broad sense. For example, it can be a fixed connection, or a detachable connection, or an integral connection; it can be a mechanical connection, or an electrical connection; it can be a direct connection, or an indirect connection through an intermediate piece, or the internal connection of two elements. For ordinary technicians in this field, the meanings of the above terms in the utility model can be understood according to the circumstances. Among them, "electrical connection" includes the situation where constituent elements are connected together through an element with some electrical function. There is no special restriction on "elements with some electrical function" as long as they can transmit electrical signals between connected constituent elements. Examples of "elements with some electrical function" include not only electrodes and wiring, but also switching elements such as transistors, resistors, inductors, capacitors, and other elements with one or more functions.

[0050] In this specification, a transistor refers to an element including at least three terminals: a gate electrode, a drain electrode, and a source electrode. The transistor has a channel region between a drain electrode (drain electrode terminal, drain region, or drain) and a source electrode (source electrode terminal, source region, or source), and current can flow through the drain electrode, the channel region, and the source electrode. Note that in this specification, the channel region refers to a region where current mainly flows.

[0051] In this specification, in order to distinguish the two poles of the transistor other than the gate, one of the electrodes is called the first pole and the other electrode is called the second pole. For example, the first pole can be a drain electrode and the second pole can be a source electrode, or the first pole can be a source electrode and the second pole can be a drain electrode. In the case of using transistors with opposite polarities or the case where the current direction changes during circuit operation, the functions of the "source electrode" and the "drain electrode" are sometimes interchanged. Therefore, in this specification, the "source electrode" and the "drain electrode" can be interchanged, and the "source end" and the "drain end" can be interchanged.

[0052] In this specification, "parallel" means a state where the angle formed by two straight lines is greater than -10° and less than 10°, and therefore, also includes a state where the angle is greater than -5° and less than 5°. In addition, "perpendicular" means a state where the angle formed by two straight lines is greater than 80° and less than 100°, and therefore, also includes a state where the angle is greater than 85° and less than 95°.

[0053] In this specification, triangles, rectangles, trapezoids, pentagons or hexagons are not in the strict sense, but may be approximate triangles, rectangles, trapezoids, pentagons or hexagons, etc. There may be some small deformations caused by tolerances, and there may be chamfers, arc edges and deformations.

[0054] The term "about" in this specification refers to a numerical value that is not strictly limited and allows for process and measurement errors.

[0055] In this specification, A extends along direction B means that A may include a main part and a secondary part connected to the main part, the main part is a line, line segment or strip-shaped body, the main part extends along direction B, and the length of the main part extending along direction B is greater than the length of the secondary part extending along other directions. In the following description, "A extends along direction B" means "the main part of A extends along direction B".

[0056] In this specification, “A and B are arranged in the same layer” means that when preparing the display substrate, A and B are formed simultaneously through the same patterning process.

[0057] Figure 1 FIG. 1 is a schematic diagram of a cross-sectional structure of a display device. Figure 1As shown, the display device may include a display substrate 100 and an opposite substrate 200 that are arranged opposite to each other, and a liquid crystal layer 300 that is arranged between the display substrate 100 and the opposite substrate 200. The display substrate 100 may be called an array substrate, and the opposite substrate 200 may be called a color film substrate. The display substrate 100 may include a first structural layer 102 that is arranged on a side of a first substrate 101 that faces the opposite substrate 200, and the opposite substrate 200 may include a second structural layer 202 that is arranged on a side of a second substrate 201 that faces the first substrate 100. LCDs may be divided into twisted nematic (TN) display mode, in plane switching (IPS) display mode, fringe field switching (FFS) display mode, and advanced superdimensional field switching (ADS) display mode according to display modes. For the ADS display mode, in an exemplary embodiment, the first structure layer 102 may include a gate line, a data line, a first transistor, a first electrode, and a second electrode. The first electrode may be a pixel electrode, and the second electrode may be a common electrode connected to a common voltage line. The first electrode and the second electrode are used to generate an electric field for controlling the deflection of liquid crystal molecules in the liquid crystal layer, thereby realizing the display of a specific gray scale. The first transistor may be electrically connected to the first electrode, the data line, and the gate line, respectively. The scanning signal transmitted by the gate line may control the on and off of the first transistor. After the first transistor is turned on, the pixel voltage transmitted on the data line may be output to the first electrode to realize the picture display. The second structure layer 202 may include a black matrix and a filter unit.

[0058] Figure 2 FIG. 1 is a schematic diagram of a planar structure of a display substrate, which may be an array substrate. Figure 2As shown, in an exemplary embodiment, the display substrate 100 may include a display area AA and a non-display area, and the non-display area may be arranged on at least one side of the display area AA. In an exemplary embodiment, the non-display area may be arranged around the display area AA. The non-display area may include a circuit area, and the circuit area may include a first circuit area BB1 and a second circuit area BB2. The first circuit area BB1 may be located on one side of the display area AA along the second direction Y, and the second circuit area BB2 may be located on the side of the display area AA in the opposite direction of the second direction Y. The display area AA may include at least one first routing line extending along the second direction Y, and at least one second routing line extending along the first direction X, the first routing line may be, for example, a gate line, and the second routing line may be, for example, a data line, and the second direction Y may intersect with the first direction X, for example, may be perpendicular to each other. A first scan driver may be arranged in the first circuit area BB1, and a second scan driver may be arranged in the second circuit area BB2, and the first scan driver and the second scan driver may provide scan signals to the gate lines in the display area AA. The data driver may provide data signals to the data lines in the display area AA.

[0059] In an exemplary embodiment, if Figure 2 As shown, multiple gate lines (S1 to S m-1 ) and multiple data lines (D1 to D n ) can cross-define a plurality of sub-pixel (Pxij) regions, each of which has a sub-pixel disposed therein, and the sub-pixel includes a first electrode, a second electrode, and a driving circuit connected to the first electrode. The driving circuit may include at least one first transistor. Taking the first transistor as an oxide thin film transistor as an example, the drain electrode of the oxide thin film transistor may be electrically connected to the first electrode, the source electrode may be electrically connected to the data line, and the gate electrode may be electrically connected to the gate line. The first transistor is controlled to open by a scanning signal transmitted by the gate line to light up the corresponding sub-pixel on the display substrate.

[0060] In an exemplary embodiment, if Figure 2 As shown, a timing signal line, a common voltage line, a high voltage power line, and a low voltage power line may be provided on the side of the first scan driver away from the display area AA and the side of the second scan driver away from the display area AA (not shown). The first scan driver and the second scan driver may control the sub-pixels of the display area AA to display according to the timing signal from the timing signal line, the high voltage power line may provide a high voltage signal, and the low voltage power line may provide a low voltage signal, so that the display device may display normally.

[0061] In an exemplary embodiment, if Figure 2 As shown, the plurality of sub-pixels in the display area AA may be arranged in an array, including a plurality of sub-pixel columns arranged along a first direction X and a plurality of sub-pixel rows arranged along a second direction Y. Figure 2As shown, a single gate line is arranged between two adjacent sub-pixel rows.

[0062] Figure 3 FIG. 1 is a schematic plan view of a display substrate using a dual-gate structure in an exemplary embodiment, illustrating the arrangement of sub-pixels in four rows and six columns, and omitting other structures. Figure 3 As shown, the display substrate 100 can adopt a dual-gate structure, two gate lines are arranged between two adjacent sub-pixel rows, each pixel row is adjacent to the two gate lines on both sides along the first direction X, and the sub-pixels in a single sub-pixel row can be connected to the two adjacent gate lines respectively. In a single sub-pixel row, the sub-pixels connected to different gate lines can be arranged at intervals. Two adjacent sub-pixel columns can share a data line, and a plurality of common voltage lines Vcom can extend along the first direction X and be arranged at intervals with the data lines in the second direction Y. The common voltage line Vcom can be electrically connected to the second electrode of the sub-pixel (not shown) to provide a low-voltage signal to the second electrode of the sub-pixel. By adopting a dual-gate structure, the number of gate lines on the display substrate is doubled, and the number of data lines and source driver ICs can be reduced, thereby reducing the cost of the display substrate 100.

[0063] Figure 4 This is a schematic diagram of the arrangement of liquid crystal molecules in a sub-pixel when a scratch occurs, illustrating the orthographic projection relationship between the liquid crystal molecules and the pixel electrodes on the display substrate. For a liquid crystal display device, when a user's finger slides across the screen in the case of a high grayscale (L255) image, the electric field at the finger pressing position changes, which can easily lead to a disordered arrangement of the liquid crystal molecules. The screen brightness at the position where the finger slides will decrease, forming a local darkening mark. If the mark cannot be restored after 5 seconds of pressing, it is called a scratch defect (Trace Mura). Figure 4 As shown, the pixel electrode 51 includes a plurality of slits 510, the extension direction of the slits 510 intersects with the first direction X, and the plurality of slits 510 are sequentially arranged along the second direction Y. The slits 510 include a middle portion F1 located in the middle area of ​​the sub-pixel and a first end portion F2 and a second end portion F3 away from the center of the sub-pixel. The first end portion F2 and the second end portion F3 may be located at two sides of the middle portion F1 along the first direction X, respectively. The middle portion F1 may have different extension directions to form a dual-domain or multi-domain structure. Figure 4In the figure, the liquid crystal molecules 301 are arranged in a double-domain distribution as an example, and the utility model does not limit this. A plurality of liquid crystal molecules 301 are distributed in multiple columns along the second direction Y, and the arrangement of the liquid crystal molecules in the leftmost column (i.e., in the dotted area E) is disordered. In the case of displaying a high grayscale image, the electric field of the slit 510 at the first end F2 and the second end F3 away from the center of the sub-pixel is relatively weak, while the electric field of the gate line S near the first end F2 and the second end F3 is relatively strong. Under the influence of the electric field of the gate line S, the arrangement of the liquid crystal molecules 301 at the first end F2 and the second end F3 of the slit 510 is prone to disorder. After the finger is swiped on the screen, the electric field changes caused by the pressing, so that the liquid crystal molecules 301 at the first end F2 and the second end F3 that are disordered drive the liquid crystal molecules 301 in the column where they are located to be disordered, resulting in disordered arrangement of the plurality of liquid crystal molecules 301 in the dotted area E, forming a scratch defect. In a display substrate adopting a dual-gate structure, the number of gate lines is greater, the electric field interference formed on the liquid crystal molecules is stronger, and scratch defects are more likely to occur.

[0064] Figure 5 In some embodiments Figure 4 The enlarged schematic diagram of the dotted line area G in FIG. 1 illustrates the orthographic projection relationship between the gate line S, the data line D, the pixel electrode 51, the common electrode 61 and the liquid crystal molecule 301 on the display substrate. Figure 5 As shown, the orthographic projection of the common electrode 61 on the display substrate covers the orthographic projection of the pixel electrode 51 on the display substrate, and the orthographic projection of the common electrode 61 on the display substrate does not overlap with the orthographic projection of the gate line S on the display substrate. The electric field of the gate line S acts on the liquid crystal molecules 301 located at the first end F2 of the slit 510, which can easily cause an abnormal deflection angle of the liquid crystal molecules 301 located at the first end F2 of the slit 510, making it more likely to form scratches when a finger swipes across the screen.

[0065] An exemplary embodiment of the utility model provides a display substrate, comprising: a substrate and a plurality of gate lines and a plurality of data lines arranged on the substrate, the plurality of data lines extending along a first direction, the plurality of gate lines extending along a second direction, the plurality of gate lines and the plurality of data lines intersecting to define a plurality of sub-pixel regions, each of the sub-pixel regions being provided with a sub-pixel; at least one of the plurality of sub-pixels comprises a driving circuit, a first electrode and a second electrode, the first electrode and the second electrode at least partially overlapping in a direction away from the substrate, the driving circuit being electrically connected to one of the gate lines, one of the data lines and the first electrode, and being configured to transmit an electrical signal of the data line to the first electrode under the control of the gate line; wherein the orthographic projection of the second electrode on the substrate covers the orthographic projection of the gate line on the substrate.

[0066] The display substrate provided by the embodiment of the utility model is configured such that the orthographic projection of the second electrode of the sub-pixel on the substrate covers the orthographic projection of the gate line on the substrate, so that the second electrode can shield the electric field of the gate line, thereby preventing the electric field of the gate line from affecting the arrangement of liquid crystal molecules, helping to avoid scratches and improving the display effect.

[0067] In an exemplary embodiment, the first electrode includes a plurality of slits, and at least two of the plurality of slits extend in the same direction.

[0068] In an exemplary embodiment, the slit includes a middle portion, a first end portion, and a second end portion connected to each other, and the first end portion and the second end portion are respectively located at both sides of the middle portion along the first direction.

[0069] In an exemplary embodiment, an angle between the extension direction of the first end and the second direction is a first angle a1, and the first angle a1 is less than or equal to 55 degrees.

[0070] In an exemplary embodiment, the first length L1 of the first end portion is the maximum distance between two opposite ends of the first end portion in its own extension direction; the first depth V1 of the first end portion is greater than or equal to 3.5 micrometers, V1=L1*sin(a1).

[0071] In an exemplary embodiment, an angle between an extending direction of the second end portion and the second direction is a second angle a2, and the second angle a2 is less than or equal to 55 degrees.

[0072] In an exemplary embodiment, the second length L2 of the second end portion is the maximum distance between two opposite ends of the second end portion in its own extension direction; the second depth V2 of the second end portion is greater than or equal to 3.5 microns, V2=L2*sin(a2).

[0073] In an exemplary embodiment, the plurality of slits are arranged in sequence along the second direction; along the second direction, the first ends of at least two of the slits are flush with each other on one side away from the middle portion, and / or the second ends of at least two of the slits are flush with each other on one side away from the middle portion.

[0074] In an exemplary embodiment, the plurality of slits are arranged in sequence along the second direction; the first ends of at least two adjacent slits along the second direction are arranged in a stepped manner away from an edge of one side of the middle portion, and the second ends of at least two adjacent slits along the second direction are arranged in a stepped manner away from an edge of one side of the middle portion.

[0075] In an exemplary embodiment, when the first ends of at least two adjacent slits along the second direction are arranged in a stepped manner away from the edge of one side of the middle portion, the distance between the first ends of adjacent slits is less than or equal to 6 microns; the distance between the first ends of adjacent slits is the distance between the first ends of adjacent slits away from the edge of one side of the middle portion along the first direction.

[0076] In an exemplary embodiment, when the second ends of at least two adjacent slits along the second direction are arranged in a stepped manner away from the edge of one side of the middle portion, the distance between the second ends of adjacent slits is less than or equal to 6 microns; the distance between the second ends of adjacent slits is the distance between the second ends of adjacent slits away from the edge of one side of the middle portion along the first direction.

[0077] In an exemplary embodiment, the driving circuit includes a first transistor, the gate line is connected to the gate electrodes of a plurality of the first transistors located in its own extension direction, the first electrode of the first transistor is connected to the data line, and the second electrode of the first transistor is connected to the first electrode; the orthographic projection of the second electrode on the substrate exposes the orthographic projection of the gate electrode of the first transistor on the substrate.

[0078] In an exemplary embodiment, the sum of the overlapping areas of the orthographic projection of the second electrode on the substrate and the orthographic projections of the gate line and the gate electrode on the substrate is a first area, and the sum of the areas of the orthographic projections of the gate line and the gate electrode on the substrate is a second area; and a ratio of the first area to the second area is greater than or equal to 65% and less than or equal to 95%.

[0079] In an exemplary embodiment, the gate line and the gate electrodes of the plurality of first transistors located in the gate line's extension direction are an integrated structure.

[0080] The display substrate of the present invention is described below by means of some exemplary embodiments.

[0081] Figure 6 In the exemplary embodiment of the present utility model Figure 4 The enlarged view of the first region G of FIG. 1 illustrates the orthographic projection relationship of the gate line S, the data line D, the pixel electrode 51, the common electrode 61 and the driving circuit on the display substrate, and omits illustrating other structures of the display substrate. Figure 6As shown, in a single sub-pixel, the first electrode may be a pixel electrode 51, and the second electrode may be a common electrode 61, and the common electrode 61 may be located on a side of the pixel electrode 51 away from the substrate (not shown). The driving circuit may include a first transistor, the gate electrode 22 of the first transistor and the corresponding gate line S may be connected to each other, for example, they may be an integral structure, the first electrode 44 of the first transistor and the adjacent data line D may be connected to each other, for example, they may be an integral structure, the first electrode 44 may be, for example, a source electrode, the second electrode 45 of the first transistor is connected to the pixel electrode 51, and the second electrode 45 may be, for example, a drain electrode. The positive projection of the common electrode 61 on the substrate may cover the positive projection of the gate line S on the substrate, and the positive projection of the common electrode 61 on the substrate may expose the positive projection of the gate electrode 22 of the first transistor on the substrate. In the case where the gate electrode 22 of the first transistor and the corresponding gate line S are an integral structure, in a direction perpendicular to the substrate, the region where the gate line S overlaps with the active layer (not shown) of the first transistor serves as the gate electrode of the first transistor. The common electrode 61 can shield the electric field from the gate line S, so that there is no electric field of the gate line S near the end of the slit 510, and the liquid crystal molecules at the corresponding position will not be abnormally deflected, which reduces the influence of the electric field at the edge of the sub-pixel on the liquid crystal molecules at the end of the slit 510. When a finger passes across the screen, the liquid crystal molecules at the corresponding position are deflected at a smaller angle and can recover to normal arrangement in a short time, which improves the ability of the liquid crystal molecules to recover the deflected shape after being disturbed by the electric field, thereby avoiding scratches.

[0082] In an exemplary embodiment, if Figure 6 As shown, the first electrode 44 of the first transistor can be in a "U" shape, and the opening direction of the "U" shape can be away from the data line D connected to itself. The second electrode 45 of the first transistor can be in a linear shape, and the second electrode 45 of the first transistor can extend to the inside of the "U"-shaped opening of the first electrode 44.

[0083] In an exemplary embodiment, the orthographic projection of the common electrode 61 on the substrate and the orthographic projections of the gate line S and the gate electrode 22 on the substrate may overlap each other, and the sum of the overlapping areas of the orthographic projection of the common electrode 61 on the substrate and the orthographic projections of the gate line S and the gate electrode 22 on the substrate may be the first area. The sum of the areas of the orthographic projections of the gate line S and the gate electrode 22 on the substrate may be the second area, and the ratio of the first area to the second area may be greater than or equal to 65% and less than or equal to 95%. For example, the ratio of the first area to the second area may be about 81%, and the sizes of the first area and the second area may be set as needed, and the utility model is not limited thereto.

[0084] In an exemplary embodiment, the gate electrode 22 of the first transistor and the corresponding gate line S may be an integral structure.

[0085] In an exemplary embodiment, in Figure 4 In the structure shown, the slit 510 of the pixel electrode 51 is in a strip shape, the extension direction of the first end F2 is the same as the extension direction of the connected middle portion F1, and the extension direction of the second end F3 is the same as the extension direction of the connected middle portion F1. The extension direction of the slit 510 of the pixel electrode 51 has a certain influence on the deflection direction of the liquid crystal molecules. Figure 4 When the structure shown displays a high grayscale (L255) image, the electric field of the first end F2 is perpendicular to the electric field of the connected middle portion F1, and the electric field of the second end F3 is perpendicular to the electric field of the connected middle portion F1. The arrangement of the liquid crystal molecules 301 located at the first end F2 and the second end F3 is prone to deflection abnormalities. When the user's finger presses the screen, the liquid crystal molecules 301 are more prone to deflection abnormalities under the action of the electric field, and drive the liquid crystal molecules 301 located on one side of the middle portion F1 to deflect abnormally, causing the liquid crystal molecules 301 in this column to be disorderly arranged, resulting in scratches.

[0086] Figure 7 FIG. 1 is a top view of a pixel electrode of a sub-pixel in an exemplary embodiment. Figure 7 As shown, the middle part of the slit 510 includes a first main body F11, a second main body F12 and a connecting part F13, the first main body F11 is connected to the first end F2, the second main body F12 is connected to the second end F3, and the connecting part F13 is used to connect the first main body F11 and the second main body F12. The extension direction of the first main body F11 and the extension direction of the second main body F12 can be different, the extension direction of the first main body F11 and the extension direction of the first end F2 can be different, and the extension direction of the second main body F12 and the extension direction of the second end F3 can be different. Figure 7As shown, the angle between the extension direction of the first end F2 of the slit 510 and the second direction Y is the first angle a1, the length of the first end F2 of the slit 510 is the first length L1, the first length L1 can be the maximum distance between the two opposite ends of the first end F2 in its own extension direction, the depth of the first end F2 of the slit 510 is the first depth V1, V1=L1*sin(a1), the first depth V1 represents the distance along the first direction X between one end of the first end F2 away from the connecting portion F13 and one end of the first main body F11 away from the connecting portion F13. The angle between the extension direction of the second end F3 of the slit 510 and the second direction Y is the second angle a2, the length of the second end F3 of the slit 510 is the second length L2, the second length L2 can be the maximum distance between the two opposite ends of the second end F3 in its own extension direction, the depth of the second end F3 of the slit 510 is the second depth V2, V2=L2*sin(a2), the second depth V2 represents the distance along the first direction X between one end of the second end F3 away from the connecting portion F13 and one end of the second main body portion F12 away from the connecting portion F13. By forming a corner structure such as the first end F2 and the second end F3 on the slit 510, the angle, length, depth and other parameters of the first end F2 and the second end F3 can be set, the direction of the electric field at the first end F2 and the second end F3 can be changed, and the influence of the electric field at the edge of the sub-pixel on the liquid crystal molecules at the ends of the slit 510 can be reduced. The deflection angle of the liquid crystal molecules 301 located at the first end F2 and the second end F3 can be controlled to avoid abnormal deflection of the liquid crystal molecules. After the finger leaves the screen, the liquid crystal molecules can quickly restore the deflection state to avoid the formation of scratches.

[0087] In an exemplary embodiment, the ADS display mode light transmittance formula is shown in formula (1):

[0088]

[0089] In formula (1), T represents light transmittance, λ is the wavelength of incident light, Φ is the azimuth angle between the liquid crystal director and the external electric field, △n is the liquid crystal birefringence, and d is the device cell thickness.

[0090] According to formula (1), when other conditions remain unchanged, when the deflection angle Φ of the liquid crystal is 45 degrees, the light transmittance reaches the maximum value. Considering the further deflection of the liquid crystal when the screen is pressed and the process fluctuations, the actual deflection angle Φ will deviate from the theoretical value by about 20 degrees. Based on this, the extension direction and length size of the first end F2 and the second end F3 can be set.

[0091] In an exemplary embodiment, the first angle a1 may be less than or equal to 55 degrees, for example, the first angle a1 may be less than or equal to 50 degrees, and the first depth V1 may be greater than or equal to 3.5 micrometers, for example, the first depth V1 may be greater than or equal to 4 micrometers. Such a size design of the first end F2 can effectively prevent abnormal deflection of the liquid crystal molecules located at the first end F2, and the first angle and the first depth of the first end F2 can be set as needed, and the present invention is not limited thereto.

[0092] In an exemplary embodiment, the second angle a2 may be less than or equal to 55 degrees, for example, the second angle a2 may be less than or equal to 50 degrees, and the second depth V2 may be greater than or equal to 3.5 microns, for example, the second depth V2 may be greater than or equal to 4 microns. Such a size design of the second end F3 can effectively prevent abnormal deflection of the liquid crystal molecules at the second end F3, and the second angle and the second depth of the second end F3 can be set as needed, and the present invention is not limited thereto.

[0093] In an exemplary embodiment, the first angle a1 may be equal to the second angle a2, the first length L1 may be equal to the second length L2, the first depth V1 may be equal to the second depth V2, and the end sizes and angles of the plurality of slits 510 may be the same, which is not limited in the present invention.

[0094] Figure 8 In yet another exemplary embodiment Figure 4 The enlarged view of the first region G shows that Figure 7 In the case of the pixel electrode 51 of the structure shown, the gate line S, the data line D, the pixel electrode 51, the common electrode 61 and the driving circuit are in an orthographic projection relationship on the display substrate, and other structures of the display substrate are omitted for illustration. Fig. 9 is an orthographic projection diagram of the relationship between liquid crystal molecules and pixel electrodes on a display substrate in an exemplary embodiment, illustrating the Figure 7 In the case of the pixel electrode 51 of the structure shown in FIG. 1 , the arrangement of the liquid crystal molecules in the first main portion F11 and the first end portion F2 is shown in FIG. Figure 8 and Fig. 9 As shown, by setting at least one end (the first end F1 or the second end F2) of the slit 501 of the pixel electrode 51 away from the middle as a corner structure, the direction of the electric field at the corner structure can be controlled, reducing the influence of the electric field at the edge of the sub-pixel on the liquid crystal molecules at the end of the slit 510, and effectively preventing the liquid crystal molecules at the corner structure from being abnormally deflected, thereby limiting the position of the liquid crystal molecules and preventing the formation of scratches.

[0095] Fig. 10A is a schematic diagram of the structure of a sub-pixel in an exemplary embodiment, Fig. 10B for Fig. 10ALight path diagram of a neutron pixel. Fig. 10A In the pixel electrode 51 shown in FIG. 1 , the second slit on the left (i.e., the slit encircled by the dotted area E1) is not provided with a corner structure, and the remaining slits are provided with a corner structure. Fig. 10B As shown, there is a scratch E2 on the screen, and the position of the scratch E2 corresponds to Fig. 10A The second slit on the left side of the middle, scratch E2 will seriously affect the normal display of the display panel and bring a bad experience to the user.

[0096] Fig.11A is a schematic diagram of the structure of a sub-pixel in another exemplary embodiment, Fig.11A and Fig. 10A The structure is similar to Fig.11A The second slit on the left side (ie, the slit circled by the dotted area E1) adopts a corner structure. Fig. 11B for Fig.11A Light path diagram of neutron pixel. Fig. 11B As shown in the figure, after the second slit on the left adopts a corner structure, there is no scratch on the screen. It can be seen that by setting a corner structure on the slit, the abnormal deflection of the liquid crystal molecules is well restricted, the liquid crystal molecules are arranged in an orderly manner, and no scratches are formed on the screen, which helps the normal display of the display panel and helps to improve the user experience.

[0097] Fig.12 FIG. 1 is a top view of a pixel electrode of a sub-pixel in another exemplary embodiment. Fig.12 As shown, a single pixel electrode 51 may include a plurality of slits 510, and the plurality of slits 510 may be arranged in sequence along the second direction Y. Along the second direction Y, the edges of the first ends F2 of the plurality of slits 510 away from the middle portion F1 may be flush with each other, and the edges of the second ends F3 of the plurality of slits 510 away from the middle portion F1 may be flush with each other, as shown in FIG. Fig.12 In other embodiments, along the first direction X, the first ends F2 of two adjacent slits 510 away from the side edges of the middle portion F1 may be arranged in a stepped manner, and the second ends F3 of two adjacent slits 510 away from the side edges of the middle portion F1 may be arranged in a stepped manner, such as Fig.12 As shown in the three slits 510 on the right side of the figure, the stepped arrangement helps to increase the light transmittance of the display substrate. The number and distribution of the slits 510 included in a single pixel electrode 51 can be set as needed, and the utility model does not limit this. In the case where the multiple slits 510 of a single pixel electrode 51 include a stepped arrangement, the positions of the first end F2 and the second end F3 of different slits 510 are different. Figure 8 The positions of the first end F2, the second end F3 and the main body are not indicated.

[0098] In an exemplary embodiment, when adjacent slits 510 are distributed in a step-like manner, the electric field in the middle F1 of the slit 510 is distributed differently from the electric field strength distribution at the two ends, and the influence on the arrangement of the liquid crystal molecules is also different. The inventor of the present application has found through research that when the distance between the second ends F3 of adjacent slits 510 along the second direction Y is greater than 6 microns, the electric field strength in the middle F1 of the slit 510 is less than the electric field strength at the ends of the slit 510, and the liquid crystal molecules located near this place are greatly affected, and scratches will be formed after the finger passes over the screen. Taking the adjacent slits A and B as an example, the "distance between the second ends F3 of adjacent slits 510" can be the distance between the side edge of the second end F3 of slit A away from the middle F1 and the side edge of the second end F3 of slit B away from the middle F1 along the first direction X. The situation of the slits 510 distributed in a step-like manner at the first end F2 is similar to that at the second end F3, and will not be repeated here.

[0099] In an exemplary embodiment, when adjacent slits 510 are distributed in a stepped manner, the distance between the second ends F3 of adjacent slits 510 along the second direction Y is less than or equal to 6 micrometers. This size setting can ensure that no scratch defect is formed. Fig.12 As shown, a single pixel electrode 51 may include five slits 510, which are the first slit, the second slit, the third slit, the fourth slit and the fifth slit in order from left to right. The two ends of the first slit, the second slit and the third slit are flush with each other along the second direction Y. The distance between the second end F3 of the fourth slit and the second end F3 of the third slit may be the first distance H1, and the distance between the second end F3 of the fifth slit and the second end F3 of the fourth slit may be the second distance H2. It has been found through experiments that when the first distance H1 and the second distance H2 are both less than or equal to 6 microns, the darkening marks on the screen will disappear after the finger leaves the screen for about 500 milliseconds, and no scratch defect will be formed.

[0100] The structures in the embodiments of the present invention can be combined with each other arbitrarily, and the present invention does not impose any limitation on this.

[0101] FIG. 13A to FIG. 13D FIG. 1 is a top view of a pixel electrode of a sub-pixel in an exemplary embodiment, illustrating the arrangement of multiple slits 510 at different lengths. The inventor of the present application conducted simulation experiments for each case. FIG. 13A to FIG. 13D The difference between the display panels is only the arrangement of the slits 510 .

[0102] exist Fig.13AIn the embodiment, the two ends of the first slit, the second slit and the third slit are flush with each other along the second direction Y, the fourth slit and the fifth slit are arranged in a stepped manner, the distance between the second end F3 of the third slit and the second end F3 of the fourth slit is about 11.6 microns, and the distance between the second end F3 of the fourth slit and the second end F3 of the fifth slit is about 7 microns. After simulation, it is found that since the first distance H1 and the second distance H2 are both greater than 6 microns, Fig.13A The display panel of the structure shown will have scratch defects near the fourth slit and the fifth slit. Fig. 13B In the embodiment, both ends of the first slit and the second slit are flush with each other along the second direction Y, the third slit, the fourth slit and the fifth slit are arranged in a stepped manner, the distance between the second end F3 of the second slit and the second end F3 of the third slit is about 3.6 microns, the distance between the second end F3 of the third slit and the second end F3 of the fourth slit is about 8 microns, and the distance between the second end F3 of the fourth slit and the second end F3 of the fifth slit is about 5 microns. After simulation, it is found that since the distance between the second end F3 of the third slit and the second end F3 of the fourth slit is greater than 6 microns, Fig. 13B The display panel of the structure shown will have scratches near the third slit. Fig. 13C In the embodiment, both ends of the first slit and the second slit are flush with each other along the second direction Y, the third slit, the fourth slit and the fifth slit are arranged in a stepped manner, the distance between the second end F3 of the second slit and the second end F3 of the third slit is about 5.6 microns, the distance between the second end F3 of the third slit and the second end F3 of the fourth slit is about 6 microns, and the distance between the second end F3 of the fourth slit and the second end F3 of the fifth slit is about 5 microns. After simulation, it is found that since the distance between the second end F3 of the third slit and the second end F3 of the fourth slit is less than 6 microns, Fig. 13C The display panel with the structure shown will disappear after the finger leaves the screen for about 700 milliseconds, and no scratches will be formed. Fig.13D In the embodiment, the two ends of the first slit, the second slit and the third slit are flush with each other along the second direction Y, the fourth slit and the fifth slit are arranged in a stepped manner, the distance between the second end F3 of the third slit and the second end F3 of the fourth slit is about 6 microns, and the distance between the second end F3 of the fourth slit and the second end F3 of the fifth slit is about 6 microns. After simulation, it is found that Fig.13D For the display panel with the structure shown, the darkening marks on the screen will disappear about 500 milliseconds after the finger leaves the screen, and no scratches will be formed.

[0103] Fig.14 In the exemplary embodiment Figure 2 A cross-sectional view of a display substrate along the CC direction. Fig.14As shown, the display substrate may include a substrate 10, a first transistor, a gate line S, and a data line D disposed on the substrate 10. In a direction away from the substrate 10, the display substrate may include a first conductive layer, a first insulating layer 11, a semiconductor layer, a first transparent conductive layer, a second conductive layer, a first organic layer 71, a second insulating layer 12, and a third conductive layer. The first insulating layer 11 and the second insulating layer 12 are inorganic insulating layers, the first insulating layer 11 may be referred to as a gate insulating (GI) layer, and the second insulating layer 12 may be referred to as a passivation layer (PVX). In an exemplary embodiment, the first conductive layer and the second conductive layer may be made of conductive materials such as metal materials, and the first transparent conductive layer and the third conductive layer may be made of transparent conductive materials.

[0104] In an exemplary embodiment, if Fig.14As shown, the first conductive layer at least includes: a gate electrode 22 and a gate line S of the first transistor. The gate electrode 22 of the first transistor and the corresponding gate line S can be set as an integral structure. The semiconductor layer at least includes: an active layer 31 of the first transistor. The active layer 31 may include: a channel region, a first doped region and a second doped region. The channel region may not be doped with impurities and has semiconductor properties. The first doped region and the second doped region may be on both sides of the channel region and are doped with impurities and therefore have conductivity. The impurities may vary depending on the type of transistor (e.g., N-type or P-type). The gate electrode 22 and the gate line S of the first transistor may be an integral structure, and the overlapping portion of the gate line S and the active layer 31 in the direction perpendicular to the substrate 10 may be used as the gate electrode 22 of the first transistor. The first transparent conductive layer at least includes: a first electrode 51. The second conductive layer at least includes: a first electrode 44, a second electrode 45 and a data line D of the first transistor. The first electrode 44 of the first transistor overlaps and is directly connected to the first doping region of the active layer 31, and the second electrode 45 overlaps and is directly connected to the second doping region of the active layer 31. The first electrode 44 of the first transistor and the adjacent data line D may be an integral structure, and the first electrode 44 may be, for example, a source electrode. The positive projection of the second electrode 45 of the first transistor on the substrate 10 overlaps with the first electrode 51, and the second electrode 45 of the first transistor is directly connected to the first electrode 51, and the second electrode 45 may be, for example, a drain electrode. For example, the first electrode 51 may have a plurality of slits, and the extension direction of the plurality of slits may intersect with the first direction X, and the first electrode 51 may have slits in two different directions, thereby forming a dual-domain structure, however, this embodiment is not limited thereto. For example, the first electrode 51 may form a single-domain or multi-domain structure. The third conductive layer at least includes: a plurality of second electrodes 61, the second electrode 61 may be a sheet-shaped electrode, and the positive projections of the second electrode 61 and the first electrode 51 on the substrate 10 may overlap with each other, and the second electrodes 61 of different sub-pixels may be connected to each other. The second electrode 61 and the first electrode 51 are located in a sub-pixel region defined by the intersection of the data line 43 and the gate line 21. In other embodiments, the display substrate may adopt other film layer arrangements, for example, the film layers where the first electrode 51 and the second electrode 61 are located may be interchanged, and the present invention does not limit this.

[0105] The utility model also provides a display device, which includes the aforementioned display substrate, an opposite substrate, and a liquid crystal layer disposed between the display substrate and the opposite substrate. The display device can be any product or component with a display function, such as a mobile phone, a tablet computer, a television, an LCD display, a notebook computer, a digital photo frame, a navigator, etc., and the embodiments of the present invention are not limited thereto.

[0106] In an exemplary embodiment, the liquid crystal material of the liquid crystal layer is a positive liquid crystal, and the dielectric constant is less than or equal to 8. The dielectric constant Δε of the liquid crystal material is ε∥-ε⊥, where ε / / represents the dielectric constant in the direction parallel to the axis of the liquid crystal molecules, and ε⊥ represents the dielectric constant in the direction perpendicular to the axis of the liquid crystal molecules. The dielectric constant Δε of the positive liquid crystal is greater than 0, and the rotation direction is parallel to the electric field direction. The angle of rotation is large under the condition of electric field disturbance. In this embodiment, by selecting a liquid crystal material with a dielectric constant Δε less than or equal to 8, the driving voltage required for the liquid crystal molecules to rotate is large, and the rotation angle is small, which can effectively prevent the rotation angle of the liquid crystal molecules under the condition of electric field disturbance, and is not easy to be disordered, which helps to avoid scratches.

[0107] In an exemplary embodiment, the liquid crystal material of the liquid crystal layer is negative liquid crystal. Negative liquid crystal has a dielectric constant Δε less than 0, strong rigidity, and a rotation direction perpendicular to the electric field direction, and is not easily affected by electric field disturbances, which helps to avoid scratches.

[0108] Although the implementation methods disclosed in the utility model are as above, the above contents are only implementation methods adopted to facilitate the understanding of the utility model, and are not used to limit the utility model. Any technician in the field to which the utility model belongs can make any modifications and changes in the form and details of implementation without departing from the spirit and scope disclosed in the utility model, but the scope of patent protection of the utility model shall still be defined by the attached claims.

Claims

1. A display substrate, characterized in that: include: A plurality of data lines extending along a first direction; A plurality of grid lines extending along a second direction, wherein the first direction intersects the second direction; A plurality of the gate lines and a plurality of the data lines intersect to define a plurality of sub-pixel areas; A plurality of sub-pixels, wherein a single sub-pixel is located in a single sub-pixel region; At least one sub-pixel of the plurality of sub-pixels comprises a driving circuit, a first electrode and a second electrode disposed on a substrate, wherein the first electrode and the second electrode at least partially overlap in a direction away from the substrate; The driving circuit is electrically connected to one of the gate lines, one of the data lines and the first electrode respectively, and is configured to transmit an electrical signal of the data line to the first electrode under the control of the gate line; Wherein, the orthographic projection of the second electrode on the substrate covers the orthographic projection of the gate line on the substrate.

2. The display substrate according to claim 1, characterized in that: The first electrode includes a plurality of slits, and at least two of the plurality of slits extend in the same direction.

3. The display substrate according to claim 2, characterized in that: The slit includes a middle portion, a first end portion, and a second end portion that are connected to each other. The first end portion and the second end portion are respectively located at two sides of the middle portion along the first direction.

4. The display substrate according to claim 3, characterized in that: An angle between the extension direction of the first end and the second direction is a first angle a1, and the first angle a1 is less than or equal to 55 degrees.

5. The display substrate according to claim 4, characterized in that: The first length L1 of the first end portion is the maximum distance between two opposite ends of the first end portion in its own extension direction; A first depth V1 of the first end portion is greater than or equal to 3.5 micrometers, and V1=L1*sin(a1).

6. The display substrate according to claim 3, characterized in that: An included angle between the extension direction of the second end and the second direction is a second angle a2, and the second angle a2 is less than or equal to 55 degrees.

7. The display substrate according to claim 6, characterized in that: The second length L2 of the second end portion is the maximum distance between two opposite ends of the second end portion in its own extension direction; A second depth V2 of the second end portion is greater than or equal to 3.5 micrometers, and V2=L2*sin(a2).

8. The display substrate according to claim 3, characterized in that: The plurality of slits are arranged in sequence along the second direction; along the second direction, the first ends of at least two of the slits are flush with one side edge away from the middle portion, and the second ends of at least two of the slits are flush with one side edge away from the middle portion.

9. The display substrate according to claim 3, characterized in that: The plurality of slits are arranged in sequence along the second direction; the first ends of at least two adjacent slits along the second direction are arranged in a stepped manner away from the edge of one side of the middle portion, and / or the second ends of at least two adjacent slits along the second direction are arranged in a stepped manner away from the edge of one side of the middle portion.

10. The display substrate according to claim 9, characterized in that: When the first ends of at least two adjacent slits along the second direction are arranged in a stepped manner away from the edge of one side of the middle portion, the distance between the first ends of adjacent slits is less than or equal to 6 microns; the distance between the first ends of adjacent slits is the distance between the first ends of adjacent slits away from the edge of one side of the middle portion along the first direction.

11. The display substrate according to claim 9, characterized in that: When the second ends of at least two adjacent slits along the second direction are arranged in a stepped manner away from the edge of one side of the middle portion, the distance between the second ends of adjacent slits is less than or equal to 6 microns; the distance between the second ends of adjacent slits is the distance along the first direction between the second ends of adjacent slits away from the edge of one side of the middle portion.

12. The display substrate according to claim 1, characterized in that: The driving circuit includes a first transistor, the gate line is connected to gate electrodes of a plurality of the first transistors located in its extension direction, a first electrode of the first transistor is connected to the data line, and a second electrode of the first transistor is connected to the first electrode; The orthographic projection of the second electrode on the substrate exposes the orthographic projection of the gate electrode of the first transistor on the substrate.

13. The display substrate according to claim 12, characterized in that: The sum of the overlapping areas of the orthographic projection of the second electrode on the substrate and the orthographic projection of the gate line and the gate electrode on the substrate is the first area, and the sum of the areas of the orthographic projection of the gate line and the gate electrode on the substrate is the second area; A ratio of the first area to the second area is greater than or equal to 65% and less than or equal to 95%.

14. The display substrate according to claim 12, characterized in that: The gate line and the gate electrodes of the plurality of first transistors located in the extending direction of the gate line are an integrated structure.

15. The display substrate according to claim 1, characterized in that: The plurality of sub-pixels include a plurality of sub-pixel columns arranged along the first direction and a plurality of sub-pixel rows arranged along the second direction; Two gate lines are distributed between two adjacent sub-pixel rows along the first direction, and the sub-pixels in a single sub-pixel row are electrically connected to the two adjacent gate lines along the first direction, respectively.

16. A display device, characterized in that: The invention comprises a display substrate as claimed in any one of claims 1 to 15, an opposite substrate, and a liquid crystal layer arranged between the display substrate and the opposite substrate.

17. The display device according to claim 16, characterized in that: The dielectric constant of the liquid crystal material of the liquid crystal layer is less than or equal to 8; or, the liquid crystal material of the liquid crystal layer is negative liquid crystal.

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