Electro-optical Q-switching circuit

Abstract

The electro-optical Q-switching circuit disclosed by the utility model comprises a boost Q-switching circuit capable of performing boost Q-switching; the voltage-reducing Q-switching circuit can perform voltage-reducing Q-switching; the high-voltage control circuit can control generation of pulse high voltage; the delay circuit can control the delay time of opening the Q switch; the high voltage generation circuit can generate instantaneous pulse high voltage; the adjustable direct-current power supply circuit is used for generating direct-current voltage and charging the boost Q-switching circuit and the voltage-reducing Q-switching circuit; the direct-current power supply production circuit is used for providing a direct-current power supply for the boosting Q-switching circuit, the voltage-reducing Q-switching circuit, the high-voltage generation circuit, the high-voltage control circuit and the time-delay circuit; the control circuit can control the boost Q-switching circuit, the voltage-reducing Q-switching circuit and the high voltage generation circuit.

Description

Technical Field

[0001] The present disclosure relates to the technical field of electro-optical Q-switching, and more particularly to an electro-optical Q-switching circuit. Background Art

[0002] Before the advent of laser diode-pumped solid-state lasers, military solid-state lasers were mainly flash lamp-pumped Nd:YAG lasers, used for ranging, guidance, laser interference, and some exploratory research in coherent detection. A representative high-power, Q-switched solid-state laser is the Nd:YAG laser developed in 1995 by the Laser Physics Institute of St. Petersburg, Russia, using phase conjugation technology and flash lamp pumping with electro-optic Q-switching. It is a typical example of a high-power, Q-switched solid-state laser, achieving a pulse output laser energy of 1 J at a repetition rate of 100 Hz and a beam quality of 3.4 times the diffraction limit.

[0003] When studying non-linearly polarized solid-state laser technology, electro-optical Q-switching technology is usually used. However, due to the shortage and obsolescence of Q-switched power supplies in my country, their functions cannot meet the requirements of high-power Q-switched lasers. Therefore, a new type of multifunctional Q-switched power supply needs to be designed. Summary of the Invention

[0004] The present invention provides a multifunctional electro-optical Q-switched power supply and an electro-optical Q-switched circuit for improving the electro-optical conversion efficiency of a Q-switched laser.

[0005] In order to achieve the above objectives, the technical solutions adopted in this disclosure are as follows:

[0006] An electro-optical Q-switching circuit, comprising

[0007] Boost Q modulation circuit, capable of boost Q modulation;

[0008] Back-voltage Q modulation circuit, capable of back-voltage Q modulation;

[0009] High voltage control circuit, capable of controlling the generation of pulse high voltage;

[0010] Delay circuit, which can control the delay time of opening the Q switch;

[0011] High voltage generating circuit, capable of generating instantaneous pulse high voltage;

[0012] An adjustable DC power supply circuit, used to generate a DC voltage and charge the boost Q-switching circuit and the buck Q-switching circuit;

[0013] A DC power supply generating circuit, which provides DC power to the boost Q-switching circuit, buck Q-switching circuit, high-voltage generating circuit, high-voltage control circuit, and delay circuit;

[0014] The control circuit can control the boost Q-switching circuit, the de-boost Q-switching circuit, and the high-voltage generation circuit;

[0015] The adjustable DC power supply circuit is connected to the control circuit via a high-voltage generating circuit and then via a boost Q-switching circuit. The adjustable DC power supply circuit is also connected to the control circuit via another high-voltage generating circuit and then via a de-voltage Q-switching circuit. The DC power supply generating circuit is connected to the boost Q-switching circuit, the de-voltage Q-switching circuit, the high-voltage generating circuit, the high-voltage control circuit, and the delay circuit. The delay circuit is also connected to the de-voltage Q-switching circuit, and the high-voltage control circuit is also connected to the boost Q-switching circuit.

[0016] Optionally, the adjustable DC power supply circuit includes a first bridge rectifier. The AC voltage input terminal A1 is connected to the first input terminal of the first bridge rectifier through resistor R27; the AC voltage input terminal A2 is connected to the second input terminal of the first bridge rectifier through resistor R28; the positive output terminal of the first bridge rectifier is connected to the collector of transistor Q1 through resistor R7; and the collector of transistor Q1 is connected to the negative output terminal of the first bridge rectifier through resistor R8.

[0017] The positive output terminal of the first bridge rectifier is connected to the negative output terminal of the first bridge rectifier in sequence through capacitors C1 and C2. The positive output terminal of the first bridge rectifier is connected to the negative output terminal of the first bridge rectifier in sequence through resistors R1 and R2. The positive output terminal of the first bridge rectifier is connected to the base of transistor Q1 in sequence through resistors R3 and R4. The negative output terminal of the first bridge rectifier is connected to the base of transistor Q1 in sequence through diodes D7, D6, D5, and R4.

[0018] The emitter of the transistor Q1 outputs the DC voltage.

[0019] Optionally, the delay circuit includes trigger U2 and trigger U4. The DC output terminal of the DC power generation circuit is connected to pin 16 and pin 13 of trigger U2. The DC output terminal of the DC power generation circuit is also grounded through capacitor C16. The DC output terminal of the DC power generation circuit is connected to pin 14 of trigger U2 through resistor R18. Pin 14 of trigger U2 is connected to pin 15 of trigger U2 through capacitor C12. Pins 12, 10, and 8 of trigger U2 are all grounded. Pin 11 of trigger U2 is connected to pin 6 of trigger U2. Pin 10 of trigger U2 is connected to pin 2 of trigger U4.

[0020] Pin 1 of trigger U2 is connected to pin 2 of trigger U2 via capacitor C10. Pin 2 of trigger U2 is further connected to pin 3 of trigger U2 via resistor R16 and connector XP2. Pin 5 of trigger U2 and pin 3 of trigger U2 are both connected to the DC output terminal of the DC power supply generating circuit. The synchronization signal is connected to pin 4 of trigger U2 via resistor R17. The synchronization signal is further connected to ground via capacitor C11.

[0021] Pin 2 of the trigger U4 and pin 3 of the trigger U4 are both grounded, pin 6 of the trigger U4 is connected to the DC output end of the DC power generation circuit, and the DC output end of the DC power generation circuit is also grounded after passing through capacitor C19, and pin 7 of the trigger U4 outputs the control signal of the high voltage generation circuit.

[0022] Optionally, the DC power generation circuit includes a second bridge rectifier. The AC voltage input terminals B1 and B2 are respectively connected to the two input terminals of the first bridge rectifier. The positive output terminal of the first bridge rectifier is connected to the Vin terminal of the three-terminal regulator U5. The negative output terminal of the first bridge rectifier is connected to the GND terminal of the three-terminal regulator U5. The positive output terminal of the first bridge rectifier is also connected to the negative output terminal of the first bridge rectifier through capacitor C6. The Vout terminal of the three-terminal regulator U5 is connected to the GND terminal of the three-terminal regulator U5 through capacitor C7. The Vout terminal of the three-terminal regulator U5 outputs DC power.

[0023] Optionally, the high-voltage generating circuit includes a transformer T3. The DC voltage output by the DC power supply circuit is connected to the positive terminal of the primary side of the transformer T3 through diode D14 and resistor R21 in sequence. The positive terminal of the primary side of the transformer T3 is also connected to the negative terminal of the primary side of the transformer T3 through diode D16. The negative terminal of the primary side of the transformer T3 is also connected to the drain of the field-effect transistor Q3. The source of the field-effect transistor Q3 is grounded. The output terminal of the delay circuit is connected to the gate of the field-effect transistor Q3 through resistor R19. The DC power output by the DC power supply generating circuit is connected to the gate of the field-effect transistor Q3 through diode D15. The gate of the field-effect transistor Q3 is also grounded through resistor R20.

[0024] The positive terminal of the secondary side of transformer T3 is grounded after passing through resistors R11, R12, and R13 in sequence. The positive terminal of the secondary side of transformer T3 is also grounded after passing through capacitor C5. The negative terminal of the secondary side of transformer T3 is also grounded.

[0025] Terminal 5 is connected to the positive terminal of the secondary side of transformer T3, and terminal 6 is connected to the negative terminal of the secondary side of transformer T3.

[0026] Optionally, the boost Q-switching circuit includes a storage capacitor C14 and a field effect transistor Q3, the primary positive electrode of the transformer T3 is grounded after passing through the storage capacitor C14, the primary positive electrode of the transformer T3 is also grounded after passing through a resistor R22 and a potentiometer R23, the center pin of the potentiometer R23 is grounded, and the secondary positive electrode of the transformer T3 is grounded after passing through a resistor R25 and a field effect transistor Y1;

[0027] The ground terminal of the field effect transistor Y1 is also connected to the terminal 4 , and the other end of the field effect transistor Y1 is also connected to the terminal 3 .

[0028] Optionally, another circuit consisting of a high-voltage generating circuit and a de-voltage Q-adjustment circuit includes a transformer T2. The DC voltage output by the DC power supply circuit is grounded after passing through an energy storage capacitor C3. The DC voltage output by the DC power supply circuit is connected to the positive terminal of the primary side of the transformer T2 after passing through a diode D12. The positive terminal of the primary side of the transformer T2 is also connected to the negative terminal of the primary side of the transformer T2 after passing through a diode D10. The negative terminal of the primary side of the transformer T2 is also connected to the drain of the field-effect transistor Q2. The source of the field-effect transistor Q3 is grounded. The output terminal of the high-voltage control circuit is connected to the gate of the field-effect transistor Q2 after passing through a resistor R10. The DC power output by the DC power supply generating circuit is connected to the gate of the field-effect transistor Q3 after passing through a diode D11. The gate of the field-effect transistor Q3 is also grounded after passing through a resistor R24.

[0029] The positive electrode of the secondary side of the transformer T2 is connected to ground through the diode D12, the resistor R11, the resistor R12, and the resistor R13 in sequence. The positive electrode of the secondary side of the transformer T2 is also connected to ground through the capacitor C5. The negative electrode of the secondary side of the transformer T2 is also connected to ground.

[0030] The positive pole of the secondary side of the transformer T2 is connected to terminal 1, and the negative pole of the secondary side of the transformer T2 is connected to terminal 2.

[0031] Optionally, the high-voltage control circuit includes a trigger U1 and a trigger U3, the DC output end of the DC power generation circuit is connected to pin 16 of the trigger U1, the DC output end of the DC power generation circuit is further grounded through a capacitor C15, and pin 13 of the trigger U1 and pin 8 of the trigger U1 are both grounded;

[0032] Pin 1 of trigger U1 is connected to pin 2 of trigger U1 through capacitor C8. Pin 2 of trigger U1 is also connected to ground through resistor R14. Pin 2 of trigger U1 is also connected to ground through resistor R14 and capacitor C7. Pins 5 and 3 of trigger U1 are both connected to the DC output terminal of the DC power supply generating circuit. The synchronization signal is connected to pin 4 of trigger U1 through resistor R15. Pin 4 of trigger U1 is also connected to ground through capacitor C9. Pin 6 of trigger U1 is connected to pin 2 of trigger U3.

[0033] Pin 3 of the trigger U3 is connected to the ground, pin 6 of the trigger U3 is connected to the DC output end of the DC power generation circuit, the DC output end of the DC power generation circuit is also connected to the ground after passing through capacitor C18, and pin 7 of the trigger U3 outputs the control signal of the back-off Q modulation circuit.

[0034] This disclosure provides a novel electro-optic Q-switching circuit, including a boost Q-switching circuit for boost Q-switching; a de-energizing Q-switching circuit for de-energizing Q-switching; a high-voltage control circuit for controlling the generation of pulsed high voltage; a delay circuit for controlling the delay time of Q-switch opening; a high-voltage generation circuit for generating instantaneous pulsed high voltage; an adjustable DC power supply circuit for generating DC voltage and charging the boost Q-switching circuit and the de-energizing Q-switching circuit; a DC power supply circuit for providing DC power to the boost Q-switching circuit, the de-energizing Q-switching circuit, the high-voltage generation circuit, the high-voltage control circuit, and the delay circuit; and a control circuit for controlling the boost Q-switching circuit, the de-energizing Q-switching circuit, and the high-voltage generation circuit.

[0035] Some functions of the simple boost Q-switch experimental circuit disclosed in the present invention were debugged. The experimental results show that the pulse width of the delayed signal for "opening" the Q switch is adjustable within the range of 46μs to 260μs; the pulse width of the input signal driven by the field-effect transistor is 2.2μs; the turn-on delay time of the field-effect transistor is 10ns, and the rise time is about 60ns. BRIEF DESCRIPTION OF THE DRAWINGS

[0036] In order to more clearly illustrate the embodiments of the present disclosure or the technical solutions in the prior art, the following briefly introduces the drawings required for use in the embodiments or the description of the prior art. Obviously, the drawings described below are only some embodiments of the present disclosure. For ordinary technicians in this field, other drawings can be obtained based on these drawings without any creative work.

[0037] Figure 1 Schematic diagram of the structure of the electro-optical Q-switching circuit disclosed in the present invention;

[0038] Figure 2 Schematic diagram of the structure of the adjustable DC power supply circuit in the present disclosure;

[0039] Figure 3 Schematic diagram of the structure of the delay circuit in the present disclosure;

[0040] Figure 4 Schematic diagram of the structure of the DC power generation circuit in the present disclosure;

[0041] Figure 5 is a schematic structural diagram of a high voltage generating circuit in the present disclosure;

[0042] Figure 6 Schematic diagram of the structure of the boost Q-switched circuit in the present disclosure;

[0043] Figure 7 Schematic diagram of the structure of the buck-voltage Q-switching circuit in the present disclosure;

[0044] Figure 8 Schematic diagram of the structure of the high-voltage control circuit in the present disclosure;

[0045] Figure 9 4 is a functional block diagram of the control circuit in the present disclosure. DETAILED DESCRIPTION

[0046] The preferred embodiments of this disclosure will now be described in detail with reference to the accompanying drawings, so that the advantages and features of this disclosure can be more easily understood by those skilled in the art, thereby providing a clearer and more definite definition of the scope of protection of this disclosure.

[0047] See Figure 1 As shown, an electro-optical Q-switching circuit includes

[0048] Boost Q modulation circuit, capable of boost Q modulation;

[0049] Back-voltage Q modulation circuit, capable of back-voltage Q modulation;

[0050] High voltage control circuit, capable of controlling the generation of pulse high voltage;

[0051] The delay circuit can control the delay time of the Q switch opening;

[0052] High voltage generating circuit, capable of generating instantaneous pulse high voltage;

[0053] An adjustable DC power supply circuit, used to generate a DC voltage and charge the boost Q-switching circuit and the buck Q-switching circuit;

[0054] A DC power supply generating circuit, which provides DC power to the boost Q-switching circuit, buck Q-switching circuit, high-voltage generating circuit, high-voltage control circuit, and delay circuit;

[0055] The control circuit can control the boost Q-switching circuit, the de-boost Q-switching circuit, and the high-voltage generation circuit;

[0056] The adjustable DC power supply circuit is connected to the control circuit through one of the high-voltage generating circuits and then through the boost Q-switching circuit. The adjustable DC power supply circuit also passes through another high-voltage generating circuit and then through the buck Q-switching circuit and then through the control circuit. The DC power supply generating circuit is connected to the boost Q-switching circuit, the buck Q-switching circuit, the high-voltage generating circuit, the high-voltage control circuit and the delay circuit. The delay circuit is also connected to the buck Q-switching circuit, and the high-voltage control circuit is also connected to the boost Q-switching circuit.

[0057] See Figure 1 、 Figure 2 As shown, the adjustable DC power supply circuit includes a first bridge rectifier. The AC voltage input terminal A1 is connected to the first input terminal of the first bridge rectifier through resistor R27; the AC voltage input terminal A2 is connected to the second input terminal of the first bridge rectifier through resistor R28; the positive output terminal of the first bridge rectifier is connected to the collector of transistor Q1 through resistor R7; and the collector of transistor Q1 is connected to the negative output terminal of the first bridge rectifier through resistor R8.

[0058] The positive output terminal of the first bridge rectifier is connected to the negative output terminal of the first bridge rectifier in sequence through capacitors C1 and C2. The positive output terminal of the first bridge rectifier is connected to the negative output terminal of the first bridge rectifier in sequence through resistors R1 and R2. The positive output terminal of the first bridge rectifier is connected to the base of transistor Q1 in sequence through resistors R3 and R4. The negative output terminal of the first bridge rectifier is connected to the base of transistor Q1 in sequence through diodes D7, D6, D5, and R4.

[0059] The emitter of the transistor Q1 outputs the DC voltage.

[0060] The adjustable DC power supply circuit generates approximately 400V DC voltage to charge the energy storage capacitor. In the diagram, A1 and A2 are the AC voltage input terminals. The input AC voltage is 500V / 50Hz, obtained from 220V / 50Hz AC voltage through three power frequency transformers. The input AC voltage is rectified by bridge diodes D1, D2, D3, and D4, and filtered by capacitors C1 and C2 to obtain approximately 600V DC voltage. Because the current flowing through the rectifier diodes is very large at the moment of power-on, current-limiting resistors R27 and R28 are used, with a resistance value of 2kΩ / 0.125W. The maximum rectified current I of the diodes... F The current should be greater than the maximum current of the current-limiting resistors R27 and R28. Furthermore, if the current exceeds the maximum current of the current-limiting resistors, causing them to burn out, it will protect the circuit. A voltage divider is used using Zener diodes D5, D6, and D7, transistor Q1, and resistors R3, R4, and R6-R8. This voltage divider method is less affected by the load and provides a stable output voltage. Zener diodes D5, D6, and D7 are selected as 1N4768, each with a stable voltage of 150V. The transistor used is the 2N5012, which has good temperature stability. A potentiometer is connected to pins 1 and 3 of connector XP1 to adjust the output DC voltage; the +E terminal is the DC voltage output terminal.

[0061] See Figure 1 、 Figure 3As shown, the delay circuit includes trigger U2 and trigger U4. The DC output terminal of the DC power generation circuit is connected to pin 16 and pin 13 of trigger U2. The DC output terminal of the DC power generation circuit is also grounded through capacitor C16. The DC output terminal of the DC power generation circuit is connected to pin 14 of trigger U2 through resistor R18. Pin 14 of trigger U2 is connected to pin 15 of trigger U2 through capacitor C12. Pins 12, 10, and 8 of trigger U2 are all grounded. Pin 11 of trigger U2 is connected to pin 6 of trigger U2. Pin 10 of trigger U2 is connected to pin 2 of trigger U4.

[0062] Pin 1 of trigger U2 is connected to pin 2 of trigger U2 through capacitor C10. Pin 2 of trigger U2 is also connected to pin 3 of trigger U2 through resistor R16 and connector XP2. Pin 5 and pin 3 of trigger U2 are both connected to the DC output terminal of the DC power supply generating circuit. The synchronization signal is connected to pin 4 of trigger U2 through resistor R17. The synchronization signal is also grounded through capacitor C11.

[0063] Pin 2 of the trigger U4 and pin 3 of the trigger U4 are both grounded, pin 6 of the trigger U4 is connected to the DC output end of the DC power generation circuit, and the DC output end of the DC power generation circuit is also grounded after passing through capacitor C19, and pin 7 of the trigger U4 outputs the control signal of the high voltage generation circuit.

[0064] After being filtered, the synchronization signal is sent to the rising edge-triggered flip-flop U2 (monostable 1) to obtain an output signal with a delay of T1. The delay T1 is adjustable. This delayed signal serves as the trigger signal for the falling edge-triggered flip-flop U4 (monostable 2), resulting in an output signal with a delay of T2. This delayed signal is then passed through the MOS field-effect transistor driver to generate the MOS field-effect transistor trigger pulse, which quickly turns on the MOS transistor.

[0065] Clearly, the delay time for the Q switch to "turn on" is the delay T1 of trigger U2. Therefore, the delay T1 needs to be adjustable within the range of 50μs to 250μs. The delay T2 of trigger U4 is generally chosen to be relatively small, typically 3 to 5μs.

[0066] Resistor R17 and capacitor C11 realize filtering; trigger U2 uses integrated circuit CD4098 to realize signal delay function; trigger U4 uses integrated circuit IR4427 to drive MOS field effect transistor.

[0067] See Figure 1 、 Figure 4As shown, the DC power generation circuit includes a second bridge rectifier. The AC voltage input terminals B1 and B2 are respectively connected to the two input terminals of the first bridge rectifier. The positive output terminal of the first bridge rectifier is connected to the Vin terminal of the three-terminal regulator U5, and the negative output terminal of the first bridge rectifier is connected to the GND terminal of the three-terminal regulator U5. The positive output terminal of the first bridge rectifier is also connected to the negative output terminal of the first bridge rectifier through capacitor C6. The Vout terminal of the three-terminal regulator U5 is connected to the GND terminal of the three-terminal regulator U5 through capacitor C7. The Vout terminal of the three-terminal regulator U5 outputs DC power.

[0068] To drive triggers U2 (CD4098) and U4 (IR4427), a +15V DC power supply is required. Terminals B1 and B2 are AC voltage input terminals. The input AC power is 18V / 50Hz, obtained from 220V / 50Hz AC power through three power frequency transformers. After rectification by a bridge rectifier, filtering by capacitor C6, and passing through a three-terminal regulator U5, a 15V DC voltage is obtained across capacitor C7. The three-terminal regulator U5 is typically a 7815EC.

[0069] See Figure 1 、 Figure 5 As shown, the high-voltage generating circuit includes a transformer T3. The DC voltage output by the DC power supply circuit is connected to the positive terminal of the primary side of the transformer T3 through diode D14 and resistor R21 in sequence. The positive terminal of the primary side of the transformer T3 is also connected to the negative terminal of the primary side of the transformer T3 through diode D16. The negative terminal of the primary side of the transformer T3 is also connected to the drain of the field-effect transistor Q3. The source of the field-effect transistor Q3 is grounded. The output terminal of the delay circuit is connected to the gate of the field-effect transistor Q3 through resistor R19. The DC power output by the DC power supply generating circuit is connected to the gate of the field-effect transistor Q3 through diode D15. The gate of the field-effect transistor Q3 is also grounded through resistor R20.

[0070] The positive terminal of the secondary side of transformer T3 is grounded after passing through resistors R11, R12, and R13 in sequence. The positive terminal of the secondary side of transformer T3 is also grounded after passing through capacitor C5. The negative terminal of the secondary side of transformer T3 is also grounded.

[0071] Terminal 5 is connected to the positive terminal of the secondary side of transformer T3, and terminal 6 is connected to the negative terminal of the secondary side of transformer T3.

[0072] The voltage is boosted by transformer T3 and then input to the rectifier circuit. The output voltage is output from both ends of the rectifier circuit. When the secondary voltage of transformer T3 is 1000V, the output voltage is 4000V. The diodes and capacitors must both have a withstand voltage of 2000V when selecting the components.

[0073] This pulse boost circuit uses a MOS field-effect transistor (MOSFET) and a transformer. Terminal E in the figure is connected to a high-voltage DC source. The operating process is as follows: a trigger pulse turns on the MOSFET. Power supply E is boosted by transformer T3, rectified by a diode, and filtered by a capacitor, resulting in a high-voltage output across capacitor C5. Diode D16 quickly dissipates the reverse excitation current generated by transformer T3.

[0074] See Figure 1 、 Figure 6 As shown, the boost Q-switched circuit includes a storage capacitor C14 and a field effect transistor Q3. The primary positive electrode of the transformer T3 is grounded after passing through the storage capacitor C14. The primary positive electrode of the transformer T3 is also grounded after passing through a resistor R22 and a potentiometer R23. The center pin of the potentiometer R23 is grounded. The secondary positive electrode of the transformer T3 is grounded after passing through a resistor R25 and a field effect transistor Y1.

[0075] The ground terminal of the field effect transistor Y1 is also connected to the terminal 4 , and the other end of the field effect transistor Y1 is also connected to the terminal 3 .

[0076] See Figure 1 、 Figure 7 As shown, another circuit consisting of a high-voltage generating circuit and a de-voltage Q-adjustment circuit includes a transformer T2. The DC voltage output by the DC power supply circuit is grounded after passing through the energy storage capacitor C3. The DC voltage output by the DC power supply circuit is connected to the positive terminal of the primary side of the transformer T2 after passing through the diode D12. The positive terminal of the primary side of the transformer T2 is also connected to the negative terminal of the primary side of the transformer T2 after passing through the diode D10. The negative terminal of the primary side of the transformer T2 is also connected to the drain of the field-effect transistor Q2. The source of the field-effect transistor Q3 is grounded. The output terminal of the high-voltage control circuit is connected to the gate of the field-effect transistor Q2 after passing through the resistor R10. The DC power output by the DC power supply generating circuit is connected to the gate of the field-effect transistor Q3 after passing through the diode D11. The gate of the field-effect transistor Q3 is also grounded after passing through the resistor R24.

[0077] The positive electrode of the secondary side of the transformer T2 is connected to ground through the diode D12, the resistor R11, the resistor R12, and the resistor R13 in sequence. The positive electrode of the secondary side of the transformer T2 is also connected to ground through the capacitor C5. The negative electrode of the secondary side of the transformer T2 is also connected to ground.

[0078] The positive pole of the secondary side of the transformer T2 is connected to terminal 1, and the negative pole of the secondary side of the transformer T2 is connected to terminal 2.

[0079] Terminals 1 and 2 are connected to a 4000V DC high-voltage source, and terminals 3 and 4 are connected to a transformer. Typically, the transformer connected to terminals 3 and 4 needs to generate a negative pulse high voltage of approximately 5000V to power the KD transformer. *The P-type crystal Y1 is de-voltage controlled. Clearly, the de-voltage Q-switching circuit should have two high-voltage sources: a 4000V DC high-voltage source and a 5000V negative pulse high-voltage source. Both high-voltage sources can be converted into MOSFETs and transformers.

[0080] Terminal E is typically connected to a DC high voltage of around 400V. When the pulsed xenon lamp is not triggered, the energy storage capacitor C3 is charged to the external power supply voltage. When the pulsed xenon lamp is triggered, the MOSFET Q2 immediately applies a trigger signal and turns on. C3 discharges through the primary winding of transformer T2, inducing a momentary high voltage of 4000V on the secondary side (this part of the circuit is equivalent to a pulsed high voltage source). This causes diode D12 to conduct, and capacitors C5 and C13 charge rapidly, thus KD... * A 4000V high voltage is generated across the P-type crystal Y1, at which point the Q-switch is in the "off" state. When the MOSFET Q3 is triggered and turned on, C14 discharges through the primary winding of transformer T3, inducing a 5000V instantaneous negative high-voltage pulse on the secondary side. At this moment, the potential of the anode of C1 is instantly pulled down to -1000V, meaning the voltage across the KD*P crystal instantly drops to -1000V, and the Q-switch is "turned on". The trigger signal for MOSFET Q3 is provided by a delay circuit, and the trigger signal for MOSFET Q2 is provided by the high-voltage control circuit described in the next section.

[0081] When de-energizing the Q-switching circuit, it is essential to ensure that KD remains constant from pulsed xenon lamp triggering until laser formation. * The P-crystal should maintain a high voltage of 4000V across its terminals; therefore, (R11+R12+R13)C5 must be greater than 200μs. Generally, resistors R11, R12, and R13 are all 1MΩ wire-wound resistors. Capacitors C5 and C13 require a withstand voltage of 4000V, typically 1000pF ceramic capacitors. Diode D12 requires a reverse withstand voltage of 4000V, typically 2CL143. Resistor R10 reduces parasitic oscillations between the gate and source of MOSFET Q3, typically set to 10Ω. The transformer T2's turns ratio can be selected as 1:10, and the transformer core is made of a microcrystalline alloy material.

[0082] See Figure 1 、 Figure 8 As shown, the high-voltage control circuit includes trigger U1 and trigger U3. The DC output terminal of the DC power generation circuit is connected to pin 16 of trigger U1. The DC output terminal of the DC power generation circuit is also grounded through capacitor C15. Pins 13 and 8 of trigger U1 are both grounded.

[0083] Pin 1 of trigger U1 is connected to pin 2 of trigger U1 through capacitor C8. Pin 2 of trigger U1 is also connected to ground through resistor R14. Pin 2 of trigger U1 is also connected to ground through resistor R14 and capacitor C7. Pins 5 and 3 of trigger U1 are both connected to the DC output terminal of the DC power supply generating circuit. The synchronization signal is connected to pin 4 of trigger U1 through resistor R15. Pin 4 of trigger U1 is also connected to ground through capacitor C9. Pin 6 of trigger U1 is connected to pin 2 of trigger U3.

[0084] Pin 3 of the trigger U3 is connected to the ground, pin 6 of the trigger U3 is connected to the DC output end of the DC power generation circuit, the DC output end of the DC power generation circuit is also connected to the ground after passing through capacitor C18, and pin 7 of the trigger U3 outputs the control signal of the back-off Q modulation circuit.

[0085] When the pulse xenon lamp is triggered, the MOS field effect tube Q2 should immediately apply the trigger signal, so that KD * A 4000V transient high voltage is sensed across P crystal Y1. A rising-edge-triggered monostable trigger is used to generate the trigger signal. Resistor R15 and capacitor C9 provide filtering. Trigger U1 (CD4098) uses only the rising-edge trigger terminal +TR1 to provide signal delay. Trigger U3 (IR4427) is driven by a MOS field-effect transistor.

[0086] See Figure 1 、 Figure 9 As shown in FIG, the control circuit controls the switching of boost Q modulation, buck Q modulation and high voltage source in the following manner:

[0087] (1) When boosting Q, switch k1 is open, switch k2 is closed, terminal 5 is connected to terminal 1, and terminal 6 is connected to terminal 2;

[0088] (2) When adjusting Q by depressurization, switch k1 is closed, switch k2 is closed, terminal 5 is connected to terminal 4, and terminal 6 is connected to terminal 3;

[0089] (3) When acting as a high voltage source, switch k1 is closed, switch k2 is open, and terminals 1 and 2 are connected to the external circuit.

[0090] Although the embodiments of the present disclosure are described in conjunction with the accompanying drawings, the patent owner may make various variations or modifications within the scope of the appended claims. As long as they do not exceed the scope of protection described by the claims of the present disclosure, they should all be within the scope of protection of the present disclosure.

Claims

1. An electro-optical Q-switching circuit, characterized in that: include Boost Q modulation circuit, capable of boost Q modulation; Back-voltage Q modulation circuit, capable of back-voltage Q modulation; High voltage control circuit, capable of controlling the generation of pulse high voltage; The delay circuit can control the delay time of the Q switch opening; A high voltage generating circuit capable of generating instantaneous pulse high voltage; An adjustable DC power supply circuit, used to generate a DC voltage and charge the boost Q-switching circuit and the buck Q-switching circuit; A DC power supply generating circuit, which provides a DC power supply for the boost Q-switching circuit, the buck Q-switching circuit, the high-voltage generating circuit, the high-voltage control circuit, and the delay circuit; A control circuit capable of controlling a boost Q-switching circuit, a buck Q-switching circuit and a high voltage generating circuit; The adjustable DC power supply circuit is connected to the control circuit through a boost Q-switching circuit after passing through one of the high-voltage generating circuits, and the adjustable DC power supply circuit is also connected to the control circuit through another of the high-voltage generating circuits after passing through a buck Q-switching circuit; the DC power supply generating circuit is connected to the boost Q-switching circuit, the buck Q-switching circuit, the high-voltage generating circuit, the high-voltage control circuit and the delay circuit, the delay circuit is also connected to the buck Q-switching circuit, and the high-voltage control circuit is also connected to the boost Q-switching circuit.

2. The electro-optical Q-switching circuit according to claim 1, characterized in that: The adjustable DC power supply circuit includes a first bridge rectifier, an AC voltage input terminal A1 is connected to a first input terminal of the first bridge rectifier through a resistor R27; an AC voltage input terminal A2 is connected to a second input terminal of the first bridge rectifier through a resistor R28, a positive output terminal of the first bridge rectifier is connected to a collector of a transistor Q1 through a resistor R7, and a collector of the transistor Q1 is connected to a negative output terminal of the first bridge rectifier through a resistor R8; The positive output end of the first bridge rectifier is connected to the negative output end of the first bridge rectifier through capacitors C1 and C2 in sequence, the positive output end of the first bridge rectifier is connected to the negative output end of the first bridge rectifier through resistors R1 and R2 in sequence, the positive output end of the first bridge rectifier is connected to the base of the transistor Q1 through resistors R3 and R4 in sequence, and the negative output end of the first bridge rectifier is connected to the base of the transistor Q1 through diodes D7, D6, D5, and R4 in sequence; The emitter of the transistor Q1 outputs the DC voltage.

3. The electro-optical Q-switching circuit according to claim 1, characterized in that: The delay circuit includes a trigger U2 and a trigger U4, a DC output terminal of a DC power generation circuit is connected to pin 16 of the trigger U2 and pin 13 of the trigger U2, the DC output terminal of the DC power generation circuit is also grounded through a capacitor C16, the DC output terminal of the DC power generation circuit is connected to pin 14 of the trigger U2 through a resistor R18, the pin 14 of the trigger U2 is connected to pins 16 and 15 of the trigger U2 through a capacitor C12, the pin 12 of the trigger U2, the pin 10 of the trigger U2 and the pin 8 of the trigger U2 are all grounded, the pin 11 of the trigger U2 is connected to pin 6 of the trigger U2, and the pin 10 of the trigger U2 is connected to pin 2 of the trigger U4; Pin 1 of trigger U2 is connected to pin 2 of trigger U2 through capacitor C10, and pin 2 of trigger U2 is connected to pin 3 of trigger U2 through resistor R16 and plug-in block XP2 in sequence, and pin 5 of trigger U2 and pin 3 of trigger U2 are both connected to the DC output end of the DC power supply generating circuit, and the synchronization signal is connected to pin 4 of trigger U2 through resistor R17, and the synchronization signal is also grounded after passing through capacitor C11; Pin 2 of trigger U4 and pin 3 of trigger U4 are both grounded, pin 6 of trigger U4 is connected to the DC output end of the DC power supply generating circuit, the DC output end of the DC power supply generating circuit is also grounded after passing through capacitor C19, and pin 7 of trigger U4 outputs the control signal of the high voltage generating circuit.

4. The electro-optical Q-switching circuit according to claim 1, characterized in that: The DC power supply generating circuit includes a second bridge rectifier, an AC voltage input terminal B1 and an AC voltage input terminal B2 are respectively connected to the two input terminals of the first bridge rectifier, the positive output terminal of the first bridge rectifier is connected to the Vin terminal of the three-terminal voltage regulator U5, the negative output terminal of the first bridge rectifier is connected to the GND terminal of the three-terminal voltage regulator U5, the positive output terminal of the first bridge rectifier is also connected to the negative output terminal of the first bridge rectifier through a capacitor C6, the Vout terminal of the three-terminal voltage regulator U5 is connected to the GND terminal of the three-terminal voltage regulator U5 through a capacitor C7, and the Vout terminal of the three-terminal voltage regulator U5 outputs a DC power supply.

5. The electro-optical Q-switching circuit according to claim 1, characterized in that: The high voltage generating circuit includes a transformer T3, the DC voltage output by the DC power supply circuit is connected to the primary positive electrode of the transformer T3 through a diode D14 and a resistor R21 in sequence, the primary positive electrode of the transformer T3 is also connected to the primary negative electrode of the transformer T3 through a diode D16, the primary negative electrode of the transformer T3 is also connected to the drain of the field effect transistor Q3, the source of the field effect transistor Q3 is grounded, the output end of the delay circuit is connected to the gate of the field effect transistor Q3 through a resistor R19, the DC power output by the DC power supply generating circuit is connected to the gate of the field effect transistor Q3 through a diode D15, and the gate of the field effect transistor Q3 is also grounded through a resistor R20; The positive electrode of the secondary side of the transformer T3 is connected to the ground through the resistor R11, the resistor R12, and the resistor R13 in sequence. The positive electrode of the secondary side of the transformer T3 is also connected to the ground through the capacitor C5. The negative electrode of the secondary side of the transformer T3 is also connected to the ground. The secondary positive electrode of the transformer T3 is connected to terminal 5 , and the secondary negative electrode of the transformer T3 is connected to terminal 6 .

6. The electro-optical Q-switching circuit according to claim 5, characterized in that: The boost Q-switching circuit includes a storage capacitor C14 and a field effect transistor Q3. The primary positive electrode of the transformer T3 is grounded after passing through the storage capacitor C14. The primary positive electrode of the transformer T3 is also grounded after passing through a resistor R22 and a potentiometer R23. The center pin of the potentiometer R23 is grounded. The secondary positive electrode of the transformer T3 is grounded after passing through a resistor R25 and a field effect transistor Y1. The ground end of the field effect transistor Y1 is also connected to the terminal 4 , and the other end of the field effect transistor Y1 is also connected to the terminal 3 .

7. The electro-optical Q-switching circuit according to claim 1, characterized in that: Another circuit consisting of a high-voltage generating circuit and a voltage-reducing Q-switching circuit includes a transformer T2, a DC voltage output by the DC power supply circuit is connected to ground after passing through an energy storage capacitor C3, a DC voltage output by the DC power supply circuit is connected to the primary positive electrode of the transformer T2 after passing through a diode D12, the primary positive electrode of the transformer T2 is also connected to the primary negative electrode of the transformer T2 through a diode D10, the primary negative electrode of the transformer T2 is also connected to the drain of the field effect transistor Q2, the source of the field effect transistor Q3 is grounded, the output end of the high-voltage control circuit is connected to the gate of the field effect transistor Q2 through a resistor R10, the DC power output by the DC power supply generating circuit is connected to the gate of the field effect transistor Q3 after passing through a diode D11, and the gate of the field effect transistor Q3 is also grounded after passing through a resistor R24; The positive electrode of the secondary side of the transformer T2 is connected to the ground through the diode D12, the resistor R11, the resistor R12, and the resistor R13 in sequence. The positive electrode of the secondary side of the transformer T2 is also connected to the ground through the capacitor C5. The negative electrode of the secondary side of the transformer T2 is also connected to the ground. The secondary positive electrode of the transformer T2 is connected to terminal 1, and the secondary negative electrode of the transformer T2 is connected to terminal 2.

8. The electro-optical Q-switching circuit according to claim 1, characterized in that: The high-voltage control circuit includes a trigger U1 and a trigger U3, the DC output terminal of the DC power generation circuit is connected to the 16th pin of the trigger U1, the DC output terminal of the DC power generation circuit is also grounded after passing through a capacitor C15, and the 13th pin of the trigger U1 and the 8th pin of the trigger U1 are both grounded; Pin 1 of the trigger U1 is connected to pin 2 of the trigger U1 through capacitor C8, and pin 2 of the trigger U1 is also connected in sequence through resistor R14, and pin 2 of the trigger U1 is also connected to ground through resistor R14 and capacitor C7 in sequence, pin 5 of the trigger U1 and pin 3 of the trigger U1 are both connected to the DC output end of the DC power supply generating circuit, the synchronization signal is connected to pin 4 of the trigger U1 through resistor R15, and pin 4 of the trigger U1 is also grounded through capacitor C9, and pin 6 of the trigger U1 is connected to pin 2 of the trigger U3; Pin 3 of the trigger U3 is connected to the ground, pin 6 of the trigger U3 is connected to the DC output end of the DC power generation circuit, the DC output end of the DC power generation circuit is also connected to the ground after passing through capacitor C18, and pin 7 of the trigger U3 outputs the control signal of the back-off Q modulation circuit.

Images