Compression-resistant integrated circuit

Abstract

The utility model discloses a compression-resistant integrated circuit which comprises a bottom plate, the upper surface of the bottom plate is fixedly connected with supporting columns arranged at equal intervals, the top end of each supporting column is fixedly connected with a compression-resistant pad, and the upper surfaces of the compression-resistant pads are jointly provided with a chip substrate. The upper surface of the bottom plate is fixedly connected with pressure-resistant blocks which are arranged at equal intervals, the upper surface of each pressure-resistant block is in contact with the bottom surface of a chip substrate, the upper surface of the bottom plate is fixedly connected with four positioning columns, and the side surfaces, close to each other, of the two groups of positioning columns are jointly and fixedly connected with a limiting plate; and heat dissipation holes arranged at equal intervals are formed in the upper surface of the limiting plate. According to the device, the bottom of the chip substrate can be protected through cooperation of the supporting columns, the compression-resistant pads and the compression-resistant blocks, pressure on the chip substrate is reduced, extrusion to electronic elements at the bottom of the chip substrate is avoided, and the upper portion of the chip substrate can be protected through cooperation of the positioning columns and the limiting plates.

Description

Technical Field

[0001] The utility model relates to the field of integrated circuits, in particular to a pressure-resistant integrated circuit. Background Art

[0002] Integrated circuits are a way of miniaturizing circuits. They use certain processes to interconnect the transistors, resistors, capacitors, inductors and other components and wiring required in a circuit, and make them on a small piece or several small pieces of semiconductor wafers or dielectric substrates. They are then packaged in a tube shell to become a miniature structure with the required circuit function. Most integrated circuits are set on a circuit chip substrate. The integrated circuit chip is an electronic component including a silicon substrate, at least one circuit, a fixed sealing ring, a grounding ring and at least one guard ring. The circuit is formed on the silicon substrate. The circuit has at least one output / input pad. The fixed sealing ring is formed on the silicon substrate and surrounds the circuit and the input pad.

[0003] A Chinese patent with announcement number CN220796713U discloses a pressure-resistant integrated circuit chip, including a chip substrate, wherein the left and right sides of the chip substrate are fixedly connected to brackets, the surface of the bracket is movably connected to a swing rod through a pin shaft, the end of the swing rod away from the bracket is fixedly connected to a reinforcing rib, a slide groove is provided on the surface of the swing rod, a pressure plate is arranged in parallel on the top of the chip substrate, the front and back sides of the pressure plate are fixedly connected to a slide rod located inside the slide groove, and the slide rod is slidably connected to the slide groove. However, the integrated circuit chip in the above patent can only resist pressure on the top of the integrated circuit chip, and lacks pressure protection on the bottom of the integrated circuit chip. During the installation and extrusion process, it is easy to cause compression to the electronic components at the bottom of the integrated circuit chip, resulting in damage to the integrated circuit chip. For this reason, we propose a pressure-resistant integrated circuit to solve the above problems. Utility Model Content

[0004] The purpose of the utility model is to provide a voltage-resistant integrated circuit to solve the problems raised in the above-mentioned background technology.

[0005] In order to achieve the above purpose, the utility model provides the following technical solutions:

[0006] A pressure-resistant integrated circuit comprises a base plate, the upper surface of the base plate is fixedly connected with support columns arranged at equal distances, the top of each support column is fixedly connected with a pressure-resistant pad, the upper surface of each pressure-resistant pad is jointly mounted with a chip substrate, the upper surface of the base plate is fixedly connected with pressure-resistant blocks arranged at equal distances, the upper surface of each pressure-resistant block contacts the bottom surface of the chip substrate, the upper surface of the base plate is fixedly connected with four positioning columns, the side surfaces of two groups of positioning columns close to each other are jointly fixedly connected with a limiting plate, the upper surface of the limiting plate is provided with heat dissipation holes arranged at equal distances, the upper surface of the limiting plate is fixedly connected with buffer springs arranged at equal distances, the top of each buffer spring is jointly fixedly connected with a pressure-resistant protective plate, the upper surface of the chip substrate is fixedly connected with symmetrical support plates, and the side surfaces of the two support plates close to each other are provided with pressure relief holes arranged at equal distances.

[0007] In a further embodiment, dampers arranged at equal distances are fixedly connected to the upper surface of the limit plate, and the top end of each damper is fixedly connected to the bottom surface of the compression protection plate.

[0008] In a further embodiment, the side surfaces of the two groups of positioning posts that are close to each other are fixedly connected with fixing rods that are arranged at equal distances, and the number of the fixing rods in each group is at least four.

[0009] In a further embodiment, the upper surfaces of the two groups of positioning columns are fixedly connected to fixing plates, and the upper surfaces of the two fixing plates are fixedly connected to symmetrical positioning blocks.

[0010] In a further embodiment, the side surfaces of the two groups of positioning blocks that are close to each other are fixedly connected to limiting rods, and the outer surfaces of the two limiting rods are provided with anti-slip grooves.

[0011] In a further embodiment, two groups of mounting holes are provided on the bottom surface of the base plate, and reinforcing ribs arranged at equal distances are provided inside the limiting plate.

[0012] Compared with the prior art, the beneficial effects of the utility model are:

[0013] The device utilizes the cooperation of support columns, pressure-resistant pads and pressure-resistant blocks to protect the bottom of the chip substrate, reduce the pressure on the bottom of the chip substrate, and avoid squeezing the electronic components at the bottom of the chip substrate. The device utilizes the cooperation of positioning columns and limit plates to protect the top of the chip substrate and avoid directly squeezing the chip substrate during installation. The device utilizes the cooperation of buffer springs and pressure-resistant protective plates to buffer the pressure and improve the protection of the chip substrate. BRIEF DESCRIPTION OF THE DRAWINGS

[0014] Figure 1 It is a schematic diagram of the three-dimensional structure of a pressure-resistant integrated circuit.

[0015] Figure 2 It is a top view of the limiting plate in the pressure-resistant integrated circuit.

[0016] Figure 3 A top view of a chip substrate in a pressure-resistant integrated circuit.

[0017] Figure 4 This is a bottom view of the chip substrate in the pressure-resistant integrated circuit.

[0018] In the figure: 1. bottom plate; 2. support column; 3. pressure-resistant pad; 4. pressure-resistant block; 5. chip substrate; 6. positioning column; 7. limit plate; 8. heat dissipation hole; 9. buffer spring; 10. pressure-resistant protective plate; 11. reinforcing rib; 12. support plate; 13. pressure relief hole; 14. damper; 15. fixing rod; 16. mounting hole; 17. fixing plate; 18. positioning block; 19. limit rod. DETAILED DESCRIPTION

[0019] In the description of the present utility model, it should be understood that the terms "center", "longitudinal", "lateral", "up", "down", "front", "back", "left", "right", "vertical", "horizontal", "top", "bottom", "inside", "outside" and the like indicate positions or positional relationships based on the positions or positional relationships shown in the accompanying drawings, and are only for the convenience of describing the present utility model and simplifying the description, rather than indicating or implying that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation, and therefore cannot be understood as a limitation on the present utility model. In addition, the terms "first", "second", etc. are only used for descriptive purposes, and cannot be understood as indicating or implying relative importance or implicitly indicating the number of technical features indicated. Therefore, features defined as "first", "second", etc. may explicitly or implicitly include one or more of the features. In the description of the present utility model, unless otherwise specified, "multiple" means two or more.

[0020] In the description of the present invention, it should be noted that, unless otherwise clearly specified and limited, the terms "installation", "connection" and "connection" should be understood in a broad sense, for example, it can be a fixed connection, a detachable connection, or an integral connection; it can be a mechanical connection or an electrical connection; it can be a direct connection, or it can be an indirect connection through an intermediate medium, or it can be the internal communication of two components. For ordinary technicians in this field, the specific meanings of the above terms in the present invention can be understood by specific circumstances.

[0021] The following will be combined with the drawings in the embodiments of the utility model to clearly and completely describe the technical solutions in the embodiments of the utility model. Obviously, the described embodiments are only part of the embodiments of the utility model, not all of the embodiments. Based on the embodiments in the utility model, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the utility model.

[0022] See also Figure 1-4 In the utility model, a pressure-resistant integrated circuit includes a bottom plate 1, the upper surface of the bottom plate 1 is fixedly connected with support columns 2 arranged at equal distances, the top of each support column 2 is fixedly connected with a pressure-resistant pad 3, the upper surface of each pressure-resistant pad 3 is commonly installed with a chip substrate 5, the upper surface of the bottom plate 1 is fixedly connected with pressure-resistant blocks 4 arranged at equal distances, the upper surface of each pressure-resistant block 4 is in contact with the bottom surface of the chip substrate 5, the upper surface of the bottom plate 1 is fixedly connected with four positioning columns 6, the side surfaces of the two groups of positioning columns 6 close to each other are commonly fixedly connected with a limiting plate 7, the upper surface of the limiting plate 7 is provided with heat dissipation holes 8 arranged at equal distances, and the upper surface of the limiting plate 7 is fixedly connected with buffer springs arranged at equal distances 9, the top of each buffer spring 9 is fixedly connected with a pressure-resistant protective plate 10, the upper surface of the chip substrate 5 is fixedly connected with a symmetrical support plate 12, and the side surfaces of the two support plates 12 close to each other are provided with pressure reducing holes 13 arranged at equal distances. By utilizing the cooperation of the support column 2, the pressure-resistant pad 3 and the pressure-resistant block 4, the bottom of the chip substrate 5 can be protected to reduce the pressure on the bottom of the chip substrate 5. By utilizing the cooperation of the positioning column 6 and the limit plate 7, the top of the chip substrate 5 can be protected to avoid direct squeezing of the chip substrate 5 during installation. By utilizing the cooperation of the buffer spring 9 and the pressure-resistant protective plate 10, the pressure can be buffered to improve the protection of the chip substrate 5.

[0023] The upper surface of the limit plate 7 is fixedly connected with dampers 14 arranged at equal distances, and the top of each damper 14 is fixedly connected to the bottom surface of the pressure-resistant protective plate 10. The side surfaces of the two groups of positioning columns 6 that are close to each other are fixedly connected with fixing rods 15 arranged at equal distances, and the number of fixing rods 15 in each group is at least four. The upper surfaces of the two groups of positioning columns 6 are fixedly connected with fixing plates 17, and the upper surfaces of the two fixing plates 17 are fixedly connected with symmetrical positioning blocks 18. The dampers 14 can apply a certain resistance to the pressure-resistant protective plate 10, thereby improving the stability of the pressure-resistant protective plate 10, and the fixing rods 15 are used to reinforce the positioning columns 6.

[0024] The side surfaces of the two groups of positioning blocks 18 that are close to each other are fixedly connected to the limiting rods 19. The outer surfaces of the two limiting rods 19 are provided with anti-slip grooves. The bottom surface of the base plate 1 is provided with two groups of mounting holes 16. The interior of the limiting plate 7 is provided with reinforcing ribs 11 arranged at equal distances. Through the cooperation of the limiting rods 19 and the positioning blocks 18, it is convenient for the staff to take the chip substrate 5, and further convenient for the staff to install the chip substrate 5. The reinforcing ribs 11 can be used to reinforce the limiting plate 7 to improve the compressive strength of the limiting plate 7. The mounting holes 16 are used to facilitate the staff to install the device.

[0025] The working principle of the utility model is:

[0026] When in use, first take the chip substrate 5 through the positioning block 18 and the limiting rod 19, then use the cooperation of the base plate 1 and the mounting hole 16 to stably install the device in a suitable position, and at the same time use the cooperation of the support column 2, the pressure-resistant pad 3 and the pressure-resistant block 4 to protect the bottom of the chip substrate 5 and reduce the pressure on the bottom of the chip substrate 5, and then use the cooperation of the positioning column 6 and the limiting plate 7 to protect the top of the chip substrate 5 to avoid direct squeezing of the chip substrate 5 during installation, and then use the cooperation of the buffer spring 9 and the pressure-resistant protective plate 10 to buffer the pressure and improve the protection of the chip substrate 5.

[0027] It is obvious to those skilled in the art that the present invention is not limited to the details of the exemplary embodiments described above, and that the present invention can be implemented in other specific forms without departing from the spirit or essential features of the present invention. Therefore, the embodiments should be regarded as exemplary and non-limiting from any point of view, and the scope of the present invention is defined by the appended claims rather than the above description, and it is intended that all changes falling within the meaning and scope of the equivalent elements of the claims are included in the present invention. Any reference numeral in a claim should not be regarded as limiting the claim to which it relates.

[0028] In addition, it should be understood that although the present specification is described according to implementation modes, not every implementation mode contains only one independent technical solution. This description of the specification is only for the sake of clarity. Those skilled in the art should regard the specification as a whole. The technical solutions in each embodiment may also be appropriately combined to form other implementation modes that can be understood by those skilled in the art.

Claims

1. A pressure-resistant integrated circuit, characterized in that: The invention comprises a bottom plate (1), the upper surface of the bottom plate (1) is fixedly connected to support columns (2) arranged at equal distances, the top of each support column (2) is fixedly connected to a pressure-resistant pad (3), the upper surface of each pressure-resistant pad (3) is commonly mounted with a chip substrate (5), the upper surface of the bottom plate (1) is fixedly connected to pressure-resistant blocks (4) arranged at equal distances, the upper surface of each pressure-resistant block (4) is in contact with the bottom surface of the chip substrate (5), and the upper surface of the bottom plate (1) is fixedly connected to four positioning columns (6), and two groups of the positioning columns are fixedly connected to the top of the bottom plate (1). (6) A limiting plate (7) is fixedly connected to one side surface close to each other, and the upper surface of the limiting plate (7) is provided with heat dissipation holes (8) arranged at equal distances. The upper surface of the limiting plate (7) is fixedly connected to buffer springs (9) arranged at equal distances, and the top of each buffer spring (9) is fixedly connected to a pressure-resistant protective plate (10). The upper surface of the chip substrate (5) is fixedly connected to a symmetrical support plate (12), and the two support plates (12) are provided with pressure relief holes (13) arranged at equal distances on one side surface close to each other.

2. The voltage-resistant integrated circuit according to claim 1, characterized in that: The upper surface of the limit plate (7) is fixedly connected to dampers (14) arranged at equal distances, and the top end of each damper (14) is fixedly connected to the bottom surface of the pressure-resistant protective plate (10).

3. The voltage-resistant integrated circuit according to claim 1, characterized in that: The sides of the two groups of positioning columns (6) that are close to each other are fixedly connected with fixing rods (15) arranged at equal distances, and the number of the fixing rods (15) in each group is at least four.

4. The voltage-resistant integrated circuit according to claim 1, characterized in that: The upper surfaces of the two groups of positioning columns (6) are fixedly connected to fixing plates (17), and the upper surfaces of the two fixing plates (17) are fixedly connected to symmetrical positioning blocks (18).

5. The voltage-resistant integrated circuit according to claim 4, characterized in that: The side surfaces of the two groups of positioning blocks (18) close to each other are fixedly connected to limiting rods (19), and the outer surfaces of the two limiting rods (19) are provided with anti-slip grooves.

6. The voltage-resistant integrated circuit according to claim 1, characterized in that: The bottom surface of the base plate (1) is provided with two groups of mounting holes (16), and the interior of the limiting plate (7) is provided with reinforcing ribs (11) arranged at equal distances.

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