Half-bridge drive circuit, wireless charging chip and full-bridge power supply

Abstract

The utility model provides a half-bridge drive circuit, a wireless charging chip and a full-bridge power supply, and relates to the field of DC power supply. The half-bridge drive circuit includes: a voltage doubling module and a half-bridge drive module; the first input end of the voltage doubling module is used to access a preset drive signal, the second input end of the voltage doubling module is used to access a power supply voltage, the output end of the voltage doubling module is connected to the first input end of the half-bridge drive module, and the second input end of the half-bridge drive module is used to access a preset control signal; the output end of the half-bridge drive module is used to output a drive voltage to drive a transmitting end coil; the voltage doubling module is used to double the power supply voltage under the action of the drive signal, and output the doubled voltage to the half-bridge drive module. It can make the on-resistance in the half-bridge drive module smaller and the heat loss lower. At the same time, it can also be applied to various scenarios and has high flexibility.

Description

Technical Field

[0001] The utility model relates to the field of direct current power supplies, and in particular to a half-bridge drive circuit, a wireless charging chip and a full-bridge power supply. Background Art

[0002] The half-bridge driver integrated in the wireless charging chip is a key power management component that plays an important role in the wireless charging process.

[0003] In the wireless charging process of the prior art, the power supply module usually supplies power to the wireless charging chip, and the control module in the wireless charging chip sends a control signal to the half-bridge driving power supply. The half-bridge driving power supply adjusts its working state according to these signals, thereby realizing the control of the current of the wireless charging transmitting coil, so that the transmitting coil generates a stable alternating magnetic field and realizes the wireless transmission of electric energy.

[0004] However, this implementation method is limited by the voltage provided by the power supply module. When the voltage is low, it will produce greater heat loss. At the same time, it is not flexible in use and is difficult to apply in various scenarios. Utility Model Content

[0005] The purpose of the utility model is to provide a half-bridge drive circuit, a wireless charging chip and a full-bridge power supply, which can reduce the heat generation of the drive circuit and reduce the heat loss during the charging process. At the same time, it can be applied to various scenarios and has high flexibility.

[0006] In a first aspect, the utility model provides a half-bridge driving circuit, comprising: a voltage doubling module and a half-bridge driving module;

[0007] The first input end of the voltage doubling module is used to access a preset driving signal, the second input end of the voltage doubling module is used to access a power supply voltage, the output end of the voltage doubling module is connected to the first input end of the half-bridge driving module, and the second input end of the half-bridge driving module is used to access a preset control signal;

[0008] The output end of the half-bridge driving module is used to output a driving voltage to drive the transmitting end coil;

[0009] The voltage doubling module is used to double the supply voltage under the action of the driving signal, and output the doubled voltage to the half-bridge driving module.

[0010] In a possible implementation, the voltage doubling module includes: a signal processing unit and a voltage doubling unit;

[0011] The first input terminal of the signal processing unit is used to access a preset driving signal, and the second input terminal of the signal processing unit is used to access the power supply voltage;

[0012] The output end of the signal processing unit is connected to the first input end of the voltage doubling unit;

[0013] The second input end of the voltage doubling unit is used to access the supply voltage, and the output end of the voltage doubling unit is connected to the first input end of the half-bridge driving module.

[0014] In a possible implementation, the signal processing unit includes: a digital gate unit and a switch unit;

[0015] The input end of the digital gate unit is used to access a preset driving signal, the first output end of the digital gate unit is connected to the first input end of the switch unit, and the second output end of the digital gate unit is connected to the second input end of the switch unit;

[0016] The third input terminal of the switch unit is used to access the supply voltage, and the output terminal of the switch unit is connected to the first input terminal of the voltage doubling unit.

[0017] In a possible implementation, the digital gate unit includes: a first buffer, a second buffer, a third buffer, a fourth buffer, a fifth buffer, a first inverter, a second inverter, an AND gate, and a NAND gate;

[0018] The input end of the first buffer is used to receive the driving signal, and the output end of the first buffer is connected to the input end of the second buffer and the input end of the second inverter;

[0019] The output end of the second buffer is connected to the second input end of the NAND gate, and the output end of the second inverter is connected to the second input end of the AND gate;

[0020] The input end of the first inverter is connected to the output end of the fifth buffer and the second input end of the switch unit, the output end of the first inverter is connected to the first input end of the NAND gate, and the output end of the NAND gate is connected to the input end of the third buffer;

[0021] The output end of the third buffer is connected to the first input end of the switch unit and the input end of the fourth buffer, the output end of the fourth buffer is connected to the first input end of the AND gate, and the output end of the AND gate is connected to the input end of the fifth buffer.

[0022] In a possible implementation, the switch unit includes: a first P-channel metal oxide semiconductor field effect transistor and a first N-channel metal oxide semiconductor field effect transistor;

[0023] The source of the first P-channel metal oxide semiconductor field effect transistor is used to access the power supply voltage, the gate of the first P-channel metal oxide semiconductor field effect transistor is connected to the first output terminal of the digital gate unit, and the drain of the first P-channel metal oxide semiconductor field effect transistor is connected to the drain of the first N-channel metal oxide semiconductor field effect transistor and the first input terminal of the voltage multiplier unit;

[0024] A gate of the first N-channel metal oxide semiconductor field effect transistor is connected to the second output terminal of the digital gate unit, and a source of the first N-channel metal oxide semiconductor field effect transistor is grounded.

[0025] In a possible implementation, the voltage doubling unit includes: a first capacitor and a first diode;

[0026] One end of the first capacitor is connected to the output end of the signal processing unit, and the other end of the first capacitor is connected to the cathode of the first diode and the first input end of the half-bridge driving module;

[0027] The anode of the first diode is used to access the supply voltage.

[0028] In a possible implementation, the voltage doubling module further includes: a voltage stabilizing unit; the voltage stabilizing unit includes: a second capacitor and a second diode;

[0029] An anode of the second diode is connected to the output end of the voltage doubling unit, and a cathode of the second diode is connected to one end of the second capacitor and to the first input end of the half-bridge driving module;

[0030] The other end of the second capacitor is grounded.

[0031] In a possible implementation manner, the half-bridge driving module is a half-bridge driving module based on BOOST, BUCK, or BUCK+BOOST.

[0032] In a second aspect, the utility model provides a wireless charging chip, and the wireless charging chip includes the half-bridge driving circuit and the control module described in the first aspect.

[0033] In a third aspect, the utility model provides a full-bridge power supply, including the five-insurance charging chip and power supply module described in the second aspect.

[0034] The beneficial effect of the half-bridge driving circuit provided by the utility model is that the utility model can increase the threshold voltage required when the half-bridge driving module is turned on, so that the half-bridge driving module is turned on more fully, and the on-resistance in the half-bridge driving module is smaller, and the heat loss is lower. At the same time, it can also be applied to various scenarios and has high flexibility. BRIEF DESCRIPTION OF THE DRAWINGS

[0035] In order to more clearly illustrate the technical solutions of the embodiments of the utility model, the drawings required for use in the embodiments will be briefly introduced below. It should be understood that the following drawings only show certain embodiments of the utility model and therefore should not be regarded as limiting the scope. For ordinary technicians in this field, other relevant drawings can be obtained based on these drawings without paying creative work.

[0036] Figure 1 A schematic diagram of a half-bridge drive circuit provided in an embodiment of the present application;

[0037] Figure 2 A schematic diagram of a structure of a voltage doubling module in a half-bridge drive circuit provided in an embodiment of the present application;

[0038] Figure 3 A schematic diagram of a structure of a signal processing unit in a half-bridge driving circuit provided in an embodiment of the present application;

[0039] Figure 4 A structural schematic diagram of a digital gate unit in a half-bridge drive circuit provided in an embodiment of the present application;

[0040] Figure 5 A schematic diagram of a structure of a switch unit in a half-bridge drive circuit provided in an embodiment of the present application;

[0041] Figure 6 A schematic diagram of a structure of a voltage doubling unit in a half-bridge driving circuit provided in an embodiment of the present application;

[0042] Figure 7 A schematic diagram of a structure of a voltage doubling module in a half-bridge drive circuit provided in an embodiment of the present application;

[0043] Figure 8 A schematic diagram of a working principle of a signal processing unit in a half-bridge driving circuit provided in an embodiment of the present application;

[0044] Fig. 9 A schematic diagram of another working principle of a signal processing unit in a half-bridge driving circuit provided in an embodiment of the present application;

[0045] Fig.10 A structural schematic diagram of a half-bridge driving module in a half-bridge driving circuit provided in an embodiment of the present application;

[0046] Fig.11 Another structural schematic diagram of a half-bridge driving module in a half-bridge driving circuit provided in an embodiment of the present application;

[0047] Fig.12A schematic diagram of another structure of a half-bridge driving module in a half-bridge driving circuit provided in an embodiment of the present application;

[0048] Fig.13 A structural schematic diagram of a first driving module in a half-bridge driving circuit provided in an embodiment of the present application;

[0049] Fig.14 A schematic diagram of the structure of a wireless charging chip provided in an embodiment of the present application;

[0050] Fig.15 A schematic diagram of the structure of a full-bridge power supply provided in an embodiment of the present application.

[0051] Icon: 10-half-bridge drive circuit; 100-voltage doubling module; 200-half-bridge drive module; Dri_In-drive signal; Con_In-control signal; VDD-power supply voltage; Vin-external voltage; 101-signal processing unit; 102-voltage doubling unit; 1011-digital gate unit; 1012-switch unit; Q1-first PMOS tube; Q2-first NMOS tube; C1-first capacitor; D1-first diode; 103-voltage stabilizing unit; C2-second capacitor; D2-second diode; 201-first drive module; C3-second Three capacitors; C4-the fourth capacitor; L1-the first inductor, Q3-the second NMOS tube; Q4-the third NMOS tube; C6-the sixth capacitor; C7-the seventh capacitor; C8-the eighth capacitor; L2-the second inductor; Q5-the fifth NMOS tube; Q6-the sixth NMOS tube; 202-the second driving module; C9-the ninth capacitor; C10-the tenth capacitor; C11-the eleventh capacitor; C12-the twelfth capacitor; Q7-the seventh NMOS tube; Q8-the eighth NMOS tube; Q9-the ninth NMOS tube; Q10-the tenth NMOS tube; L3-the third inductor. DETAILED DESCRIPTION

[0052] In order to make the purpose, technical scheme and advantages of the embodiments of the utility model clearer, the technical scheme in the embodiments of the utility model will be clearly and completely described below in conjunction with the drawings in the embodiments of the utility model. Obviously, the described embodiments are part of the embodiments of the utility model, not all of the embodiments. Generally, the components of the embodiments of the utility model described and shown in the drawings here can be arranged and designed in various different configurations.

[0053] Therefore, the following detailed description of the embodiments of the present invention provided in the accompanying drawings is not intended to limit the scope of the present invention to be protected, but merely represents selected embodiments of the present invention. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present invention.

[0054] It should be noted that similar reference numerals and letters denote similar items in the following drawings, and therefore, once an item is defined in one drawing, further definition and explanation thereof is not required in subsequent drawings.

[0055] In the description of the present utility model, it should be understood that the terms "center", "up", "down", "left", "right", "vertical", "horizontal", "inside", "outside", etc. indicate orientations or positional relationships based on the orientations or positional relationships shown in the accompanying drawings, or are the orientations or positional relationships in which the utility model product is conventionally placed when in use, or are the orientations or positional relationships conventionally understood by those skilled in the art. They are only for the convenience of describing the present utility model and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation, and therefore should not be understood as a limitation on the present utility model.

[0056] Furthermore, the terms “first”, “second”, “third”, etc. are merely used for distinguishing descriptions and are not to be understood as indicating or implying relative importance.

[0057] In the description of the present invention, it is also necessary to explain that, unless otherwise clearly specified and limited, the terms "set", "install", "connect", and "connect" should be understood in a broad sense, for example, it can be a fixed connection, a detachable connection, or an integral connection; it can be a mechanical connection or an electrical connection; it can be a direct connection, or it can be indirectly connected through an intermediate medium, or it can be the internal communication of two components. For ordinary technicians in this field, the specific meanings of the above terms in the present invention can be understood according to specific circumstances.

[0058] In the wireless charging process of the prior art, the power supply module usually supplies power to the wireless charging chip, and the control module in the wireless charging chip sends a control signal to the half-bridge driving power supply. The half-bridge driving power supply adjusts its working state according to these signals, thereby realizing the control of the current of the wireless charging transmitting coil, so that the transmitting coil generates a stable alternating magnetic field and realizes the wireless transmission of electric energy.

[0059] However, this implementation method is limited by the current provided by the power supply module. When the current is low, due to the threshold voltage of the MOS tube, the half-bridge drive circuit will generate large heat loss. At the same time, it is not flexible in use and is difficult to apply in various scenarios.

[0060] Based on the above problems, the embodiment of the present application proposes a half-bridge driving circuit, which provides a voltage doubling module and a half-bridge driving module in the half-bridge driving circuit, so that the voltage doubling module doubles the supply voltage under the action of the driving signal, and outputs the doubled voltage to the half-bridge driving module, so that the half-bridge driving module can output the driving voltage to drive the transmitting end coil. The threshold voltage required when the half-bridge driving module is turned on can be increased, so that the half-bridge driving module can be turned on more fully, and the on-resistance in the half-bridge driving module is smaller, and the heat loss is lower. At the same time, it can also be applied to various scenarios and has high flexibility.

[0061] Figure 1 A schematic diagram of a half-bridge drive circuit provided in an embodiment of the present application, referring to Figure 1 As shown, the half-bridge driving circuit 10 provided in this embodiment includes: a voltage doubling module 100 and a half-bridge driving module 200 .

[0062] The first input terminal of the voltage doubler module 100 is used to receive a preset driving signal Dri_In, the second input terminal of the voltage doubler module 100 is used to receive a power supply voltage VDD, and the output terminal of the voltage doubler module 100 is connected to the first input terminal of the half-bridge driving module 200 .

[0063] The voltage doubling module 100 is used to double the voltage of the supply voltage VDD under the action of the driving signal Dri_In, and output the doubled voltage to the half-bridge driving module 200 .

[0064] The preset driving signal Dri_In may be a PWM signal. The supply voltage VDD is used to supply power to the voltage doubling module, and may be 5V, for example.

[0065] Among them, after the supply voltage is doubled by the voltage doubling module, it is used as the driving power supply of the half-bridge driving module, which can increase the threshold voltage required when the half-bridge driving module is turned on, so that the half-bridge driving module can be turned on more fully, the on-resistance in the half-bridge driving module is smaller, and the heat loss is lower.

[0066] The second input terminal of the half-bridge driving module 200 is used to receive a preset control signal Con_In.

[0067] The half-bridge driving module 200 is used to realize power supply and control of the load under the action of the doubled voltage, and the output end of the half-bridge driving module 200 is used to output a driving voltage Vout to drive the transmitting end coil.

[0068] The preset control signal Con_In may be a PWM signal, and may be composed of two groups of PWM sub-signals. The two groups of PWM sub-signals have dead drive times and opposite phases, so as to control the operation of the half-bridge driving module 200 .

[0069] In this embodiment, by arranging a voltage doubling module and a half-bridge driving module in the half-bridge driving circuit, the voltage doubling module doubles the supply voltage under the action of the driving signal, and outputs the doubled voltage to the half-bridge driving module, so that the half-bridge driving module can output the driving voltage to drive the transmitting end coil. The threshold voltage required when the half-bridge driving module is turned on can be increased, so that the half-bridge driving module can be turned on more fully, and the on-resistance in the half-bridge driving module is smaller, and the heat loss is lower. At the same time, it can also be applied to various scenarios and has high flexibility.

[0070] Figure 2 A schematic diagram of the structure of a voltage doubling module in a half-bridge drive circuit provided in an embodiment of the present application.

[0071] In one possible implementation, referring to Figure 2 As shown, in Figure 1 On the basis of, the voltage doubling module 100 includes: a signal processing unit 101 and a voltage doubling unit 102.

[0072] The first input terminal of the signal processing unit 101 is used to access a preset driving signal Dri_In, and the second input terminal of the signal processing unit 101 is used to access a power supply voltage VDD.

[0073] The output terminal of the signal processing unit 101 is connected to the first input terminal of the voltage doubling unit 102 .

[0074] The second input terminal of the voltage doubler unit 102 is used to access the power supply voltage VDD, and the output terminal of the voltage doubler unit 102 is connected to the first input terminal of the half-bridge driving module 200 .

[0075] Optionally, the signal processing unit 101 is used to perform signal processing on the drive signal Dri_In so that the voltage doubling unit 102 can receive the processed signal and perform voltage doubling processing, thereby increasing the threshold voltage required when the half-bridge drive module is turned on, making the half-bridge drive module more fully turned on, the on-resistance in the half-bridge drive module smaller, and the heat loss lower.

[0076] Optionally, the voltage doubling unit 102 is used to perform voltage doubling processing under the action of the processed signal and the power supply voltage VDD, obtain the doubled voltage, and output it to the half-bridge driving module 200 .

[0077] The signal processing unit processes the driving signal, so that the voltage doubling unit can double the voltage of the processed signal, thereby increasing the threshold voltage required when the half-bridge driving module is turned on, making the half-bridge driving module more fully turned on, and the on-resistance in the half-bridge driving module smaller, and the heat loss lower.

[0078] Figure 3 A schematic diagram of the structure of a signal processing unit in a half-bridge drive circuit provided in an embodiment of the present application.

[0079] In one possible implementation, referring to Figure 3 As shown, in Figure 2 On the basis of, the signal processing unit 101 includes: a digital gate unit 1011 and a switch unit 1012.

[0080] The input end of the digital gate unit 1011 is used to access the preset driving signal Dri_In, the first output end of the digital gate unit 1011 is connected to the first input end of the switch unit 1012 , and the second output end of the digital gate unit 1011 is connected to the second input end of the switch unit 1012 .

[0081] The third input terminal of the switch unit 1012 is used to access the power supply voltage VDD, and the output terminal of the switch unit 1012 is connected to the first input terminal of the voltage doubling unit 102 .

[0082] Optionally, the digital gate unit 1011 is used to process the driving signal Dri_In so that the switch unit 1012 can receive the processed signal and turn on or off the switch unit 1012, thereby enabling the voltage doubling unit 102 to perform voltage doubling processing.

[0083] The driving signal is processed by the digital gate unit so that the switch unit can be turned on, so that the voltage doubling unit can double the voltage of the processed signal, so that the half-bridge driving module can be turned on more fully and the heat loss is lower.

[0084] Figure 4 A structural schematic diagram of a digital gate unit in a half-bridge drive circuit provided in an embodiment of the present application.

[0085] In one possible implementation, referring to Figure 4 As shown, in Figure 3 On the basis of, the digital gate unit 1011 includes: a first buffer, a second buffer, a third buffer, a fourth buffer, a fifth buffer, a first inverter, a second inverter, an AND gate and a NAND gate.

[0086] The input end of the first buffer is used to receive the driving signal Dri_In, and the output end of the first buffer is connected to the input end of the second buffer and the input end of the second inverter.

[0087] The output end of the second buffer is connected to the second input end of the NAND gate, and the output end of the second inverter is connected to the second input end of the AND gate.

[0088] The input end of the first inverter is connected to the output end of the fifth buffer and the second input end of the switch unit 1012, the output end of the first inverter is connected to the first input end of the NAND gate, and the output end of the NAND gate is connected to the input end of the third buffer.

[0089] The output end of the third buffer is connected to the first input end of the switch unit 1012 and the input end of the fourth buffer. The output end of the fourth buffer is connected to the first input end of the AND gate. The output end of the AND gate is connected to the input end of the fifth buffer.

[0090] Optionally, the first buffer, the second buffer, the third buffer, the fourth buffer, and the fifth buffer are used to enhance the driving capability of the signal to ensure that the signal can be transmitted more stably and accurately. At the same time, the first buffer, the second buffer, the third buffer, the fourth buffer, and the fifth buffer can also offset the attenuation and noise interference of the signal, ensure the transmission quality of the signal, and avoid the occurrence of bit error rate. In addition, the first buffer, the second buffer, the third buffer, the fourth buffer, and the fifth buffer can also amplify and compensate the input signal so that the signal can reach the corresponding level.

[0091] Optionally, the first inverter and the second inverter are used to invert the phase of the input signal by 180 degrees.

[0092] Optionally, the AND gate is used to implement a logic operation, specifically to perform a logic operation on the signals output by the fourth buffer and the second inverter, to ensure that the output signal is true only when the signals output by the fourth buffer and the second inverter are both true.

[0093] Optionally, the NAND gate is used to implement a logic operation, specifically to perform a logic operation on the signals output by the first inverter and the second buffer, to ensure that the output signal is true only when the signals output by the first inverter and the second buffer are both false.

[0094] The digital gate unit composed of the first buffer, the second buffer, the third buffer, the fourth buffer, the fifth buffer, the first inverter, the second inverter, the AND gate and the NAND gate has an anti-cross driving function and can control the conduction of the switch unit.

[0095] Figure 5 A schematic diagram of the structure of a switch unit in a half-bridge drive circuit provided in an embodiment of the present application.

[0096] In one possible implementation, referring to Figure 5 As shown, in Figure 3On the basis of, the switch unit 1012 includes: a first P-channel metal oxide semiconductor field effect transistor (Positive Channel Metal Oxide Semiconductor, referred to as PMOS tube) Q1 and a first N-channel metal oxide semiconductor field effect transistor (Negative Channel Metal Oxide Semiconductor, referred to as NMOS tube) Q2.

[0097] The source of the first PMOS transistor Q1 is used to access the power supply voltage VDD, the gate of the first PMOS transistor Q1 is connected to the first output terminal of the digital gate unit 1011, and the drain of the first PMOS transistor Q1 is connected to the drain of the first NMOS transistor Q2 and the first input terminal of the voltage doubling unit 102.

[0098] The gate of the first NMOS transistor Q2 is connected to the second output terminal of the digital gate unit 1011 , and the source of the first NMOS transistor Q2 is grounded.

[0099] Optionally, the first PMOS transistor Q1 and the first NMOS transistor Q2 are respectively used to be turned on and off under the action of the digital gate unit 1011 .

[0100] Figure 6 A schematic diagram of the structure of a voltage doubling unit in a half-bridge drive circuit provided in an embodiment of the present application.

[0101] In one possible implementation, referring to Figure 6 As shown, in Figure 2 On the basis of, the voltage doubling unit 102 includes: a first capacitor C1 and a first diode D1.

[0102] One end of the first capacitor C1 is connected to the output end of the signal processing unit 101 , and the other end of the first capacitor C1 is connected to the cathode of the first diode D1 and the first input end of the half-bridge driving module 200 ; the anode of the first diode D1 is used to access the power supply voltage VDD.

[0103] Optionally, the first capacitor C1 is used as a bootstrap capacitor and can be charged, thereby cooperating with the first diode D1 to achieve voltage doubling.

[0104] Figure 7 A schematic diagram of the structure of a voltage doubling module in a half-bridge drive circuit provided in an embodiment of the present application.

[0105] In one possible implementation, referring to Figure 7 As shown, in Figure 2 On the basis of, the voltage doubling module 100 further includes: a voltage stabilizing unit 103; the voltage stabilizing unit 103 includes: a second capacitor C2 and a second diode D2.

[0106] The anode of the second diode D2 is connected to the output end of the voltage doubling unit 102 , the cathode of the second diode D2 is connected to one end of the second capacitor C2 and the first input end of the half-bridge driving module 200 ; the other end of the second capacitor C2 is grounded.

[0107] Optionally, the second capacitor C2 and the second diode D2 are used for filtering to reduce power ripple.

[0108] Optionally, Figure 8 A schematic diagram of a working principle of a signal processing unit in a half-bridge driving circuit provided in an embodiment of the present application, Fig. 9 Another schematic diagram of the working principle of the signal processing unit in the half-bridge driving circuit provided in the embodiment of the present application is shown in FIG. Figure 8 as well as Fig. 9 As shown, when the driving signal Dri_In is 0, A1 and A2 are 1, when the driving signal Dri_In is 1, A1 and A2 are 0, when the driving signal Dri_In changes from 0 to 1, the potential of A2 is 1 at this moment, the potential of A1 is still high at this time, and Q1 is not turned on. Only when the driving signal Dri_In goes to the lower path signal, making A2 become 0, can the potential of A1 become 0 and Q1 be turned on.

[0109] Continue to refer to Figure 8 as well as Fig. 9 As shown, Q1 and Q2 work in a mutually exclusive switch state. When Q2 is turned on, VDD charges C1 through D2. For example, the voltage across C1 is 5V. When Q2 is turned off and Q1 is turned on, VDD charges C1 through Q1. Since the voltage across C1 cannot change suddenly, the voltage of VDD_DR is raised to 10V by the C1 capacitor. C2 is used to filter the power supply and reduce the power supply ripple.

[0110] In a possible implementation, the half-bridge driver module 200 is a half-bridge driver module 200 based on BOOST, BUCK, or BUCK+BOOST.

[0111] Fig.10 A structural schematic diagram of a half-bridge driving module in a half-bridge driving circuit provided in an embodiment of the present application.

[0112] In a possible implementation, the half-bridge driver module 200 can be implemented based on the BOOST architecture. Fig.10 As shown, in Figure 1 On the basis of, the half-bridge driving module 200 includes: a first driving module 201, a third capacitor C3, a fourth capacitor C4, a first inductor L1, a second NMOS transistor Q3 and a third NMOS transistor Q4.

[0113] The first input end of the first driving module 201 is connected to the output end of the voltage doubling module 100, the second input end of the first driving module 201 is used to access the preset control signal Con_In, the first output end of the first driving module 201 is connected to one end of the third capacitor C3, the second output end of the first driving module 201 is connected to the gate of the second NMOS tube Q3, the third output end of the first driving module 201 is connected to the other end of the third capacitor C3, one end of the fourth capacitor C4, and one end of the first inductor L1, and the fourth output end of the first driving module 201 is connected to the gate of the third NMOS tube Q4.

[0114] The drain of the second NMOS transistor Q3 is used to drive the transmitting end coil, and the source of the second NMOS transistor Q3 is connected to the other end of the first inductor L1 and the drain of the third NMOS transistor Q4.

[0115] One end of the fourth capacitor C4 is also used to connect to the external voltage Vin, the other end of the fourth capacitor C4 is grounded, and the source of the third NMOS transistor Q4 is grounded. The external voltage Vin is an external power supply, which is different from the power supply voltage VDD.

[0116] In one possible implementation, when Q1 is off and Q2 is on, Vin charges L1. When Q1 is on and Q2 is off, the energy stored in L1 is discharged to the transmitting coil. At the same time, Vin is also discharged to the load through Q1. The two are superimposed to achieve voltage boost, dt = (1-D)*T.

[0117] Where D is the duty cycle of PWM and T is the period of PWM.

[0118] V in +V l =V out

[0119]

[0120] According to the volt-second balance principle, the charging and discharging of the inductor L1 are the same during the time when the switch is closed and opened, so:

[0121] dI of =dI on

[0122] It can be concluded that

[0123]

[0124] Therefore, it can be known that in the half-bridge driving circuit provided in the present application, when Vin is constant, controlling the output voltage of Vout only requires adjusting the PWM duty cycle of the control signal Con_In.

[0125] Fig.11Another structural schematic diagram of a half-bridge driving module in a half-bridge driving circuit provided in an embodiment of the present application.

[0126] In a possible implementation, the half-bridge driver module 200 can be implemented based on the BUCK architecture. Fig.11 As shown, in Figure 1 On the basis of, the half-bridge driving module includes: a first driving module 201, a sixth capacitor C6, a seventh capacitor C7, an eighth capacitor C8, a second inductor L2, a fifth NMOS transistor Q5 and a sixth NMOS transistor Q6.

[0127] The first input end of the first driving module 201 is connected to the output end of the voltage doubling module 100, the second input end of the first driving module 201 is used to access the preset control signal Con_In, the first output end of the first driving module 201 is connected to one end of the sixth capacitor C6, the second output end of the first driving module 201 is connected to the gate of the fifth NMOS tube Q5, the third output end of the first driving module 201 is connected to the other end of the sixth capacitor C6, the source of the fifth NMOS tube Q5, the drain of the sixth NMOS tube Q6 and one end of the second inductor L2, and the fourth output end of the first driving module 201 is connected to the gate of the sixth NMOS tube Q6.

[0128] The drain of the fifth NMOS transistor Q5 is connected to one end of the seventh capacitor C7. The drain of the fifth NMOS transistor Q5 is also used to access the external voltage Vin. The other end of the seventh capacitor C7 is grounded.

[0129] The source of the sixth NMOS transistor Q6 is grounded, the other end of the second inductor L2 is connected to one end of the eighth capacitor C8, the other end of the second inductor L2 is also used to drive the transmitting end coil, and the other end of the eighth capacitor C8 is grounded.

[0130] Optionally, when implemented based on the BUCK architecture, the relationship between the input voltage and the output voltage of the BUCK circuit is:

[0131] V out =V in *D

[0132] Where D is the duty cycle of the half-bridge drive PWM. Therefore, it can be seen that in the half-bridge drive circuit provided in the present application, when Vin is constant, controlling the output voltage of Vout only requires adjusting the PWM duty cycle of the control signal Con_In.

[0133] Fig.12 A schematic diagram of another structure of a half-bridge driving module in a half-bridge driving circuit provided in an embodiment of the present application.

[0134] In a possible implementation, the half-bridge driver module 200 can be implemented based on the BOOST+BUCK architecture. Fig.12 As shown, in Figure 1 On the basis of, the half-bridge driving module 200 includes: a first driving module 201, a second driving module 202, a ninth capacitor C9, a tenth capacitor C10, an eleventh capacitor C11, a twelfth capacitor C12, a seventh NMOS tube Q7, an eighth NMOS tube Q8, a ninth NMOS tube Q9, a tenth NMOS tube Q10 and a third inductor L3.

[0135] The first input end of the first driving module 201 is connected to the output end of the voltage doubling module 100, the second input end of the first driving module 201 is used to access the preset control signal Con_In, the first output end of the first driving module 201 is connected to one end of the ninth capacitor C9, the second output end of the first driving module 201 is connected to the gate of the seventh NMOS tube Q7, the third output end of the first driving module 201 is connected to the other end of the ninth capacitor C9, one end of the third inductor L3, the source of the seventh NMOS tube Q7 and the drain of the eighth NMOS tube Q8, the fourth output end of the first driving module 201 is connected to the gate of the eighth NMOS tube Q8, and the source of the eighth NMOS tube Q8 is grounded.

[0136] The drain of the seventh NMOS transistor Q7 is connected to one end of the tenth capacitor C10 , and the drain of the seventh NMOS transistor Q7 is also used to access the external voltage Vin. The other end of the tenth capacitor C10 is grounded.

[0137] The drain of the ninth NMOS transistor Q9 is connected to one end of the eleventh capacitor C11. The drain of the ninth NMOS transistor Q9 is used to drive the transmitting end coil. The other end of the eleventh capacitor C11 is grounded.

[0138] The source of the ninth NMOS transistor Q9 is connected to the drain of the tenth NMOS transistor Q10 and the other end of the third inductor L3.

[0139] A first input end of the second driving module 202 is connected to an output end of the voltage doubling module 100, a second input end of the second driving module 202 is used to access a preset control signal Con_In, a first output end of the second driving module 202 is connected to one end of the twelfth capacitor C12, a second output end of the second driving module 202 is connected to a gate of the ninth NMOS tube Q9, a third output end of the second driving module 202 is connected to the other end of the twelfth capacitor C12 and the other end of the third inductor L3, and a fourth output end of the second driving module 202 is connected to a gate of the tenth NMOS tube Q10.

[0140] Optionally, the first driving module 201 and the second driving module 202 may be the same module or different modules. Exemplarily, the first driving module 201 and the second driving module 202 may be composed of an operational amplifier OP and a diode D. Fig.13A structural schematic diagram of a first driving module in a half-bridge driving circuit provided in an embodiment of the present application.

[0141] Alternatively, when implemented based on the BOOST+BUCK architecture, the volt-second balance principle can be used to obtain:

[0142]

[0143] Wherein, D is the duty cycle of the half-bridge drive PWM. When the external voltage Vin is constant, boost is achieved when D is greater than 50%, and buck is achieved when D is less than 50%. It can be seen that to control the output voltage of Vout, it is only necessary to adjust the PWM duty cycle of the control signal Con_In.

[0144] Based on the same inventive concept, the utility model also provides a wireless charging chip. Fig.14 A schematic diagram of a wireless charging chip provided in an embodiment of the present application, referring to Fig.14 As shown, the wireless charging chip includes the above-mentioned half-bridge driving circuit and a control module, the control module is electrically connected to the half-bridge driving circuit, and the control module is used to generate a driving signal Dri_In and a control signal Con_In, and send them to the half-bridge driving circuit to drive the half-bridge driving circuit.

[0145] Based on the same inventive concept, the utility model also provides a full-bridge power supply. Fig.15 A schematic diagram of a full-bridge power supply provided in an embodiment of the present application, referring to Fig.15 As shown, the full-bridge power supply includes the wireless charging chip and a power supply module, wherein the power supply module can be used to provide an external voltage Vin in the half-bridge driving circuit.

[0146] The above description is only the preferred embodiment of the utility model, and is not intended to limit the utility model. For those skilled in the art, the utility model can have various modifications and changes. Any modification, equivalent replacement, improvement, etc. made within the spirit and principle of the utility model shall be included in the protection scope of the utility model.

Claims

1. A half-bridge driving circuit, characterized in that: include: Voltage doubler module and half-bridge driver module; The first input end of the voltage doubling module is used to access a preset driving signal, the second input end of the voltage doubling module is used to access a power supply voltage, the output end of the voltage doubling module is connected to the first input end of the half-bridge driving module, and the second input end of the half-bridge driving module is used to access a preset control signal; The output end of the half-bridge driving module is used to output a driving voltage to drive the transmitting end coil; The voltage doubling module is used to double the supply voltage under the action of the driving signal, and output the doubled voltage to the half-bridge driving module.

2. The half-bridge driving circuit according to claim 1, characterized in that: The voltage doubling module comprises: a signal processing unit and a voltage doubling unit; The first input terminal of the signal processing unit is used to access a preset driving signal, and the second input terminal of the signal processing unit is used to access the power supply voltage; The output end of the signal processing unit is connected to the first input end of the voltage doubling unit; The second input end of the voltage doubling unit is used to access the supply voltage, and the output end of the voltage doubling unit is connected to the first input end of the half-bridge driving module.

3. The half-bridge driving circuit according to claim 2, characterized in that: The signal processing unit includes: a digital gate unit and a switch unit; The input end of the digital gate unit is used to access a preset driving signal, the first output end of the digital gate unit is connected to the first input end of the switch unit, and the second output end of the digital gate unit is connected to the second input end of the switch unit; The third input terminal of the switch unit is used to access the supply voltage, and the output terminal of the switch unit is connected to the first input terminal of the voltage doubling unit.

4. The half-bridge driving circuit according to claim 3, characterized in that: The digital gate unit comprises: a first buffer, a second buffer, a third buffer, a fourth buffer, a fifth buffer, a first inverter, a second inverter, an AND gate and a NAND gate; The input end of the first buffer is used to receive the driving signal, and the output end of the first buffer is connected to the input end of the second buffer and the input end of the second inverter; The output end of the second buffer is connected to the second input end of the NAND gate, and the output end of the second inverter is connected to the second input end of the AND gate; The input end of the first inverter is connected to the output end of the fifth buffer and the second input end of the switch unit, the output end of the first inverter is connected to the first input end of the NAND gate, and the output end of the NAND gate is connected to the input end of the third buffer; The output end of the third buffer is connected to the first input end of the switch unit and the input end of the fourth buffer, the output end of the fourth buffer is connected to the first input end of the AND gate, and the output end of the AND gate is connected to the input end of the fifth buffer.

5. The half-bridge driving circuit according to claim 3, characterized in that: The switch unit includes: a first P-channel metal oxide semiconductor field effect transistor and a first N-channel metal oxide semiconductor field effect transistor; The source of the first P-channel metal oxide semiconductor field effect transistor is used to access the power supply voltage, the gate of the first P-channel metal oxide semiconductor field effect transistor is connected to the first output terminal of the digital gate unit, and the drain of the first P-channel metal oxide semiconductor field effect transistor is connected to the drain of the first N-channel metal oxide semiconductor field effect transistor and the first input terminal of the voltage multiplier unit; A gate of the first N-channel metal oxide semiconductor field effect transistor is connected to the second output terminal of the digital gate unit, and a source of the first N-channel metal oxide semiconductor field effect transistor is grounded.

6. The half-bridge driving circuit according to claim 2, characterized in that: The voltage doubling unit includes: a first capacitor and a first diode; One end of the first capacitor is connected to the output end of the signal processing unit, and the other end of the first capacitor is connected to the cathode of the first diode and the first input end of the half-bridge driving module; The anode of the first diode is used to access the supply voltage.

7. The half-bridge driving circuit according to claim 2, characterized in that: The voltage doubling module further includes: a voltage stabilizing unit; the voltage stabilizing unit includes: a second capacitor and a second diode; An anode of the second diode is connected to the output end of the voltage doubling unit, and a cathode of the second diode is connected to one end of the second capacitor and to the first input end of the half-bridge driving module; The other end of the second capacitor is grounded.

8. The half-bridge driving circuit according to claim 1, characterized in that: The half-bridge driving module is a half-bridge driving module based on BOOST, BUCK, or BUCK+BOOST.

9. A wireless charging chip, characterized in that: It comprises the half-bridge drive circuit and control module as described in any one of claims 1 to 8.

10. A full-bridge power supply, characterized in that: It comprises the wireless charging chip and power supply module as claimed in claim 9.

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