Power management controller and vehicle-mounted power domain system

Abstract

The utility model relates to a power management controller and a vehicle-mounted power domain system, and relates to the technical field of automobiles, and the power management controller reduces the cost by replacing a power chip on the premise of not influencing the function. The power management controller comprises a power management chip, a plurality of direct current conversion chips, a plurality of voltage stabilization chips and a plurality of driving chips. The power management chip comprises a plurality of output ends, and the input end of the power management chip is electrically connected with the battery; the plurality of first output ends are electrically connected with the first input end of the main control chip; the direct current conversion chip comprises a first direct current conversion chip and a second direct current conversion chip; the input end of the voltage stabilizing chip is electrically connected with the battery, and the output end of the voltage stabilizing chip is electrically connected with the peripheral circuit or is electrically connected with the third input end of the main control chip; the input end of the driving chip is electrically connected with the battery, and the output end of the driving chip is electrically connected with the peripheral circuit.

Description

Technical Field

[0001] The present application relates to the field of automobile technology, in particular to the field of automobile power management technology, and specifically to a power management controller and a vehicle-mounted power domain system. Background Art

[0002] At present, automobile technology is developing faster and faster. With the development and progress of interconnection technology, automotive electronic systems are developing rapidly and gradually becoming an important part of automobiles. Due to the increasing demand and usage scenarios, the number of controllers in the vehicle is also increasing. However, with the development of automotive electronic technology, integration has become a major trend, various domain controllers are being vigorously developed, and domain controllers have become the development direction of more and more car manufacturers.

[0003] In the existing technology, especially in new energy vehicles, there are many integrated functions and power supply requirements. Therefore, how to allocate and solve the internal power supply and monitor the internal circuit status is crucial. Utility Model Content

[0004] The present application provides a power management controller and a vehicle-mounted power domain system, which reduces costs by replacing power chips without affecting functions. The technical solution of the present application is as follows:

[0005] According to the first aspect involved in the present application, a power management controller is provided, which includes: a power management chip, multiple DC conversion chips, multiple voltage stabilizing chips, and multiple driving chips; the power management chip includes multiple output terminals, and the input terminal of the power management chip is electrically connected to the battery; the multiple first output terminals are electrically connected to the first input terminal of the main control chip; the DC conversion chip includes: a first DC conversion chip and a second DC conversion chip; the input terminal of the first DC conversion chip is electrically connected to the battery; the output terminal of the first DC conversion chip is electrically connected to the second input terminal of the main control chip, and is also electrically connected to the peripheral circuit; the input terminal of the second DC conversion chip is electrically connected to the second output terminal of the power management chip; the output terminal of the second DC conversion chip is electrically connected to the peripheral circuit; the input terminal of the voltage stabilizing chip is electrically connected to the battery, and the output terminal of the voltage stabilizing chip is electrically connected to the peripheral circuit, or is electrically connected to the third input terminal of the main control chip; the input terminal of the driving chip is electrically connected to the battery, and the output terminal of the driving chip is electrically connected to the peripheral circuit; wherein the load current capability of the driving chip is better than the load current capability of the DC conversion chip.

[0006] According to the above technical means, the present application provides a power management controller, which reduces costs by replacing power chips. The power chip in the prior art is generally a DC-DC chip, but the cost of the chip is relatively high, and the required current is different for different peripheral circuits, and the current carrying capacity of the DC-DC chip is relatively small; the replaced driver chip is not only lower in cost than the DC-DC chip, but also has a larger current carrying capacity, and can realize the above power management controller function and supply power to the peripheral circuits. Therefore, replacing multiple DC-DC chips with other power chips can further reduce costs and improve utilization.

[0007] In a possible implementation, the peripheral circuit includes: a resolver circuit; an output end of a first DC conversion chip is electrically connected to a first input end of the resolver circuit, and an output end of a second DC conversion chip is electrically connected to a second input end of the resolver circuit.

[0008] According to the above technical means, the first DC conversion chip in the present application supplies 5V power to the resolver circuit, and the second DC conversion chip supplies 15V power to the resolver circuit.

[0009] In a possible implementation, the peripheral circuit also includes: a first current sensing circuit; a plurality of voltage stabilizing chips include: a first voltage stabilizing chip and a second voltage stabilizing chip; an input end of the first voltage stabilizing chip is electrically connected to a battery, and an output end of the first voltage stabilizing chip is electrically connected to the first current sensing circuit; an input end of the second voltage stabilizing chip is electrically connected to the battery, and an output end of the second voltage stabilizing chip is electrically connected to a third input end of the main control chip.

[0010] According to the above technical means, in the present application, the first voltage stabilizing chip supplies 5V to the first current sensing circuit, and the second voltage stabilizing chip supplies power to the main control chip.

[0011] In a possible implementation, the peripheral circuit further includes: a power brick circuit and a second current sensing circuit; the multiple driver chips include: a first driver chip and a second driver chip; the input end of the first driver chip is electrically connected to the battery, and the output end of the first driver chip is electrically connected to the power brick circuit; the input end of the second driver chip is electrically connected to the battery, and the output end of the second driver chip is electrically connected to the second current sensing circuit.

[0012] According to the above technical means, in the present application, the first driver chip supplies power to the power brick circuit, and the second driver chip supplies 12V to the second current sensing circuit.

[0013] In a possible implementation, the power management controller further includes: a protection circuit; an input end of the protection circuit is electrically connected to the battery, and an output end of the protection circuit is electrically connected to an input end of the chip.

[0014] According to the above technical means, the protection circuit in the present application is an anti-reverse circuit to prevent current backflow.

[0015] In a possible implementation, the power management controller further includes: a first filter circuit; an input end of the first filter circuit is electrically connected to an output end of the protection circuit, and an output end of the first filter circuit is electrically connected to the power management chip.

[0016] According to the above technical means, the first filtering circuit in the present application filters out clutter from the battery voltage.

[0017] In a possible implementation, the enable end of the main control chip is electrically connected to the control end of multiple DC conversion chips, the control end of multiple voltage stabilizing chips, and the control end of multiple driver chips; the main control chip is configured to control the switching of multiple DC conversion chips, multiple voltage stabilizing chips, and multiple driver chips.

[0018] According to the above technical means, the main control chip enables all power chips to remain in the sleep state in the sleep state, thereby greatly reducing the sleep current.

[0019] According to the second aspect of the present application, a vehicle-mounted power domain system is provided, which includes: the above-mentioned power management controller, peripheral circuits and detection circuits; the peripheral circuits are electrically connected to the power management controller; and the detection circuits are electrically connected to the peripheral circuits.

[0020] In a possible implementation, the detection circuit includes: a first resistor, a second resistor, a third resistor, a fourth resistor, a first transistor and a second transistor; the control end of the first transistor is electrically connected to the second end of the third resistor, and is also electrically connected to the first end of the fourth resistor; the first end of the first transistor is electrically connected to the second end of the second resistor, and is also electrically connected to the control end of the second transistor; the first end of the first transistor is electrically connected to the ground end; the first end of the second transistor is electrically connected to the second end of the first resistor, the first end of the second resistor and the first end of the third resistor, the second end of the second transistor is electrically connected to the detection end of the detection circuit, and is also electrically connected to the second end of the fourth resistor and the peripheral circuit; the first end of the first resistor is electrically connected to the power supply end.

[0021] In a possible implementation, the detection circuit also includes: a first capacitor, a second capacitor and a third capacitor; the first end of the first capacitor is electrically connected to the power supply end, and is also electrically connected to the first end of the first resistor, and the second end of the first capacitor is electrically connected to the ground end; the first end of the second capacitor is electrically connected to the first end of the first resistor, and the second end of the second capacitor is electrically connected to the second end of the first resistor; the first end of the third capacitor is electrically connected to the first end of the first transistor, and the second end of the third capacitor is electrically connected to the ground end.

[0022] Therefore, the above technical features of the present application have the following beneficial effects:

[0023] (1) The power chip replaced in this application will not reduce the functionality of the power management controller, thereby further reducing costs.

[0024] (2) The detection circuit added in the present application can determine the working status of the peripheral circuit through the detection voltage at the detection end, and can quickly locate the cause of the fault when a fault occurs.

[0025] It should be understood that the foregoing general description and the following detailed description are exemplary and explanatory only and are not restrictive of the present application. BRIEF DESCRIPTION OF THE DRAWINGS

[0026] The drawings herein are incorporated into the specification and constitute a part of the specification, illustrate embodiments consistent with the present application, and together with the specification are used to explain the principles of the present application, and do not constitute improper limitations on the present application.

[0027] Figure 1 is a system block diagram of a power management controller according to some embodiments;

[0028] Figure 2 is a system block diagram of another power management controller according to some embodiments;

[0029] Figure 3 is a schematic diagram of the architecture of a vehicle-mounted power domain system according to some embodiments;

[0030] Figure 4 is a structural block diagram of a vehicle-mounted power domain system according to some embodiments;

[0031] Figure 5 is a circuit diagram of a detection circuit according to some embodiments. DETAILED DESCRIPTION

[0032] In order to enable ordinary persons in the art to better understand the technical solution of the present application, the technical solution in the embodiments of the present application will be clearly and completely described below in conjunction with the accompanying drawings.

[0033] It should be noted that the terms "first", "second", etc. in the specification and claims of the present application and the above-mentioned drawings are used to distinguish similar objects, and are not necessarily used to describe a specific order or sequence. It should be understood that the data used in this way can be interchangeable where appropriate, so that the embodiments of the present application described herein can be implemented in an order other than those illustrated or described herein. The embodiments described in the following exemplary embodiments do not represent all embodiments consistent with the present application. On the contrary, they are merely examples of devices and methods consistent with some aspects of the present application as detailed in the attached claims.

[0034] At present, automobile technology is developing faster and faster. With the development and progress of interconnection technology, automotive electronic systems are developing rapidly and gradually becoming an important part of automobiles. Due to the increasing demand and usage scenarios, the number of controllers in the vehicle is also increasing. However, with the development of automotive electronic technology, integration has become a major trend, various domain controllers are being vigorously developed, and domain controllers have become the development direction of more and more car manufacturers.

[0035] In the existing technology, especially in new energy vehicles, there are many integrated functions and power supply requirements. Therefore, how to allocate and solve the internal power supply and monitor the internal circuit status is crucial.

[0036] In order to overcome the complex structure of the current vehicle power domain system with multiple integrations and multiple control signals, using multiple power sources and multiple distribution branches, a power system is built to clearly construct the direction and distribution of power, maximize the efficiency of power utilization, and at the same time cover the power supply needs of peripheral modules to the greatest extent, without affecting the function, to achieve the goal of saving costs and improving efficiency.

[0037] Based on this, the present application provides a power management controller. Figure 1 As shown, the power management controller 100 includes: a power management chip 10 , a plurality of DC conversion chips 20 , a plurality of voltage stabilizing chips 30 and a plurality of driving chips 40 .

[0038] The power management chip 10 includes a plurality of output terminals 102 . The input terminal 101 of the power management chip 10 is electrically connected to the battery 50 . The plurality of first output terminals 1021 are electrically connected to the first input terminal 601 of the main control chip 60 .

[0039] The DC conversion chip 20 includes a first DC conversion chip 21 and a second DC conversion chip 22 .

[0040] The input end of the first DC conversion chip 21 is electrically connected to the battery 50 ; the output end of the first DC conversion chip 21 is electrically connected to the second input end 602 of the main control chip 60 , and is also electrically connected to the peripheral circuit 80 .

[0041] The input end of the second DC conversion chip 22 is electrically connected to the second output end 1022 of the power management chip 10 ; the output end of the second DC conversion chip 22 is electrically connected to the peripheral circuit 80 .

[0042] The input end of the voltage stabilizing chip 30 is electrically connected to the battery 50 , and the output end of the voltage stabilizing chip 30 is electrically connected to the peripheral circuit 80 , or is electrically connected to the third input end 603 of the main control chip 60 .

[0043] An input terminal of the driving chip 40 is electrically connected to the battery 50 , and an output terminal of the driving chip 40 is electrically connected to the peripheral circuit 80 .

[0044] In some embodiments, the first DC conversion chip 21 is a BUCK chip, the second DC conversion chip 22 is a BOOST chip, the voltage regulator chip 30 is an LDO (low dropout regulator) chip, and the driver chip 40 is an HSD (High Side Driver) chip.

[0045] The battery 50 supplies power to the power management chip 10. At the same time, the battery also supplies power to the DC conversion chip 20, the voltage stabilizing chip 30 and the driver chip 40. The DC conversion chip 20, the voltage stabilizing chip 30 and the driver chip 40 are all power chips that play a role in regulating voltage and current.

[0046] The first DC conversion chip 21 plays a role in stepping down the voltage. For example, the battery 50 provides a voltage of 12V, and some peripheral circuits 80 require a voltage of 5V. At this time, the first DC conversion chip 21 is required to convert the 12V voltage into a voltage of 5V and provide it to the peripheral circuits.

[0047] The second DC conversion chip 22 plays a role in boosting voltage. For example, the battery 50 provides a voltage of 12V, and some peripheral circuits 80 require a voltage of 18V. At this time, the first DC conversion chip 21 is required to convert the 12V voltage into a voltage of 18V and provide it to the peripheral circuits.

[0048] The voltage provided by the voltage stabilizing chip 30 is more stable. For example, it provides a stable voltage to the main control chip, thereby further enabling the main control chip to work normally.

[0049] The current carrying capacity of the driver chip 40 is relatively high, and can provide a stable rated current for the peripheral circuit. The current carrying capacity of the driver chip 40 is better than that of the DC conversion chip 20. The current carrying capacity mainly depends on its internal resistance and design parameters. The lower the internal resistance, the greater the load that can be carried and the higher the rated current. In other words, the current carrying capacity of the driver chip 40 can be improved by optimizing its internal resistance to meet the needs of different loads. For example, some peripheral circuits require a large current, which can be provided by the driver chip 40.

[0050] It should be noted that both BOOST chip and BUCK chip are DC-DC chips and play different roles.

[0051] The power management controller in the prior art is mainly composed of DC-DC chips and some voltage stabilizing chips, while in the present application, some DC-DC chips are replaced with driver chips. For example, if the same number of replacements are made, the load current capacity can be further improved. At the same time, when the driver chip is an HSD chip, the cost of the HSD chip is lower than that of the DC-DC chip, so replacing some DC-DC chips with the same number of driver chips can reduce costs.

[0052] Among them, the BUCK chip is a common step-down circuit, which is mainly used to convert high voltage into low voltage for stable operation of electronic equipment. This circuit is widely used in the field of power supply, especially in providing stable power supply to electronic equipment. The working principle of the BUCK chip is to control the working mode of the circuit by controlling the on and off of the MOSFET, as well as periodic switching, so as to achieve the purpose of stable step-down output. This type of circuit is usually composed of a switch tube, a power MOS tube, a diode, a power inductor and an input / output filter capacitor.

[0053] A BOOST chip is a semiconductor device used for voltage conversion, and its main function is to boost the input voltage to a higher output voltage. This chip is widely used in various electronic devices, such as LED drivers, wireless communication modules, and portable devices. The design of a BOOST chip usually includes internal MOSFET and inductor components, which achieve voltage boosting through inductor charging and discharging. Some BOOST chips also have built-in loop compensation and overvoltage protection functions to improve system stability and safety.

[0054] LDO chip, that is, low dropout linear regulator, is a special power management device, mainly used to provide a stable DC output voltage. This chip usually has the characteristics of low noise, low quiescent current and few peripheral components. They are widely used in occasions where low noise is required, such as the power supply of clock PLL, the power supply of RF devices, and the power supply of analog parts. The application areas of LDO chips include portable electronic devices (such as smart phones, tablets, portable audio players, etc.), automotive battery-powered systems, and other applications that require low power consumption and high transient response. These application scenarios require LDO chips to be able to maintain stability between input voltage and output voltage while providing low noise and high stability.

[0055] The HSD chip is a high-performance graphics processor designed for vehicle electronic systems, mainly used in body controllers. In addition, the HSD chip has been widely used in the control of small current loads in vehicles. When a single-circuit short circuit occurs, its protection action speed is much faster than that of a fuse, and it is safer. From a technical point of view, the HSD chip has rated current, current limiting parameters and temperature characteristics, which are one of its core characteristics. At the same time, the HSD chip is also used in intelligent power distribution technology, that is, using MOSFET and other chip products to replace traditional relay fuses to protect the corresponding equipment.

[0056] In some embodiments, the battery voltage is 12V, and the peripheral circuits are powered by the multiple power chips mentioned above. For those with insufficient load capacity, other voltage regulating chips can be appropriately connected externally.

[0057] Based on the above scheme, the present application provides a power management controller, which reduces costs by replacing power chips. The power chip in the prior art is generally a DC-DC chip, but the cost of the chip is relatively high, and the required current is different for different peripheral circuits, and the current carrying capacity of the DC-DC chip is relatively small; the replaced driver chip is not only lower in cost than the DC-DC chip, but also has a larger current carrying capacity, and can realize the above power management controller function and power the peripheral circuits. Therefore, replacing multiple DC-DC chips with other power chips can further reduce costs and improve utilization.

[0058] In a possible implementation, Figure 2 As shown, the peripheral circuit 80 includes a resolver circuit 81 . The output end of the first DC conversion chip 21 is electrically connected to the first input end of the resolver circuit 81 , and the output end of the second DC conversion chip 22 is electrically connected to the second input end of the resolver circuit 81 .

[0059] The first DC conversion chip 21 in the present application supplies 5V power to the resolver circuit, and the second DC conversion chip 22 supplies 15V power to the resolver circuit 81. The first DC conversion chip 21 also supplies power to the CAN chip.

[0060] In a possible implementation, Figure 2 As shown, the peripheral circuit 80 also includes: a first current sensing circuit 82.

[0061] The multiple voltage stabilizing chips 30 include: a first voltage stabilizing chip 31 and a second voltage stabilizing chip 32; the input end of the first voltage stabilizing chip is electrically connected to the battery, and the output end of the first voltage stabilizing chip 31 is electrically connected to the first current sensing circuit 82; the input end of the second voltage stabilizing chip 32 is electrically connected to the battery 50, and the output end of the second voltage stabilizing chip 32 is electrically connected to the third input end 603 of the main control chip 60.

[0062] Among them, in the present application, the first voltage stabilizing chip supplies 5V to the first current sensing circuit, and the second voltage stabilizing chip supplies power to the main control chip.

[0063] In some embodiments, the number of the plurality of voltage stabilizing chips 30 is two.

[0064] In a possible implementation manner, the peripheral circuit 80 further includes: a power brick circuit 83 and a second current sensing circuit 84 .

[0065] The plurality of driving chips 40 include a first driving chip 41 and a second driving chip 42 .

[0066] The input end of the first driver chip 41 is electrically connected to the battery 50 , and the output end of the first driver chip 41 is electrically connected to the power brick circuit 83 ; the input end of the second driver chip 42 is electrically connected to the battery 50 , and the output end of the second driver chip 42 is electrically connected to the second current sensing circuit 84 .

[0067] In this application, the first driver chip 41 supplies power to the power brick circuit, and the second driver chip 42 supplies 12V to the second current sensing circuit. The driver chip 40 is suitable for peripheral circuits with high load current requirements.

[0068] In some embodiments, the number of the plurality of voltage stabilizing chips 30 is two.

[0069] In a possible implementation, the power management controller 100 further includes: a protection circuit 90; an input end of the protection circuit 90 is electrically connected to the battery 50, and an output end of the protection circuit 90 is electrically connected to an input end of the above-mentioned part of the chips.

[0070] Among them, the protection circuit in this application is an anti-reverse circuit to prevent current backflow.

[0071] In a possible implementation manner, the power management controller 100 further includes: a first filtering circuit 70 .

[0072] An input end of the first filter circuit 70 is electrically connected to an output end of the protection circuit 90 , and an output end of the first filter circuit 70 is electrically connected to the power management chip 10 .

[0073] Among them, the first filter circuit 70 in the present application filters out clutter from the voltage of the battery 50 .

[0074] In some embodiments, the first filter circuit 70 includes: a first inductor L1 . A first end of the first inductor L1 is connected to an input end of the first filter circuit 70 , and a second end of the first inductor L1 is connected to an output end of the first filter circuit 70 .

[0075] It should be noted that the power supply for other acquisition signals and other wake-up signals of the peripheral circuit can be redistributed after the main power supply demand is allocated, while ensuring a 20% load margin.

[0076] In a possible implementation manner, the enable terminal EN of the main control chip 60 is electrically connected to the control terminals of the plurality of DC conversion chips 20 , the control terminals of the plurality of voltage stabilizing chips 30 , and the control terminals of the plurality of driving chips 40 .

[0077] The main control chip 60 is configured to control the switching of multiple DC conversion chips, multiple voltage stabilizing chips and multiple driving chips.

[0078] That is to say, the main control chip enables all power chips to remain in sleep mode in the sleep state, which can greatly reduce the sleep current.

[0079] It should be noted that the multiple first output terminals 1021 of the power management chip 10 are different, and correspondingly output different voltages to provide voltages for different functional modules on the main control chip 60 .

[0080] In some embodiments, the peripheral circuit 80 further includes: a local interconnect network circuit; the local interconnect network circuit is connected to the first output terminal 1021 of the power management chip 10 .

[0081] Among them, Local Interconnect Network (LIN) is a low-cost serial communication network used to realize distributed electronic system control in automobiles. The goal of LIN is to provide auxiliary functions for existing automobile networks (such as CAN bus), so LIN bus is an auxiliary bus network.

[0082] Reference Figure 3 , which is a simple functional architecture of the power domain system. This power domain system integrates shifter control and signal acquisition, collision system signal acquisition, acceleration / brake pedal signal acquisition, AC / DC charging signal acquisition, cruise control switch signal acquisition, alcohol lock status acquisition, oil pressure alarm, switch indicator light drive, fuel pump signal acquisition, water pump signal control, power brick power supply, BMS current sensor power supply, inverter brick power supply, motor and resolver signal acquisition, eddy current sensor power supply, IPU power brick control signal, etc. The battery-powered KL30 enters the internal power distribution and converts the level to power each module inside the motor; at the same time, the internal power supply also powers the main control chip. The controller communicates with the main control chip through the CAN bus to realize the internal functions of the power domain system, such as acquisition and control signals.

[0083] like Figure 4As shown, the present application also provides a vehicle-mounted power domain system 200, which includes: the power management controller 100, the peripheral circuit 80 and the detection circuit 150. The peripheral circuit 80 is electrically connected to the power management controller 100; the detection circuit 150 is electrically connected to the peripheral circuit 80.

[0084] like Figure 5 As shown, the detection circuit 150 includes: a first resistor R1, a second resistor R2, a third resistor R3, a fourth resistor R4, a first transistor Q1 and a second transistor Q2.

[0085] The control end of the first transistor Q1 is electrically connected to the second end of the third resistor R3, and is also electrically connected to the first end of the fourth resistor R4; the first end of the first transistor Q1 is electrically connected to the second end of the second resistor R2, and is also electrically connected to the control end of the second transistor; the first end of the first transistor Q1 is electrically connected to the ground end GND.

[0086] The first end of the second transistor Q2 is electrically connected to the second end of the first resistor R1, the first end of the second resistor R2 and the first end of the third resistor R3. The second end of the second transistor is electrically connected to the detection end of the detection circuit, and is also electrically connected to the second end of the fourth resistor R4 and the peripheral circuit.

[0087] A first end of the first resistor R1 is electrically connected to the power supply terminal VDD.

[0088] The first resistor R1 , the third resistor R3 , and the fourth resistor R4 are configured for voltage division, and the second resistor R2 is configured for current limiting.

[0089] The detection circuit 150 further includes: a first capacitor C1, a second capacitor C2 and a third capacitor C3;

[0090] A first end of the first capacitor C1 is electrically connected to the power supply terminal VDD, and is also electrically connected to the first end of the first resistor R1, and a second end of the first capacitor C1 is electrically connected to the ground terminal;

[0091] A first end of the second capacitor C2 is electrically connected to the first end of the first resistor R1, and a second end of the second capacitor C2 is electrically connected to the second end of the first resistor R1;

[0092] A first end of the third capacitor C3 is electrically connected to the first end of the first transistor Q1 , and a second end of the third capacitor C3 is electrically connected to the ground end GND.

[0093] The first capacitor C1 is configured for filtering, and the voltage outputted by the power supply terminal VDD passes through the first capacitor C1, and noise is filtered out by the first capacitor C1.

[0094] In some embodiments, the first transistor is an NPN transistor, and the second transistor is a PMOS transistor.

[0095] In some embodiments, for example, the power supply voltage of the power supply terminal VDD is 3.3V, the equivalent impedance of the circuit to be tested in the peripheral circuit is 300Ω, its normal operating voltage range is 3~5V, and its normal operating current range is 8~30mA; the resistance value of the first resistor is 10Ω, the resistance value of the second resistor is 10k, the resistance value of the third resistor is 30k, and the resistance value of the fourth resistor is 20k.

[0096] If the circuit to be tested is normal, the voltage of the base of the first transistor Q1 is the voltage divided by the load and the first resistor R1, the third resistor R3 and the fourth resistor R4 (generally speaking, the base voltage needs to be greater than 0.7V). Since the voltage between the first resistor R1 and the load is relatively small, the voltage divided at this time is the voltage divided by the third resistor R3 and the fourth resistor R4, 3.3V×0.4=1.32V, and the first transistor Q1 is turned on. Since the emitter of the first transistor Q1, that is, the second end, is grounded, after the first transistor Q1 is turned on, the first end of the first transistor Q1 is the ground voltage, that is, the low voltage.

[0097] The control end of the second transistor Q2 receives a low voltage and turns on. At this time, the voltage at the detection end is the voltage after the voltage is stepped down by the first resistor R1 (the internal resistance of the PMOS after the conduction is small and can be ignored). At this time, the voltage range of the detection end falls between 3V and 3.22V, and its calculation formula is: VDD-R1×Imin≤V≤VDD-R1×Imax (but less than 3.3V). Therefore, when the detection voltage of the detection end is detected to be within the above range, it means that the circuit is working normally.

[0098] If the circuit to be tested is open, the voltage of the base of the first transistor Q1 is the voltage divided by the load and the first resistor R1, the third resistor R3 and the fourth resistor R4 (generally speaking, the base voltage needs to be greater than 0.7V). Since the voltage between the first resistor R1 and the load is relatively small, the voltage divided at this time is the voltage divided by the third resistor R3 and the fourth resistor R4, 3.3V×0.4=1.32V, and the first transistor Q1 is turned on. Since the emitter of the first transistor Q1, that is, the second end, is grounded, after the first transistor Q1 is turned on, the first end of the first transistor Q1 is the ground voltage, that is, a low voltage.

[0099] The control end of the second transistor Q2 receives a low voltage and turns on, but since the circuit to be tested is open at this time, there is no voltage drop across the first resistor R1, and the detection voltage at the detection end is 3.3 V. Therefore, when the detection voltage at the detection end is detected to be 3.3 V, it indicates that the circuit is open.

[0100] If the circuit to be tested is short-circuited, the voltage of the base of the first transistor Q1 is 0 V. At this time, the first transistor Q1 is turned off, and the second transistor Q2 is turned off, and the detection voltage of the detection end is 0 V. Therefore, when the detection voltage of the detection end is detected to be 0 V, it indicates that the circuit is short-circuited.

[0101] The detection circuit can determine the working status of the peripheral circuit through the detection voltage at the detection end, and can quickly locate the cause of the fault when a fault occurs.

[0102] It should be noted that the power supply and the first resistor R1 here need to be adjusted according to the power supply requirements of the peripheral circuit and the normal working current requirements. The calculation formula of the first resistor R1 is: R1 = (VDD-Vload) / Iload.

[0103] Among them, Vload refers to the operating voltage of the peripheral circuit, and Iload refers to the operating current of the peripheral circuit.

[0104] In some embodiments, the detection circuit further includes: a second inductor L2, a first end of the second inductor L2 is electrically connected to the detection end of the detection circuit, a second end of the second inductor L2 is electrically connected to the peripheral circuit, and the second inductor L2 is configured to filter out clutter.

[0105] The above are only specific implementations of the present application, but the protection scope of the present application is not limited thereto, and any changes or substitutions within the technical scope disclosed in the present application should be included in the protection scope of the present application. Therefore, the protection scope of the present application should be based on the protection scope of the claims.

Claims

1. A power management controller, characterized in that: The power management controller comprises: A power management chip; the power management chip comprises a plurality of output terminals, the input terminal of the power management chip is electrically connected to a battery; the plurality of output terminals are electrically connected to a first input terminal of a main control chip; A plurality of DC conversion chips, wherein the DC conversion chips include: A first DC conversion chip, wherein the input end of the first DC conversion chip is electrically connected to the battery; the output end of the first DC conversion chip is electrically connected to the second input end of the main control chip, and is also electrically connected to the peripheral circuit; A second DC conversion chip, wherein the input end of the second DC conversion chip is electrically connected to the second output end of the power management chip; and the output end of the second DC conversion chip is electrically connected to the peripheral circuit; A plurality of voltage stabilizing chips, wherein the input end of the voltage stabilizing chip is electrically connected to the battery, and the output end of the voltage stabilizing chip is electrically connected to the peripheral circuit, or is electrically connected to the third input end of the main control chip; A plurality of driving chips, wherein the input end of the driving chip is electrically connected to the battery, and the output end of the driving chip is electrically connected to the peripheral circuit; Among them, the current carrying capacity of the driving chip is better than the current carrying capacity of the DC conversion chip.

2. The power management controller according to claim 1, characterized in that: The peripheral circuit includes: a resolver circuit; The output end of the first DC conversion chip is electrically connected to the first input end of the resolver circuit, and the output end of the second DC conversion chip is electrically connected to the second input end of the resolver circuit.

3. The power management controller according to claim 1, characterized in that: The peripheral circuit further includes: a first current sensing circuit; the plurality of voltage stabilizing chips include: A first voltage stabilizing chip, wherein an input end of the first voltage stabilizing chip is electrically connected to the battery, and an output end of the first voltage stabilizing chip is electrically connected to the first current sensing circuit; A second voltage stabilizing chip, wherein an input end of the second voltage stabilizing chip is electrically connected to the battery, and an output end of the second voltage stabilizing chip is electrically connected to a third input end of the main control chip.

4. The power management controller according to claim 1, characterized in that: The peripheral circuit further includes: a power brick circuit and a second current sensing circuit; the plurality of driver chips include: a first driver chip, wherein an input end of the first driver chip is electrically connected to the battery, and an output end of the first driver chip is electrically connected to the power brick circuit; A second driving chip, wherein an input end of the second driving chip is electrically connected to the battery, and an output end of the second driving chip is electrically connected to the second current sensing circuit.

5. The power management controller according to any one of claims 1 to 4, characterized in that: The power management controller further includes: a protection circuit; The input end of the protection circuit is electrically connected to the battery, and the output end of the protection circuit is electrically connected to the input end of the chip.

6. The power management controller according to claim 5, characterized in that: The power management controller further includes: a first filtering circuit; The input end of the first filter circuit is electrically connected to the output end of the protection circuit, and the output end of the first filter circuit is electrically connected to the power management chip.

7. The power management controller according to claim 1, characterized in that: The enabling end of the main control chip is electrically connected to the control ends of the plurality of DC conversion chips, the control ends of the plurality of voltage stabilizing chips and the control ends of the plurality of driving chips; The main control chip is configured to control the switching of the plurality of DC conversion chips, the plurality of voltage stabilizing chips and the plurality of driving chips.

8. A vehicle-mounted power domain system, characterized in that: The vehicle-mounted power domain system includes: The power management controller according to any one of claims 1 to 7; a peripheral circuit, the peripheral circuit being electrically connected to the power management controller; A detection circuit is electrically connected to the peripheral circuit.

9. The vehicle-mounted power domain system according to claim 8, characterized in that: The detection circuit comprises: a first resistor, a second resistor, a third resistor, a fourth resistor, a first transistor and a second transistor; The control end of the first transistor is electrically connected to the second end of the third resistor and is also electrically connected to the first end of the fourth resistor; the first end of the first transistor is electrically connected to the second end of the second resistor and is also electrically connected to the control end of the second transistor; the first end of the first transistor is electrically connected to the ground end; The first end of the second transistor is electrically connected to the second end of the first resistor, the first end of the second resistor and the first end of the third resistor, the second end of the second transistor is electrically connected to the detection end of the detection circuit, and is also electrically connected to the second end of the fourth resistor and the peripheral circuit; The first end of the first resistor is electrically connected to the power supply end.

10. The vehicle-mounted power domain system according to claim 9, characterized in that: The detection circuit also includes: a first capacitor, a second capacitor and a third capacitor; A first end of the first capacitor is electrically connected to the power supply end and is also electrically connected to a first end of the first resistor, and a second end of the first capacitor is electrically connected to the ground end; A first end of the second capacitor is electrically connected to a first end of the first resistor, and a second end of the second capacitor is electrically connected to a second end of the first resistor; A first end of the third capacitor is electrically connected to the first end of the first transistor, and a second end of the third capacitor is electrically connected to the ground end.

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