Pulse signal shaping circuit, pulse signal generating system and electronic equipment

Abstract

The utility model relates to a pulse signal shaping circuit, a pulse signal generation system and electronic equipment. The pulse signal shaping circuit comprises a reference level generation circuit, a comparison circuit and a multiplier, the input end of the reference level generation circuit is connected with the pulse signal generator, the output end of the reference level generation circuit is connected with the first input end of the comparison circuit, the second input end of the comparison circuit is connected with the pulse signal generator, and the output end of the comparison circuit is connected with the first input end of the multiplier. The second input end of the multiplier is connected with the pulse signal generator. According to the technical scheme provided by the invention, the original pulse signal is processed, the original pulse signal is converted into the shaped pulse signal, and the trailing phenomenon of the pulse signal is eliminated.

Description

Technical Field

[0001] The present application relates to the field of signal processing technology, and in particular to a pulse signal shaping circuit, a pulse signal generating system and an electronic device. Background Art

[0002] The communication module is the communication channel between the variable frequency drive board, the main control board and the UART (Universal Asynchronous Receiver / Transmitter) device. It is an important module to ensure fast and accurate communication between the upper computer and the lower computer.

[0003] In the communication module, the pulse signal generated by the pulse signal generator may have a certain tailing phenomenon. The pulse signal with the tailing phenomenon will further cause inter-symbol interference, thereby affecting the reliability of the communication module during communication. Utility Model Content

[0004] The present application provides a pulse signal shaping circuit, a pulse signal generating system and an electronic device to eliminate the tailing phenomenon of a pulse signal.

[0005] In a first aspect, the present application provides a pulse signal shaping circuit, the pulse signal shaping circuit comprising a reference level generating circuit, a comparison circuit and a multiplier;

[0006] The input end of the reference level generating circuit is connected to the pulse signal generator, the output end of the reference level generating circuit is connected to the first input end of the comparison circuit, the second input end of the comparison circuit is connected to the pulse signal generator, the output end of the comparison circuit is connected to the first input end of the multiplier, and the second input end of the multiplier is connected to the pulse signal generator;

[0007] The reference level generating circuit is used to generate a reference level based on the original pulse signal input by the pulse signal generator; wherein the maximum voltage value of the reference level is less than the maximum voltage value of the original pulse signal, and any voltage value of the falling edge of the reference level is greater than any voltage value of the falling edge of the original pulse signal;

[0008] The comparison circuit is used to compare the original pulse signal with the reference level, and output the comparison result to the multiplier; wherein, when the voltage value of the original pulse signal is greater than the voltage value of the reference level, the comparison circuit outputs a high level to the multiplier, and when the voltage value of the original pulse signal is less than the voltage value of the reference level, the comparison circuit outputs 0 to the multiplier;

[0009] The multiplier is used to perform a multiplication operation on the comparison result and the original pulse signal to convert the original pulse signal into a shaped pulse signal.

[0010] In a feasible embodiment of the present application, the pulse signal shaping circuit further includes an amplification circuit;

[0011] The input end of the amplifier circuit is connected to the pulse signal generator, and the output end of the amplifier circuit is respectively connected to the input end of the reference level generating circuit, the second input end of the comparison circuit and the second input end of the multiplier;

[0012] The amplifier circuit is used to amplify the original pulse signal.

[0013] In a feasible embodiment of the present application, the reference level generating circuit includes a first capacitor, a second capacitor, a first resistor, a second resistor, a third resistor, a fourth resistor and a diode;

[0014] One end of the first capacitor is used as the input end of the reference level generating circuit and is connected to the output end of the amplifier circuit, and the other end of the first capacitor is respectively connected to one end of the first resistor, one end of the second resistor and the positive electrode of the diode;

[0015] The other end of the first resistor is respectively connected to a working power supply and one end of the third resistor;

[0016] The other end of the third resistor serves as the output end of the reference level generating circuit and is connected to the first input end of the comparison circuit;

[0017] The cathode of the diode is respectively connected to the other end of the third resistor, one end of the fourth resistor and one end of the second capacitor;

[0018] The other end of the second resistor, the other end of the fourth resistor, and the other end of the second capacitor are all grounded.

[0019] In a feasible embodiment of the present application, the comparison circuit includes a first operational amplifier;

[0020] The inverting input terminal of the first operational amplifier serves as the first input terminal of the comparison circuit and is connected to the output terminal of the reference level generating circuit;

[0021] The non-inverting input terminal of the first operational amplifier serves as the second input terminal of the comparison circuit and is connected to the output terminal of the amplifier circuit;

[0022] The output end of the first operational amplifier is used as the output end of the comparison circuit and is connected to the first input end of the multiplier;

[0023] A first power supply terminal of the first operational amplifier is connected to a working power supply, and a second power supply terminal of the first operational amplifier is grounded.

[0024] In a feasible embodiment of the present application, the comparison circuit further includes a fifth resistor and a sixth resistor;

[0025] One end of the fifth resistor is connected to the output end of the first operational amplifier, the other end of the fifth resistor is respectively connected to the first input end of the multiplier and one end of the sixth resistor, and the other end of the sixth resistor is grounded.

[0026] In a feasible embodiment of the present application, the amplification circuit includes a second operational amplifier;

[0027] The non-inverting input terminal of the second operational amplifier is used as the input terminal of the amplifier circuit and is connected to the pulse signal generator;

[0028] The inverting input terminal of the second operational amplifier is connected to the output terminal of the second operational amplifier;

[0029] The output end of the second operational amplifier serves as the output end of the amplifier circuit and is connected to the input end of the reference level generating circuit;

[0030] A first power supply terminal of the second operational amplifier is connected to a working power supply, and a second power supply terminal of the second operational amplifier is grounded.

[0031] In a feasible embodiment of the present application, the amplifying circuit further includes a seventh resistor, an eighth resistor and a ninth resistor;

[0032] One end of the seventh resistor is respectively connected to the inverting input terminal of the second operational amplifier and one end of the eighth resistor, the other end of the seventh resistor is connected to the output terminal of the second operational amplifier, and the other end of the eighth resistor is grounded;

[0033] One end of the ninth resistor is connected to the pulse signal generator, and the other end of the ninth resistor is connected to the non-inverting input end of the second operational amplifier.

[0034] In a feasible embodiment of the present application, the second operational amplifier is a high-speed operational amplifier.

[0035] In a second aspect, the present application provides a pulse signal generating system, the system comprising a pulse signal generator and a pulse signal shaping circuit as described in any one of the embodiments of the first aspect above;

[0036] The output end of the pulse signal generator is connected to the input end of the pulse signal shaping circuit;

[0037] The pulse signal generator is used to generate an original pulse signal;

[0038] The pulse signal shaping circuit is used to process the original pulse signal, eliminate the trailing edge of the original pulse signal, and output a shaped pulse signal.

[0039] In a third aspect, the present application provides an electronic device, comprising a pulse signal shaping circuit as described in any one of the embodiments of the first aspect above.

[0040] The above technical solution provided by the embodiment of the present application has the following advantages compared with the prior art:

[0041] In the technical solution provided in the present application, the pulse signal shaping circuit includes a reference level generating circuit, a comparison circuit and a multiplier. The input end of the reference level generating circuit is connected to the pulse signal generator, the output end of the reference level generating circuit is connected to the first input end of the comparison circuit, the second input end of the comparison circuit is connected to the pulse signal generator, the output end of the comparison circuit is connected to the first input end of the multiplier, and the second input end of the multiplier is connected to the pulse signal generator.

[0042] The reference level generating circuit is used to generate a reference level based on the original pulse signal input by the pulse signal generator; wherein, the maximum voltage value of the reference level is less than the maximum voltage value of the original pulse signal, and any voltage value of the falling edge of the reference level is greater than any voltage value of the falling edge of the original pulse signal; the comparison circuit is used to compare the original pulse signal with the reference level, and output the comparison result to the multiplier; wherein, when the voltage value of the original pulse signal is greater than the voltage value of the reference level, the comparison circuit outputs a high level to the multiplier, and when the voltage value of the original pulse signal is less than the voltage value of the reference level, the comparison circuit outputs 0 to the multiplier; the multiplier is used to multiply the comparison result with the original pulse signal, and convert the original pulse signal into a shaped pulse signal.

[0043] For the input original pulse signal, the reference level generating circuit generates a reference level based on the original pulse signal, and the reference level changes with the original pulse signal. When the original pulse signal input to the reference level generating circuit is at a high level, the reference level output is a high level, but the maximum voltage value of the reference level is less than the maximum voltage value of the original pulse signal; when the original pulse signal input to the reference level generating circuit is at a falling edge, the reference level output is a low level, but the voltage value at any time of the falling edge of the reference level is less than the voltage value of the falling edge of the original pulse signal.

[0044] By comparing the reference level with the original pulse signal through the comparison circuit, a high level comparison result can be output from the comparison circuit when the original pulse signal is at a high level, and a comparison result of 0 can be output from the comparison circuit when the original pulse signal is at a falling edge.

[0045] The original pulse signal and the comparison result are multiplied by a multiplier, so that when the original pulse signal is at a high level, it is multiplied by the comparison result of the high level, and the original pulse signal is not changed; when the original pulse signal is at a falling edge, it is multiplied by the comparison result of 0, ensuring that the original pulse signal can drop suddenly from a high level to a low level, thereby eliminating the tailing phenomenon.

[0046] The technical solution provided in this application effectively eliminates the tailing phenomenon of the pulse signal. BRIEF DESCRIPTION OF THE DRAWINGS

[0047] The accompanying drawings herein are incorporated in and constitute a part of the specification, illustrate embodiments consistent with the present utility model, and together with the description, are used to explain the principles of the present utility model.

[0048] In order to more clearly illustrate the technical solutions in the embodiments of the utility model or the prior art, the drawings required for use in the embodiments or the description of the prior art will be briefly introduced below. Obviously, for ordinary technicians in this field, other drawings can be obtained based on these drawings without paying any creative labor.

[0049] One or more embodiments are exemplarily described by pictures in the corresponding drawings, and these exemplified descriptions do not constitute limitations on the embodiments. Elements with the same reference numerals in the drawings represent similar elements, and unless otherwise stated, the figures in the drawings do not constitute proportional limitations.

[0050] Figure 1 A schematic diagram of the structure of a pulse signal shaping circuit provided in an embodiment of the present application;

[0051] Figure 2 A connection diagram of a pulse signal shaping circuit provided in an embodiment of the present application;

[0052] Figure 3 A schematic structural diagram of a pulse signal generating system provided in an embodiment of the present application. Description of the drawings:

[0054] 1. Reference level generating circuit; 2. Comparison circuit; 3. Multiplier; 4. Amplification circuit;

[0055] R1, the first resistor; R2, the second resistor; R3, the third resistor; R4, the fourth resistor; R5, the fifth resistor; R6, the sixth resistor; R7, the seventh resistor; R8, the eighth resistor; R9, the ninth resistor; D, the diode; C1, the first capacitor; C2, the second capacitor; U1, the first operational amplifier; U2, the second operational amplifier; VCC, the working power supply; IN, the original pulse signal; OUT, the shaped pulse signal. DETAILED DESCRIPTION

[0056] In order to make the purpose, technical solution and advantages of the embodiments of the present application clearer, the technical solution in the embodiments of the present application will be clearly and completely described below in conjunction with the drawings in the embodiments of the present application. Obviously, the described embodiments are part of the embodiments of the present application, not all of the embodiments. Based on the embodiments in the present application, all other embodiments obtained by ordinary technicians in this field without making creative work are within the scope of protection of this application.

[0057] The disclosure below provides many different embodiments or examples for realizing different structures of the present invention. In order to simplify the disclosure of the present invention, the components and settings of specific examples are described below. Of course, they are only examples, and the purpose is not to limit the present invention. In addition, the present invention may repeat reference numbers and / or letters in different examples. This repetition is for the purpose of simplification and clarity, and does not itself indicate the relationship between the various embodiments and / or settings discussed.

[0058] In order to solve the technical problem that the pulse signal may have a tailing phenomenon in the prior art, the present application provides a pulse signal shaping circuit, a pulse signal generating system and an electronic device, which can eliminate the trailing of the falling edge of the pulse signal.

[0059] Figure 1 A schematic diagram of a pulse signal shaping circuit provided in an embodiment of the present application, referring to Figure 1 , a pulse signal shaping circuit provided in the present application specifically includes:

[0060] A reference level generating circuit 1, a comparison circuit 2 and a multiplier 3;

[0061] The input end of the reference level generating circuit 1 is connected to the pulse signal generator, the output end of the reference level generating circuit 1 is connected to the first input end of the comparison circuit 2, the second input end of the comparison circuit 2 is connected to the pulse signal generator, the output end of the comparison circuit 2 is connected to the first input end of the multiplier 3, and the second input end of the multiplier 3 is connected to the pulse signal generator;

[0062] The reference level generating circuit 1 is used to generate a reference level based on the original pulse signal IN input by the pulse signal generator; wherein the maximum voltage value of the reference level is less than the maximum voltage value of the original pulse signal IN, and any voltage value of the falling edge of the reference level is greater than any voltage value of the falling edge of the original pulse signal IN;

[0063] The comparison circuit 2 is used to compare the original pulse signal IN with the reference level, and output the comparison result to the multiplier 3; wherein, when the voltage value of the original pulse signal IN is greater than the voltage value of the reference level, the comparison circuit 2 outputs a high level to the multiplier 3, and when the voltage value of the original pulse signal IN is less than the voltage value of the reference level, the comparison circuit 2 outputs 0 to the multiplier 3;

[0064] The multiplier 3 is used to perform a multiplication operation on the comparison result and the original pulse signal IN, and convert the original pulse signal IN into a shaped pulse signal OUT.

[0065] Specifically, a pulse signal shaping circuit provided in the present application can be set in a communication module, and can be specifically set between a pulse signal generator in the communication module and an output end of the communication module. The original pulse signal IN output by the pulse signal generator is converted into a shaped pulse signal OUT after being processed by the pulse signal shaping circuit and output from the output end of the communication module.

[0066] The original pulse signal IN output by the pulse signal generator can be divided into three directions.

[0067] In the first aspect, the original pulse signal IN will be input to the reference level generating circuit 1, and converted into the reference level through the processing of the reference level generating circuit 1, and the reference level generating circuit 1 is connected to the comparison circuit 2, and the reference level will be output to the comparison circuit 2. Figure 1 In the example, the reference level is denoted as A.

[0068] In the second aspect, the original pulse signal IN will be input to the comparison circuit 2. After receiving the original pulse signal IN and the reference level, the comparison circuit 2 compares the original pulse signal IN with the reference level and outputs the comparison result. The comparison circuit 2 is connected to the multiplier 3, and the comparison result will be output to the multiplier 3. Figure 1 In the example, the comparison result is recorded as B.

[0069] In the third aspect, the original pulse signal IN will be input to the multiplier 3. After receiving the original pulse signal IN and the comparison result, the multiplier 3 performs a multiplication operation on the original pulse signal IN and the comparison result, and finally outputs a shaped pulse signal OUT.

[0070] For the original pulse signal IN input to the reference level generating circuit 1, the reference level generated by the reference level generating circuit 1 after processing the original pulse signal IN has the following characteristics:

[0071] The reference level changes with the original pulse signal IN, and the reference level has the same changing trend as the original pulse signal IN. When the original pulse signal IN is at a high level, the reference level is also relatively at a high level. When the original pulse signal IN is at a falling edge, the reference level is also relatively at a falling edge (from a high level to a low level). The reference level maintains the maximum voltage value when it is at a high level, and the voltage value of the reference level when it is at a high level is less than the voltage value of the original pulse signal IN when it is at a high level. Any voltage value of the reference level at the falling edge is less than any voltage value of the original pulse signal IN at the falling edge.

[0072] Based on the characteristics of the above-mentioned reference level, the comparison result between the original pulse signal IN input to the comparison circuit 2 and the reference level can be derived.

[0073] Since the voltage value of the reference level when it is at a high level is smaller than the voltage value of the original pulse signal IN when it is at a high level, the comparison result output by the comparison circuit 2 for the high level part of the original pulse signal IN is a high level; since any voltage value of the reference level at the falling edge is smaller than any voltage value of the original pulse signal IN at the falling edge, the comparison result output by the comparison circuit 2 for the falling edge part of the original pulse signal IN is 0.

[0074] Based on the characteristics of the comparison result, it is possible to derive the shaped pulse signal OUT output after the original pulse signal IN input to the multiplier 3 and the comparison result are multiplied.

[0075] Since the comparison result output by the comparison circuit 2 for the high level part of the original pulse signal IN is a high level, the multiplication result of the high level part of the original pulse signal IN and the comparison result is the voltage value of the high level part of the original pulse signal IN; since the comparison result output by the comparison circuit 2 for the falling edge part of the original pulse signal IN is 0, the multiplication result of the falling edge part of the original pulse signal IN and the comparison result is 0.

[0076] Therefore, the high level portion of the shaped pulse signal OUT will be consistent with the high level portion of the original pulse signal IN, and the falling edge of the shaped pulse signal OUT can directly drop from the high level to 0, and there is no tailing phenomenon in the shaped pulse signal OUT.

[0077] In some possible implementation scenarios, if the original pulse signal IN is small, the reference level generating circuit 1 will not be able to output a reference level that meets the conditions well, which will cause the voltage value of the reference level at any time to be greater than the voltage value of the original pulse signal IN at any time.

[0078] In order to solve the problem that the original pulse signal IN is small and affects the generation of the reference level, in a feasible embodiment of the present application, the pulse signal shaping circuit further includes an amplifier circuit 4;

[0079] The input end of the amplifier circuit 4 is connected to the pulse signal generator, and the output end of the amplifier circuit 4 is respectively connected to the input end of the reference level generating circuit 1, the second input end of the comparison circuit 2 and the second input end of the multiplier 3;

[0080] The amplifier circuit 4 is used to amplify the original pulse signal IN.

[0081] Specifically, the amplifier circuit 4 is connected between the pulse signal generator and the reference level generating circuit 1. The original pulse signal IN needs to be amplified by the amplifier circuit 4 before being input into the reference level generating circuit 1, the comparator and the multiplier 3. Figure 1 In the figure, the result after the amplifier circuit 4 processes the original pulse signal IN is recorded as IN1.

[0082] Figure 2 A connection diagram of a pulse signal shaping circuit provided in an embodiment of the present application is shown in FIG. Figure 2 The specific connection method of each device in a pulse signal shaping circuit provided in an embodiment of the present application is described.

[0083] Reference Figure 2 In a feasible embodiment of the present application, the amplifier circuit 4 includes a second operational amplifier U2;

[0084] The non-inverting input terminal of the second operational amplifier U2 is used as the input terminal of the amplifier circuit 4 and is connected to the pulse signal generator;

[0085] The inverting input terminal of the second operational amplifier U2 is connected to the output terminal of the second operational amplifier U2;

[0086] The output end of the second operational amplifier U2 is used as the output end of the amplifier circuit 4 and is connected to the input end of the reference level generating circuit 1;

[0087] A first power supply terminal of the second operational amplifier U2 is connected to a working power supply VCC, and a second power supply terminal of the second operational amplifier U2 is grounded.

[0088] Specifically, the input end of the amplifier circuit 4 is connected to the output end of the pulse signal generator, and the output end of the amplifier circuit 4 is respectively connected to the reference level generating circuit 1, the comparator and the multiplier 3. For the original pulse signal IN input by the pulse signal generator, the amplifier circuit 4 will proportionally amplify the original pulse signal IN and output the amplified signal IN1.

[0089] The original pulse signal IN is input from the non-phase input terminal of the second operational amplifier U2, and the inverting input terminal of the second operational amplifier U2 is connected to the output terminal of the second operational amplifier U2 to form an inverting closed-loop amplifier, and the signal IN1 after amplifying the original pulse signal IN is output at the output terminal of the second operational amplifier U2.

[0090] In order to adjust the amplification factor of the amplifier circuit 4, continue to refer to Figure 2 In a feasible embodiment of the present application, the amplifier circuit 4 further includes a seventh resistor R7, an eighth resistor R8 and a ninth resistor R9;

[0091] One end of the seventh resistor R7 is respectively connected to the inverting input terminal of the second operational amplifier U2 and one end of the eighth resistor R8, the other end of the seventh resistor R7 is connected to the output terminal of the second operational amplifier U2, and the other end of the eighth resistor R8 is grounded;

[0092] One end of the ninth resistor R9 is connected to the pulse signal generator, and the other end of the ninth resistor R9 is connected to the non-inverting input terminal of the second operational amplifier U2.

[0093] Specifically, by adjusting the resistance values ​​of the seventh resistor R7, the eighth resistor R8 and the ninth resistor R9, the amplification factor of the amplifier circuit 4 can be adjusted. The amplification factor of the amplifier circuit 4 can be adjusted by technical personnel in this field according to needs, thereby improving the detection capability of small signals.

[0094] Continue to refer to Figure 2 In a feasible embodiment of the present application, the reference level generating circuit 1 includes a first capacitor C1, a second capacitor C2, a first resistor R1, a second resistor R2, a third resistor R3, a fourth resistor R4 and a diode D;

[0095] One end of the first capacitor C1 is used as the input end of the reference level generating circuit 1 and is connected to the output end of the amplifier circuit 4. The other end of the first capacitor C1 is respectively connected to one end of the first resistor R1, one end of the second resistor R2 and the positive electrode of the diode D.

[0096] The other end of the first resistor R1 is respectively connected to the working power supply VCC and one end of the third resistor R3;

[0097] The other end of the third resistor R3 is used as the output end of the reference level generating circuit 1 and is connected to the first input end of the comparison circuit 2;

[0098] The cathode of the diode D is respectively connected to the other end of the third resistor R3, one end of the fourth resistor R4 and one end of the second capacitor C2;

[0099] The other end of the second resistor R2 , the other end of the fourth resistor R4 , and the other end of the second capacitor C2 are all grounded.

[0100] Specifically, the original pulse signal IN is output after passing through the first capacitor C1 and the diode D. In the process of the original pulse signal IN passing through the reference level generating circuit 1, under the action of the second capacitor C2, the amplitude of the falling edge part of the original pulse signal IN is changed, and the voltage value of the high level part of the original pulse signal IN is changed.

[0101] Based on the characteristic that the voltage across the second capacitor C2 cannot change suddenly, the second capacitor C2 acts as a storage capacitor. When the original pulse signal IN flows through the second capacitor C2, the voltage value of the original pulse signal IN at each moment is dynamically changed, so that the generated reference level is smoother than the original pulse signal IN at the falling edge (which can be understood as increasing the tail time), and at the same time, the reference level is smaller than the voltage value of the original pulse signal IN at a high level.

[0102] The first resistor R1, the second resistor R2, the third resistor R3 and the fourth resistor R4 respectively form two voltage divider circuits to ensure that the diode D can be stably turned on, thereby preventing the current in the reference level generating circuit 1 from flowing in reverse and causing device breakdown.

[0103] Continue to refer to Figure 2 , in a feasible embodiment of the present application, the comparison circuit 2 includes a first operational amplifier U1;

[0104] The inverting input terminal of the first operational amplifier U1 is used as the first input terminal of the comparison circuit 2 and is connected to the output terminal of the reference level generating circuit 1;

[0105] The non-inverting input terminal of the first operational amplifier U1 serves as the second input terminal of the comparison circuit 2 and is connected to the output terminal of the amplifier circuit 4;

[0106] The output terminal of the first operational amplifier U1 is used as the output terminal of the comparison circuit 2 and is connected to the first input terminal of the multiplier 3;

[0107] A first power supply terminal of the first operational amplifier U1 is connected to a working power supply VCC, and a second power supply terminal of the first operational amplifier U1 is grounded.

[0108] Specifically, the reference level is input to the inverting input terminal of the first operational amplifier U1 , the original pulse signal IN is input to the non-inverting input terminal of the first operational amplifier U1 , and the comparison result is output to the output terminal of the first operational amplifier U1 .

[0109] The first operational amplifier U1 is used as the core operation device of the comparison circuit 2 based on the above connection mode. The comparison result outputted at the output terminal of the first operational amplifier U1 has only two values, namely, a high level and 0.

[0110] When the voltage value of the non-inverting input terminal of the first operational amplifier U1 is greater than the voltage value of the inverting input terminal of the first operational amplifier U1, the comparison result output at the output terminal of the first operational amplifier U1 is a high level. In a feasible embodiment of the present application, the specific value of the high level comparison result is 1; when the voltage value of the non-inverting input terminal of the first operational amplifier U1 is less than the voltage value of the inverting input terminal of the first operational amplifier U1, the comparison result output at the output terminal of the first operational amplifier U1 is 0 (because the second power supply terminal of the first operational amplifier U1 is grounded).

[0111] Therefore, when the voltage value of the original pulse signal IN is greater than the voltage value of the reference level, the comparison result output at the output end of the first operational amplifier U1 is 1; when the voltage value of the original pulse signal IN is less than the voltage value of the reference level, the comparison result output at the output end of the first operational amplifier U1 is 0.

[0112] Continue to refer to Figure 2 In a feasible embodiment of the present application, the comparison circuit 2 further includes a fifth resistor R5 and a sixth resistor R6;

[0113] One end of the fifth resistor R5 is connected to the output end of the first operational amplifier U1 , the other end of the fifth resistor R5 is respectively connected to the first input end of the multiplier 3 and one end of the sixth resistor R6 , and the other end of the sixth resistor R6 is grounded.

[0114] Specifically, the fifth resistor R5 and the sixth resistor R6 are used to shunt the output result of the comparison circuit 2 to protect the circuit.

[0115] In order to increase the processing speed of the pulse signal shaping circuit provided in the embodiment of the present application, in a feasible embodiment of the present application, the second operational amplifier U2 is a high-speed operational amplifier.

[0116] The technical solution provided in this application effectively eliminates the tailing phenomenon of the pulse signal.

[0117] Figure 3 A schematic diagram of a pulse signal generating system provided in an embodiment of the present application is shown in FIG. Figure 3, a pulse signal generating system provided by the present application includes a pulse signal generator and a pulse signal shaping circuit as described in any one of the above embodiments;

[0118] The output end of the pulse signal generator is connected to the input end of the pulse signal shaping circuit;

[0119] The pulse signal generator is used to generate an original pulse signal IN;

[0120] The pulse signal shaping circuit is used to process the original pulse signal IN, eliminate the trailing edge of the original pulse signal IN, and output a shaped pulse signal OUT.

[0121] Specifically, a pulse signal generating system provided in an embodiment of the present application can be arranged in a communication module, and is specifically used to generate a shaped pulse signal OUT without a tailing phenomenon. First, the pulse signal generator generates an original pulse signal IN. Due to possible interference, the original pulse signal IN has a tailing phenomenon. The original pulse signal IN is processed by the pulse signal shaping circuit provided in the above embodiment, the trailing of the falling edge of the original pulse signal IN is eliminated, and a shaped pulse signal OUT is output.

[0122] In addition, an embodiment of the present application also provides an electronic device, which includes the pulse signal shaping circuit as described in any one of the above embodiments.

[0123] It should be understood that the terms used herein are only for the purpose of describing specific example embodiments and are not intended to be limiting. Unless the context clearly indicates otherwise, the singular forms "one", "an" and "said" as used herein may also be meant to include plural forms. The terms "include", "comprise", "contain", and "have" are inclusive, and therefore specify the existence of stated features, steps, operations, elements and / or parts, but do not exclude the existence or addition of one or more other features, steps, operations, elements, parts, and / or combinations thereof. The method steps, processes, and operations described herein are not interpreted as necessarily requiring them to be performed in the specific order described or illustrated, unless the execution order is clearly indicated. It should also be understood that additional or alternative steps may be used.

[0124] The above description is only a specific embodiment of the present invention, so that those skilled in the art can understand or implement the present invention. Various modifications to these embodiments will be obvious to those skilled in the art, and the general principles defined herein can be implemented in other embodiments without departing from the spirit or scope of the present invention. Therefore, the present invention will not be limited to the embodiments shown herein, but should conform to the widest scope consistent with the principles and novel features applied herein.

Claims

1. A pulse signal shaping circuit, characterized in that: The pulse signal shaping circuit includes a reference level generating circuit, a comparison circuit and a multiplier; The input end of the reference level generating circuit is connected to the pulse signal generator, the output end of the reference level generating circuit is connected to the first input end of the comparison circuit, the second input end of the comparison circuit is connected to the pulse signal generator, the output end of the comparison circuit is connected to the first input end of the multiplier, and the second input end of the multiplier is connected to the pulse signal generator; The reference level generating circuit is used to generate a reference level based on the original pulse signal input by the pulse signal generator; wherein the maximum voltage value of the reference level is less than the maximum voltage value of the original pulse signal, and any voltage value of the falling edge of the reference level is greater than any voltage value of the falling edge of the original pulse signal; The comparison circuit is used to compare the original pulse signal with the reference level, and output the comparison result to the multiplier; wherein, when the voltage value of the original pulse signal is greater than the voltage value of the reference level, the comparison circuit outputs a high level to the multiplier, and when the voltage value of the original pulse signal is less than the voltage value of the reference level, the comparison circuit outputs 0 to the multiplier; The multiplier is used to perform a multiplication operation on the comparison result and the original pulse signal to convert the original pulse signal into a shaped pulse signal.

2. The pulse signal shaping circuit according to claim 1, characterized in that: The pulse signal shaping circuit also includes an amplifier circuit; The input end of the amplifier circuit is connected to the pulse signal generator, and the output end of the amplifier circuit is respectively connected to the input end of the reference level generating circuit, the second input end of the comparison circuit and the second input end of the multiplier; The amplifier circuit is used to amplify the original pulse signal.

3. The pulse signal shaping circuit according to claim 2, characterized in that: The reference level generating circuit includes a first capacitor, a second capacitor, a first resistor, a second resistor, a third resistor, a fourth resistor and a diode; One end of the first capacitor is used as the input end of the reference level generating circuit and is connected to the output end of the amplifier circuit, and the other end of the first capacitor is respectively connected to one end of the first resistor, one end of the second resistor and the positive electrode of the diode; The other end of the first resistor is respectively connected to a working power supply and one end of the third resistor; The other end of the third resistor serves as the output end of the reference level generating circuit and is connected to the first input end of the comparison circuit; The cathode of the diode is respectively connected to the other end of the third resistor, one end of the fourth resistor and one end of the second capacitor; The other end of the second resistor, the other end of the fourth resistor, and the other end of the second capacitor are all grounded.

4. The pulse signal shaping circuit according to claim 2, characterized in that: The comparison circuit includes a first operational amplifier; The inverting input terminal of the first operational amplifier serves as the first input terminal of the comparison circuit and is connected to the output terminal of the reference level generating circuit; The non-inverting input terminal of the first operational amplifier serves as the second input terminal of the comparison circuit and is connected to the output terminal of the amplifier circuit; The output end of the first operational amplifier is used as the output end of the comparison circuit and is connected to the first input end of the multiplier; A first power supply terminal of the first operational amplifier is connected to a working power supply, and a second power supply terminal of the first operational amplifier is grounded.

5. The pulse signal shaping circuit according to claim 4, characterized in that: The comparison circuit further includes a fifth resistor and a sixth resistor; One end of the fifth resistor is connected to the output end of the first operational amplifier, the other end of the fifth resistor is respectively connected to the first input end of the multiplier and one end of the sixth resistor, and the other end of the sixth resistor is grounded.

6. The pulse signal shaping circuit according to claim 2, characterized in that: The amplifying circuit includes a second operational amplifier; The non-inverting input terminal of the second operational amplifier is used as the input terminal of the amplifier circuit and is connected to the pulse signal generator; The inverting input terminal of the second operational amplifier is connected to the output terminal of the second operational amplifier; The output end of the second operational amplifier serves as the output end of the amplifier circuit and is connected to the input end of the reference level generating circuit; A first power supply terminal of the second operational amplifier is connected to a working power supply, and a second power supply terminal of the second operational amplifier is grounded.

7. The pulse signal shaping circuit according to claim 6, characterized in that: The amplifying circuit further includes a seventh resistor, an eighth resistor and a ninth resistor; One end of the seventh resistor is respectively connected to the inverting input terminal of the second operational amplifier and one end of the eighth resistor, the other end of the seventh resistor is connected to the output terminal of the second operational amplifier, and the other end of the eighth resistor is grounded; One end of the ninth resistor is connected to the pulse signal generator, and the other end of the ninth resistor is connected to the non-inverting input end of the second operational amplifier.

8. The pulse signal shaping circuit according to claim 6, characterized in that: The second operational amplifier is a high-speed operational amplifier.

9. A pulse signal generating system, characterized in that: The system comprises a pulse signal generator and a pulse signal shaping circuit as claimed in any one of claims 1 to 8; The output end of the pulse signal generator is connected to the input end of the pulse signal shaping circuit; The pulse signal generator is used to generate an original pulse signal; The pulse signal shaping circuit is used to process the original pulse signal, eliminate the trailing edge of the original pulse signal, and output a shaped pulse signal.

10. An electronic device, characterized in that: The electronic device comprises the pulse signal shaping circuit as described in any one of claims 1-8.

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