A dual power supply MOS overcurrent protection circuit
By connecting the free-current diodes in the dual-power supply hardware circuit, optimizing the on-current current of the MOS tube, solving the overcurrent problem caused by the misunderstanding of the upper limit of leakage current in the existing circuit, achieving higher continuous flow capacity and wider application scenarios.
Patent Information
- Application Number
- CN202421482955.0
- Authority / Receiving Office
- CN · China
- Patent Type
- Utility models(China)
- Current Assignee / Owner
- Filing Date
- 2024-06-26
- Publication Date
- 2025-04-04
- Estimated Expiration
- 2034-06-26
AI Technical Summary
In existing dual-powered hardware circuits, engineers are prone to misunderstand that the continuous leakage current of the MOS tube is the upper limit of the continuous flow of the circuit, causing the current to exceed the body diode's bearing capacity, causing the device to burn.
A dual power supply power-proof MOS overcurrent circuit is designed. By connecting the first freewheeling diode and the second freewheeling diode in parallel between the drain and source of the first PMOS unit and the second PMOS unit, the conduction current of the body diode is optimized and the continuous flow capability of the circuit is improved.
The current is jointly conducted by the body diode and the freewheeling diode, which improves the continuous flow capacity of the circuit, prevents the MOS tube from burning due to overcurrent, and expands the scope of circuit application scenarios.
Smart Images
Figure CN222721473U_ABST
Abstract
Description
Technical Field
[0001] The utility model relates to the technical field of electronic circuits, in particular to a dual-power supply MOS overcurrent prevention circuit. Background Art
[0002] Existing dual-power supply hardware circuits are usually implemented based on MOS tubes, wherein the continuous current-carrying capacity of the body diode in the MOS tube determines the upper limit of the continuous current-carrying capacity of the dual-power supply circuit.
[0003] However, in actual applications, engineers who do not have a deep understanding of the classic dual-power supply hardware circuit often mistakenly use the continuous leakage current of the MOS tube as the upper limit of the continuous current of the circuit. Since the continuous current of most body diodes is much lower than the continuous leakage current of the MOS tube, when the continuous leakage current of the MOS tube is used as the upper limit of the circuit for design, it is easy to cause the current to exceed the continuous current that the body diode can withstand, resulting in the problem of device burning. Utility Model Content
[0004] The technical problem to be solved by the utility model is to provide a dual power supply MOS overcurrent prevention circuit.
[0005] In order to solve the above technical problems, the technical solution adopted by the utility model is:
[0006] A dual-power supply MOS overcurrent prevention circuit comprises a first PMOS unit, a second PMOS unit, a first freewheeling diode and a second freewheeling diode; the drain of the first PMOS unit is respectively connected to the positive electrode of the first freewheeling diode and an auxiliary power supply; the source of the first PMOS unit is respectively connected to the negative electrode of the first freewheeling diode; the drain of the second PMOS unit is connected to the positive electrode of the second freewheeling diode and a main power supply; the source of the second PMOS unit is connected to the negative electrode of the second freewheeling diode; the source of the first PMOS unit, the negative electrode of the first freewheeling diode, the source of the second PMOS unit and the negative electrode of the second freewheeling diode are all used for power output.
[0007] Furthermore, it also includes an NMOS unit; the gate of the NMOS unit is respectively connected to the drain of the second PMOS unit, the gate of the first PMOS unit and the main power supply; the drain of the NMOS is connected to the gate of the second PMOS unit; the source of the NMOS is grounded.
[0008] Furthermore, it also includes a first resistor; one end of the first resistor is connected to the gate of the NMOS unit; the other end of the first resistor is connected to the source of the NMOS unit and is grounded.
[0009] Furthermore, it also includes a second resistor; one end of the second resistor is connected to the drain of the NMOS and the gate of the second PMOS unit respectively; the other end of the second resistor is connected to the source of the second PMOS unit.
[0010] Furthermore, the model of the PMOS unit includes IRF9310PbF.
[0011] Further, the model of the NMOS unit includes FDMC8327L.
[0012] Furthermore, it also includes a first capacitor and a second capacitor; one end of the first capacitor is respectively connected to one end of the second capacitor, the source of the first PMOS unit, the cathode of the first freewheeling diode, the source of the second PMOS unit and the cathode of the second freewheeling diode; the other end of the first capacitor is connected to the other end of the second capacitor and is grounded.
[0013] Furthermore, the freewheeling diode comprises a Schottky diode.
[0014] Furthermore, it also includes a power output interface; the positive electrode of the power output interface is respectively connected to the source of the first PMOS unit, the negative electrode of the first freewheeling diode, the source of the second PMOS unit and the negative electrode of the second freewheeling diode; the negative electrode of the power output interface is grounded.
[0015] The beneficial effect of the utility model is that: while realizing dual power input of main power supply and auxiliary power supply through the first PMOS unit and the second PMOS unit, the first freewheeling diode is connected in parallel between the drain and source of the first PMOS unit, and the second freewheeling diode is connected in parallel between the drain and source of the second PMOS unit, so that the current originally conducted by the body diode in the PMOS is optimized to conduct the current through the body diode and the freewheeling diode together, thereby improving the continuous current conduction capacity of the circuit, preventing the MOS tube from burning due to overcurrent, enabling the circuit to be applied to scenarios with high continuous current, and expanding the scope of circuit application scenarios. BRIEF DESCRIPTION OF THE DRAWINGS
[0016] Figure 1 A circuit diagram of a dual power supply MOS overcurrent prevention circuit in an embodiment of the utility model;
[0017] Description of labels:
[0018] U1, first PMOS unit; U2, second PMOS unit; U3, NMOS unit; D1, first freewheeling diode; D2, second freewheeling diode; R1, first resistor; R2, second resistor; R3, first capacitor; R4, second capacitor; JP2, power output interface. DETAILED DESCRIPTION
[0019] In order to explain the technical content, achieved objectives and effects of the present invention in detail, the following is an explanation in conjunction with the implementation modes and the accompanying drawings.
[0020] Please refer to Figure 1 , a dual-power supply MOS overcurrent prevention circuit, comprising a first PMOS unit, a second PMOS unit, a first freewheeling diode and a second freewheeling diode; the drain of the first PMOS unit is respectively connected to the positive electrode of the first freewheeling diode and the auxiliary power supply; the source of the first PMOS unit is respectively connected to the negative electrode of the first freewheeling diode; the drain of the second PMOS unit is connected to the positive electrode of the second freewheeling diode and the main power supply; the source of the second PMOS unit is connected to the negative electrode of the second freewheeling diode; the source of the first PMOS unit, the negative electrode of the first freewheeling diode, the source of the second PMOS unit and the negative electrode of the second freewheeling diode are all used for power output.
[0021] From the above description, it can be seen that the beneficial effect of the utility model is that: while realizing the dual power input of the main power supply and the auxiliary power supply through the first PMOS unit and the second PMOS unit, the first freewheeling diode is connected in parallel between the drain and the source of the first PMOS unit, and the second freewheeling diode is connected in parallel between the drain and the source of the second PMOS unit, so that the current originally conducted by the body diode in the MOS is optimized to conduct the current through the body diode and the freewheeling diode together, thereby improving the continuous current conduction capacity of the circuit, and can prevent the MOS tube from burning due to overcurrent, so that the circuit can be applied to scenarios with high continuous current, expanding the scope of circuit application scenarios.
[0022] Furthermore, it also includes an NMOS unit; the gate of the NMOS unit is respectively connected to the drain of the second PMOS unit, the gate of the first PMOS unit and the main power supply; the drain of the NMOS is connected to the gate of the second PMOS unit; the source of the NMOS is grounded.
[0023] From the above description, it can be seen that by setting an NMOS unit, connecting the gate of the NMOS unit to the gate of the first PMOS unit and the main power supply respectively, and connecting the drain of the NMOS to the gate of the second PMOS unit, when the main power supply is supplied, the NMOS unit controls the first PMOS unit to be cut off, and when the main power supply is not supplied, the NMOS unit controls the first PMOS unit to be turned on, so that the circuit is powered based on the auxiliary power supply.
[0024] Furthermore, it also includes a first resistor; one end of the first resistor is connected to the gate of the NMOS unit; the other end of the first resistor is connected to the source of the NMOS unit and is grounded.
[0025] It can be seen from the above description that by providing the first resistor between the gate and the source of the NMOS unit, a bias voltage can be provided for the NMOS unit, and the first resistor can function as a discharge resistor to protect the gate and the source of the NMOS unit.
[0026] Furthermore, it also includes a second resistor; one end of the second resistor is connected to the drain of the NMOS and the gate of the second PMOS unit respectively; the other end of the second resistor is connected to the source of the second PMOS unit.
[0027] It can be seen from the above description that by providing the second resistor between the gate and the source of the second PMOS unit, a bias voltage can be provided for the second PMOS unit and the second resistor can function as a discharge resistor to protect the gate and the source of the PMOS unit.
[0028] Furthermore, the model of the PMOS unit includes IRF9310PbF.
[0029] From the above description, it can be known that a PMOS device of model IRF9310PbF is used as the PMOS unit, and the body diode of the device can bear a current of 2.5A.
[0030] Further, the model of the NMOS unit includes FDMC8327L.
[0031] It can be seen from the above description that using the NMOS device of model FDMC8327L as the NMOS unit can effectively realize the control of the second PMOS tube, so that the second PMOS tube is turned on when the main power supply is supplied.
[0032] Furthermore, it also includes a first capacitor and a second capacitor; one end of the first capacitor is respectively connected to one end of the second capacitor, the source of the first PMOS unit, the cathode of the first freewheeling diode, the source of the second PMOS unit and the cathode of the second freewheeling diode; the other end of the first capacitor is connected to the other end of the second capacitor and is grounded.
[0033] It can be seen from the above description that by arranging the first capacitor and the second capacitor at the output end of the circuit, the output power can be filtered to improve the stability of the power output.
[0034] Furthermore, the freewheeling diode comprises a Schottky diode.
[0035] It can be seen from the above description that using a Schottky diode as a freewheeling diode can effectively conduct current, allowing the circuit to withstand a larger current.
[0036] Furthermore, it also includes a power output interface; the positive electrode of the power output interface is respectively connected to the source of the first PMOS unit, the negative electrode of the first freewheeling diode, the source of the second PMOS unit and the negative electrode of the second freewheeling diode; the negative electrode of the power output interface is grounded.
[0037] It can be seen from the above description that by providing a power output interface, the circuit can be more conveniently connected to an external device and supply power to the external device.
[0038] The dual power supply MOS overcurrent protection circuit provided by the utility model can be applied to the application scenario of the dual power supply circuit with high continuous current, and the following is an explanation through specific implementation methods:
[0039] Embodiment 1
[0040] Please refer to Figure 1 A dual-power supply MOS overcurrent prevention circuit includes a first PMOS unit U1, a second PMOS unit U2, a first freewheeling diode D1, a second freewheeling diode D2 and an NMOS unit U3; the drain of the first PMOS unit U1 is respectively connected to the positive electrode of the first freewheeling diode D1 and the auxiliary power supply (USB_12V); the source of the first PMOS unit U1 is respectively connected to the negative electrode of the first freewheeling diode D1; the drain of the second PMOS unit U2 is connected to the positive electrode of the second freewheeling diode D2 and the main power (12V_MAIN) source The source of the second PMOS unit U2 is connected to the cathode of the second freewheeling diode D2; the source of the first PMOS unit U1, the cathode of the first freewheeling diode D1, the source of the second PMOS unit U2 and the cathode of the second freewheeling diode D2 are all used for power output (12V_VOUT); the gate of the NMOS unit U3 is respectively connected to the drain of the second PMOS unit U2, the gate of the first PMOS unit U1 and the main power supply; the drain of the NMOS is connected to the gate of the second PMOS unit U2; the source of the NMOS is grounded. In this embodiment, the models of the first PMOS unit U1 and the second PMOS unit U2 are IRF9310PbF, the model of the NMOS unit U3 is FDMC8327L, the first freewheeling diode D1 and the second freewheeling diode D2 are both Schottky diodes, and the model of the Schottky diode is SIS5P6. At the same time, the device model is selected according to the actual application scenario of the circuit to adapt to different circuit design requirements; for example, when the current carrying capacity needs to be improved, PMOS units, NMOS units and Schottky diodes with higher current carrying capacity can be selected.
[0041] In an optional implementation, power output is achieved through a power output interface JP2; the positive electrode (2) of the power output interface JP2 is respectively connected to the source of the first PMOS unit U1, the negative electrode of the first freewheeling diode D1, the source of the second PMOS unit U2, and the negative electrode of the second freewheeling diode D2; the negative electrode (1) of the power output interface JP2 is grounded.
[0042] The first resistor R1, the second resistor R2, the first capacitor R3 and the second capacitor R4 are also included; one end of the first resistor R1 is connected to the gate of the NMOS unit U3; the other end of the first resistor R1 is connected to the source of the NMOS unit U3 and is grounded; one end of the second resistor R2 is respectively connected to the drain of the NMOS and the gate of the second PMOS unit U2; the other end of the second resistor R2 is connected to the source of the second PMOS unit U2. One end of the first capacitor R3 is respectively connected to one end of the second capacitor R4, the source of the first PMOS unit U1, the cathode of the first freewheeling diode D1, the source of the second PMOS unit U2 and the cathode of the second freewheeling diode D2; the other end of the first capacitor R3 is connected to the other end of the second capacitor R4 and is grounded.
[0043] In this embodiment, two Schottky diodes with large continuous current carrying capacity are added to share the current of the body diodes of the first PMOS unit U1 and the second PMOS unit U2 in the circuit; so that the continuous current carrying capacity of the power supply circuit depends on the sum of the continuous current carrying capacity of the body diode and the Schottky diode.
[0044] For example, the PMOS tube model IRF9310PbF has a current of 16A, but its body diode can only carry a current of 2.5A, so the overall current capacity of the circuit is also limited to 2.5A. As a result, the circuit can only be used in devices with low power requirements, that is, in applications with low continuous current.
[0045] In this embodiment, a Schottky diode of model SIS5P6 is added, wherein the current of the Schottky diode is 5A. Since the continuous current capacity of the power supply circuit depends on the sum of the continuous current capacities of the body diode and the Schottky diode, that is, after the Schottky diode is added, the overall current capacity of the circuit can reach 7.5A; considering a certain margin, the circuit can be applied to a typical design of 6A, thereby expanding the scope of application scenarios of the circuit and preventing the MOS tube from burning out due to overcurrent.
[0046] The above description is only an embodiment of the present invention, and does not limit the patent scope of the present invention. Any equivalent transformations made using the contents of the specification and drawings of the present invention, or directly or indirectly applied in the relevant technical field, are also included in the patent protection scope of the present invention.
Claims
1. A dual power supply MOS overcurrent protection circuit, characterized in that: It includes a first PMOS unit, a second PMOS unit, a first freewheeling diode and a second freewheeling diode; The drain of the first PMOS unit is respectively connected to the positive electrode of the first freewheeling diode and the auxiliary power supply; the source of the first PMOS unit is respectively connected to the negative electrode of the first freewheeling diode; The drain of the second PMOS unit is connected to the anode of the second freewheeling diode and the main power supply; the source of the second PMOS unit is connected to the cathode of the second freewheeling diode; The source of the first PMOS unit, the cathode of the first freewheeling diode, the source of the second PMOS unit and the cathode of the second freewheeling diode are all used for power output.
2. A dual power supply MOS overcurrent protection circuit according to claim 1, characterized in that: It also includes NMOS cells; The gate of the NMOS unit is respectively connected to the drain of the second PMOS unit, the gate of the first PMOS unit and a main power supply; The drain of the NMOS is connected to the gate of the second PMOS unit; The source of the NMOS is grounded.
3. A dual power supply MOS overcurrent protection circuit according to claim 2, characterized in that: Also comprising a first resistor; One end of the first resistor is connected to the gate of the NMOS unit; The other end of the first resistor is connected to the source of the NMOS unit and is grounded.
4. A dual power supply MOS overcurrent protection circuit according to claim 2, characterized in that: Also comprising a second resistor; One end of the second resistor is connected to the drain of the NMOS and the gate of the second PMOS unit respectively; The other end of the second resistor is connected to the source of the second PMOS unit.
5. A dual power supply MOS overcurrent protection circuit according to claim 1 or 2, characterized in that: Models of the PMOS units include IRF9310PbF.
6. A dual power supply MOS overcurrent protection circuit according to claim 2, characterized in that: Models of NMOS cells include FDMC8327L.
7. A dual power supply MOS overcurrent protection circuit according to claim 1, characterized in that: Also includes a first capacitor and a second capacitor; One end of the first capacitor is respectively connected to one end of the second capacitor, the source of the first PMOS unit, the cathode of the first freewheeling diode, the source of the second PMOS unit and the cathode of the second freewheeling diode; The other end of the first capacitor is connected to the other end of the second capacitor and is grounded.
8. A dual power supply MOS overcurrent protection circuit according to claim 1, characterized in that: The freewheeling diode comprises a Schottky diode.
9. A dual power supply MOS overcurrent prevention circuit according to claim 1, characterized in that: Also includes a power output interface; The positive electrode of the power output interface is respectively connected to the source electrode of the first PMOS unit, the negative electrode of the first freewheeling diode, the source electrode of the second PMOS unit, and the negative electrode of the second freewheeling diode; The negative pole of the power output interface is grounded.