High-temperature-sensitive feedback ceramic substrate and high-temperature-sensitive feedback module

Abstract

The utility model discloses a high-temperature-sensitive feedback ceramic substrate and a high-temperature-sensitive feedback module. A metal layer of the substrate comprises a first area, a second area, a third area, a fourth area and a resistance area. The first region, the second region, the third region and the fourth region are used as mounting regions of a power semiconductor device; and a negative temperature coefficient thermistor is printed on the resistance region and is used for reflecting the junction temperature of the power semiconductor device. According to the utility model, the negative temperature coefficient thermistor is printed on the ceramic substrate, and the temperature response is directly performed on the ceramic layer, so that the thermal resistance layer is reduced, and the temperature response efficiency is improved.

Description

Technical Field

[0001] The utility model belongs to the technical field of semiconductor packaging, and in particular relates to a high-temperature sensitive feedback ceramic substrate and a high-temperature sensitive feedback module. Background Art

[0002] In recent years, high-power power electronic devices have been widely used in key links in the fields of electric vehicles, traction systems, rail transportation, new energy power generation, flexible DC transmission projects, etc. With the growing energy demand in the consumer and industrial markets, power electronic devices need to operate for a long time under working conditions of higher power density and higher current levels. In addition, the complex and changeable working conditions have brought huge challenges to the reliability of devices. Temperature is the main cause of failure of power electronic devices. Therefore, the accuracy and timeliness of junction temperature measurement are crucial to predicting the life of devices and evaluating their reliability.

[0003] For semiconductor devices, mainly IGBTs, the increase in junction temperature will seriously affect their working characteristics, and thus affect the reliability of the power electronic devices they constitute. Currently, the most widely used method is the real-time online temperature monitoring technology based on NTC thermistors. The temperature signal is converted into a frequency signal by using the negative temperature coefficient (NTC) thermistor integrated inside the IGBT module, which is input to the logic processing chip (CPLD) through optical fiber isolation. After logic processing, the temperature is displayed in real time on the host computer. The NTC resistor used in this technology is packaged together with the semiconductor device to achieve temperature detection, but there is a certain error between the NTC resistors. At the same time, the device is connected by welding, and there are many thermal resistance layers, which leads to a slow temperature response of the NTC, a large junction temperature measurement error, and a slow response when the temperature changes rapidly. When the temperature suddenly changes, it cannot react quickly to start the device temperature protection function. Utility Model Content

[0004] The utility model aims to provide a high temperature sensitive feedback ceramic substrate to solve the technical problem of slow response of negative temperature coefficient thermistors in the prior art.

[0005] To achieve the above-mentioned purpose, the metal layer of the high-temperature sensitive feedback ceramic substrate provided by the utility model includes a first area, a second area, a third area, a fourth area and a resistance area; the first area, the second area, the third area and the fourth area serve as the installation area of ​​the power semiconductor device; a negative temperature coefficient thermistor is printed on the resistance area to react to the junction temperature of the power semiconductor device.

[0006] In some implementations, a pin region electrically connected to both ends of the resistance region is also formed on the metal layer to serve as an assembly point for the temperature collection terminal.

[0007] In some embodiments, the thickness of the negative temperature coefficient thermistor is 0.05-0.5 mm.

[0008] In some embodiments, the negative temperature coefficient thermistor is in a bar shape, a fence shape, or a ring shape.

[0009] In some embodiments, the aspect ratio of the negative temperature coefficient thermistor is changed by laser pulse bombardment cutting.

[0010] In some embodiments, the resistance area is located between the first region, the second region, the third region, and the fourth region, and is disposed close to the first region, the second region, the third region, and the fourth region.

[0011] In some embodiments, the substrate includes a first metal layer, a ceramic layer, and a second metal layer, and the first metal layer, the ceramic layer, and the second metal layer are formed into a ceramic substrate using a DBC or AMB ceramic substrate process, and the first region, the second region, the third region, the fourth region, and the resistance region are formed on the second metal layer through an etching process.

[0012] The utility model also provides a high-temperature sensitive feedback module, which is configured to include a ceramic substrate, an IGBT chip, pin terminals and bonding wires. The ceramic substrate is the ceramic substrate described in the utility model, the IGBT chip is located in the first area, the second area, the third area, and the fourth area, and is electrically connected through the bonding wires; the pin terminals are electrically connected to the ceramic substrate.

[0013] In some embodiments, the module is further configured to include an FRD chip located on the first region, the second region, the third region, and the fourth region, and electrically connected to the IGBT chip through the bonding wires.

[0014] In some embodiments, the module is further configured to include a resin encapsulation layer for encapsulating the ceramic substrate.

[0015] The utility model prints a negative temperature coefficient thermistor on a ceramic substrate, and the temperature response is directly on the ceramic layer, thereby reducing the thermal resistance layer and improving the temperature response efficiency. BRIEF DESCRIPTION OF THE DRAWINGS

[0016] In order to more clearly illustrate the technical solutions of the embodiments of the present utility model, the following briefly introduces the drawings required for use in the description of the embodiments. Obviously, the drawings described below are only some embodiments of the present utility model. For ordinary technicians in this field, other drawings can be obtained based on these drawings without creative work. In the drawings:

[0017] Figure 1 This is a schematic diagram of the structure of a ceramic substrate according to an embodiment of the utility model;

[0018] Figure 2 It is a schematic diagram of the structure of the thermistor described in the embodiment of the utility model. DETAILED DESCRIPTION

[0019] In order to make the purpose, technical solutions and advantages of the utility model clearer, the various exemplary embodiments to be described below will refer to the corresponding drawings, which constitute a part of the exemplary embodiments, wherein various exemplary embodiments that may be used to implement the utility model are described. Unless otherwise indicated, the same numbers in different drawings represent the same or similar elements. The implementation methods described in the following exemplary embodiments do not represent all implementation methods consistent with the present disclosure. It should be understood that they are only examples of processes, methods, and devices that are consistent with some aspects of the utility model disclosed as detailed in the attached claims, and other embodiments may also be used, or the embodiments listed herein may be modified in structure and function without departing from the scope and essence of the utility model.

[0020] The terms "first", "second", etc. are used for descriptive purposes only and are not to be understood as indicating or implying relative importance or implicitly indicating the number of technical features indicated. The term "plurality" means two or more. The terms "connected" and "connected" should be understood in a broad sense. For example, it can be a fixed connection, a detachable connection, an integral connection, a mechanical connection, an electrical connection, a communication connection, a direct connection, an indirect connection through an intermediate medium, and can be the internal connection of two elements or the interaction relationship between two elements. The term "and / or" includes any and all combinations of one or more related listed items. For those of ordinary skill in the art, the specific meanings of the above terms in the utility model can be understood according to the specific circumstances.

[0021] In order to illustrate the technical solution of the present utility model, a specific embodiment is provided below, in which only the parts related to the embodiment of the present utility model are shown.

[0022] The ceramic substrate provided by the utility model comprises a first metal layer, a ceramic layer and a second metal layer connected in sequence, wherein the first metal layer, the ceramic layer and the second metal layer are formed by using a DBC or AMB ceramic substrate process to form the ceramic substrate, and a first region 1, a second region 2, a third region 3, a fourth region 4 and a resistance region 5 are formed on the second metal layer by an etching process, such as Figure 1 shown.

[0023] The first area 1, the second area 2, the third area 3 and the fourth area 4 are used as the installation area of ​​the power semiconductor device; the resistor area 5 is printed with a negative temperature coefficient thermistor to react to the junction temperature of the power semiconductor device. The negative temperature coefficient thermistor is formed by printing the paste on the etched resistor area through a screen hard brush in a thick film or thin film manner, and sintering at a high temperature (700-800°C) to form a thick film resistor or a thin film resistor in a grid shape, a fence shape or a ring shape, such as Figure 2 As shown; the resistance is then corrected by laser pulses to form a negative temperature coefficient thermistor that meets the requirements.

[0024] The pulsed laser beam output by the laser is gathered into a very small light spot, thereby generating a high-energy-density laser pulse to bombard the resistor printing paste, causing the cut resistor paste to be quickly vaporized, thereby effectively changing the aspect ratio of the negative temperature coefficient thermistor, and ultimately adjusting the resistor resistance value that is lower than the target value to within the tolerance range allowed by the target resistance value, thereby achieving the purpose of accurately adjusting the resistor resistance value.

[0025] As an optional embodiment, the negative temperature coefficient thermistor is formed by thick film resistor paste, which includes fine conductive metal powder, glass powder and organic carrier in a mass ratio of 1:2:2. The fine conductive metal powder, glass powder and organic carrier are mixed and then processed and ground by an agate bowl or a three-roll mill. Among them, the conductive metal powder can be a precious metal such as gold, silver, platinum, etc., preferably silver; the glass powder is a powder formed by mixing tin oxide, silicon oxide, and boron oxide in a mass ratio of 3:2:2; the organic carrier is a mixture of cellulose, pine alcohol, castor oil, and butyl citrate in a mass ratio of 1:2:1:0.5.

[0026] The utility model prints a negative temperature coefficient thermistor directly on a metal layer of a ceramic substrate, with a thickness smaller than that of the metal layer, preferably 0.05-0.5 mm; the negative temperature coefficient thermistor and the ceramic substrate do not need to be welded together by solder, thereby reducing the thermal resistance layer between the negative temperature coefficient thermistor and the ceramic substrate, and solving the technical problem that the negative temperature coefficient thermistor has a large thermal resistance layer and a slow temperature response due to the negative temperature coefficient thermistor being welded on the ceramic substrate by solder.

[0027] A pin area 6 electrically connected to the two ends of the resistance area 5 is also formed on the second metal layer of the ceramic substrate, serving as an assembly point for the temperature acquisition terminal; the temperature acquisition terminal can be used to obtain real-time temperature response and provide it to the logic processing chip (CPLD) or the host computer, which performs real-time temperature detection.

[0028] As an optional embodiment, the resistance area 5 is located between the first area 1, the second area 2, the third area 3, and the fourth area 4, and is arranged close to the first area 1, the second area 2, the third area 3, and the fourth area 4 so as to be able to respond to temperature faster.

[0029] When the ceramic substrate is used for temperature protection, it can quickly respond to a sudden change in the temperature of the power semiconductor device and activate the temperature protection function.

[0030] As an optional embodiment, the power resistance capability of the resistor is increased by increasing the thickness of the resistor element, reducing the thermal resistance layer, and the contact point between the power semiconductor device and the resistor element is close to the edge of the resistor element, thereby increasing the effective resistance area of ​​the resistor element.

[0031] The ceramic substrate is matched with an IGBT chip, pin terminals and bonding wires to form a high-temperature sensitive feedback module. The IGBT chip is located in the first area 1, the second area 2, the third area 3, and the fourth area 4, and is electrically connected to form a functional circuit through bonding wires; the pin terminals are electrically connected to the ceramic substrate, and the electrical connection between the functional circuit built by the IGBT chip and the external circuit / module / device is achieved through the pin terminals.

[0032] As an optional embodiment, the high temperature sensitive feedback module is further configured to include FRD chips located in the first area 1, the second area 2, the third area 3, and the fourth area 4, and electrically connected to the IGBT chip through bonding wires.

[0033] The high temperature sensitive feedback module is also configured with a resin encapsulation layer for encapsulating the ceramic substrate. The encapsulation layer completely encapsulates the second metal layer of the ceramic substrate to achieve encapsulation of devices such as the IGBT chip, the FRD chip, thermistor, one end of the pin terminal, etc.

[0034] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present invention, rather than to limit them. Although the present invention has been described in detail with reference to the above embodiments, a person skilled in the art should understand that the technical solutions described in the above embodiments can still be modified, or some or all of the technical features can be replaced by equivalents (such as components or functional circuits are directly connected by bonding wires without the need to configure transition zones, through holes, etc.); and these modifications or replacements do not make the essence of the corresponding technical solutions deviate from the scope of the technical solutions of the embodiments of the present invention, and they should all be included in the scope of the claims and description of the present invention.

Claims

1. A high temperature sensitive feedback ceramic substrate, characterized in that: The metal layer of the substrate includes a first area, a second area, a third area, a fourth area and a resistance area; the first area, the second area, the third area and the fourth area serve as mounting areas for power semiconductor devices; a negative temperature coefficient thermistor is printed on the resistance area to react to the junction temperature of the power semiconductor device.

2. The high temperature sensitive feedback ceramic substrate according to claim 1, characterized in that: A pin area electrically connected to the two ends of the resistance area is also formed on the metal layer, serving as an assembly point for the temperature collection terminal.

3. The high temperature sensitive feedback ceramic substrate according to claim 1, characterized in that: The thickness of the negative temperature coefficient thermistor is 0.05-0.5 mm.

4. The high temperature sensitive feedback ceramic substrate according to claim 1, characterized in that: The negative temperature coefficient thermistor is in a bar shape, a fence shape or a ring shape.

5. The high temperature sensitive feedback ceramic substrate according to claim 1, characterized in that: The aspect ratio of the negative temperature coefficient thermistor is changed by laser pulse bombardment cutting.

6. The high temperature sensitive feedback ceramic substrate according to claim 1, characterized in that: The resistance area is located between the first region, the second region, the third region, and the fourth region, and is disposed close to the first region, the second region, the third region, and the fourth region.

7. The high temperature sensitive feedback ceramic substrate according to claim 1, characterized in that: The substrate includes a first metal layer, a ceramic layer and a second metal layer. The first metal layer, the ceramic layer and the second metal layer are formed into a ceramic substrate using a DBC or AMB ceramic substrate process, and the first region, the second region, the third region, the fourth region and the resistance region are formed on the second metal layer through an etching process.

8. A high temperature sensitive feedback module, characterized in that: The module is configured to include a ceramic substrate, an IGBT chip, pin terminals and bonding wires, wherein the ceramic substrate is the ceramic substrate described in any one of claims 1 to 7, the IGBT chip is located in the first region, the second region, the third region and the fourth region, and is electrically connected through the bonding wires; the pin terminals are electrically connected to the ceramic substrate.

9. The high temperature sensitive feedback module according to claim 8, characterized in that: The module is also configured to include an FRD chip located on the first region, the second region, the third region, and the fourth region, and is electrically connected to the IGBT chip through the bonding wires.

10. The high temperature sensitive feedback module according to claim 8, characterized in that: The module is also configured with a resin encapsulation layer for encapsulating the ceramic substrate.

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