Memory chip with destroying function
By setting a fuse in the communication circuit of the memory chip, disconnecting the communication between the flash memory and the master control chip, the problem of failure of the data destruction solution in the prior art is solved, and the effect of preventing data leakage from the physical level is achieved.
Patent Information
- Application Number
- CN202421627791.6
- Authority / Receiving Office
- CN · China
- Patent Type
- Utility models(China)
- Current Assignee / Owner
- Filing Date
- 2024-07-10
- Publication Date
- 2025-04-15
- Estimated Expiration
- 2034-07-10
AI Technical Summary
In the process of data destruction of abandoned memory chips, the prior art relies on pure software erasing solutions, and there is a risk of failure in some cases, and it cannot effectively prevent data leakage from the physical level.
Design a memory chip with destruction function, and by setting a fuse in the communication circuit, disconnecting the communication between the flash memory and the master control chip, thereby physically preventing data read and write operations and preventing data leakage.
It realizes the communication between flash memory and master control chips through physical level, ensures that the memory chip cannot read and write data, effectively prevent data leakage, and solves the problem of failure of software-level destruction solutions in the existing technology.
Smart Images
Figure CN222762485U_ABST
Abstract
Description
Technical Field
[0001] The utility model relates to the technical field of semiconductor manufacturing, in particular to a storage chip with a destruction function. Background Art
[0002] In the related art, when a device with a storage chip installed is discarded, data leakage needs to be prevented. Currently, the main control chip is basically used to send instructions to quickly erase the data stored in the flash memory. However, erasing through the main control chip is a pure software-level destruction solution, which may fail in some cases. Utility Model Content
[0003] In view of the shortcomings of the prior art, the present application provides a storage chip with a destruction function, which is conducive to indirectly destroying the data in the storage chip by destroying the communication between the flash memory and the main control chip, thereby preventing data leakage from a physical level.
[0004] In order to solve the above problems, the utility model provides the following technical solutions:
[0005] In a first aspect, an embodiment of the present application provides a memory chip with a destruction function, wherein the memory chip includes a printed circuit board, and a flash memory and a main control chip are arranged on the printed circuit board; wherein:
[0006] The flash memory and the main control chip communicate with each other through a communication circuit. The communication circuit is provided with a fuse. When the fuse is blown, the flash memory and the main control chip are disconnected from each other.
[0007] In some embodiments, the communication circuit includes a data line, and the printed circuit board includes a plurality of first fuses;
[0008] Each data line between the flash memory and the main control chip is provided with a first fuse.
[0009] In some embodiments, the communication circuit includes a control circuit, and the printed circuit board includes a second fuse;
[0010] A second fuse is provided on a control line between the flash memory and the main control chip.
[0011] In some embodiments, the main control chip integrates a digital-to-analog converter function;
[0012] The maximum voltage that the main control chip can output is greater than the rated voltage of the fuse.
[0013] In some embodiments, the fuse is a surface mount technology fuse.
[0014] In some embodiments, the material of the metal wire of the surface mount technology fuse includes one or more of copper, silver, tungsten, and lead-antimony alloy.
[0015] In some embodiments, the communication circuit is further provided with a short-circuit switch;
[0016] When the short-circuit switch is turned on, the short-circuit switch short-circuits the electronic components in the communication circuit except the fuse, so that the fuse is blown.
[0017] In some embodiments, the short-circuit switch is a field effect transistor.
[0018] In some embodiments, the memory chip further includes a plastic encapsulation layer, and the plastic encapsulation layer covers the side of the printed circuit board where the flash memory and the main control chip are arranged.
[0019] In some embodiments, the communication circuit further includes a first communication sub-circuit and a second communication sub-circuit, and the first communication sub-circuit is connected to the second communication sub-circuit through the fuse.
[0020] The present application provides a memory chip with a destruction function, the memory chip includes a printed circuit board, a flash memory and a main control chip are arranged on the printed circuit board; wherein the flash memory and the main control chip communicate through a communication circuit, the communication circuit is provided with a fuse, and when the fuse is blown, the flash memory and the main control chip are disconnected from communication. In the present application, a fuse is arranged in the communication circuit, and when the fuse is blown, the flash memory and the main control chip are disconnected from communication, so that the memory chip cannot read and write data, thereby preventing data leakage. BRIEF DESCRIPTION OF THE DRAWINGS
[0021] Figure 1 This is a first structural schematic diagram of a storage chip with a destruction function provided in an embodiment of the present application.
[0022] Figure 2 This is a second structural schematic diagram of a storage chip with a destruction function provided in an embodiment of the present application. DETAILED DESCRIPTION
[0023] The following will be combined with the drawings in the embodiments of the present application to clearly and completely describe the technical solutions in the embodiments of the present application. Obviously, the described embodiments are only part of the embodiments of the present application, not all of the embodiments. Based on the embodiments in the present application, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of this application.
[0024] In addition, the terms "first" and "second" are used for descriptive purposes only and should not be understood as indicating or implying relative importance or implicitly indicating the number of the indicated technical features. Therefore, the features defined as "first" and "second" may explicitly or implicitly include one or more of the features. In the description of the present utility model, the meaning of "plurality" is two or more, unless otherwise clearly and specifically defined.
[0025] See also Figure 1 , Figure 1 1 is a schematic diagram of the first structure of a memory chip with a destruction function provided in an embodiment of the present application. Figure 1 As shown, the memory chip 1 with the destruction function comprises a printed circuit board 10 , on which a flash memory 20 , a main control chip 30 and a communication circuit 40 are arranged.
[0026] In some embodiments, the flash memory 20 and the main control chip 30 communicate via a communication circuit 40 , and the communication circuit 40 is provided with a fuse 41 . When the fuse 41 is blown, the flash memory 20 and the main control chip 30 are disconnected from each other.
[0027] By disconnecting the flash memory 20 from the main control chip 30 , the storage chip will lose the data reading / writing capability, thereby preventing data leakage.
[0028] In some embodiments, the communication circuit 40 is a circuit etched on a printed circuit board (PCB), and the communication circuit 40 may also include a device packaged on the PCB, such as a fuse 41 .
[0029] Optionally, the printed circuit board further includes a double data rate synchronous dynamic random access memory 50 (Double Data Rate Synchronous Dynamic Random Access Memory, DDR SRAM).
[0030] Specifically, Figure 1 Only the connection relationship between the flash memory 20 and the main control chip 30 is illustrated, and the remaining connection relationships are not shown, which does not mean that there is no connection relationship between the other devices.
[0031] Exemplarily, the main control chip 30 also communicates with the DDR SRAM but is not shown in the figure.
[0032] Optionally, the main control chip 30 includes a central processing unit (CPU) or a microcontroller (MCU).
[0033] In some embodiments, the communication circuit 40 between the flash memory 20 and the main control chip 30 includes:
[0034] 1. Address Lines: used to transmit storage address information and inform the flash memory master chip of the specific storage location of the data it wants to access.
[0035] 2. Data Lines: used to transmit actual data. When reading, data is transferred from the flash memory to the main control chip, and vice versa when writing. Depending on the design, the number of data lines can range from a few to dozens to support different data widths (such as 8 bits, 16 bits, 32 bits, etc.).
[0036] 3. Control Lines: including but not limited to read / write signal lines, chip select lines (CS#), command lines, etc., used to indicate the operation type (such as read, program, erase) and control the start and end of data transmission.
[0037] 4. Clock Line: In synchronous communication mode, it provides clock signal to synchronize data transmission and control signals.
[0038] 5. Status Lines: Used to transmit the status information of the flash memory to the main control chip, such as busy status, programming completion status, etc., so that the main control chip can perform the next operation in a timely manner.
[0039] 6. Reset Line: used to reset the flash memory and restore it to the initial state.
[0040] Optionally, the fuse is set in one or more of the above 6 circuits.
[0041] Optionally, each line includes at least one sub-line.
[0042] See also Figure 2 , Figure 2 is a second structural diagram of a memory chip with a destruction function provided in an embodiment of the present application. Figure 2 As shown, the communication circuit 40 includes two data lines, the first data line is provided with a first fuse 411 , and the second data line is provided with a first fuse 412 .
[0043] In some embodiments, the number of data lines in the communication circuit 40 is not limited to two, for example, it can be 8, 16, 32, etc. This application only uses two as an illustration and should not be understood as a limitation to this application.
[0044] Because the data line is the basis for exchanging information between the flash memory 20 and the main control chip 30, when the first fuse 411 and the first fuse 412 are blown, the data transmitted from the flash memory 20 to the main control chip 30 during reading and the data transmitted from the main control chip 30 to the flash memory 20 during writing cannot be transmitted, which is equivalent to the damage of the storage chip 1, thereby preventing data leakage.
[0045] However, the fuse is not limited to being set in the data line. In some embodiments, the printed circuit board includes a second fuse; and the control line between the flash memory and the main control chip is provided with a second fuse.
[0046] Specifically, the control line is used to transmit commands, such as read / write commands. Damage to the control line will make it impossible for the flash memory 20 and the main control chip 30 to start data exchange, thereby preventing data leakage.
[0047] Optionally, the fuse is also set in the address line and / or the clock line. Damage to any one of the address line and the clock line will also make it impossible for the flash memory 20 and the main control chip 30 to communicate.
[0048] Optionally, fuses may also be provided in the status circuit and the reset circuit, thereby further damaging the memory chip 1 and increasing the difficulty of repairing the memory chip 1 after damage, thereby reducing the possibility of data leakage.
[0049] In some embodiments, in order to enable the fuse 20 to blow in time, the main control chip 30 integrates a digital-to-analog converter function; the maximum voltage that the main control chip 30 can output is greater than the rated voltage of the fuse 20 .
[0050] Among them, the digital-to-analog converter (DAC) is an integrated circuit whose main function is to convert digital signals into corresponding analog signals. After the main control chip 30 integrates the digital-to-analog converter function, it can control the voltage of the pin connected to the flash memory 20. When the fuse needs to be blown, the voltage output by the pin is increased to be greater than the rated voltage of the fuse 40, so that the fuse 40 is blown.
[0051] In some embodiments, the storage chip 1 of the present application is a solid state drive, which is relatively small in size, and therefore a surface mount technology (SMT) fuse is used.
[0052] Specifically, the surface mount technology (SMT) fuse is a circuit protection component designed specifically for the SMT assembly process. It can be directly mounted on the surface of the circuit board without through-hole soldering, which greatly saves space and simplifies the production process. It has the characteristics of miniaturization and lightweight.
[0053] In some embodiments, the material of the metal wire of the surface mount technology fuse includes one or more of copper, silver, tungsten, and lead-antimony alloy, which is not limited in the present application.
[0054] In some embodiments, the communication circuit is further provided with a short-circuit switch; when the short-circuit switch is turned on, the short-circuit switch short-circuits the electronic components in the communication circuit 40 except the fuse 41 to blow the fuse 41 .
[0055] In some embodiments, when the fuse 41 is set in a certain line in the communication circuit 40, the short-circuit switch is used to short-circuit the electronic devices in the communication circuit 40 except the fuse 41, thereby reducing the resistance in the line and causing the fuse 41 to melt.
[0056] In some embodiments, the short-circuit switch is a field effect transistor.
[0057] Optionally, the short-circuit switch is a metal-oxide-semiconductor field-effect transistor (MOSFET) in a field-effect transistor, and the main control chip 30 can control the short-circuit switch to be turned on by applying a control signal to the gate of the MOSFET.
[0058] In some embodiments, the memory chip further includes a plastic packaging layer, and the plastic packaging layer covers the side of the printed circuit board where the flash memory and the main control chip are arranged.
[0059] Specifically, the plastic coating of a PCB board usually refers to a layer of plastic protective coating applied to the surface of the circuit board. This process is called "coating" or "coating". The main functions of the plastic coating include:
[0060] 1. Protect the circuit: The plastic layer forms a barrier to protect the electronic components and circuits on the PCB from physical damage, moisture, dust, chemical corrosion and environmental pollutants, thereby improving the reliability and service life of the circuit board.
[0061] 2. Insulation: Enhance the insulation performance of the circuit board, prevent short circuits between different conductive layers, maintain good electrical isolation, and ensure the normal operation of the circuit.
[0062] 3. Mechanical stability: Increase the mechanical strength of the PCB board and reduce bending or damage caused by external forces, especially in application environments that need to withstand vibration or impact.
[0063] 4. Environmental adaptability: For electronic equipment that needs to work in harsh environments, such as outdoor equipment, industrial control equipment, etc., the plastic sealing layer can provide additional protection, enabling it to withstand extreme temperatures, humidity and other harsh conditions.
[0064] Optionally, the plastic encapsulation material may be epoxy resin, silicone, polyurethane, etc., and the plastic encapsulation process may be performed by spraying, dipping, brushing or selective coating, etc. The specific selection depends on the design requirements and expected use conditions of the PCB, and this application does not impose any restrictions.
[0065] In some embodiments, the communication circuit further includes a first communication sub-circuit and a second communication sub-circuit, and the first communication sub-circuit is connected to the second communication sub-circuit through the fuse.
[0066] Specifically, in the above manner, the fuse 41 can be used as a communication bridge between the first communication sub-circuit and the second communication sub-circuit. When the fuse 41 is blown, the first communication sub-circuit and the second communication sub-circuit cannot communicate.
[0067] Optionally, one of the first communication sub-circuit and the second communication sub-circuit is a simple wire, and no electronic components are provided except the wire, so as to facilitate the wiring of the PCB board.
[0068] Optionally, when the communication circuit includes a short-circuit switch, the short-circuit switch is provided in a communication sub-circuit provided with an electronic device, thereby providing the electronic device in the communication sub-circuit provided with the electronic device.
[0069] In summary, the present application provides a memory chip with a destruction function, the memory chip comprising a printed circuit board, a flash memory and a main control chip are arranged on the printed circuit board; wherein the flash memory and the main control chip communicate through a communication circuit, the communication circuit is provided with a fuse, and when the fuse is blown, the flash memory and the main control chip are disconnected from communication. In the present application, a fuse is arranged in the communication circuit, and when the fuse is blown, the flash memory and the main control chip are disconnected from communication, so that the memory chip cannot read and write data, thereby preventing data leakage.
[0070] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present application, rather than to limit it. Although the present application has been described in detail with reference to the aforementioned embodiments, those skilled in the art should understand that they can still modify the technical solutions described in the aforementioned embodiments, or make equivalent replacements for some of the technical features therein. However, these modifications or replacements do not cause the essence of the corresponding technical solutions to deviate from the spirit and scope of the technical solutions of the embodiments of the present application.
Claims
1. A memory chip with a destruction function, characterized in that: The storage chip includes a printed circuit board, on which a flash memory and a main control chip are arranged; wherein, The flash memory and the main control chip communicate with each other through a communication circuit. The communication circuit is provided with a fuse. When the fuse is blown, the flash memory and the main control chip are disconnected from each other.
2. The memory chip according to claim 1, characterized in that: The communication circuit includes a data line, and the printed circuit board includes a plurality of first fuses; Each data line between the flash memory and the main control chip is provided with a first fuse.
3. The memory chip according to claim 2, characterized in that: The communication circuit includes a control circuit, and the printed circuit board includes a second fuse; A second fuse is provided on a control line between the flash memory and the main control chip.
4. The memory chip according to claim 1, characterized in that: The main control chip integrates the function of a digital-to-analog converter; The maximum voltage that the main control chip can output is greater than the rated voltage of the fuse.
5. The memory chip according to claim 1, characterized in that: The fuse is a surface mount technology fuse.
6. The memory chip according to claim 5, characterized in that: The material of the metal wire of the surface mount technology fuse includes one or more of copper, silver, tungsten, and lead-antimony alloy.
7. The memory chip according to claim 1, characterized in that: The communication circuit is also provided with a short-circuit switch; When the short-circuit switch is turned on, the short-circuit switch short-circuits the electronic components in the communication circuit except the fuse, so that the fuse is blown.
8. The memory chip according to claim 7, characterized in that: The short-circuit switch is a field effect tube.
9. The memory chip according to claim 1, characterized in that: The storage chip further comprises a plastic encapsulation layer, and the plastic encapsulation layer covers the side of the printed circuit board where the flash memory and the main control chip are arranged.
10. The memory chip according to claim 1, characterized in that: The communication circuit further includes a first communication sub-circuit and a second communication sub-circuit, and the first communication sub-circuit is connected to the second communication sub-circuit through the fuse.