Power switch circuit and electric equipment
By adopting the on- and off state control of the MOS tube in the power switching circuit, combining the capacitor charge and discharge and the one-way conduction characteristics of the diode, the problem of insufficient switching speed and state stability in the prior art is solved, and a stable and flexible power output is achieved.
Patent Information
- Application Number
- CN202421181045.9
- Authority / Receiving Office
- CN · China
- Patent Type
- Utility models(China)
- Current Assignee / Owner
- Filing Date
- 2024-05-28
- Publication Date
- 2025-04-15
- Estimated Expiration
- 2034-05-28
AI Technical Summary
The existing power switching circuits have shortcomings in switching speed and state stability, and are prone to abnormal opening and starting voltage unstable.
A power switching circuit is designed, using the on- and off state control of the MOS tube, and stable control and output are achieved through the capacitance charge and discharge and the one-way conduction characteristics of the diode. Specific measures include using a combination of diodes and resistors when the MOS tube is turned on to ensure normal opening, and slowly discharged through a combination of capacitors and resistors when turned off to stabilize the switching process.
The stable control and output of the power MOS switch circuit is realized, avoiding abnormal opening and shutdown, and ensuring the stability and adaptability of the power output.
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Figure CN222763872U_ABST
Abstract
Description
Technical Field
[0001] The present application relates to the technical field of power switches, and in particular to a power switch circuit and an electrical device. Background Art
[0002] The power switch control circuit needs to realize independent control of the power supply and ensure a certain power output, while having the ability to prevent static electricity and surges.
[0003] In the related art, a switching circuit is implemented by using PMOS and NMOS, but the switching speed and state stability are not considered, so there are situations where the switching circuit is abnormally turned on and the starting voltage is unstable. Utility Model Content
[0004] The embodiments of the present application provide a power switch circuit and an electrical device to ensure that the switch state of the switch circuit is stable.
[0005] The present application embodiment adopts the following technical solutions:
[0006] In a first aspect, an embodiment of the present application provides a power switching circuit, wherein the circuit includes: a power output switching circuit, a control switching circuit and an output protection circuit, wherein the power output switching circuit is electrically connected to the control switching circuit, and the power output switching circuit is electrically connected to the output protection circuit.
[0007] In some embodiments, the power output switch circuit includes: a MOS tube on state or a MOS tube off state.
[0008] In some embodiments, when the MOS tube is turned on, the input voltage V IN Through the first resistor R1 and the first diode D1, the input voltage V IN When the voltage rises to the rated voltage, the first MOS tube is turned on normally.
[0009] In some embodiments, when the MOS tube is turned on, the input voltage V IN Through the second capacitor C2 and the second resistor R2, the input voltage V IN After the voltage is stabilized, the first MOS tube discharges slowly during the process of being turned on.
[0010] In some embodiments, when the MOS tube is in the off state, the input voltage V IN The second capacitor C2 is charged through the first resistor R1 and the first diode D1 to turn off the first MOS transistor.
[0011] In some embodiments, the control switch circuit controls the opening or closing of the first MOS transistor and the second MOS transistor by outputting a control signal.
[0012] In some embodiments, when the MOS tube is in the off state, the fourth resistor R4 and the third resistor R3 are used to enable the second MOS tube to work normally.
[0013] When the control signal outputs a high level, the second MOS transistor is turned on, making the first MOS transistor turned on;
[0014] When the control signal outputs a low level, the second MOS transistor is turned off, so that the first MOS transistor is turned off.
[0015] In some embodiments, the output protection circuit is used to output the power supply output V out .
[0016] In some embodiments, the output protection circuit includes: a second diode D2, a fourth capacitor C4, a fifth capacitor C5, a third diode D3, and a load input capacitor Cload, and the power supply output V is outputted through the second diode D2, the fourth capacitor C4, the fifth capacitor C5, the third diode D3, and the load input capacitor Cload in sequence. out .
[0017] In a second aspect, an embodiment of the present application further provides an electrical device, wherein the system includes: a power switching circuit as described in the first aspect.
[0018] At least one of the above technical solutions adopted in the embodiments of the present application can achieve the following beneficial effects: the circuit includes: a power output switch circuit, a control switch circuit and an output protection circuit, the power output switch circuit is electrically connected to the control switch circuit, and the power output switch circuit is electrically connected to the output protection circuit. By rationally designing the circuit by utilizing the capacitor charging and discharging and the unidirectional conduction characteristics of the diode, the stable control and output of the power MOS switch circuit can be achieved, and the on and off speed of the MOS tube can be flexibly adjusted to adapt to different loads of the subsequent stage. BRIEF DESCRIPTION OF THE DRAWINGS
[0019] The drawings described herein are used to provide a further understanding of the present application and constitute a part of the present application. The illustrative embodiments of the present application and their descriptions are used to explain the present application and do not constitute an improper limitation on the present application. In the drawings:
[0020] Figure 1 This is a schematic diagram of the internal structure of the power switch circuit in the embodiment of the present application;
[0021] Figure 2 Schematic diagram of the power switch circuit in the embodiment of the present application. DETAILED DESCRIPTION
[0022] In order to make the purpose, technical solution and advantages of the present application clearer, the technical solution of the present application will be clearly and completely described below in combination with the specific embodiments of the present application and the corresponding drawings. Obviously, the described embodiments are only part of the embodiments of the present application, not all of the embodiments. Based on the embodiments in the present application, all other embodiments obtained by ordinary technicians in this field without making creative work are within the scope of protection of the present application.
[0023] The technical solutions provided by various embodiments of the present application are described in detail below in conjunction with the accompanying drawings.
[0024] The present application embodiment provides a power switch circuit, such as Figure 1 As shown, a structural schematic diagram of the power switch circuit in an embodiment of the present application is provided, and the circuit includes: a power output switch circuit 110, a control switch circuit 120 and an output protection circuit 130, the power output switch circuit 110 is electrically connected to the control switch circuit 120, and the power output switch circuit 110 is electrically connected to the output protection circuit 130.
[0025] In a specific implementation, the power output switch circuit 110 is electrically connected to the output protection circuit 130, so as to maintain the stable output of the power output switch circuit. The power output switch circuit 110 is electrically connected to the control switch circuit 120, so as to flexibly control the opening and closing of the power output switch circuit. And the opening speed of the control switch circuit is used to ensure the stability of the switch state of the power output switch circuit.
[0026] In one embodiment of the present application, the power output switch circuit includes: a MOS tube on state or a MOS tube off state.
[0027] like Figure 2 As shown, the power output switch circuit includes two states of the power MOS tube: on and off. The on state of the MOS tube is also divided into two states, and the off state of the MOS tube includes one state. Based on the on state of the MOS tube, the stable control and output of the power MOS switch circuit are realized, and the on and off speed of the MOS tube can be flexibly adjusted to solve the problem of uncontrollable on speed of the MOS tube and short-term abnormality in the on state.
[0028] In one embodiment of the present application, when the MOS tube is turned on, the input voltage V IN Through the first resistor R1 and the first diode D1, the input voltage V IN When the voltage rises to the rated voltage, the first MOS tube is turned on normally.
[0029] like Figure 2 As shown in the first case, when the entire switch circuit is not in operation (point C is suspended), VIN Rising from 0V to the rated voltage, Q1 (the first MOS tube) should not turn on abnormally.
[0030] During this turn-on process, the voltage at point A is proportional to V IN Similarly, due to the presence of capacitor C2 and resistors R1 and R2, the voltage at point B rises slower than the voltage at point A, resulting in V a -V b The voltage difference may be greater than Q1's V gs The threshold voltage is turned on, causing Q1 to turn on abnormally.
[0031] Based on the above situation, the first diode D1 is added. By using the first diode D1, V IN During the rising process, the charging path of C2 is changed from R1 and R2 to R1 and D1. Since R2 is much larger than R1, the charging current is greatly increased, and the rising speed of the voltage at point B is greatly increased, avoiding the occurrence of V a -V b The voltage difference may be greater than Q1's V gs When the threshold voltage is turned on, it is ensured that Q1 (the first MOS tube) will not be turned on abnormally.
[0032] In one embodiment of the present application, when the MOS tube is turned on, the input voltage V IN Through the second capacitor C2 and the second resistor R2, the input voltage V IN After the voltage is stabilized, the first MOS tube discharges slowly during the process of being turned on.
[0033] like Figure 2 As shown in the second start-up situation, at V IN After the voltage stabilizes, the control switch circuit is controlled to make Q1 open normally. IN It is usually a DCDC power supply output with current protection function. When the second part of the control switch is turned on and the voltage at point C is 0V, if there is no resistor R2 and capacitor C2, the voltage at point B will be instantly pulled to 0V, which will cause Q1 (the first MOS tube) to turn on quickly and completely. Due to the presence of the voltage stabilizing capacitor C4 and the load capacitor C load , there will be a short-term capacitor charging surge current, which will cause the DCDC power supply protection or Q1 short-term overcurrent and output voltage drop.
[0034] Based on the above situation, the second capacitor C2 and the second resistor R2 are added. When the voltage at point C is 0V, the second capacitor C2 discharges through the second resistor R2, and the voltage at point B slowly decreases to 0V, which slows down the turn-on speed of Q1 (the first MOS tube), making V IN Slowly backward capacitors C4 and C loadcharging to ensure that there is no short-term overcurrent, thus avoiding V IN Overcurrent protection or output voltage drop.
[0035] In one embodiment of the present application, when the MOS tube is in the off state, the input voltage V IN The second capacitor C2 is charged through the first resistor R1 and the first diode D1 to turn off the first MOS tube.
[0036] Based on the shutdown condition of the power MOS tube, in a specific implementation, after the MOS tube Q1 is normally turned on, when it is desired to turn off Q1, the control switch circuit controls the switch to turn off Q2 (the second MOS tube), and the C point is in a suspended state. At this time, V IN The second capacitor C2 is charged through the first resistor R1 and the first diode D1. Since the first resistor R1 has a small resistance, the charging is completed quickly, and the voltage at point B rises quickly to V IN , to achieve fast shutdown of Q1 (the first MOS tube).
[0037] In one embodiment of the present application, the control switch circuit controls the opening or closing of the first MOS transistor and the second MOS transistor by outputting a control signal.
[0038] The control switch circuit 120 controls the opening or closing of the first MOS transistor and the second MOS transistor by outputting a control signal.
[0039] In one embodiment of the present application, when the MOS tube is in the off state, the fourth resistor R4 and the third resistor R3 are used to enable the second MOS tube to work normally. When the control signal outputs a high level, the second MOS tube is turned on, so that the first MOS tube is turned on; when the control signal outputs a low level, the second MOS tube is turned off, so that the first MOS tube is turned off.
[0040] In specific implementation, the fourth resistor R4 cooperates with the third resistor R3 to stabilize the voltage at point E at 0V when the control signal control has no output, thereby ensuring that Q2 (the second MOS tube) does not perform abnormal operations when there is no control.
[0041] Furthermore, the first resistor R1 and the third capacitor C3 form an RC filter circuit to filter out the influence of high-frequency interference on Q2. Preferably, Q2 is selected as an N-row MOS tube.
[0042] When the control signal outputs a high level, Q2 is turned on, the voltage at point C is 0V, and Q1 is turned on.
[0043] When the control signal outputs a low level, Q2 is turned off, point C is suspended, and the voltage is V IN, so that Q1 is turned off, achieving the purpose of controlling the opening and closing of Q1 and Q2 by changing the output of the control signal.
[0044] In one embodiment of the present application, the output protection circuit is used to output the power supply output V out .
[0045] The output protection circuit is an output circuit for outputting the power supply output Vout.
[0046] In one embodiment of the present application, the output protection circuit includes: a second diode D2, a fourth capacitor C4, a fifth capacitor C5, a third diode D3, and a load input capacitor Cload, and the power supply output V is outputted through the second diode D2, the fourth capacitor C4, the fifth capacitor C5, the third diode D3, and the load input capacitor Cload in sequence. out .
[0047] like Figure 2 As shown, the output protection circuit has the following definition:
[0048] The fourth capacitor C4 is used to stabilize the output voltage.
[0049] The fifth capacitor C5 is used for filtering.
[0050] Diode D2 is used to prevent reverse connection or external power supply.
[0051] The third diode D3 is a voltage regulator and is used to suppress the damage of external surge and electrostatic shock to the internal circuit.
[0052] Load input capacitance C load , is the load input capacitance, defined by the load itself.
[0053] In an embodiment of the present application, an electric device is provided, wherein the system includes: the power switch circuit, the circuit includes: a power output switch circuit, a control switch circuit and an output protection circuit, the power output switch circuit is electrically connected to the control switch circuit, and the power output switch circuit is electrically connected to the output protection circuit. The power switch circuit in the electric device controls the opening speed of the MOS tube and ensures that abnormal opening and closing will not occur.
[0054] The above is only an embodiment of the present application and is not intended to limit the present application. For those skilled in the art, the present application may have various changes and variations. Any modification, equivalent replacement, improvement, etc. made within the spirit and principle of the present application should be included in the scope of the claims of the present application.
Claims
1. A power switching circuit, wherein: The circuit includes: a power output switch circuit, a control switch circuit and an output protection circuit, wherein the power output switch circuit is electrically connected to the control switch circuit, the power output switch circuit is electrically connected to the output protection circuit, the power output switch circuit includes: a MOS tube on state or a MOS tube off state, and the output protection circuit is used to output the power supply output V out The output protection circuit includes: a second diode D2, a fourth capacitor C4, a fifth capacitor C5, a third diode D3, and a load input capacitor Cload, and the power supply output V is outputted through the second diode D2, the fourth capacitor C4, the fifth capacitor C5, the third diode D3, and the load input capacitor Cload in sequence. out .
2. The circuit as claimed in claim 1, wherein: When the MOS tube is turned on, the input voltage V IN Through the first resistor R1 and the first diode D1, the input voltage V IN When the voltage rises to the rated voltage, the first MOS tube is turned on normally.
3. The circuit as claimed in claim 2, wherein: When the MOS tube is turned on, the input voltage V IN Through the second capacitor C2 and the second resistor R2, the input voltage V IN After the voltage is stabilized, the first MOS tube discharges slowly during the process of being turned on.
4. The circuit as claimed in claim 2, wherein: When the MOS tube is in the off state, the input voltage V IN The second capacitor C2 is charged through the first resistor R1 and the first diode D1 to turn off the first MOS transistor.
5. The circuit as claimed in claim 1, wherein: The control switch circuit controls the opening or closing of the first MOS transistor and the second MOS transistor by outputting a control signal.
6. The circuit as claimed in claim 5, wherein: When the MOS tube is in the off state, the fourth resistor R4 and the third resistor R3 are used to make the second MOS tube work normally. When the control signal outputs a high level, the second MOS transistor is turned on, making the first MOS transistor turned on; When the control signal outputs a low level, the second MOS transistor is turned off, so that the first MOS transistor is turned off.
7. An electrical device, wherein: The device comprises: a power switching circuit as claimed in any one of claims 1 to 6.