Anti-interference circuit and POE power adapter

Abstract

The utility model provides an anti-interference circuit and a POE power adapter, the anti-interference circuit comprises a PWM controller, a first branch circuit and a second branch circuit, the PWM controller is respectively connected with the first branch circuit and the second branch circuit, and the first branch circuit is connected with an auxiliary winding of a transformer; the second branch is grounded; the first branch comprises a first resistor and a second resistor which are connected in series, the first resistor is connected with a PWM controller pin, the distance between the first resistor and the PWM controller pin is smaller than a first preset distance, the first resistor is connected with the second resistor, and the second resistor is connected with an auxiliary winding of the transformer; the second branch comprises a third resistor and a capacitor which are connected in parallel, the third resistor is connected with the PWM controller, the distance between the third resistor and the PWM controller is smaller than a second preset distance, the capacitor is connected with the PWM controller, the distance between the capacitor and the PWM controller is smaller than a third preset distance, and the third resistor and the capacitor are grounded. According to the anti-interference circuit and the POE power adapter provided by the embodiment of the utility model, the reliability of the POE power supply is improved.

Description

Technical Field

[0001] The utility model relates to the technical field of electronic circuits, and in particular to an anti-interference circuit and a POE power adapter. Background Art

[0002] With the rapid development of network information technology, POE (Power Over Ethernet) power supply has been widely used. POE is the abbreviation of Power over Ethernet, which transmits power and data through the twisted pair in the network cable. As the types of POE power supply increase, the requirements for its performance are constantly increasing.

[0003] When the external power grid is disturbed by unstable factors, the pulse width modulation (PWM) controller of the existing POE power supply will restart the power supply due to misjudgment when the over voltage protection (OVP) protection voltage is not reached, thus causing network interruption. Therefore, how to propose a circuit that meets the requirement that the output voltage of the power supply does not lose power when the external power grid is unstable has become an important issue to be solved in this field. Utility Model Content

[0004] In view of the problems in the prior art, the embodiments of the present invention provide an anti-interference circuit and a POE power adapter.

[0005] In a first aspect, the utility model provides an anti-interference circuit, including a PWM controller, a first branch and a second branch, wherein:

[0006] The overvoltage protection pin of the PWM controller is respectively connected to the first end of the first branch and the second end of the second branch, the second end of the first branch is connected to the auxiliary winding of the transformer; the second end of the second branch is grounded;

[0007] The first branch includes a first resistor and a second resistor connected in series, a first end of the first resistor is connected to an overvoltage protection pin of the PWM controller and a distance from the overvoltage protection pin of the PWM controller is less than a first preset distance, a second end of the first resistor is connected to a first end of the second resistor, and a second end of the second resistor is connected to an auxiliary winding of the transformer;

[0008] The second branch includes a third resistor and a capacitor connected in parallel, the first end of the third resistor is connected to the overvoltage protection pin of the PWM controller and the distance between the third resistor and the overvoltage protection pin of the PWM controller is less than a second preset distance, the first end of the capacitor is connected to the overvoltage protection pin of the PWM controller and the distance between the third resistor and the overvoltage protection pin of the PWM controller is less than a third preset distance, and the second end of the third resistor and the second end of the capacitor are grounded.

[0009] Furthermore, the second branch further includes a fourth resistor, a first end of the fourth resistor is connected to the second end of the third resistor, and a second end of the fourth resistor is grounded.

[0010] Furthermore, the second branch further includes a first diode, the first diode is connected in series with the third resistor, and the distance between the first diode and the overvoltage protection pin of the PWM controller is less than a fourth preset distance.

[0011] Furthermore, the fourth preset distance is 10 mm.

[0012] Furthermore, the first branch further includes a second diode, a first end of the second diode is connected to a second end of the second resistor, and a second end of the second diode is connected to an auxiliary winding of the transformer.

[0013] Further, the first preset distance is 10 mm, the second preset distance is 10 mm, and the third preset distance is 10 mm.

[0014] Furthermore, the resistance of the first resistor is greater than or equal to 4.7 kilo-ohms and less than or equal to 200 kilo-ohms.

[0015] Furthermore, a resistance value of the second resistor is greater than or equal to 1 kilo-ohm and less than or equal to 200 kilo-ohm.

[0016] Furthermore, a resistance value of the third resistor is greater than or equal to 4.7 kilo-ohms and less than or equal to 200 kilo-ohms.

[0017] Furthermore, the capacitance value of the capacitor is greater than or equal to 10 picofarads and less than or equal to 100 picofarads.

[0018] In a second aspect, the utility model provides a POE power adapter, comprising the anti-interference circuit described in any one of the above embodiments.

[0019] The anti-interference circuit and POE power adapter provided by the embodiment of the utility model include a PWM controller, a first branch and a second branch, the overvoltage protection pin of the PWM controller is respectively connected to the first end of the first branch and the second end of the second branch, the second end of the first branch is connected to the auxiliary winding of the transformer; the second end of the second branch is grounded; the first branch includes a first resistor and a second resistor connected in series, the first end of the first resistor is connected to the overvoltage protection pin of the PWM controller and the distance to the overvoltage protection pin of the PWM controller is less than a first preset distance, the second end of the first resistor is connected to the first end of the second resistor, and the second end of the second resistor is connected to the auxiliary winding of the transformer; the second branch includes a third resistor and a capacitor connected in parallel, the first end of the third resistor is connected to the overvoltage protection pin of the PWM controller and the distance to the overvoltage protection pin of the PWM controller is less than the second preset distance, the first end of the capacitor is connected to the overvoltage protection pin of the PWM controller and the distance to the overvoltage protection pin of the PWM controller is less than the third preset distance, the second end of the third resistor and the second end of the capacitor are grounded, which can avoid the restart of the POE power supply due to the misjudgment of the OVP protection voltage, and improve the reliability of the POE power supply. BRIEF DESCRIPTION OF THE DRAWINGS

[0020] In order to more clearly illustrate the embodiments of the utility model or the technical solutions in the prior art, the following will briefly introduce the drawings required for use in the embodiments or the prior art descriptions. Obviously, the drawings described below are only some embodiments of the utility model. For ordinary technicians in this field, other drawings can be obtained based on these drawings without creative work. In the drawings:

[0021] Figure 1 It is a schematic diagram of the structure of the anti-interference circuit provided by the first embodiment of the utility model.

[0022] Figure 2 It is a schematic diagram of the structure of the anti-interference circuit provided by the second embodiment of the utility model.

[0023] Figure 3 It is a schematic structural diagram of an anti-interference circuit provided in the third embodiment of the utility model.

[0024] Figure 4 It is a schematic structural diagram of an anti-interference circuit provided in the fourth embodiment of the utility model.

[0025] Figure 5 It is a structural schematic diagram of an anti-interference circuit provided in the fifth embodiment of the utility model.

[0026] Figure 6It is a schematic diagram of the structure of an anti-interference circuit provided in the sixth embodiment of the present utility model. DETAILED DESCRIPTION

[0027] In order to make the purpose, technical scheme and advantages of the embodiments of the utility model clearer, the embodiments of the utility model are further described in detail below in conjunction with the accompanying drawings. Here, the illustrative embodiments of the utility model and their descriptions are used to explain the utility model, but are not intended to limit the utility model. It should be noted that, in the absence of conflict, the embodiments in this application and the features in the embodiments can be combined with each other arbitrarily.

[0028] It should be noted that the terms "including" and "having" and any variations thereof in the specification and claims of the present application and the above-mentioned drawings are intended to cover non-exclusive inclusions. For example, a process, method, system, product or apparatus comprising a series of steps or units is not necessarily limited to those steps or units clearly listed, but may include other steps or units that are not clearly listed or inherent to these processes, methods, products or apparatuses.

[0029] In order to facilitate understanding of the technical solution provided by this application, the relevant contents of the technical solution of this application are first explained below.

[0030] POE refers to the technology that can provide DC power to IP-based terminals (such as IP phones, wireless LAN access points, network cameras, etc.) while transmitting data signals. It can use existing standard Ethernet transmission cables to transmit data and power at the same time.

[0031] Figure 1 : is a schematic diagram of the structure of the anti-interference circuit provided by the first embodiment of the utility model, such as Figure 1 As shown, the anti-interference circuit provided by the embodiment of the utility model includes a PWM controller U, a first branch and a second branch, wherein:

[0032] The overvoltage protection pin 3 of the PWM controller U is respectively connected to the first end of the first branch and the second end of the second branch, the second end of the first branch is connected to the auxiliary winding Ws of the transformer T; the second end of the second branch is grounded;

[0033] The first branch includes a first resistor R1 and a second resistor R2 connected in series, a first end of the first resistor R1 is connected to the overvoltage protection pin 3 of the PWM controller U and a distance from the overvoltage protection pin 3 of the PWM controller U is less than a first preset distance, a second end of the first resistor R1 is connected to a first end of the second resistor R2, and a second end of the second resistor R2 is connected to the auxiliary winding Ws of the transformer T;

[0034] The second branch includes a third resistor R3 and a capacitor C in parallel, the first end of the third resistor R3 is connected to the overvoltage protection pin 3 of the PWM controller U and the distance between the third resistor R3 and the overvoltage protection pin 3 of the PWM controller U is less than the second preset distance, the first end of the capacitor C is connected to the overvoltage protection pin 3 of the PWM controller U and the distance between the capacitor C and the overvoltage protection pin 3 of the PWM controller U is less than the third preset distance, and the second end of the third resistor R3 and the second end of the capacitor C are grounded.

[0035] Specifically, the first circuit is used to weaken the interference of EFT in the circuit and isolate the interference signal of EFT in the circuit from entering the overvoltage protection pin 3 of the PWM controller U. The second circuit is used to filter out the interference signal entering the overvoltage protection pin 3 of the controller U, thereby ensuring that the PWM controller U will not restart the power supply due to misjudgment of overvoltage protection under abnormal working conditions. The PRT pin of the PWM controller U can be used as an overvoltage protection pin.

[0036] The first circuit and the second circuit can not only realize OVP voltage sampling, but also weaken and filter out interference signals caused by EFT (electrical fast pulse group), ensuring that the POE power supply will not restart due to misjudgment under abnormal working conditions of the PWM controller U.

[0037] The overvoltage protection pin 3 of the PWM controller U is connected to the first end of the first resistor R1, and the distance between the first end of the first resistor R1 and the overvoltage protection pin 3 of the PWM controller U is less than a first preset distance, such as 1 mm, 3 mm, 5 mm, 7 mm, 9 mm, etc. The first resistor R1 is used to isolate the interference signal of the EFT in the circuit from entering the overvoltage protection pin 3 of the PWM controller U. The first end of the second resistor R2 is connected to the second end of the first resistor R1, and the second end of the second resistor R2 is connected to the first end of the auxiliary winding Ws of the transformer T, and the second end of the auxiliary winding Ws of the transformer T is grounded.

[0038] The overvoltage protection pin 3 of the PWM controller U is connected to the first end of the third resistor R3, and the distance between the first end of the third resistor R3 and the overvoltage protection pin 3 of the PWM controller U is less than the second preset distance, such as 1mm, 2mm, 3mm, 4mm, 5mm, etc. The second end of the third resistor R3 is grounded. The overvoltage protection pin 3 of the PWM controller U is connected to the first end of the capacitor C, and the distance between the first end of the capacitor C and the overvoltage protection pin 3 of the PWM controller U is less than the third preset distance, such as 1mm, 2mm, 3mm, 4mm, 5mm, etc. The second end of the capacitor C is grounded. The third resistor R3 and the capacitor C are used to filter out interference signals entering the overvoltage protection pin 3 of the controller U. The PWM controller U can use a chip, and the specific chip model is selected according to actual needs, and the embodiment of the utility model is not limited.

[0039] The anti-interference circuit provided by the embodiment of the utility model includes a PWM controller, a first branch and a second branch, the overvoltage protection pin of the PWM controller is respectively connected to the first end of the first branch and the second end of the second branch, the second end of the first branch is connected to the auxiliary winding of the transformer; the second end of the second branch is grounded; the first branch includes a first resistor and a second resistor connected in series, the first end of the first resistor is connected to the overvoltage protection pin of the PWM controller and the distance to the overvoltage protection pin of the PWM controller is less than a first preset distance, the second end of the first resistor is connected to the first end of the second resistor, and the second end of the second resistor is connected to the auxiliary winding of the transformer; the second branch includes a third resistor and a capacitor connected in parallel, the first end of the third resistor is connected to the overvoltage protection pin of the PWM controller and the distance to the overvoltage protection pin of the PWM controller is less than the second preset distance, the first end of the capacitor is connected to the overvoltage protection pin of the PWM controller and the distance to the overvoltage protection pin of the PWM controller is less than the third preset distance, the second end of the third resistor and the second end of the capacitor are grounded, which can avoid the restart of the POE power supply due to the misjudgment of the overvoltage protection voltage, and improve the reliability of the POE power supply.

[0040] The anti-interference circuit provided by the embodiment of the utility model can ensure that the POE power supply does not restart under the EFT 2KV test condition when full voltage input (90-264V) and full load output.

[0041] Figure 2 : is a schematic diagram of the structure of the anti-interference circuit provided by the second embodiment of the utility model, such as Figure 2 As shown, based on the above embodiments, further, the second branch further includes a fourth resistor R4, a first end of the fourth resistor R4 is connected to the second end of the third resistor R3, and a second end of the fourth resistor R4 is grounded. By adding the fourth resistor R4, when establishing a circuit, it is convenient to select a resistor to meet the total resistance.

[0042] Figure 3 is a schematic diagram of the structure of an anti-interference circuit provided by the third embodiment of the utility model, Figure 4 : is a schematic diagram of the structure of the anti-interference circuit provided by the fourth embodiment of the utility model, such as Figure 3 and Figure 4 As shown, based on the above embodiments, further, the second branch further includes a first diode D1, the first diode D1 is connected in series with the third resistor R3, and the distance between the first diode D1 and the overvoltage protection pin 3 of the PWM controller U is less than a fourth preset distance, such as 1mm, 2mm, 3mm, 4mm, 5mm, etc. The first diode D1 plays a role of rectification.

[0043] like Figure 3 As shown, the overvoltage protection pin 3 of the PWM controller U is connected to the anode of the first diode D1, the distance between the overvoltage protection pin 3 of the PWM controller U and the anode of the first diode D1 is less than the fourth preset distance, the cathode of the first diode D1 is connected to the first end of the third resistor R3, the distance between the first end of the third resistor R3 and the anode of the first diode D1 is less than the second preset distance, and the second end of the third resistor R3 is grounded.

[0044] like Figure 4 As shown, the overvoltage protection pin 3 of the PWM controller U is connected to the first end of the third resistor R3, the distance between the first end of the third resistor R3 and the anode of the first diode D1 is less than the second preset distance, the second end of the third resistor R3 is connected to the anode of the first diode D1, the distance between the overvoltage protection pin 3 of the PWM controller U and the anode of the first diode D1 is less than the fourth preset distance, and the cathode of the first diode D1 is grounded.

[0045] On the basis of the above embodiments, further, the fourth preset distance is 10 mm. The distance between the anode of the first diode D1 and the overvoltage protection pin 3 of the PWM controller U can be 1 mm, 2 mm, 3 mm, 4 mm, 5 mm, 6 mm, 7 mm, 8 mm, 9 mm, etc.

[0046] Figure 5 : is a schematic diagram of the structure of the anti-interference circuit provided by the fifth embodiment of the utility model, such as Figure 5 As shown, based on the above embodiments, further, the first branch also includes a second diode D2, a first end of the second diode D2 is connected to the second end of the second resistor R2, and a second end of the second diode D2 is connected to the auxiliary winding Ws of the transformer T. The second diode D2 is used for rectification.

[0047] Figure 6 : is a schematic diagram of the structure of the anti-interference circuit provided by the sixth embodiment of the utility model, such as Figure 6 As shown, based on the above embodiments, further, the first branch also includes a second diode D2, a first end of the second diode D2 is connected to the second end of the second resistor R2, and the second end of the second diode D2 is connected to the auxiliary winding Ws of the transformer T. The second branch also includes a first diode D1, the first diode D1 is connected in series with the third resistor R3, and the distance between the first diode D1 and the overvoltage protection pin 3 of the PWM controller U is less than the fourth preset distance.

[0048] On the basis of the above embodiments, further, the first preset distance is 10 mm. The distance between the first end of the first resistor R1 and the overvoltage protection pin 3 of the PWM controller U can be 1 mm, 2 mm, 3 mm, 4 mm, 5 mm, 6 mm, 7 mm, 8 mm, 9 mm, etc.

[0049] On the basis of the above embodiments, further, the second preset distance is 10 mm. The distance between the first end of the third resistor R3 and the overvoltage protection pin 3 of the PWM controller U can be 1 mm, 2 mm, 3 mm, 4 mm, 5 mm, 6 mm, 7 mm, 8 mm, 9 mm, etc.

[0050] On the basis of the above embodiments, further, the third preset distance is 10 mm. The distance between the first end of the capacitor C and the overvoltage protection pin 3 of the PWM controller U can be 1 mm, 2 mm, 3 mm, 4 mm, 5 mm, 6 mm, 7 mm, 8 mm, 9 mm, etc.

[0051] On the basis of the above embodiments, in order to further improve the suppression effect of interference signals and prevent the peripheral signals of the PWM controller U from affecting it, the resistance of the first resistor is greater than or equal to 4.7 kilo-ohms and less than or equal to 200 kilo-ohms.

[0052] On the basis of the above embodiments, in order to further improve the suppression effect of interference signals and prevent the PWM controller U from being affected by peripheral signals thereto, the resistance of the second resistor R2 is greater than or equal to 1 kilo-ohm and less than or equal to 200 kilo-ohm.

[0053] On the basis of the above embodiments, in order to further improve the suppression effect of interference signals and prevent the peripheral signals of the PWM controller U from affecting it, the resistance of the third resistor R3 is greater than or equal to 4.7 kilo-ohms and less than or equal to 200 kilo-ohms.

[0054] On the basis of the above embodiments, in order to further improve the suppression effect of interference signals and prevent the PWM controller U from being affected by peripheral signals thereto, the capacitance value of the capacitor C is greater than or equal to 10 pF and less than or equal to 100 pF.

[0055] An embodiment of the utility model provides a POE power adapter, comprising the anti-interference circuit described in any of the above embodiments.

[0056] The various embodiments in this specification are described in a progressive manner, and the same or similar parts between the various embodiments can be referenced to each other, and each embodiment focuses on the differences from other embodiments.

[0057] In the description of this specification, the description with reference to the terms "one embodiment", "a specific embodiment", "some embodiments", "for example", "example", "specific example", or "some examples" means that the specific features, structures, materials or characteristics described in conjunction with the embodiment or example are included in at least one embodiment or example of the utility model. In this specification, the schematic representation of the above terms does not necessarily refer to the same embodiment or example. Moreover, the specific features, structures, materials or characteristics described may be combined in any one or more embodiments or examples in a suitable manner.

[0058] The specific embodiments described above further illustrate the purpose, technical solutions and beneficial effects of the utility model in detail. It should be understood that the above description is only a specific embodiment of the utility model and is not intended to limit the scope of protection of the utility model. Any modifications, equivalent substitutions, improvements, etc. made within the spirit and principles of the utility model should be included in the scope of protection of the utility model.

Claims

1. An anti-interference circuit, characterized in that: It includes a PWM controller, a first branch and a second branch, wherein: The overvoltage protection pin of the PWM controller is respectively connected to the first end of the first branch and the second end of the second branch, the second end of the first branch is connected to the auxiliary winding of the transformer; the second end of the second branch is grounded; The first branch includes a first resistor and a second resistor connected in series, a first end of the first resistor is connected to an overvoltage protection pin of the PWM controller and a distance from the overvoltage protection pin of the PWM controller is less than a first preset distance, a second end of the first resistor is connected to a first end of the second resistor, and a second end of the second resistor is connected to an auxiliary winding of the transformer; The second branch includes a third resistor and a capacitor connected in parallel, the first end of the third resistor is connected to the overvoltage protection pin of the PWM controller and the distance between the third resistor and the overvoltage protection pin of the PWM controller is less than a second preset distance, the first end of the capacitor is connected to the overvoltage protection pin of the PWM controller and the distance between the third resistor and the overvoltage protection pin of the PWM controller is less than a third preset distance, and the second end of the third resistor and the second end of the capacitor are grounded.

2. The anti-interference circuit according to claim 1, characterized in that: The second branch further includes a fourth resistor, a first end of the fourth resistor is connected to the second end of the third resistor, and a second end of the fourth resistor is grounded.

3. The anti-interference circuit according to claim 1, characterized in that: The second branch further includes a first diode, which is connected in series with the third resistor, and a distance between the first diode and an overvoltage protection pin of the PWM controller is less than a fourth preset distance.

4. The anti-interference circuit according to claim 3, characterized in that: The fourth preset distance is 10 mm.

5. The anti-interference circuit according to claim 1, characterized in that: The first branch further includes a second diode, a first end of the second diode is connected to a second end of the second resistor, and a second end of the second diode is connected to an auxiliary winding of the transformer.

6. The anti-interference circuit according to claim 1, characterized in that: The first preset distance is 10 mm, the second preset distance is 10 mm and the third preset distance is 10 mm.

7. The anti-interference circuit according to claim 1, characterized in that: The resistance of the first resistor is greater than or equal to 4.7 kilo-ohms and less than or equal to 200 kilo-ohms.

8. The anti-interference circuit according to claim 1, characterized in that: The resistance of the second resistor is greater than or equal to 1 kilo-ohm and less than or equal to 200 kilo-ohm.

9. The anti-interference circuit according to claim 1, characterized in that: The resistance of the third resistor is greater than or equal to 4.7 kilo-ohms and less than or equal to 200 kilo-ohms.

10. The anti-interference circuit according to any one of claims 1 to 9, characterized in that: The capacitance value of the capacitor is greater than or equal to 10 picofarads and less than or equal to 100 picofarads.

11. A POE power adapter, characterized in that: The anti-interference circuit comprises the anti-interference circuit according to any one of claims 1 to 10.

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