High-temperature and high-pressure fully-sealed silicon stack

Abstract

The utility model discloses a high-temperature and high-pressure fully-sealed silicon stack. Silicon carbide is selected as a base material of a chip; the characteristics of high temperature resistance, high voltage resistance and high frequency resistance of the chip are realized based on the characteristics of high voltage resistance, low on resistance, high frequency, high temperature and the like of silicon carbide; the silicon carbide chip and the bridge lead are welded and connected in series by adopting the nano-silver paste to form the chip assembly, so that the chip assembly has high connection strength, high conductivity and high thermal conductivity; a silicon stack shell is redesigned, a ceramic material is adopted to prepare a shell main body, the insulation voltage between chips is increased to 12KV through an isolation island, two lead-out ends of threaded ceramics are led out from the outside to wrap a cathode and an anode, the discharge distance of a silicon stack is enlarged, and the insulation voltage is improved; a pouring sealant is adopted to carry out full-sealing glue pouring on the combined chip assemblies, so that the sparking phenomenon caused by air ionization when high voltage is applied is prevented; the silicon stack provided by the utility model meets the technical requirements of 300C junction temperature and 10KV reverse working voltage.

Description

Technical Field

[0001] The utility model belongs to the technical field of semiconductor devices, and in particular relates to a high-temperature and high-pressure fully sealed silicon stack. Background Art

[0002] Power electronics technology is an important component of electronic information technology and is an indispensable technology for realizing informatization, intelligence and high efficiency energy saving in all fields of the world economy today.

[0003] In power electronics technology, semiconductor diodes are the most basic unit. In the field of automobile and aircraft generator ignition, a silicon stack with a temperature greater than or equal to 300°C and a reverse working voltage greater than 10KV is required to achieve the generator ignition function. Due to the limitations of semiconductor diode manufacturing technology, there is currently no ability to make a single diode above 10KV, which requires multiple semiconductor diodes to be connected in series to achieve the technical condition of a reverse working voltage greater than 10KV.

[0004] The current design and process technology can only meet the maximum junction temperature of 200°C and the reverse working voltage can only reach 5000V. The main reasons are as follows:

[0005] 1. Mainly based on silicon-based materials, the operating junction temperature cannot be increased due to material limitations;

[0006] 2. The temperature limitation of silicon stack potting glue restricts the technological development of silicon stacks above 250°C.

[0007] 3. Limitations of chip connection solder. Currently, there are not many types of solders above 300°C suitable for semiconductor device welding, which has affected the research and development of high-temperature silicon stacks.

[0008] 4. Limitation of the insulation voltage of the shell. Due to the original shell manufacturing technology, the materials used generally use plastic or glass as the insulating medium, and the insulation voltage can only meet the requirements of silicon stack products below 5000V.

[0009] 5. The lag of silicon stack chip technology. Before this application, semiconductor diode chips were mainly manufactured with silicon-based materials. Such chips were affected by junction temperature and voltage and could not meet the technical requirements of 300°C high temperature and 10KV reverse working voltage. Utility Model Content

[0010] The purpose of the utility model is to provide a high-temperature and high-pressure fully sealed silicon stack, which is modified from five aspects, namely, the selection of chip basic materials, potting glue, solder, redesign of shell insulation voltage, and assembly of high-temperature and high-pressure silicon stack, to achieve a silicon stack design with a junction temperature greater than or equal to 300°C and a reverse working voltage greater than 10KV.

[0011] In order to achieve the above technical effects, the utility model adopts the following technical solutions:

[0012] A high temperature and high pressure fully sealed silicon stack is proposed, comprising:

[0013] A high temperature and high pressure fully sealed silicon stack is proposed, comprising:

[0014] The isolation island type ceramic housing (1) is in the shape of a slot with an open opening; threaded ceramic lead-out terminals (5) are respectively led out from both ends of the housing, and the interior of the housing is divided into a plurality of isolation wells (6) insulated from each other by the isolation island (2) structure;

[0015] The silicon stack cathode (3) and the silicon stack anode (4) extend from threaded ceramic lead-out terminals (5) at both ends of the isolated island-type ceramic housing (1) respectively;

[0016] A plurality of silicon carbide chips (8) are respectively arranged in the plurality of isolation wells (6);

[0017] Bridge leads are used to connect the silicon carbide chips (8) to realize the series connection of multiple silicon carbide chips (8), and to realize the connection between the silicon carbide chip (8) and the silicon stack cathode (3) and the silicon stack anode (4);

[0018] A potting compound is filled in the isolated island type ceramic housing (1);

[0019] The cover plate is welded together with the isolation island type ceramic housing (1) to form a high temperature and high pressure fully sealed silicon stack.

[0020] In some embodiments of the utility model, the top frame of the isolated island-type ceramic housing (1) is metallized around, and the silicon stack cathode (3) and silicon stack anode (4) are sintered at both ends; the bottom of the isolation well (6) is metallized.

[0021] In some embodiments of the present invention, gold is plated on the metallized portion.

[0022] In some embodiments of the utility model, the bridge lead is composed of a small molybdenum sheet (71), a copper wire (73) and a large molybdenum sheet (72); the small molybdenum sheet (71) and the large molybdenum sheet (72) are interconnected by a copper wire (73); the lower part of the large molybdenum sheet (72) is welded to the bottom of the isolation well (6), and the upper part is welded to the silicon stack cathode of the silicon carbide chip (8); the small molybdenum sheet (71) is welded to the silicon stack anode of the silicon carbide chip (8).

[0023] In some embodiments of the present invention, the silicon stack further comprises a CPC metal plate (9) sintered in the metallized isolation well (6).

[0024] In some embodiments of the present invention, the isolated island type ceramic housing (1) is made of 96% Al2O3 ceramic powder and fired at 1600°C using a special mold.

[0025] In some embodiments of the utility model, the silicon carbide chip (8) and the bridge lead are vacuum welded in a eutectic welding furnace using nano silver paste to form a chip assembly.

[0026] In some embodiments of the present invention, the chip assembly is vacuum bonded in a eutectic soldering furnace using nano silver paste.

[0027] In some embodiments of the present invention, the bridge lead is gold-plated or silver-plated.

[0028] Compared with the prior art, the advantages and positive effects of the utility model are as follows: in the high-temperature and high-pressure fully sealed silicon stack proposed in the present application, silicon carbide is selected as the basic material of the chip, and the high-temperature, high-pressure and high-frequency characteristics of the chip are realized based on the high withstand voltage, low on-resistance, high frequency and high temperature of silicon carbide; nano silver paste is used to weld the silicon carbide chip and the bridge lead in series to form a chip assembly, and the nano silver paste is resistant to high temperatures of 300°C and resistant to high temperatures of more than 400°C after curing, so that the chip assembly can be sintered at low temperature and serve at high temperature, and has high connection strength and high conductivity. and high thermal conductivity; the silicon stack shell is redesigned, and the shell body is made of ceramic material. The insulation voltage between chips is increased to 12KV through the isolation island, and the two threaded ceramic lead-out ends are directly wrapped around the cathode and the anode, which expands the discharge distance of the silicon stack and thus improves the insulation voltage; the chip components after assembly are fully sealed with potting glue to prevent air ionization and sparking when high voltage is applied; the silicon stack prepared based on the structure provided by the utility model meets the technical requirements of a junction temperature of 300°C and a reverse working voltage of 10KV.

[0029] After reading the detailed description of the embodiments of the present invention in conjunction with the accompanying drawings, other features and advantages of the present invention will become more clear. BRIEF DESCRIPTION OF THE DRAWINGS

[0030] Figure 1 This is a schematic diagram of the assembly structure of the high-temperature and high-pressure fully sealed silicon stack proposed by the utility model;

[0031] Figure 2 This is a side view of the structure of the high temperature and high pressure fully sealed silicon stack proposed by the utility model;

[0032] Figure 3 This is a schematic diagram of the top view of the high-temperature and high-pressure fully sealed silicon stack proposed by the utility model;

[0033] Figure 4This is a schematic diagram of the process curve for welding the high-temperature and high-pressure fully sealed silicon stack proposed by the utility model using nano silver paste;

[0034] Figure 5 This is a schematic diagram of the structure of the bridge lead in the high-temperature and high-pressure fully sealed silicon stack proposed by the utility model;

[0035] Figure 6 It is a schematic diagram of the top view structure of the bridge lead in the high temperature and high pressure fully sealed silicon stack proposed by the utility model;

[0036] Figure 7 This is a schematic diagram of the series structure of silicon carbide chips in the high-temperature and high-pressure fully sealed silicon stack proposed by the utility model;

[0037] Figure 8 This is a schematic diagram of the structure of the silicon carbide chips of the high-temperature and high-pressure fully sealed silicon stack proposed by the utility model, which are connected in series and then assembled in a ceramic housing;

[0038] Graphic markings: 1. Isolation island type ceramic shell; 2. Isolation island; 3. Silicon stack cathode; 4. Silicon stack anode; 5. Threaded ceramic lead-out terminal; 6. Isolation well; 71. Small molybdenum sheet; 72. Large molybdenum sheet; 73. Copper wire; 8. Silicon carbide chip; 9. CPC metal plate. DETAILED DESCRIPTION

[0039] The specific implementation methods of the present application are further described in detail below in conjunction with the accompanying drawings.

[0040] In order to achieve the technical indicators of junction temperature 300°C and reverse working voltage 10KV, this application combines the development of semiconductor materials and chip manufacturing technology to carry out technical transformation from the following aspects.

[0041] 1. Selection of chip basic materials.

[0042] Due to the characteristics of silicon (Si)-based materials, the junction temperature of chip products made from it can only reach 200°C at most. To address this problem, this application uses silicon carbide (SiC) as the basic material for chips. Silicon carbide (SiC) materials have the following characteristics:

[0043] 1. Resistant to high pressure.

[0044] The insulation breakdown field strength of SiC is 10 times that of Si. Compared with Si devices, SiC can make high-voltage power devices ranging from 600V to several thousand V through higher impurity concentrations and thinner drift layers.

[0045] 2. Low on-resistance.

[0046] For high-voltage power devices, the impedance is mainly composed of the impedance of the drift layer. Therefore, the use of SiC can obtain high-voltage devices with very low on-resistance per unit area. Theoretically, for devices with the same voltage resistance, the drift layer impedance per unit area of ​​SiC can be reduced to 1 / 300 of that of Si.

[0047] 3. High frequency.

[0048] In order to improve the problem of increased on-resistance caused by high withstand voltage, traditional Si materials mainly use minority carrier devices (bipolar devices) such as IGBT (Insulated Gate Bipolar Transistor), but this approach will introduce large switching losses and heat will limit the high-frequency drive of IGBT. However, SiC materials can achieve high withstand voltage with majority carrier devices (Schottky barrier diodes and MOSFETs) with high-frequency device structures, thereby achieving the three characteristics of "high withstand voltage", "low on-resistance" and "high frequency" at the same time.

[0049] 4. High temperature.

[0050] SiC has a wider band gap, three times that of Si, so SiC power devices can operate stably even at high temperatures.

[0051] In summary, silicon carbide diodes made from silicon carbide (SiC) also have the characteristics of resistance to high temperature, high voltage and high frequency.

[0052] The main processing process of silicon carbide SiC chip includes SiC epitaxial wafer-photolithography-etching-ion implantation-cathode anode metal passivation-wafer cutting. The chip used in this application adopts a hybrid PIN-Schottky secondary structure.

[0053] 2. 300℃ resistant potting glue.

[0054] The existing potting glue can only solve the problem of potting products below 250℃. If the temperature exceeds 280℃, the glue will be denatured and lose its original elasticity. To achieve a high voltage of 10KV, organic glue must be filled to isolate the air to prevent the air from being ionized and ignited when the high voltage is applied. This glue must not only withstand the high voltage of 10KV, but also withstand the high temperature of 300℃. In this application, a potting glue that can withstand 300℃ and has an insulation voltage of 15KV is designed.

[0055] This glue is composed of a first component glue and a second component curing agent, wherein the composition of the first component glue is shown in Table 1:

[0056] Table 1

[0057] .

[0058] The composition of the second component curing agent is shown in Table 2:

[0059] Table 2

[0060] .

[0061] In Tables 1 and 2 above, the CAS number is an internationally accepted number, and each CAS number represents a chemical substance.

[0062] In order to meet the technical requirements of the product at 300℃ and 10KV, the first component and the second component were tested in the following proportions, and the best ratio was shown in Table 3:

[0063] Table 3

[0064] .

[0065] After testing, the best weight ratio is first component: second component = 140:100.

[0066] 3. 300℃ solder.

[0067] The maximum temperature of ordinary silver, lead and tin solder is only 285℃. When the product is stored at 300℃, the solder will melt, affecting the reliability of the product. This application uses nano silver solder paste solder that can withstand 300℃ high temperature and more than 400℃ after curing. The characteristics of this nano silver solder paste are: low temperature sintering (250℃), high temperature service, high connection strength, high electrical conductivity and high thermal conductivity, and it can replace high lead solder.

[0068] The comparison of parameters of the nano silver solder paste before and after sintering is shown in Table 4 below:

[0069] Table 4

[0070] .

[0071] In the present application, the nano silver paste solder is used between the silicon carbide chip 8 and the isolated island ceramic housing 1, and between the lead and the silicon carbide chip 8; due to the characteristics of this solder, the tube seat used in the silicon stack, the anode and cathode surfaces of the silicon carbide chip 8, the leads, etc. must all be silver-plated or gold-plated.

[0072] When using the nano silver paste for welding, Figure 4 As shown, the sintering is carried out using the following welding process:

[0073] 1. Sinter to 100°C at a heating rate of 5°C-10°C / min;

[0074] 2. After maintaining the first set time at 100°C, sinter to 250°C at a heating rate of 10°C-15°C / min;

[0075] 3. After keeping at 250℃ for the second set time (30-60min), cool down at a rate of 5℃-10℃ / min. In the diagram, @ indicates keeping at a certain temperature.

[0076] Each solder paste has its inherent properties. The temperature and time designed in the above soldering process are used in this application to ensure that the nano silver paste is fully reduced. The nano silver paste firmly bonds the contacting gold-plated surface and the silver surface of the silicon carbide chip together.

[0077] 4. Redesign of casing insulation voltage.

[0078] The existing silicon stack housing is generally made of plastic or glass shell, and the insulation voltage is generally below 5000V. The existing ceramic housing can only reach 8000V at most. In order to meet the insulation voltage requirements of the entire product, this application designs a high-voltage silicon stack housing that can withstand 18KV, such as Figure 1 , Figure 2 and Figure 3 As shown, it is composed of an isolated island ceramic housing 1, a silicon stack cathode 3, a silicon stack anode 4 and a threaded ceramic lead-out terminal 5. The main body of the isolated island ceramic housing 1 is in the shape of an open slot, with an isolated island 2 protruding at the bottom of the slot. The two ends of the isolated island ceramic housing 1 are metallized and lead out the silicon stack cathode 3 and the silicon stack anode 4. The threaded ceramic lead-out terminal 5 is connected to the two sides of the isolated island ceramic housing 1 and is used to wrap the silicon stack cathode 3 and the silicon stack anode 4. The top frame, the interior, and the part where the silicon stack cathode 3 and the silicon stack anode 4 are led out of the isolated island ceramic housing 1 are metallized, and the isolation well 6 is metallized and gold-plated after metallization. The cathode surface and the anode surface of the silicon carbide chip 8 and the lead wire are gold-plated or silver-plated.

[0079] The isolation island 2 divides the space in the isolation island type ceramic housing 1 into a plurality of isolation wells 6 insulated from each other. The isolation wells 6 are used for arranging silicon carbide chips 8 .

[0080] The isolation island type ceramic housing 1 adopts the design of the internal isolation island 2, which directly increases the insulation voltage between chips to 12KV; its two external lead-out terminals adopt a threaded ceramic design, directly wrapping the silicon stack cathode 3 and the silicon stack anode 4 with threaded ceramics, thereby expanding the discharge distance and improving the insulation voltage.

[0081] The process steps for designing the shell in this application include:

[0082] (a) Processing of high-voltage isolation island ceramic parts;

[0083] (b) Porcelain metallization: including the area around the top frame of the porcelain, the areas at both ends of the porcelain where the external leads are sintered, and the areas inside the porcelain where multiple isolation wells 6 are to be sintered with CPC (copper-molybdenum-copper, composite material) metal plates 9;

[0084] (c) Processing of copper core lead wires; that is, processing of lead wires;

[0085] (d) Processing CPC metal plate 9; the plate area is less than or equal to the bottom area of ​​isolation well 6;

[0086] (e) Silver-copper solder sintering: Sintering the CPC metal plate 9 in the metallized isolation well 6 with silver-copper solder;

[0087] (f) Gold plating: All metallized locations, the anode and cathode surfaces of the silicon carbide chip, and the bridge connection bridges are gold plated;

[0088] (g) Helium leak detection and rough leak detection: Check whether the sealing part and the lead wires at both ends are leaking;

[0089] (h) Solderability inspection: Check the external leads at both ends and the wettability of soldering, that is, whether the external leads at both ends can be well soldered to the circuit board with solder;

[0090] (i) Appearance inspection: Check whether the cover plate and ceramic body have dents or scratches, and whether the gold plating layer is damaged.

[0091] The key point of this process is to process high-voltage ceramics with isolated islands, process the external lead-out terminals into a spiral shape, increase the discharge distance to increase the insulation voltage, and use 96% AL2O3 ceramic powder, which is fired at 1600°C in a special mold.

[0092] 5. High temperature and high pressure fully sealed silicon stack design.

[0093] 1. The silicon stack chip uses silicon carbide diode chips. The rated current of each chip is 5A on average, and the reverse withstand voltage is 3300V. A total of 5 chips are connected in series, and the actual reverse voltage can reach 16500V, which fully meets the product's rated current of 1.5A and reverse voltage of 10KV.

[0094] 2. If Figure 5 and Figure 6 As shown, in order to realize the serial interconnection of 5 silicon carbide chips, a lead is designed, with a small molybdenum sheet 71 and a large molybdenum sheet 72 at both ends of the lead, and a copper wire 73 is used in the middle to interconnect after high-temperature silver-copper sintering. After being processed into the shape shown in the figure, it is gold-plated or silver-plated.

[0095] The small molybdenum sheet 71 is used to connect to the anode of the chip; the large molybdenum sheet 72 is connected to the bottom of the isolation well 6 of the housing at the bottom, and connected to the cathode surface of the silicon carbide chip 8 at the top.

[0096] The silicon carbide chips at both ends of the series assembly are connected to the silicon stack cathode 3 and the silicon stack anode 4 respectively through leads.

[0097] 3. High temperature and high pressure silicon stack assembly.

[0098] After the design and processing of the high-pressure shell for the product and the processing and potting technology of the high-temperature 300℃ potting glue are completed, the high-temperature and high-pressure silicon stack is assembled.

[0099] The processing technology flow is as follows: shell cleaning, chip component processing, assembly, microscopic inspection, electrical performance testing, glue filling and baking, internal visual inspection, capping, marking, screening, packaging and warehousing.

[0100] (1) Shell cleaning: Use anhydrous ethanol to scrub the gold-plated isolation island ceramic shell 1 twice, dry it and set it aside;

[0101] (2) Chip assembly processing: Use a special graphite mold to assemble 5 silicon carbide chips 8 according to Figure 7 The connection method is as follows: Figure 4 The nano silver paste vacuum welding curve is vacuum welded in a eutectic welding furnace to form chip components.

[0102] (3) Assembly: Reuse Figure 4 The nano silver solder paste vacuum welding curve shown in FIG. 1 is used to combine the chip assembly with the isolated island ceramic housing 1 in a eutectic welding furnace to form a chip assembly as shown in FIG. Figure 8 The combination shown.

[0103] (4) Microscopic inspection: After assembly, the surface condition of the chip and the melting condition of the solder paste are inspected under a microscope to prevent the chip from being cracked, scratched, and having problems with solder paste adhesion, tin slag, and other excess materials.

[0104] (5) Electrical performance test: Use a 20KV high-voltage test bench to test the reverse peak voltage and use a high-power comprehensive test bench to test the forward peak voltage.

[0105] (6) The colloid filling process includes:

[0106] (a) According to the amount of product, prepare the glue at a weight ratio of 140:100;

[0107] (b) Use a stirring tool to stir the glue in a clockwise direction until it is evenly mixed, and then let it stand for 30 minutes;

[0108] (c) Fill the glue into the needle of the automatic glue dispensing machine and fill the product with glue according to the glue amount specified in the process documents;

[0109] (d) After the product is filled with glue, place the product in a vacuum chamber to evacuate the air bubbles in the product. After the product is left to stand, the bubbles are broken under a microscope.

[0110] (e) After curing indoors for 30 minutes, cure in a drying oven at 60°C for another 30-60 minutes.

[0111] (7) Internal visual inspection: Check whether there are burrs, cotton wool and other excess materials on the surface after the glue is cured;

[0112] (8) Sealing cap: Use a parallel welding machine to seal the cover plate and the shell together under certain pressure, voltage and speed conditions;

[0113] (9) Marking: Mark the cover by screen printing according to the requirements of the detailed specifications.

[0114] (10) Screening: Screen products according to the requirements of detailed specifications to ensure they meet factory standards.

[0115] The comparison between this application and the prior art is shown in Table 5 below:

[0116] Table 5

[0117] .

[0118] It can be seen from the data in the table that the high-temperature and high-pressure fully sealed silicon stack prepared by the structure of the present application shows better performance in reverse transition voltage, maximum reverse repetitive peak voltage, maximum forward peak current, maximum surge current, maximum forward peak voltage, maximum reverse leakage current, operating junction temperature and storage temperature than other similar products currently available.

[0119] It should be pointed out that the above description is not a limitation of the present invention, and the present invention is not limited to the above examples. Changes, modifications, additions or substitutions made by ordinary technicians in this technical field within the essential scope of the present invention should also fall within the scope of protection of the present invention.

Claims

1. A high temperature and high pressure fully sealed silicon stack, characterized in that: include: The isolated island-type ceramic housing (1) is in the shape of a trough with an open opening; The two ends of the lead-out thread ceramic terminals (5) are respectively led out, and the interior thereof is divided into a plurality of mutually insulated isolation wells (6) by an isolation island (2) structure; The silicon stack cathode (3) and the silicon stack anode (4) extend from threaded ceramic lead-out terminals (5) at both ends of the isolated island-type ceramic housing (1) respectively; A plurality of silicon carbide chips (8) are respectively arranged in the plurality of isolation wells (6); Bridge leads are used to connect the silicon carbide chips (8) to realize the series connection of multiple silicon carbide chips (8), and to realize the connection between the silicon carbide chip (8) and the silicon stack cathode (3) and the silicon stack anode (4); A potting compound is filled in the isolated island type ceramic housing (1); The cover plate is welded together with the isolation island type ceramic housing (1) to form a high temperature and high pressure fully sealed silicon stack.

2. The high temperature and high pressure fully sealed silicon stack according to claim 1, characterized in that: The top frame of the isolated island-type ceramic housing (1) is surrounded by metallization treatment, as well as the parts of the sintered silicon stack cathode (3) and the silicon stack anode (4) at both ends; The bottom of the isolation well (6) is metallized.

3. The high temperature and high pressure fully sealed silicon stack according to claim 2, characterized in that: The metallized parts are plated with gold.

4. The high temperature and high pressure fully sealed silicon stack according to claim 2, characterized in that: The bridge lead is composed of a small molybdenum sheet (71), a copper wire (73) and a large molybdenum sheet (72); the small molybdenum sheet (71) and the large molybdenum sheet (72) are interconnected in the middle by the copper wire (73); the lower part of the large molybdenum sheet (72) is welded to the bottom of the isolation well (6), and the upper part is welded to the cathode surface of the silicon carbide chip (8); the small molybdenum sheet (71) is welded to the anode surface of the silicon carbide chip (8).

5. The high temperature and high pressure fully sealed silicon stack according to claim 2, characterized in that: The silicon stack also includes a CPC metal plate (9) sintered in the metallized isolation well (6).

6. The high temperature and high pressure fully sealed silicon stack according to claim 1, characterized in that: The isolated island type ceramic shell (1) is made of 96% Al2O3 ceramic powder and fired at 1600°C using a special mold.

7. The high temperature and high pressure fully sealed silicon stack according to claim 1, characterized in that: The silicon carbide chip (8) and the bridge lead are vacuum welded in a eutectic welding furnace using nano silver paste to form a chip assembly.

8. The high temperature and high pressure fully sealed silicon stack according to claim 7, characterized in that: The chip assembly is vacuum bonded in a eutectic soldering furnace using nano silver paste.

9. The high temperature and high pressure fully sealed silicon stack according to claim 4, characterized in that: The bridge leads are gold-plated or silver-plated.

Images