Heterojunction solar cell coating equipment

Abstract

The utility model provides heterojunction solar cell coating equipment which comprises a front surface coating process cavity and a back surface coating process cavity which are connected, and transmission mechanisms are arranged in the front surface coating process cavity and the back surface coating process cavity. The front surface coating process cavity and the back surface coating process cavity are used for completing a solar cell coating process on the front surface and the back surface of a target silicon wafer respectively when the transmission mechanism transmits the hollow-out carrier plate on which the target silicon wafer is placed to pass through; in the production process, the target silicon wafer on the conveyed hollowed-out carrier plate can be directly and continuously coated, the silicon wafer does not need to be turned over and taken out, the silicon wafer can be effectively prevented from being polluted by air, and the production efficiency is improved.

Description

Technical Field

[0001] The present application relates to the technical field of solar cell production, and in particular to a heterojunction solar cell coating device. Background Art

[0002] In the current manufacturing process of heterojunction solar cells, the use of process deposition is a standard production method. This process involves coating the front and back of the silicon wafer separately to manufacture different layers of the cell. In order to avoid contamination and improve the conversion efficiency of solar cells, the manufacturing process usually follows the following order for coating: first deposit the intrinsic layer on the front of the silicon wafer, then the doped layer on the back, followed by the intrinsic layer on the back of the silicon wafer, and finally the doped layer on the front.

[0003] However, the existing process generally completes the film coating on the front side of the silicon wafer through a coating chamber first, and then after the silicon wafer is turned over, the same type of film coating on the back side of the silicon wafer is completed through the same coating chamber, and then the above operation is repeated through other types of coating chambers until the solar cell coating process is completed. In the process of alternating between the front and back sides of the silicon wafer, the silicon wafer and the silicon wafer carrier need to be taken out of the vacuum coating chamber and exposed to the air environment, and the silicon wafer is turned over by a flipping mechanism, and the carrier is replaced.

[0004] In summary, the traditional solution will cause the silicon wafer to come into contact with the air during the production process, causing the silicon wafer to be contaminated and affecting the battery performance. In addition, a mechanism for flipping and replacing the carrier is required, which affects the battery production efficiency and cost. Utility Model Content

[0005] The main purpose of the embodiments of the present application is to propose a heterojunction solar cell coating device, which aims to solve the technical problems that in the traditional production process, silicon wafers will come into contact with air, affecting the performance of the battery, and the need to turn over and replace the carrier mechanism, resulting in low efficiency and high cost.

[0006] To achieve the above-mentioned purpose, an embodiment of the present application proposes a heterojunction solar cell coating device, comprising a front coating process chamber and a back coating process chamber that are connected to each other, wherein the front coating process chamber and the back coating process chamber are both provided with a transmission mechanism, and the front coating process chamber and the back coating process chamber are used to complete the solar cell coating process on the front and back sides of the target silicon wafer respectively when the hollow carrier plate with the target silicon wafer placed thereon is transmitted by the transmission mechanism.

[0007] In some embodiments, a front coater is disposed on the upper inner side of the front coating process chamber, which is used to sequentially deposit a front intrinsic layer, a front doped layer and a front transparent oxide layer on the front side of the target silicon wafer when the hollow carrier is transported by the transport mechanism; a front coater is disposed on the lower inner side of the back coating process chamber, which is used to sequentially deposit a back intrinsic layer, a back doped layer and a back transparent oxide layer on the back side of the target silicon wafer when the hollow carrier is transported by the transport mechanism.

[0008] In some embodiments, the front coating process chamber includes a first process chamber and a second process chamber connected in sequence, and the back coating process chamber includes a third process chamber and a fourth process chamber connected in sequence; wherein the first process chamber is used to deposit the front intrinsic layer and the front doped layer on the front side of the target silicon wafer when the hollow carrier passes by; the second process chamber is used to deposit the front transparent oxide layer on the outside of the front doped layer when the hollow carrier passes by; the third process chamber is used to deposit the back intrinsic layer and the back doped layer on the back side of the target silicon wafer when the hollow carrier passes by; and the fourth process chamber is used to deposit the back transparent oxide layer on the outside of the back doped layer when the hollow carrier passes by.

[0009] In some embodiments, the first process chamber is a front PECVD process chamber; the second process chamber is a front RPD process chamber; the third process chamber is a back HWCVD process chamber; the fourth process chamber is a back PVD process chamber; wherein the front PECVD process chamber and the back HWCVD process chamber each include a heating chamber, an intrinsic process chamber and a doping process chamber.

[0010] In some embodiments, the front coating process chamber includes a first process chamber, a fourth process chamber and a fifth process chamber, and the back coating process chamber includes a second process chamber and a third process chamber, and the first process chamber, the second process chamber, the third process chamber, the fourth process chamber and the fifth process chamber are sequentially connected and arranged; wherein the first process chamber is used to deposit the front intrinsic layer on the front side of the target silicon wafer when the hollow carrier passes by; the second process chamber is used to deposit the back intrinsic layer and the back doping layer on the back side of the target silicon wafer when the hollow carrier passes by; the third process chamber is used to deposit the back transparent oxide layer on the outer side of the back doping layer when the hollow carrier passes by; the fourth process chamber is used to deposit the front doping layer on the outer side of the front intrinsic layer when the hollow carrier passes by; and the fourth process chamber is used to deposit the front transparent oxide layer on the outer side of the front doping layer when the hollow carrier passes by.

[0011] In some embodiments, the first process chamber is a front PECVD intrinsic chamber; the second process chamber is a back HWCVD process chamber; the third process chamber is a back PVD process chamber; the fourth process chamber is a front PECVD doping chamber; the fifth process chamber is a front RPD process chamber; wherein the back HWCVD process chamber includes a heating chamber, an intrinsic process chamber and a doping process chamber.

[0012] In some embodiments, gate valve mechanisms are provided at both ends of the front coating process chamber and the back coating process chamber. The gate valve mechanisms are in an open state when the hollow carrier is transported by the transport mechanism to allow the hollow carrier to pass through; the gate valve mechanisms are in a closed state when the front coating process chamber or the back coating process chamber is performing process deposition to form a closed space inside the front coating process chamber or the back coating process chamber.

[0013] In some embodiments, a contact heating mechanism is provided inside the front coating process chamber and the back coating process chamber, which is used to adhere to the back side of the hollow carrier when the process deposition is performed on the front side of the target silicon wafer so as to contact heat the back side of the hollow carrier, or to adhere to the front side of the hollow carrier when the process deposition is performed on the back side of the target silicon wafer so as to contact heat the front side of the hollow carrier.

[0014] In some embodiments, a feeding end of the coating device is provided with a feeding mechanism, including a feeding machine, a loading chamber and a heating chamber connected in sequence.

[0015] In some embodiments, a material unloading mechanism is provided at the unloading end of the coating equipment, including a loading and unloading cavity and a material unloading machine connected in sequence.

[0016] The heterojunction solar cell coating equipment proposed in the embodiment of the present application has the following beneficial effects: the present application sets up a front coating process chamber and a back coating process chamber, and the front coating process chamber and the back coating process chamber are both provided with a transmission mechanism inside, and the front coating process chamber and the back coating process chamber are used to complete the solar cell coating process on the front and back sides of the target silicon wafer when the hollow carrier plate with the target silicon wafer is placed on the hollow carrier plate passed by the transmission mechanism. It can be seen that in the above process, compared with the traditional scheme, since the present application sets up a mechanism that can complete the solar cell coating process on the front and back sides of the target silicon wafer respectively. A front coating process chamber and a back coating process chamber, and a hollow carrier plate are designed so that the front and back sides of the silicon wafer will not be blocked. Therefore, in the present application, the target silicon wafer on the transmitted hollow carrier plate can be directly and continuously coated during the production process, and there is no need to perform actions such as turning the silicon wafer over and taking out the silicon wafer, and replacing the carrier plate. Furthermore, the silicon wafer and the carrier plate will not be taken out of the vacuum chamber and exposed to the air environment, which can effectively prevent the silicon wafer and the carrier plate from being contaminated by the air, thereby improving the battery performance. Moreover, since there is no need to set up a turning mechanism and a carrier plate replacement mechanism to turn over and replace the carrier plate, the battery production efficiency can be further improved, and the production cost can be reduced to a certain extent. BRIEF DESCRIPTION OF THE DRAWINGS

[0017] Figure 1 It is a schematic structural diagram of a heterojunction solar cell coating device provided in an embodiment of the present application;

[0018] Figure 2 It is another structural schematic diagram of the heterojunction solar cell coating equipment provided in an embodiment of the present application. DETAILED DESCRIPTION

[0019] In order to make the purpose, technical solution and advantages of the present application more clearly understood, the present application is further described in detail below in conjunction with the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are only used to explain the present application and are not used to limit the present application.

[0020] It should be noted that, although the functional modules are divided in the device schematic diagram and the logical order is shown in the flowchart, in some cases, the steps shown or described may be performed in a different order than the module division in the device or the order in the flowchart. The terms "first", "second", etc. in the specification, claims and the above drawings are used to distinguish similar objects, and are not necessarily used to describe a specific order or sequence.

[0021] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as those commonly understood by those skilled in the art to which this application belongs. The terms used herein are only for the purpose of describing the embodiments of this application and are not intended to limit this application.

[0022] In the current manufacturing process of heterojunction solar cells, the use of process deposition is a standard production method. This process involves coating the front and back of the silicon wafer separately to manufacture different layers of the cell. In order to avoid pollution and improve the conversion efficiency of the solar cell, the manufacturing process usually follows the following order for coating: first, an intrinsic layer is deposited on the front of the silicon wafer, then a doped layer is deposited on the back, followed by an intrinsic layer on the back of the silicon wafer, and finally a doped layer on the front. However, the existing process generally completes the film coating on the front of the silicon wafer through a coating chamber, and then after the silicon wafer is turned over, the same type of film coating on the back of the silicon wafer is completed through the same coating chamber, and then the above operation is repeated through other types of coating chambers until the solar cell coating process is completed. In the alternating process between the front and back of the silicon wafer, the silicon wafer and the silicon wafer carrier need to be taken out of the vacuum coating chamber and exposed to the air environment, and the silicon wafer is turned over by a flipping mechanism, and the carrier is replaced.

[0023] In summary, the traditional solution will cause the silicon wafer to come into contact with the air during the production process, causing the silicon wafer to be contaminated and affecting the battery performance. In addition, a mechanism for flipping and replacing the carrier is required, which affects the battery production efficiency and cost.

[0024] In order to solve the technical problems that in the production process of traditional solutions, silicon wafers will come into contact with air, affecting the performance of the battery, and that the carrier mechanism needs to be turned over and replaced, resulting in low efficiency and high cost, the embodiment of the present application provides a heterojunction solar cell coating equipment, including a front coating process chamber and a back coating process chamber that are connected and arranged, and the front coating process chamber and the back coating process chamber are both provided with a transmission mechanism. The front coating process chamber and the back coating process chamber are used to complete the solar cell coating process on the front and back sides of the target silicon wafers when the hollow carrier with the target silicon wafers is placed thereon by the transmission mechanism. In the present application, the target silicon wafer on the hollow carrier being transmitted can be directly and continuously coated during the production process, without the need to perform actions such as turning over the silicon wafers and taking out the silicon wafers, thereby effectively preventing the silicon wafers from being contaminated and improving production efficiency.

[0025] In some embodiments, a front coater is disposed on the upper inner side of the front coating process chamber, which is used to sequentially deposit a front intrinsic layer, a front doped layer and a front transparent oxide layer on the front side of the target silicon wafer when the hollow carrier is transmitted by the transmission mechanism; a front coater is disposed on the lower inner side of the back coating process chamber, which is used to sequentially deposit a back intrinsic layer, a back doped layer and a back transparent oxide layer on the back side of the target silicon wafer when the hollow carrier is transmitted by the transmission mechanism.

[0026] Among them, it can be seen that in the above process, compared with the traditional scheme, since the present application is provided with a front coating process chamber and a back coating process chamber that can respectively complete the solar cell coating process on the front and back of the target silicon wafer, and a hollow carrier is designed so that the front and back of the silicon wafer will not be blocked, the present application can directly and continuously coat the target silicon wafer on the transmitted hollow carrier during the production process, without performing actions such as flipping the silicon wafer and removing the silicon wafer and replacing the carrier, and thus the silicon wafer and the carrier will not be taken out of the vacuum chamber and exposed to the air environment, which can effectively prevent the silicon wafer and the carrier from being contaminated, and improve the battery performance. Moreover, since there is no need to set a flipping mechanism and a carrier replacement mechanism to flip and replace the carrier, the battery production efficiency can be further improved, and the production cost can be reduced to a certain extent.

[0027] A detailed description is given below in conjunction with the accompanying drawings.

[0028] refer to Figure 1 , Figure 1 is a schematic diagram of the structure of a heterojunction solar cell coating device provided in an embodiment of the present application. In some embodiments, the front coating process chamber and the back coating process chamber may be composed of one or more process chambers respectively. Figure 1101 to 104 correspond to multiple process chambers. The present application sets up multiple process chambers connected in sequence. A transmission mechanism 108 is set inside each of the multiple process chambers. A hollow carrier 107 is placed on the transmission mechanism 108. The hollow carrier 107 includes a number of bearing positions for placing silicon wafers, so that in the coating production process of the heterojunction solar cell, when the hollow carrier with the target silicon wafer placed in the bearing position enters the process chamber at the feed end, under the transmission action of the multiple transmission mechanisms 108, the target silicon wafer will pass through the multiple process chambers in sequence with the hollow carrier, so that when the multiple process chambers pass through the hollow carrier and the target silicon wafer is located inside its cavity, process deposition is performed on the front and back of the target silicon wafer respectively, to generate an intrinsic layer, a doping layer and a transparent oxide layer located on the front and back of the target silicon wafer, thereby realizing the heterojunction solar cell. In the coating process, it can be seen that in the above process, compared with the single chamber solution in some traditional solutions that require process switching, since the present application sets up multiple process chambers that can deposit the intrinsic layer, doping layer and transparent oxide layer on the front and back sides respectively, and designs a hollow carrier 107 that can prevent the front and back sides of the silicon wafer from being blocked, the present application can directly and continuously coat the target silicon wafer on the transferred hollow carrier during the production process, without the need to perform actions such as flipping the silicon wafer, replacing the carrier, and switching the deposition process of the process chamber, which requires taking out the silicon wafer, and thus the silicon wafer will not be taken out of the vacuum chamber and exposed to the air environment, which effectively prevents the silicon wafer from being contaminated and improves the battery performance. There is no need to set up a mechanism for flipping and replacing the carrier, which effectively improves the battery production efficiency and reduces the production cost.

[0029] In some embodiments, the front coating process chamber includes a first process chamber and a second process chamber connected in sequence, and the back coating process chamber includes a third process chamber and a fourth process chamber connected in sequence; wherein the first process chamber is used to deposit a front intrinsic layer and a front doped layer on the front side of the target silicon wafer when the hollow carrier passes by; the second process chamber is used to deposit a front transparent oxide layer on the outside of the front doped layer when the hollow carrier passes by; the third process chamber is used to deposit a back intrinsic layer and a back doped layer on the back side of the target silicon wafer when the hollow carrier passes by; and the fourth process chamber is used to deposit a back transparent oxide layer on the outside of the back doped layer when the hollow carrier passes by.

[0030] For details, please refer to Figure 1 In some embodiments, the first process chamber is a front PECVD process chamber 101; the second process chamber is a front RPD process chamber 102; the third process chamber is a back HWCVD process chamber 103; the fourth process chamber is a back PVD process chamber 104; wherein the front RPD process chamber 101 and the back HWCVD process chamber 103 respectively include a heating chamber, an intrinsic process chamber and a doping process chamber.

[0031] Among them, it can be imagined that PECVD (plasma enhanced chemical vapor deposition) can produce high-quality thin films at low temperatures, and can be used on the front of solar cells to accurately control the characteristics of the intrinsic layer and the doping layer to ensure the photoelectric conversion efficiency of the cell; RPD (reactive physical vapor deposition) combines the advantages of physical vapor deposition and the characteristics of chemical vapor reaction, and can generate a transparent oxide layer on the front of the solar cell that has both good optical properties to allow light to enter and good electrical conductivity to effectively collect carriers; HWCVD (hot wire chemical vapor deposition) can To quickly deposit thin films without damaging the quality of silicon wafers to generate intrinsic layers and doping layers on the back of solar cells; PVD (physical vapor deposition) is used to produce transparent oxide layers on the back of solar cells. Therefore, the present application uses a four-in-one heterojunction solar cell coating equipment, which integrates PECVD, HWCVD, PVD, and RPD processes. There is no need to replace the carrier during the process, and the carrier and silicon wafers do not need to be exposed to air. The entire coating process does not come into contact with air, and there is no need to set up a flipping mechanism, which reduces the number of unloading and loading mechanisms, thereby making the cycle of the present application faster and the cost lower.

[0032] In some embodiments, gate valve mechanisms 106 are provided at both ends of multiple process chambers corresponding to the front coating process chamber and the back coating process chamber. The gate valve mechanism 106 is in an open state when the hollow carrier 107 is transported by the transport mechanism to allow the hollow carrier 107 to pass through; the gate valve mechanism 106 is in a closed state when the process chamber is performing process deposition to form a closed space inside the process chamber.

[0033] It can be imagined that there may be multiple hollow carriers and multiple target silicon wafers in multiple process chambers at the same time. When there is no hollow carrier to pass through the gate valve mechanism, the gate valve mechanism is in a default closed state, that is, as long as the hollow carrier enters the process chamber from the feed end, or moves from one process chamber to another, and is discharged from the unloading end of the process chamber, the corresponding gate valve mechanism will be in an open state, and other uninvolved gate valve mechanisms are still in a closed state, so as to ensure as much as possible that there is no contamination between the process chambers, and that there is no contact with air during the entire process of coating generation in multiple process chambers, so that the process chamber can always form a closed space when the hollow carrier does not move.

[0034] In some embodiments, the transmission mechanism includes a roller mechanism, which includes a plurality of balls that rotate in a preset direction in a unified manner, thereby realizing the transmission of the hollow carrier plate on which the target silicon wafer is placed. It can be imagined that the conveying distance or operation time of the transmission mechanism can be controlled by a controller to ensure that when the entire equipment is implemented, the hollow carrier plate is transported to the process chamber, the transmission mechanism stops moving, and the process chamber performs process deposition. After the deposition is completed, the transmission mechanism starts moving again to transport the hollow carrier plate to the next process chamber for subsequent actions.

[0035] refer to Figure 1 In some embodiments, a feeding end of a plurality of process chambers connected in sequence in the coating equipment is provided with a loading mechanism 105, including a loading machine, a loading chamber and a heating chamber connected in sequence, wherein the loading machine is used to transport the target silicon wafer and the hollow carrier to the loading chamber, the loading chamber is used to place the target silicon wafer on the carrying position of the hollow carrier, and the heating chamber is used to preliminarily heat the target silicon wafer on the hollow carrier so that it can be immediately subjected to process deposition treatment after entering the process chamber.

[0036] refer to Figure 1 In some embodiments, a discharge end of a plurality of process chambers connected in sequence in the coating equipment is provided with a discharge mechanism 109, including a receiving and unloading chamber and a discharge machine connected in sequence, and the receiving and unloading chamber is used to remove the heterojunction solar cells that have been produced from the supporting position of the hollow carrier, and then perform subsequent cleaning of the hollow carrier, wherein the carrier of this scheme can run from the feeding end to the discharge end, but after discharge, the carrier needs to be cleaned to remove the impurity elements thereon to avoid contamination of the deposition of the intrinsic layer and the doping layer during subsequent use.

[0037] In some embodiments, the front PECVD process chamber is used to sequentially deposit an intrinsic layer and a doped layer on the front side of a silicon wafer, and includes at least one PECVD heating chamber, at least one PECVD intrinsic process chamber, and at least one PECVD doping process chamber; the back HWCVD process chamber is used to deposit an intrinsic layer and a doped layer on the back side of a silicon wafer, and includes at least one HWCVD heating chamber, at least one HWCVD intrinsic process chamber, and at least one HWCVD doping process chamber.

[0038] In some embodiments, the hollow carrier is a PVD carrier, which is hollowed out to place the silicon wafer at the supporting position, so that when depositing the back intrinsic layer, doping layer, and transparent oxide layer, the HWCVD process and the PVD process can directly deposit the film layer on the back of the silicon wafer, and the PVD carrier will not block the front and back of the target silicon wafer.

[0039] In some embodiments, a contact heating mechanism is provided inside the front coating process chamber and the back coating process chamber, which is used to fit the back of the hollow carrier when performing process deposition on the front side of the target silicon wafer to contact-heat the back side of the hollow carrier, or to fit the front of the hollow carrier when performing process deposition on the back side of the target silicon wafer to contact-heat the front side of the hollow carrier. Specifically, the contact heating mechanism includes a lifting mechanism. In the front PECVD process chamber, a contact heating method is adopted. When depositing the film layer, the lifting mechanism of the contact heating contacts the bottom surface of the carrier, fits the bottom surface of the carrier and lifts the carrier. No wrap-around plating will occur, and the back side of the carrier and the back side of the silicon wafer will not be contaminated, thereby further avoiding the flipping of the silicon wafer and the replacement of the carrier.

[0040] In some embodiments, the front coating process chamber includes a first process chamber, a fourth process chamber and a fifth process chamber, and the back coating process chamber includes a second process chamber and a third process chamber, and the first process chamber, the second process chamber, the third process chamber, the fourth process chamber and the fifth process chamber are sequentially connected and arranged; wherein the first process chamber is used to deposit a front intrinsic layer on the front side of the target silicon wafer when the hollow carrier passes by; the second process chamber is used to deposit a back intrinsic layer and a back doped layer on the back side of the target silicon wafer when the hollow carrier passes by; the third process chamber is used to deposit a back transparent oxide layer on the outer side of the back doped layer when the hollow carrier passes by; the fourth process chamber is used to deposit a front doped layer on the outer side of the front intrinsic layer when the hollow carrier passes by; the fourth process chamber is used to deposit a front transparent oxide layer on the outer side of the front doped layer when the hollow carrier passes by.

[0041] For details, please refer to Figure 2 , Figure 2 It is another structural schematic diagram of the heterojunction solar cell coating equipment provided in an embodiment of the present application. In some embodiments, the first process chamber is a front PECVD intrinsic chamber 201; the second process chamber is a back HWCVD process chamber 202; the third process chamber is a back PVD process chamber 203; the fourth process chamber is a front PECVD doping chamber 204; the fifth process chamber is a front RPD process chamber 205; wherein, the back HWCVD process chamber includes a heating chamber, an intrinsic process chamber and a doping process chamber, specifically, the back HWCVD process chamber includes at least one HWCVD heating chamber, at least one HWCVD intrinsic process chamber, and at least one HWCVD doping process chamber, which are used to sequentially deposit an intrinsic layer and a doping layer on the back of a silicon wafer.

[0042] Combined with the above Figure 1 and Figure 2It can be imagined that the number of process chambers, the corresponding processes and the connection sequence in the present application are not fixed. Those skilled in the art can adjust the number of multiple process chambers connected in sequence, the corresponding processes and the connection sequence according to actual application requirements, so as to achieve the expected heterojunction solar cell coating process without having to perform actions that require taking out the silicon wafer, such as turning over the silicon wafer, replacing the carrier, and switching the deposition process in the process chamber, effectively preventing the silicon wafer from contacting the air and improving the battery production efficiency.

[0043] In the several embodiments provided in the present application, it should be understood that the disclosed device can be implemented in other ways. For example, the device embodiments described above are only schematic, for example, the division of units is only a logical function division, and there may be other division methods in actual implementation, such as multiple units or components can be combined or integrated into another system, or some features can be ignored or not executed. Another point is that the mutual coupling or direct coupling or communication connection shown or discussed can be through some interfaces, indirect coupling or communication connection of devices or units, which can be electrical, mechanical or other forms.

[0044] The units described as separate components may or may not be physically separated, and the components shown as units may or may not be physical units, that is, they may be located in one place or distributed over multiple units. Some or all of the units may be selected according to actual needs to achieve the purpose of the present embodiment.

[0045] In addition, each functional unit in each embodiment of the present application may be integrated into one processing unit, or each unit may exist physically separately, or two or more units may be integrated into one unit. The above-mentioned integrated unit may be implemented in the form of hardware or in the form of software functional units.

[0046] The preferred embodiments of the present application are described above with reference to the accompanying drawings, but the scope of the rights of the present application is not limited thereto. Any modification, equivalent substitution and improvement made by a person skilled in the art without departing from the scope and essence of the present application should be within the scope of the rights of the present application.

Claims

1. A heterojunction solar cell coating device, characterized in that: It comprises a front coating process chamber and a back coating process chamber which are connected and arranged, wherein the front coating process chamber and the back coating process chamber are both provided with a transmission mechanism, and the front coating process chamber and the back coating process chamber are used to complete the solar cell coating process on the front and back of the target silicon wafer respectively when the hollow carrier plate with the target silicon wafer placed thereon is transmitted by the transmission mechanism; A front coater is arranged on the upper inner side of the front coating process chamber, which is used to deposit a front intrinsic layer, a front doped layer and a front transparent oxide layer in sequence on the front side of the target silicon wafer when the hollow carrier is transported by the transport mechanism; a front coater is arranged on the lower inner side of the back coating process chamber, which is used to deposit a back intrinsic layer, a back doped layer and a back transparent oxide layer in sequence on the back side of the target silicon wafer when the hollow carrier is transported by the transport mechanism.

2. The heterojunction solar cell coating device according to claim 1, characterized in that: The front coating process chamber includes a first process chamber and a second process chamber connected in sequence, and the back coating process chamber includes a third process chamber and a fourth process chamber connected in sequence; Wherein, the first process chamber is used to deposit the front intrinsic layer and the front doped layer on the front side of the target silicon wafer when the hollow carrier passes by; The second process chamber is used to deposit the front transparent oxide layer on the outer side of the front doped layer when the hollow carrier passes by; The third process chamber is used to deposit the back intrinsic layer and the back doping layer on the back side of the target silicon wafer when the hollow carrier passes by; The fourth process chamber is used to deposit the back transparent oxide layer on the outer side of the back doping layer when the hollow carrier passes by.

3. The heterojunction solar cell coating device according to claim 2, characterized in that: The first process chamber is a front PECVD process chamber; The second process chamber is a front RPD process chamber; The third process chamber is a backside HWCVD process chamber; The fourth process chamber is a backside PVD process chamber; Wherein, the front PECVD process chamber and the back HWCVD process chamber each include a heating chamber, an intrinsic process chamber and a doping process chamber.

4. The heterojunction solar cell coating device according to claim 1, characterized in that: The front coating process chamber includes a first process chamber, a fourth process chamber and a fifth process chamber, and the back coating process chamber includes a second process chamber and a third process chamber, and the first process chamber, the second process chamber, the third process chamber, the fourth process chamber and the fifth process chamber are sequentially connected and arranged; Wherein, the first process chamber is used to deposit the front intrinsic layer on the front side of the target silicon wafer when the hollow carrier passes by; The second process chamber is used to deposit the back intrinsic layer and the back doping layer on the back side of the target silicon wafer when the hollow carrier passes by; The third process chamber is used to deposit the back transparent oxide layer on the outer side of the back doping layer when the hollow carrier passes by; The fourth process chamber is used to deposit the front doping layer on the outer side of the front intrinsic layer when the hollow carrier passes by; The fourth process chamber is used to deposit the front transparent oxide layer on the outer side of the front doping layer when the hollow carrier passes through.

5. The heterojunction solar cell coating device according to claim 4, characterized in that: The first process chamber is a front PECVD intrinsic chamber; The second process chamber is a backside HWCVD process chamber; The third process chamber is a backside PVD process chamber; The fourth process chamber is a front PECVD doping chamber; The fifth process chamber is a front RPD process chamber; Wherein, the back side HWCVD process chamber includes a heating chamber, an intrinsic process chamber and a doping process chamber.

6. The heterojunction solar cell coating equipment according to claim 1, characterized in that: Gate valve mechanisms are provided at both ends of the front coating process chamber and the back coating process chamber. The gate valve mechanisms are in an open state when the hollow carrier is transported by the transport mechanism to allow the hollow carrier to pass through; the gate valve mechanisms are in a closed state when the front coating process chamber or the back coating process chamber is performing process deposition to form a closed space inside the front coating process chamber or the back coating process chamber.

7. The heterojunction solar cell coating equipment according to claim 1, characterized in that: The front coating process chamber and the back coating process chamber are both provided with contact heating mechanisms for adhering to the back side of the hollow carrier when the process deposition is performed on the front side of the target silicon wafer so as to contact-heat the back side of the hollow carrier, or, for adhering to the front side of the hollow carrier when the process deposition is performed on the back side of the target silicon wafer so as to contact-heat the front side of the hollow carrier.

8. The heterojunction solar cell coating device according to claim 1, characterized in that: The feeding end of the coating device is provided with a feeding mechanism, which includes a feeding machine, a loading cavity and a heating cavity which are connected in sequence.

9. The heterojunction solar cell coating device according to claim 1, characterized in that: The unloading end of the coating equipment is provided with an unloading mechanism, which includes a loading and unloading cavity and a unloading machine which are connected in sequence.

Images