IOT device
By designing an IOT device with multiple modules, the problem of long data input time and cumbersome operation process in existing vehicle body detection is solved, and the function of IOT devices to replace PAD is realized, which improves detection efficiency.
Patent Information
- Application Number
- CN202421761526.7
- Authority / Receiving Office
- CN · China
- Patent Type
- Utility models(China)
- Current Assignee / Owner
- Filing Date
- 2024-07-23
- Publication Date
- 2025-04-29
- Estimated Expiration
- 2034-07-23
AI Technical Summary
Existing body inspection requires scanning and manual operation using PAD, resulting in long data input time and cumbersome operation process.
Design an IOT device, including a button switch module, a crystal oscillator module, a control module, a charge management module, a discharge management module, an LCD module, an IO interface module, a type-C interface module and an LED module. Through the electrical connection of these modules, the functional coordination and data management of the device can be realized, and VIN codes can be sent to the VIS system for query and receive data to be displayed on the LCD.
IOT equipment replaces PAD, reducing data input time and cumbersome operating procedures, and improving the efficiency of body detection.
Smart Images

Figure CN222813074U_ABST
Abstract
Description
Technical Field
[0001] The utility model relates to the technical field of IOT, and more specifically, to an IOT device. Background Art
[0002] Existing vehicle body inspection requires the use of PAD, which requires scanning the vehicle body and then manually obtaining and judging the vehicle condition, which requires a long data input time and cumbersome operation procedures. Utility Model Content
[0003] The utility model provides an IOT device, which reduces data input time.
[0004] In order to solve the above technical problems, the technical solution of the utility model is as follows:
[0005] An IOT device, characterized in that it includes a key switch module, a crystal oscillator module, a control module, a charging management module, a discharge management module, an LCD module, an IO interface module, a type-C interface module and an LED module, wherein:
[0006] The key switch module is electrically connected to the discharge management module and the control module;
[0007] The crystal oscillator module is electrically connected to the control module;
[0008] The charging management module is electrically connected to the IO interface module, the LED module and the type-C interface module;
[0009] The discharge management module is also electrically connected to the control module, the LED module and the LCD module;
[0010] The control module is also electrically connected to the LCD module, the IO interface module and the LED module respectively.
[0011] Compared with the prior art, the beneficial effects of the technical solution of the utility model are:
[0012] In the IOT device of the utility model, the key switch module is used for turning on and off the machine, the crystal oscillator module is used for generating oscillations so that each circuit works within a stable frequency range, the control module is used for coordinating the work of other modules, the charging management module and the discharging management module manage the battery together, the LCD module is used for displaying relevant required information, the IO interface module is used for expanding other sensors, the type-C interface module is used for charging and data transmission, and the LED module is used for providing an indicator light function, and the working status of the IOT device is determined by the indicator light. The IOT device of the utility model sends the VIN code of the post vehicle to the VIS system for query, and receives the data returned from the VIS system and displays it on the LCD of the IOT device, so as to achieve the same effect by replacing the PAD with the IOT device, and reduce the data input time and cumbersome operation process. BRIEF DESCRIPTION OF THE DRAWINGS
[0013] Figure 1 A schematic diagram of module connection of an IOT device provided in an embodiment of the utility model;
[0014] Figure 2 A schematic diagram of the circuit structure of a control module provided in an embodiment of the utility model;
[0015] Figure 3 A schematic diagram of the circuit structure of a key switch module provided in an embodiment of the utility model;
[0016] Figure 4 A schematic diagram of the circuit structure of a crystal oscillator module provided in an embodiment of the utility model;
[0017] Figure 5 A schematic diagram of the circuit structure of a charging management module provided in an embodiment of the utility model;
[0018] Figure 6 A schematic diagram of the circuit structure of a discharge management module provided in an embodiment of the utility model;
[0019] Figure 7 A schematic diagram of the circuit structure of an LCD module provided by an embodiment of the utility model;
[0020] Figure 8 A schematic diagram of the circuit structure of the IO interface module provided in the embodiment of the utility model;
[0021] Fig. 9 A schematic diagram of the structure of the type-C interface module provided in an embodiment of the utility model;
[0022] Fig.10 A schematic diagram of the circuit structure of an LED module provided in an embodiment of the utility model; DETAILED DESCRIPTION
[0023] The drawings are for illustrative purposes only and should not be construed as limiting the present patent;
[0024] In order to better illustrate the present embodiment, some parts in the drawings may be omitted, enlarged or reduced, and do not represent the size of the actual product;
[0025] It is understandable to those skilled in the art that some well-known structures and their descriptions may be omitted in the drawings.
[0026] The technical solution of the utility model is further described below in conjunction with the accompanying drawings and embodiments.
[0027] Example
[0028] An IOT device, such as Figure 1As shown, it includes a key switch module, a crystal oscillator module, a control module, a charging management module, a discharge management module, an LCD module, an IO interface module, a type-C interface module and an LED module, wherein:
[0029] The key switch module is electrically connected to the discharge management module and the control module;
[0030] The crystal oscillator module is electrically connected to the control module;
[0031] The charging management module is electrically connected to the IO interface module, the LED module and the type-C interface module;
[0032] The discharge management module is also electrically connected to the control module, the LED module and the LCD module;
[0033] The control module is also electrically connected to the LCD module, the IO interface module and the LED module respectively.
[0034] In a further embodiment, the control module is as follows Figure 2 As shown, it includes ESP32 chip U3, twentieth capacitor C20, second inductor L2, twenty-first capacitor C21, nineteenth capacitor C19, third inductor L3, forty-ninth capacitor C49, thirty-second capacitor C32, thirteenth capacitor C13, twelfth capacitor C12, fourteenth capacitor C14, fifteenth capacitor C15, seventh capacitor C7, first capacitor C1, second capacitor C2, tenth capacitor C10, ninth capacitor C9, fourth resistor R4, forty-second resistor R42, forty-fourth resistor R44, seventeenth capacitor C17 and twenty-fourth capacitor C24, wherein:
[0035] The GPIO25, 32K_XN / IO33, 32K_XN / IO32, SENSOR_VN / IO39, SENSOR_CAPN / IO38, SENSOR_CAPP / IO37, SENSOR_VP / IO36, GPIO21, GPIO22, GPIO17, GPIO2, MTDO / IO15, MTCK / IO13, MTDI / IO12, GPIO27, and GPIO26 terminals of the ESP32 chip U3 are all electrically connected to the IO interface module as external interfaces;
[0036] The SENSOR_VN / IO39 terminal of the ESP32 chip U3 is also electrically connected to one end of the thirty-second capacitor C32, and the other end of the thirty-second capacitor C32 is electrically connected to the SENSOR_CAPN / IO38 terminal of the ESP32 chip U3;
[0037] The SENSOR_CAPP / IO37 terminal of the ESP32 chip U3 is also electrically connected to one end of the forty-ninth capacitor C49, and the other end of the forty-ninth capacitor C49 is electrically connected to the SENSOR_VP / IO36 terminal of the ESP32 chip U3;
[0038] The two VDD3P3 terminals of the ESP32 chip U3 are electrically connected to one end of the thirteenth capacitor C13, one end of the twelfth capacitor C12, one end of the fourteenth capacitor C14, one end of the fifteenth capacitor C15 and the discharge management module respectively;
[0039] The LIN_IN terminal of the ESP32 chip U3 is electrically connected to one end of the third inductor L3, the other end of the third inductor L3 is electrically connected to one end of the nineteenth capacitor C19, the other end of the nineteenth capacitor C19 is electrically connected to one end of the second inductor L2 and one end of the twenty-first capacitor C21, respectively, and the other end of the second inductor L2 is electrically connected to one end of the twentieth capacitor C20;
[0040] The first VDDA terminal of the ESP32 chip U3 is electrically connected to the discharge management module and one end of the seventh capacitor C7 respectively;
[0041] The CAP1 end of the ESP32 chip U3 is electrically connected to one end of the tenth capacitor C10, one end of the ninth capacitor C9 and one end of the fourth resistor R4, respectively, and the other end of the ninth capacitor C9 and the other end of the fourth resistor R4 are both electrically connected to the CAP2 end of the ESP32 chip U3;
[0042] The second VDDA terminal of the ESP32 chip U3 is electrically connected to the third VDDA terminal of the ESP32 chip U3, one end of the first capacitor C1, one end of the second capacitor C2 and the discharge management module respectively;
[0043] The XTAL_P terminal, XTAL_N terminal, SD_DATA_1 / IO08 terminal, SD_DATA_0 / IO07 terminal, SD_CLK / IO06 terminal, SD_CMD / IO11 terminal, SD_DATA_3 / IO10 terminal, and SD_DATA_2 / IO09 terminal of the ESP32 chip U3 are electrically connected to the crystal oscillator module respectively;
[0044] The GPIO21 end of the ESP32 chip U3 is also electrically connected to one end of the 42nd resistor R42, the other end of the 42nd resistor R42 is electrically connected to the other end of the 44th resistor R44 and the discharge management module respectively, and one end of the 44th resistor R44 is electrically connected to the GPIO22 end of the ESP32 chip U3;
[0045] The VDD3P3_CPU terminal of the ESP32 chip U3 is electrically connected to the discharge management module and one end of the seventeenth capacitor C17 respectively;
[0046] The VDD_SDIO terminal of the ESP32 chip U3 is electrically connected to one end of the twenty-fourth capacitor C24 and the crystal oscillator module.
[0047] The MTMS / IO14 terminal of the ESP32 chip U3 is electrically connected to the LED module;
[0048] The VDD3P3_RTC terminal of the ESP32 chip U3 is electrically connected to one end of the 30th capacitor C30 and the discharge management module respectively;
[0049] The U0TXD / IO01, U0RXD / IO03, GPIO19, GPIO18, GPIO16, GPIO23, GPIO4, and GPIO5 terminals of the ESP32 chip U3 are electrically connected to the LCD module;
[0050] The GPIO0 terminal, VDET_2 / IO35 terminal, VDET_1 / IO34 terminal, and CHIP_PU terminal of the ESP32 chip U3 are electrically connected to the discharge management module, and the GPIO0 terminal and VDET_2 / IO35 terminal of the ESP32 chip U3 are also electrically connected to the key switch module;
[0051] The other end of the thirteenth capacitor C13, the other end of the twelfth capacitor C12, the other end of the fourteenth capacitor C14, the other end of the fifteenth capacitor C15, the other end of the twenty-first capacitor C21, the other end of the twentieth capacitor C20, the other end of the seventh capacitor C7, the other end of the tenth capacitor C10, the other end of the first capacitor C1, the other end of the second capacitor C2, the other end of the seventeenth capacitor C17, the other end of the twenty-fourth capacitor C24 and the other end of the thirtieth capacitor C30 are grounded.
[0052] In a further embodiment, the key switch module is as follows Figure 3 As shown, it includes a first key switch S1, a second key switch S2, a first resistor R1, a third capacitor C3 and an eleventh capacitor C11, wherein:
[0053] One end of the first key switch S1 is electrically connected to the discharge management module, the GPIO0 end of the ESP32 chip U3, one end of the first resistor R1 and one end of the third capacitor C3 respectively;
[0054] One end of the second push switch S2 is electrically connected to the VDET_2 / IO35 end of the ESP32 chip U3, the other end of the first resistor R1 and one end of the eleventh capacitor C11 respectively;
[0055] The other end of the first key switch S1 , the other end of the second key switch S2 , the other end of the third capacitor C3 , and the other end of the eleventh capacitor C11 are grounded.
[0056] In a further embodiment, the crystal oscillator module is as follows Figure 4 As shown, it includes a crystal oscillator chip U1, a flash memory chip U2, a fourth capacitor C4, an eighth capacitor C8 and an eighteenth capacitor C18, wherein:
[0057] The XOUT terminal of the crystal oscillator chip U1 is electrically connected to the XTAL_P terminal of the ESP32 chip U3 and one end of the fourth capacitor C4, respectively, and the XIN terminal of the crystal oscillator chip U1 is electrically connected to the XTAL_N terminal of the ESP32 chip U3 and one end of the eighth capacitor C8, respectively;
[0058] The CS terminal of the flash memory chip U2 is electrically connected to the SD_CMD / IO11 terminal of the ESP32 chip U3, the DO terminal of the flash memory chip U2 is electrically connected to the SD_DATA_0 / IO07 terminal of the ESP32 chip U3, the WP terminal of the flash memory chip U2 is electrically connected to the SD_DATA_3 / IO10 terminal of the ESP32 chip U3, the HOLD terminal of the flash memory chip U2 is electrically connected to the SD_DATA_2 / IO09 terminal of the ESP32 chip U3, the CLK terminal of the flash memory chip U2 is electrically connected to the SD_CLK / IO06 terminal of the ESP32 chip U3, and the DI / 1O0 terminal of the flash memory chip U2 is electrically connected to the SD_DATA_1 / IO08 terminal of the ESP32 chip U3;
[0059] The VCC terminal of the flash memory chip U2 is also electrically connected to one end of the capacitor C18;
[0060] Two GND terminals of the crystal oscillator chip U1, the other terminal of the fourth capacitor C4, the other terminal of the eighth capacitor C8, the other terminal of the eighteenth capacitor C18, and the GND terminal of the flash memory chip U2 are grounded.
[0061] In a further embodiment, the charging management module is as follows Figure 5 As shown, it includes a TP4054 chip U6, a first light-emitting diode LED1, a twenty-ninth resistor R29, a thirty-sixth capacitor C36, a thirty-fifth capacitor C35, a thirty-fifth resistor R35, a fortieth capacitor C40, a forty-first capacitor C41, a thirty-first resistor R31, a third ESD electrostatic suppressor E3 and a lithium battery P2, wherein:
[0062] The positive electrode of the lithium battery P2 is electrically connected to one end of the third ESD suppressor E3 and one end of the thirty-first resistor R31 respectively; the other end of the thirty-first resistor R31 is electrically connected to the LED module, one end of the fortieth capacitor C40, one end of the forty-first capacitor C41 and the BAT end of the TP4054 chip U6 respectively;
[0063] The PROG terminal of the TP4054 chip U6 is electrically connected to one end of the thirty-fifth resistor R35;
[0064] The VCC terminal of the TP4054 chip U6 is electrically connected to one end of the twenty-ninth resistor R29, one end of the thirty-sixth capacitor C36, one end of the thirty-fifth capacitor C35, and the external power supply VBUS respectively;
[0065] The other end of the twenty-ninth resistor R29 is electrically connected to the anode of the first light emitting diode LED1, and the cathode of the first light emitting diode LED1 is electrically connected to the CHRG end of the TP4054 chip U6;
[0066] The GND end of the TP4054 chip U6, the negative electrode of the lithium battery P2, the other end of the third ESD electrostatic suppressor E3, the other end of the fortieth capacitor C40, the other end of the forty-first capacitor C41, the other end of the thirty-fifth resistor R35, the other end of the thirty-sixth capacitor C36, and the other end of the thirty-fifth capacitor C35 are grounded.
[0067] In a further embodiment, the discharge management module is as follows: Figure 6 As shown, it includes a third key switch S3, a fifth resistor R5, a twenty-third capacitor C23, a twenty-second capacitor C22, a seventh resistor R7, a sixth resistor R6, a first transistor Q1, a second transistor Q2, a fifteenth resistor R15 and a nineteenth resistor R19, wherein:
[0068] One end of the fifth resistor R5 provides voltage and is electrically connected to the control module, the LED module, the IO interface module and the LCD module; the other end of the fifth resistor R5 is electrically connected to one end of the third key switch S3, one end of the twenty-third capacitor C23, and the CHIP_PU end of the ESP32 chip U3 respectively;
[0069] One end of the sixth resistor R6 provides voltage and is electrically connected to the LED module; the other end of the sixth resistor R6 is electrically connected to one end of the twenty-second capacitor C22, one end of the seventh resistor R7, and the VDET_1 / IO34 end of the ESP32 chip U3;
[0070] The collector of the first transistor Q1 is electrically connected to the CHIP_PU terminal of the ESP32 chip U3, the emitter of the first transistor Q1 is electrically connected to one end of the nineteenth resistor R19 and the LCD module respectively, the base of the first transistor Q1 is electrically connected to one end of the fifteenth resistor R15, and the other end of the fifteenth resistor R15 is electrically connected to the emitter of the second transistor Q2 and the LCD module respectively; the collector of the second transistor Q2 is electrically connected to the GPIO0 terminal of the ESP32 chip U3, and the base of the second transistor Q2 is electrically connected to the other end of the nineteenth resistor R19;
[0071] The other end of the third key switch S3, the other end of the twenty-third capacitor C23, the other end of the twenty-second capacitor C22, and the other end of the seventh resistor R7 are grounded.
[0072] In a further embodiment, the LCD module is as follows Figure 7 As shown, it includes a liquid crystal display driver chip P1, an eighth resistor R8, a ninth resistor R9, a tenth resistor R10, an eleventh resistor R11, a twelfth resistor R12, a twenty-eighth capacitor C28, a twenty-ninth capacitor C29, a twentieth resistor R20, a third transistor Q0, a fifty-second resistor R52, a fifty-third resistor R53, a twenty-seventh capacitor C27, a thirty-first capacitor C31, a twenty-first resistor R21, a twenty-second resistor R22, a thirty-third capacitor C33, a thirty-fourth capacitor C34, a USB to serial port chip U4, a twenty-third resistor R23 and a twenty-fourth resistor R24, wherein:
[0073] The SDA end of the liquid crystal display driver chip P1 is electrically connected to one end of the eighth resistor R8 and the GPIO19 end of the ESP32 chip U3, respectively. The SCL end of the liquid crystal display driver chip P1 is electrically connected to one end of the ninth resistor R9 and the GPIO18 end of the ESP32 chip U3, respectively. The RS end of the liquid crystal display driver chip P1 is electrically connected to one end of the tenth resistor R10 and the GPIO16 end of the ESP32 chip U3, respectively. The RESET end of the liquid crystal display driver chip P1 is electrically connected to one end of the eleventh resistor R11 and the GPIO23 end of the ESP32 chip U3, respectively. The CS end of the liquid crystal display driver chip P1 is electrically connected to one end of the twelfth resistor R12 and the GPIO5 end of the ESP32 chip U3, respectively. The VDD end of the liquid crystal display driver chip P1 is electrically connected to one end of the twenty-eighth capacitor C28, one end of the twenty-ninth capacitor C29, and the discharge management module;
[0074] The LEDK end of the liquid crystal display driver chip P1 is electrically connected to one end of the twentieth resistor R20, the other end of the twentieth resistor R20 is electrically connected to the collector of the third electrode tube Q0, the base of the third electrode tube Q0 is electrically connected to one end of the fifty-second resistor R52, and the other end of the fifty-second resistor R52 is electrically connected to one end of the fifty-third resistor R53 and the GPIO4 end of the ESP32 chip U3 respectively;
[0075] The LEDA terminal of the liquid crystal display driver chip P1 is electrically connected to the discharge management module;
[0076] The other end of the eighth resistor R8, the other end of the ninth resistor R9, the other end of the tenth resistor R10, the other end of the eleventh resistor R11, and the other end of the twelfth resistor R12 are electrically connected to the VIO terminal, the REGIN terminal, the VDD terminal of the USB-to-serial port chip U4, one end of the twenty-seventh capacitor C27, and the LED module respectively;
[0077] The VBUS end of the USB-to-serial port chip U4 is electrically connected to the external power supply VBUS and one end of the thirty-first capacitor C31 respectively;
[0078] The D-terminal of the USB-to-serial port chip U4 is electrically connected to one end of the twenty-first resistor R21, and the other end of the twenty-first resistor R21 is electrically connected to the external data and one end of the thirty-fourth capacitor C34 respectively;
[0079] The D+ terminal of the USB-to-serial port chip U4 is electrically connected to one end of the twenty-second resistor R22, and the other end of the twenty-second resistor R22 is electrically connected to the external data and one end of the thirty-fourth capacitor C33 respectively;
[0080] The DTR terminal of the USB-to-serial port chip U4 is electrically connected to the discharge management module, and the RTS terminal of the USB-to-serial port chip U4 is electrically connected to the discharge management module;
[0081] The TXD terminal of the USB-to-serial port chip U4 is electrically connected to one end of a twenty-third resistor R23, and the other end of the twenty-third resistor R23 is electrically connected to the U0RXD / IO03 terminal of the ESP32 chip U3;
[0082] The RTS terminal of the USB-to-serial port chip U4 is electrically connected to one end of the twenty-fourth resistor R24, and the other end of the twenty-fourth resistor R24 is electrically connected to the U0TXD / IO01 terminal of the ESP32 chip U3;
[0083] The two GND ends of the liquid crystal display driver chip P1, the other end of the twenty-eighth capacitor C28, the other end of the twenty-ninth capacitor C29, the emitter of the third electrode tube Q0, the other end of the fifty-third resistor R53, the other end of the twenty-seventh capacitor C27, the GND end of the USB to serial port chip U4, the other end of the thirty-first capacitor C31, and the other end of the thirty-fourth capacitor C34 are grounded.
[0084] In a further embodiment, the IO interface module is as follows Figure 8 As shown, it includes header chip P4 and header chip P5.
[0085] In a further embodiment, the type-C interface module is as follows Fig. 9 As shown, it includes a TYPEY-C chip, a first ESD electrostatic suppressor E1, a second ESD electrostatic suppressor E2, a fourth ESD electrostatic suppressor E4 and a thirtieth resistor R30, wherein:
[0086] The UBUS1 end, UBUS2 end, PWR end, and PWR1 end of the TYPEY-C chip are electrically connected to the external power supply VBUS, the CC end and SBU2 end of the TYPEY-C chip are electrically connected to one end of the 30th resistor R30, the DP1+ end and DP+ end of the TYPEY-C chip are electrically connected to the external data, and the DN1- end and DN- end of the TYPEY-C chip are electrically connected to the external data;
[0087] The DP+ terminal of the TYPEY-C chip is also electrically connected to one end of the first ESD electrostatic suppressor E1, and the DN- terminal of the TYPEY-C chip is also electrically connected to one end of the fourth ESD electrostatic suppressor E4;
[0088] The PWR end of the TYPEY-C chip is also electrically connected to one end of the second ESD suppressor E2;
[0089] The other end of the 30th resistor R30, the other end of the first ESD suppressor E1, the other end of the fourth ESD suppressor E4, and the other end of the second ESD suppressor E2 are grounded.
[0090] In a further embodiment, the LED module is as follows Fig.10 As shown, it includes a 50th capacitor C50, a capacitor C0, a 32nd resistor R32, a field effect transistor Q5, a voltage stabilizing diode D2, a 34th resistor R34, a 37th capacitor C37, a 38th capacitor C38, a 39th capacitor C39, a 33rd resistor R33, a voltage stabilizing chip U7, a field effect transistor Q4, a 28th resistor R28, a field effect transistor Q6, a 42nd capacitor C42, a 43rd capacitor C43, a 44th capacitor C44, a 26th resistor R26, a transistor Q3, a 25th resistor R25, a 27th resistor R27, a first diode D1 and a sixth diode D6, wherein:
[0091] The IN terminal of the voltage stabilizing chip U7 is electrically connected to the +5V power supply, one end of the thirty-seventh capacitor C37, one end of the thirty-eighth capacitor C38, one end of the thirty-ninth capacitor C39, one end of the thirty-third resistor R33, one end of the twenty-eighth resistor R28, and the source of the field effect transistor Q4 respectively;
[0092] The EN terminal of the voltage stabilizing chip U7 is electrically connected to the other end of the thirty-third resistor R33;
[0093] The OUT terminal of the voltage stabilizing chip U7 is electrically connected to one end of the 42nd capacitor C42, one end of the 43rd capacitor C43, one end of the 44th capacitor C44, the discharge management module, and the source of the field effect transistor Q6 respectively;
[0094] The drain of the field effect transistor Q4 is electrically connected to the discharge management module, the gate of the field effect transistor Q4 is electrically connected to the other end of the twenty-eighth resistor R28, one end of the twenty-sixth resistor R26, and the gate of the field effect transistor Q6, respectively, and the drain of the field effect transistor Q6 is electrically connected to the LCD module;
[0095] The other end of the twenty-sixth resistor R26 is electrically connected to the collector of the transistor Q3, the base of the transistor Q3 is electrically connected to one end of the twenty-fifth resistor R25, the other end of the twenty-fifth resistor R25 is electrically connected to the cathode of the diode D1, the cathode of the diode D6, and one end of the twenty-seventh resistor R27, respectively, the anode of the diode D1 is electrically connected to the external power supply VBUS, and the anode of the diode D2 is electrically connected to the MTMS / IO14 terminal of the ESP32 chip U3;
[0096] The source of the field effect transistor Q5 is electrically connected to the +5V power supply and the cathode of the voltage-stabilizing diode, respectively; the drain of the field effect transistor Q5 is electrically connected to one end of the thirty-second resistor R32, one end of the capacitor C0, one end of the fiftieth capacitor C50, and the external power supply VBAT, respectively; the gate of the field effect transistor Q5 is electrically connected to the external power supply VBUS, the anode of the voltage-stabilizing diode D2, and one end of the thirty-fourth resistor R34, respectively;
[0097] The GND end of the voltage stabilizing chip U7, the other end of the thirty-seventh capacitor C37, the other end of the thirty-eighth capacitor C38, the other end of the thirty-ninth capacitor C39, the other end of the forty-second capacitor C42, the other end of the forty-third capacitor C43, the other end of the forty-fourth capacitor C44, the emitter of the transistor Q3, the other end of the twenty-seventh resistor R27, the other end of the thirty-second resistor R32, the other end of the capacitor C0, the other end of the fiftieth capacitor C50, and the other end of the thirty-fourth resistor R34 are grounded.
[0098] The same or similar reference numerals correspond to the same or similar components;
[0099] The terms used in the drawings to describe positional relationships are only used for illustrative purposes and should not be construed as limiting this patent;
[0100] Obviously, the above embodiments of the utility model are only examples for clearly explaining the utility model, and are not intended to limit the implementation methods of the utility model. For ordinary technicians in the relevant field, other different forms of changes or modifications can be made on the basis of the above description. It is not necessary and impossible to list all the implementation methods here. Any modifications, equivalent substitutions and improvements made within the spirit and principles of the utility model should be included in the protection scope of the claims of the utility model.
Claims
1. An IOT device, characterized in that: It includes a key switch module, a crystal oscillator module, a control module, a charging management module, a discharge management module, an LCD module, an IO interface module, a type-C interface module and an LED module, among which: The key switch module is electrically connected to the discharge management module and the control module; The crystal oscillator module is electrically connected to the control module; The charging management module is electrically connected to the IO interface module, the LED module and the type-C interface module; The discharge management module is also electrically connected to the control module, the LED module and the LCD module; The control module is also electrically connected to the LCD module, the IO interface module and the LED module respectively.
2. The IOT device according to claim 1, characterized in that: The control module includes an ESP32 chip U3, a twentieth capacitor C20, a second inductor L2, a twenty-first capacitor C21, a nineteenth capacitor C19, a third inductor L3, a forty-ninth capacitor C49, a thirty-second capacitor C32, a thirteenth capacitor C13, a twelfth capacitor C12, a fourteenth capacitor C14, a fifteenth capacitor C15, a seventh capacitor C7, a first capacitor C1, a second capacitor C2, a tenth capacitor C10, a ninth capacitor C9, a fourth resistor R4, a forty-second resistor R42, a forty-fourth resistor R44, a seventeenth capacitor C17 and a twenty-fourth capacitor C24, wherein: The GPIO25, 32K_XN / IO33, 32K_XN / IO32, SENSOR_VN / IO39, SENSOR_CAPN / IO38, SENSOR_CAPP / IO37, SENSOR_VP / IO36, GPIO21, GPIO22, GPIO17, GPIO2, MTDO / IO15, MTCK / IO13, MTDI / IO12, GPIO27, and GPIO26 terminals of the ESP32 chip U3 are all electrically connected to the IO interface module as external interfaces; The SENSOR_VN / IO39 terminal of the ESP32 chip U3 is also electrically connected to one end of the thirty-second capacitor C32, and the other end of the thirty-second capacitor C32 is electrically connected to the SENSOR_CAPN / IO38 terminal of the ESP32 chip U3; The SENSOR_CAPP / IO37 terminal of the ESP32 chip U3 is also electrically connected to one end of the forty-ninth capacitor C49, and the other end of the forty-ninth capacitor C49 is electrically connected to the SENSOR_VP / IO36 terminal of the ESP32 chip U3; The two VDD3P3 terminals of the ESP32 chip U3 are electrically connected to one end of the thirteenth capacitor C13, one end of the twelfth capacitor C12, one end of the fourteenth capacitor C14, one end of the fifteenth capacitor C15 and the discharge management module respectively; The LIN_IN terminal of the ESP32 chip U3 is electrically connected to one end of the third inductor L3, the other end of the third inductor L3 is electrically connected to one end of the nineteenth capacitor C19, the other end of the nineteenth capacitor C19 is electrically connected to one end of the second inductor L2 and one end of the twenty-first capacitor C21, respectively, and the other end of the second inductor L2 is electrically connected to one end of the twentieth capacitor C20; The first VDDA terminal of the ESP32 chip U3 is electrically connected to the discharge management module and one end of the seventh capacitor C7 respectively; The CAP1 end of the ESP32 chip U3 is electrically connected to one end of the tenth capacitor C10, one end of the ninth capacitor C9 and one end of the fourth resistor R4, respectively, and the other end of the ninth capacitor C9 and the other end of the fourth resistor R4 are both electrically connected to the CAP2 end of the ESP32 chip U3; The second VDDA terminal of the ESP32 chip U3 is electrically connected to the third VDDA terminal of the ESP32 chip U3, one end of the first capacitor C1, one end of the second capacitor C2 and the discharge management module respectively; The XTAL_P terminal, XTAL_N terminal, SD_DATA_1 / IO08 terminal, SD_DATA_0 / IO07 terminal, SD_CLK / IO06 terminal, SD_CMD / IO11 terminal, SD_DATA_3 / IO10 terminal, and SD_DATA_2 / IO09 terminal of the ESP32 chip U3 are electrically connected to the crystal oscillator module respectively; The GPIO21 end of the ESP32 chip U3 is also electrically connected to one end of the 42nd resistor R42, the other end of the 42nd resistor R42 is electrically connected to the other end of the 44th resistor R44 and the discharge management module respectively, and one end of the 44th resistor R44 is electrically connected to the GPIO22 end of the ESP32 chip U3; The VDD3P3_CPU terminal of the ESP32 chip U3 is electrically connected to the discharge management module and one end of the seventeenth capacitor C17 respectively; The VDD_SDIO terminal of the ESP32 chip U3 is electrically connected to one end of the twenty-fourth capacitor C24 and the crystal oscillator module. The MTMS / IO14 terminal of the ESP32 chip U3 is electrically connected to the LED module; The VDD3P3_RTC terminal of the ESP32 chip U3 is electrically connected to one end of the 30th capacitor C30 and the discharge management module respectively; The U0TXD / IO01, U0RXD / IO03, GPIO19, GPIO18, GPIO16, GPIO23, GPIO4, and GPIO5 terminals of the ESP32 chip U3 are electrically connected to the LCD module; The GPIO0 terminal, VDET_2 / IO35 terminal, VDET_1 / IO34 terminal, and CHIP_PU terminal of the ESP32 chip U3 are electrically connected to the discharge management module, and the GPIO0 terminal and VDET_2 / IO35 terminal of the ESP32 chip U3 are also electrically connected to the key switch module; The other end of the thirteenth capacitor C13, the other end of the twelfth capacitor C12, the other end of the fourteenth capacitor C14, the other end of the fifteenth capacitor C15, the other end of the twenty-first capacitor C21, the other end of the twentieth capacitor C20, the other end of the seventh capacitor C7, the other end of the tenth capacitor C10, the other end of the first capacitor C1, the other end of the second capacitor C2, the other end of the seventeenth capacitor C17, the other end of the twenty-fourth capacitor C24 and the other end of the thirtieth capacitor C30 are grounded.
3. The IOT device according to claim 2, characterized in that: The key switch module includes a first key switch S1, a second key switch S2, a first resistor R1, a third capacitor C3 and an eleventh capacitor C11, wherein: One end of the first key switch S1 is electrically connected to the discharge management module, the GPIO0 end of the ESP32 chip U3, one end of the first resistor R1 and one end of the third capacitor C3 respectively; One end of the second push switch S2 is electrically connected to the VDET_2 / IO35 end of the ESP32 chip U3, the other end of the first resistor R1, and one end of the eleventh capacitor C11 respectively; The other end of the first key switch S1 , the other end of the second key switch S2 , the other end of the third capacitor C3 , and the other end of the eleventh capacitor C11 are grounded.
4. The IOT device according to claim 3, characterized in that: The crystal oscillator module includes a crystal oscillator chip U1, a flash memory chip U2, a fourth capacitor C4, an eighth capacitor C8 and an eighteenth capacitor C18, wherein: The XOUT terminal of the crystal oscillator chip U1 is electrically connected to the XTAL_P terminal of the ESP32 chip U3 and one end of the fourth capacitor C4, respectively, and the XIN terminal of the crystal oscillator chip U1 is electrically connected to the XTAL_N terminal of the ESP32 chip U3 and one end of the eighth capacitor C8, respectively; The CS terminal of the flash memory chip U2 is electrically connected to the SD_CMD / IO11 terminal of the ESP32 chip U3, the DO terminal of the flash memory chip U2 is electrically connected to the SD_DATA_0 / IO07 terminal of the ESP32 chip U3, the WP terminal of the flash memory chip U2 is electrically connected to the SD_DATA_3 / IO10 terminal of the ESP32 chip U3, the HOLD terminal of the flash memory chip U2 is electrically connected to the SD_DATA_2 / IO09 terminal of the ESP32 chip U3, the CLK terminal of the flash memory chip U2 is electrically connected to the SD_CLK / IO06 terminal of the ESP32 chip U3, and the DI / 1O0 terminal of the flash memory chip U2 is electrically connected to the SD_DATA_1 / IO08 terminal of the ESP32 chip U3; The VCC terminal of the flash memory chip U2 is also electrically connected to one end of the capacitor C18; Two GND terminals of the crystal oscillator chip U1, the other terminal of the fourth capacitor C4, the other terminal of the eighth capacitor C8, the other terminal of the eighteenth capacitor C18, and the GND terminal of the flash memory chip U2 are grounded.
5. The IOT device according to claim 4, characterized in that: The charging management module includes a TP4054 chip U6, a first light emitting diode LED1, a twenty-ninth resistor R29, a thirty-sixth capacitor C36, a thirty-fifth capacitor C35, a thirty-fifth resistor R35, a fortieth capacitor C40, a forty-first capacitor C41, a thirty-first resistor R31, a third ESD electrostatic suppressor E3 and a lithium battery P2, wherein: The positive electrode of the lithium battery P2 is electrically connected to one end of the third ESD suppressor E3 and one end of the thirty-first resistor R31 respectively; the other end of the thirty-first resistor R31 is electrically connected to the LED module, one end of the fortieth capacitor C40, one end of the forty-first capacitor C41 and the BAT end of the TP4054 chip U6 respectively; The PROG terminal of the TP4054 chip U6 is electrically connected to one end of the thirty-fifth resistor R35; The VCC terminal of the TP4054 chip U6 is electrically connected to one end of the twenty-ninth resistor R29, one end of the thirty-sixth capacitor C36, one end of the thirty-fifth capacitor C35, and the external power supply VBUS respectively; The other end of the twenty-ninth resistor R29 is electrically connected to the anode of the first light emitting diode LED1, and the cathode of the first light emitting diode LED1 is electrically connected to the CHRG end of the TP4054 chip U6; The GND end of the TP4054 chip U6, the negative electrode of the lithium battery P2, the other end of the third ESD electrostatic suppressor E3, the other end of the fortieth capacitor C40, the other end of the forty-first capacitor C41, the other end of the thirty-fifth resistor R35, the other end of the thirty-sixth capacitor C36, and the other end of the thirty-fifth capacitor C35 are grounded.
6. The IOT device according to claim 5, characterized in that: The discharge management module includes a third key switch S3, a fifth resistor R5, a twenty-third capacitor C23, a twenty-second capacitor C22, a seventh resistor R7, a sixth resistor R6, a first transistor Q1, a second transistor Q2, a fifteenth resistor R15 and a nineteenth resistor R19, wherein: One end of the fifth resistor R5 provides voltage and is electrically connected to the control module, the LED module, the IO interface module and the LCD module; the other end of the fifth resistor R5 is electrically connected to one end of the third key switch S3, one end of the twenty-third capacitor C23, and the CHIP_PU end of the ESP32 chip U3 respectively; One end of the sixth resistor R6 provides voltage and is electrically connected to the LED module; the other end of the sixth resistor R6 is electrically connected to one end of the twenty-second capacitor C22, one end of the seventh resistor R7, and the VDET_1 / IO34 end of the ESP32 chip U3; The collector of the first transistor Q1 is electrically connected to the CHIP_PU terminal of the ESP32 chip U3, the emitter of the first transistor Q1 is electrically connected to one end of the nineteenth resistor R19 and the LCD module respectively, the base of the first transistor Q1 is electrically connected to one end of the fifteenth resistor R15, and the other end of the fifteenth resistor R15 is electrically connected to the emitter of the second transistor Q2 and the LCD module respectively; the collector of the second transistor Q2 is electrically connected to the GPIO0 terminal of the ESP32 chip U3, and the base of the second transistor Q2 is electrically connected to the other end of the nineteenth resistor R19; The other end of the third key switch S3, the other end of the twenty-third capacitor C23, the other end of the twenty-second capacitor C22, and the other end of the seventh resistor R7 are grounded.
7. The IOT device according to claim 6, characterized in that: The LCD module includes a liquid crystal display driver chip P1, an eighth resistor R8, a ninth resistor R9, a tenth resistor R10, an eleventh resistor R11, a twelfth resistor R12, a twenty-eighth capacitor C28, a twenty-ninth capacitor C29, a twentieth resistor R20, a third transistor Q0, a fifty-second resistor R52, a fifty-third resistor R53, a twenty-seventh capacitor C27, a thirty-first capacitor C31, a twenty-first resistor R21, a twenty-second resistor R22, a thirty-third capacitor C33, a thirty-fourth capacitor C34, a USB to serial port chip U4, a twenty-third resistor R23 and a twenty-fourth resistor R24, wherein: The SDA end of the liquid crystal display driver chip P1 is electrically connected to one end of the eighth resistor R8 and the GPIO19 end of the ESP32 chip U3, respectively. The SCL end of the liquid crystal display driver chip P1 is electrically connected to one end of the ninth resistor R9 and the GPIO18 end of the ESP32 chip U3, respectively. The RS end of the liquid crystal display driver chip P1 is electrically connected to one end of the tenth resistor R10 and the GPIO16 end of the ESP32 chip U3, respectively. The RESET end of the liquid crystal display driver chip P1 is electrically connected to one end of the eleventh resistor R11 and the GPIO23 end of the ESP32 chip U3, respectively. The CS end of the liquid crystal display driver chip P1 is electrically connected to one end of the twelfth resistor R12 and the GPIO5 end of the ESP32 chip U3, respectively. The VDD end of the liquid crystal display driver chip P1 is electrically connected to one end of the twenty-eighth capacitor C28, one end of the twenty-ninth capacitor C29, and the discharge management module; The LEDK end of the liquid crystal display driver chip P1 is electrically connected to one end of the twentieth resistor R20, the other end of the twentieth resistor R20 is electrically connected to the collector of the third electrode tube Q0, the base of the third electrode tube Q0 is electrically connected to one end of the fifty-second resistor R52, and the other end of the fifty-second resistor R52 is electrically connected to one end of the fifty-third resistor R53 and the GPIO4 end of the ESP32 chip U3 respectively; The LEDA terminal of the liquid crystal display driver chip P1 is electrically connected to the discharge management module; The other end of the eighth resistor R8, the other end of the ninth resistor R9, the other end of the tenth resistor R10, the other end of the eleventh resistor R11, and the other end of the twelfth resistor R12 are electrically connected to the VIO terminal, the REGIN terminal, the VDD terminal of the USB-to-serial port chip U4, one end of the twenty-seventh capacitor C27, and the LED module respectively; The VBUS end of the USB-to-serial port chip U4 is electrically connected to the external power supply VBUS and one end of the thirty-first capacitor C31 respectively; The D-terminal of the USB-to-serial port chip U4 is electrically connected to one end of the twenty-first resistor R21, and the other end of the twenty-first resistor R21 is electrically connected to the external data and one end of the thirty-fourth capacitor C34 respectively; The D+ terminal of the USB-to-serial port chip U4 is electrically connected to one end of the twenty-second resistor R22, and the other end of the twenty-second resistor R22 is electrically connected to the external data and one end of the thirty-fourth capacitor C33 respectively; The DTR terminal of the USB-to-serial port chip U4 is electrically connected to the discharge management module, and the RTS terminal of the USB-to-serial port chip U4 is electrically connected to the discharge management module; The TXD terminal of the USB-to-serial port chip U4 is electrically connected to one end of a twenty-third resistor R23, and the other end of the twenty-third resistor R23 is electrically connected to the U0RXD / IO03 terminal of the ESP32 chip U3; The RTS terminal of the USB-to-serial port chip U4 is electrically connected to one end of the twenty-fourth resistor R24, and the other end of the twenty-fourth resistor R24 is electrically connected to the U0TXD / IO01 terminal of the ESP32 chip U3; The two GND ends of the liquid crystal display driver chip P1, the other end of the twenty-eighth capacitor C28, the other end of the twenty-ninth capacitor C29, the emitter of the third electrode tube Q0, the other end of the fifty-third resistor R53, the other end of the twenty-seventh capacitor C27, the GND end of the USB to serial port chip U4, the other end of the thirty-first capacitor C31, and the other end of the thirty-fourth capacitor C34 are grounded.
8. The IOT device according to claim 7, characterized in that: The IO interface module includes a header chip P4 and a header chip P5.
9. The IOT device according to claim 8, characterized in that: The type-C interface module includes a TYPEY-C chip, a first ESD electrostatic suppressor E1, a second ESD electrostatic suppressor E2, a fourth ESD electrostatic suppressor E4 and a thirtieth resistor R30, wherein: The UBUS1 end, UBUS2 end, PWR end, and PWR1 end of the TYPEY-C chip are electrically connected to the external power supply VBUS, the CC end and SBU2 end of the TYPEY-C chip are electrically connected to one end of the 30th resistor R30, the DP1+ end and DP+ end of the TYPEY-C chip are electrically connected to the external data, and the DN1- end and DN- end of the TYPEY-C chip are electrically connected to the external data; The DP+ terminal of the TYPEY-C chip is also electrically connected to one end of the first ESD electrostatic suppressor E1, and the DN- terminal of the TYPEY-C chip is also electrically connected to one end of the fourth ESD electrostatic suppressor E4; The PWR end of the TYPEY-C chip is also electrically connected to one end of the second ESD suppressor E2; The other end of the 30th resistor R30, the other end of the first ESD suppressor E1, the other end of the fourth ESD suppressor E4, and the other end of the second ESD suppressor E2 are grounded.
10. The IOT device according to claim 9, characterized in that: The LED module includes a 50th capacitor C50, a capacitor C0, a 32nd resistor R32, a field effect transistor Q5, a voltage stabilizing diode D2, a 34th resistor R34, a 37th capacitor C37, a 38th capacitor C38, a 39th capacitor C39, a 33rd resistor R33, a voltage stabilizing chip U7, a field effect transistor Q4, a 28th resistor R28, a field effect transistor Q6, a 42nd capacitor C42, a 43rd capacitor C43, a 44th capacitor C44, a 26th resistor R26, a transistor Q3, a 25th resistor R25, a 27th resistor R27, a first diode D1 and a sixth diode D6, wherein: The IN terminal of the voltage stabilizing chip U7 is electrically connected to the +5V power supply, one end of the thirty-seventh capacitor C37, one end of the thirty-eighth capacitor C38, one end of the thirty-ninth capacitor C39, one end of the thirty-third resistor R33, one end of the twenty-eighth resistor R28, and the source of the field effect transistor Q4 respectively; The EN terminal of the voltage stabilizing chip U7 is electrically connected to the other end of the thirty-third resistor R33; The OUT terminal of the voltage stabilizing chip U7 is electrically connected to one end of the 42nd capacitor C42, one end of the 43rd capacitor C43, one end of the 44th capacitor C44, the discharge management module, and the source of the field effect transistor Q6 respectively; The drain of the field effect transistor Q4 is electrically connected to the discharge management module, the gate of the field effect transistor Q4 is electrically connected to the other end of the twenty-eighth resistor R28, one end of the twenty-sixth resistor R26, and the gate of the field effect transistor Q6, respectively, and the drain of the field effect transistor Q6 is electrically connected to the LCD module; The other end of the twenty-sixth resistor R26 is electrically connected to the collector of the transistor Q3, the base of the transistor Q3 is electrically connected to one end of the twenty-fifth resistor R25, the other end of the twenty-fifth resistor R25 is electrically connected to the cathode of the diode D1, the cathode of the diode D6, and one end of the twenty-seventh resistor R27, respectively, the anode of the diode D1 is electrically connected to the external power supply VBUS, and the anode of the diode D2 is electrically connected to the MTMS / IO14 terminal of the ESP32 chip U3; The source of the field effect transistor Q5 is electrically connected to the +5V power supply and the cathode of the voltage-stabilizing diode, respectively; the drain of the field effect transistor Q5 is electrically connected to one end of the thirty-second resistor R32, one end of the capacitor C0, one end of the fiftieth capacitor C50, and the external power supply VBAT, respectively; the gate of the field effect transistor Q5 is electrically connected to the external power supply VBUS, the anode of the voltage-stabilizing diode D2, and one end of the thirty-fourth resistor R34, respectively; The GND end of the voltage stabilizing chip U7, the other end of the thirty-seventh capacitor C37, the other end of the thirty-eighth capacitor C38, the other end of the thirty-ninth capacitor C39, the other end of the forty-second capacitor C42, the other end of the forty-third capacitor C43, the other end of the forty-fourth capacitor C44, the emitter of the transistor Q3, the other end of the twenty-seventh resistor R27, the other end of the thirty-second resistor R32, the other end of the capacitor C0, the other end of the fiftieth capacitor C50, and the other end of the thirty-fourth resistor R34 are grounded.