Semiconductor substrate structure

Abstract

The utility model discloses a semiconductor substrate structure, which relates to the technical field of substrate structures and comprises a substrate carrier, a clamping unit arranged on one side of the substrate carrier and a filling unit arranged in the substrate carrier. The clamping unit comprises a top plate arranged at the top end of the substrate carrier, a limiting assembly arranged on the back of the top plate, and a clamping assembly arranged on one side of the limiting assembly. The filling unit comprises a conductive layer fixedly connected to the inner wall of the substrate carrier, a dielectric layer arranged on one side of the conductive layer, an anti-oxidation film arranged on one side of the dielectric layer, and an insulating filling layer arranged on one side of the anti-oxidation film. According to the semiconductor substrate structure provided by the utility model, a certain friction force can be generated between the trapezoidal groove and the limiting frame, so that the shaking of the top plate is limited, the movement of the bottom end of the semiconductor is limited by the extrusion force generated by the spring and the elastic column, the stability of the substrate structure is improved, and the damage to the semiconductor under an unexpected condition is further reduced.

Description

Technical Field

[0001] The utility model relates to the technical field of substrate structures, in particular to a semiconductor substrate structure. Background Art

[0002] Transistors and integrated circuits are both made on the surface of semiconductor wafers. The semiconductor wafer here is the substrate structure. The semiconductor substrate not only plays a role in electrical performance, but also plays a role in mechanical support. It is an important component of the semiconductor.

[0003] After searching the publication (announcement) number: CN209087812U, a substrate structure of a high-power semiconductor is disclosed, including a dielectric layer and a substrate carrier, a support plate is welded below the substrate carrier, and the outer walls on both sides of the substrate carrier are symmetrically provided with connection grooves, and the inner wall at the bottom of the connection groove is equidistantly provided with slide grooves, and the inner wall of the slide groove is pasted with an anti-oxidation film, and a conductive layer is embedded on the upper surface of the dielectric layer and located between adjacent crystal mounting grooves, and the inner wall of the three crystal mounting grooves is provided with pin sockets, and the inside of the pin sockets is filled with an insulating filling film. In the utility model, the substrate structure adopts a combined splicing method of the dielectric layer and the substrate carrier, which is convenient for quick and convenient installation and disassembly of the substrate structure, so that when a part of the components of the substrate structure is damaged, the substrate structure can be disassembled and processed at the first time, and then quickly replaced and repaired, which improves the flexibility of use of the substrate structure.

[0004] Although the above scheme can disassemble the substrate structure immediately when a part of the substrate structure is damaged, and then quickly replace and repair it, the stability of the substrate structure is not strong enough, which makes the semiconductor easy to loosen, and the safety performance is not enough during use, and the semiconductor is easily damaged in an accident. Utility Model Content

[0005] The main purpose of the utility model is to provide a semiconductor substrate structure, which solves the problem that the stability of the substrate structure is not strong enough, resulting in the semiconductor being easy to loosen, by providing a clamping unit, and solves the problem that the safety performance is not strong enough during use and the semiconductor is easy to be damaged in an accident by providing a filling unit.

[0006] In order to achieve the above purpose, the utility model provides the following technical solutions:

[0007] A semiconductor substrate structure includes a substrate carrier, a clamping unit arranged on one side of the substrate carrier, and a filling unit arranged inside the substrate carrier;

[0008] The clamping unit comprises a top plate arranged at the top of the substrate carrier, a limiting assembly arranged at the back of the top plate, and a clamping assembly arranged at one side of the limiting assembly;

[0009] The filling unit comprises a conductive layer fixedly connected to the inner wall of the substrate carrier, a dielectric layer arranged on one side of the conductive layer, an anti-oxidation film arranged on one side of the dielectric layer, and an insulating filling layer arranged on one side of the anti-oxidation film.

[0010] Preferably, the limiting assembly in the snap-in unit includes a limiting frame fixedly connected to one side of the top plate, a plurality of grooves opened on the front side of the top plate, a mounting column connected to one side of the corresponding grooves, and a connecting groove opened on both sides of the mounting column.

[0011] Preferably, the clamping assembly in the clamping unit comprises a plurality of clamping grooves fixedly connected to the inner wall of the bottom end of the substrate carrier, conductive plates arranged on both sides of the clamping grooves, an elastic column fixedly connected to one side of the conductive plate, and a spring fixedly connected to the surface of the elastic column;

[0012] The conductive plate is flush with the corresponding connecting groove.

[0013] Preferably, the clamping unit further comprises a plurality of threaded holes formed on both sides of the upper line of the substrate carrier, and bolts threadedly connected to the inside of the threaded holes;

[0014] One end of each of the bolts extends into the interior of the limiting frame.

[0015] Preferably, the clamping unit further comprises a trapezoidal groove opened inside the shell of the substrate carrier, two arc-shaped blocks arranged inside the trapezoidal groove, and curved grooves opened on both sides of the limiting frame;

[0016] The arc block is clamped with the corresponding curved groove, and one end of the limit frame extends to the inside of the trapezoidal groove.

[0017] Preferably, the spring and the elastic column in the clamping unit are both arranged inside the conductive layer.

[0018] Preferably, the side surfaces of the conductive layer, the dielectric layer, the anti-oxidation film and the insulating filling layer in the filling unit are fixedly connected to the inner wall of the substrate carrier.

[0019] Compared with the prior art, the utility model has the following beneficial effects:

[0020] 1. In the utility model, through the setting of the clamping unit, since one end of the limit frame extends to the inside of the trapezoidal groove, a certain friction force will be generated between the trapezoidal groove and the limit frame, thereby limiting the shaking of the top plate, and since the arc block is clamped with the corresponding curved groove, the arc block further provides friction force to the side of the limit frame to limit the shaking of the top plate, and then the bolt is inserted into the threaded hole so that one end of the bolt extends to the inside of the shell of the limit frame. When the semiconductor is connected to the substrate structure, the bottom end of the semiconductor extends to the inner bottom end of the mounting column until the bottom end of the semiconductor is flush with the connecting groove. At this time, the bottom end of the semiconductor is restricted from moving by the extrusion force generated by the spring and the elastic column, and the conductive plate contacts the bottom end of the semiconductor to complete the corresponding testing work, thereby improving the stability of the substrate structure and preventing the semiconductor from loosening.

[0021] 2. In the utility model, through the setting of the filling unit, since the bottom end of the semiconductor is in contact with the conductive plate, and the spring and the elastic column are arranged inside the conductive layer, and a dielectric layer is arranged on one side of the conductive layer, an anti-oxidation film is arranged on one side of the dielectric layer, and an insulating filling layer is arranged on one side of the anti-oxidation film, the semiconductor is multiple-protected by the cooperation of the dielectric layer, the anti-oxidation film and the insulating filling layer, and with the help of the setting of the mounting column, the damage to the semiconductor in an accidental situation is further reduced, and the safety performance of the substrate structure is improved. BRIEF DESCRIPTION OF THE DRAWINGS

[0022] Figure 1 It is a three-dimensional structural schematic diagram of the utility model;

[0023] Figure 2 It is a schematic diagram of the three-dimensional structure of the substrate carrier in the utility model;

[0024] Figure 3 This is a schematic diagram of the three-dimensional structure of the top plate in the utility model;

[0025] Figure 4 It is a cross-sectional view of the substrate carrier in the utility model;

[0026] Figure 5 For the utility model Figure 2 A is an enlarged structural diagram of FIG.

[0027] In the figure:

[0028] 1. Substrate carrier;

[0029] 2. Snap-on unit; 201. Bolt; 202. Top plate; 203. Mounting column; 204. Threaded hole; 205. Trapezoidal groove; 206. Snap-on groove; 207. Limiting frame; 208. Bending groove; 209. Connecting groove; 210. Conductive plate; 211. Spring; 212. Elastic column; 213. Arc block;

[0030] 3. Filling unit; 301. Conductive layer; 302. Dielectric layer; 303. Anti-oxidation film; 304. Insulating filling layer. DETAILED DESCRIPTION

[0031] In order to make the technical means, creative features, objectives and effects achieved by the present invention easy to understand, the present invention is further described below in conjunction with specific implementation methods. Example

[0032] like Figure 1 , Figure 2 , Figure 3 , Figure 4 as well as Figure 5 As shown, a semiconductor substrate structure includes a substrate carrier 1, a clamping unit 2 disposed on one side of the substrate carrier 1, and a filling unit 3 disposed inside the substrate carrier 1;

[0033] The clamping unit 2 includes a top plate 202 disposed on the top of the substrate carrier 1, a position limiting component disposed on the back of the top plate 202, and a clamping component disposed on one side of the position limiting component;

[0034] The filling unit 3 includes a conductive layer 301 fixedly connected to the inner wall of the substrate carrier 1 , a dielectric layer 302 arranged on one side of the conductive layer 301 , an anti-oxidation film 303 arranged on one side of the dielectric layer 302 , and an insulating filling layer 304 arranged on one side of the anti-oxidation film 303 .

[0035] The limiting assembly in the snap-in unit 2 includes a limiting frame 207 fixedly connected to one side of the top plate 202, a plurality of grooves opened on the front side of the top plate 202, a mounting column 203 connected to one side of the corresponding groove, and a connecting groove 209 opened on both sides of the mounting column 203.

[0036] The clamping assembly in the clamping unit 2 includes a plurality of clamping grooves 206 fixedly connected to the inner wall of the bottom end of the substrate carrier 1, a conductive plate 210 disposed on both sides of the clamping grooves 206, an elastic column 212 fixedly connected to one side of the conductive plate 210, and a spring 211 fixedly connected to the surface of the elastic column 212;

[0037] The conductive plate 210 is flush with the corresponding connecting groove 209 .

[0038] The clamping unit 2 further includes a plurality of threaded holes 204 formed on both sides of the upper line of the substrate carrier 1 and bolts 201 threadedly connected to the inside of the threaded holes 204;

[0039] One end of the plurality of bolts 201 extends into the interior of the limiting frame 207 .

[0040] The clamping unit 2 further includes a trapezoidal groove 205 formed inside the shell of the substrate carrier 1, two arc-shaped blocks 213 disposed inside the trapezoidal groove 205, and curved grooves 208 formed on both sides of the limiting frame 207;

[0041] The arc block 213 is engaged with the corresponding curved groove 208 , and one end of the limiting frame 207 extends to the inside of the trapezoidal groove 205 .

[0042] A certain friction force will be generated between the trapezoidal groove 205 and the limit frame 207, thereby limiting the shaking of the top plate 202, and the arc block 213 further provides friction force to the side of the limit frame 207 to limit the shaking of the top plate 202, thereby improving the stability of the top plate 202 and the stability of the semiconductor connection.

[0043] The spring 211 and the elastic column 212 in the clamping unit 2 are both arranged inside the conductive layer 301 .

[0044] The bolt 201 is inserted into the threaded hole 204 so that one end of the bolt 201 extends to the inside of the shell of the limit frame 207. When the semiconductor is connected to the substrate structure, the bottom end of the semiconductor extends to the inner bottom end of the mounting column 203 until the bottom end of the semiconductor is flush with the connecting groove 209. At this time, the bottom end of the semiconductor is restricted from moving by the squeezing force generated by the spring 211 and the elastic column 212, and the conductive plate 210 contacts the bottom end of the semiconductor to complete the corresponding test work.

[0045] The side surfaces of the conductive layer 301 , the dielectric layer 302 , the anti-oxidation film 303 and the insulating filling layer 304 in the filling unit 3 are fixedly connected to the inner wall of the substrate carrier 1 . Example

[0046] like Figure 1 , Figure 2 , Figure 3 , Figure 4 as well as Figure 5 As shown, a semiconductor substrate structure includes a substrate carrier 1, a clamping unit 2 disposed on one side of the substrate carrier 1, and a filling unit 3 disposed inside the substrate carrier 1;

[0047] The clamping unit 2 includes a top plate 202 disposed on the top of the substrate carrier 1, a position limiting component disposed on the back of the top plate 202, and a clamping component disposed on one side of the position limiting component;

[0048] The filling unit 3 includes a conductive layer 301 fixedly connected to the inner wall of the substrate carrier 1 , a dielectric layer 302 arranged on one side of the conductive layer 301 , an anti-oxidation film 303 arranged on one side of the dielectric layer 302 , and an insulating filling layer 304 arranged on one side of the anti-oxidation film 303 .

[0049] The limiting assembly in the snap-in unit 2 includes a limiting frame 207 fixedly connected to one side of the top plate 202, a plurality of grooves opened on the front side of the top plate 202, a mounting column 203 connected to one side of the corresponding groove, and a connecting groove 209 opened on both sides of the mounting column 203.

[0050] The clamping assembly in the clamping unit 2 includes a plurality of clamping grooves 206 fixedly connected to the inner wall of the bottom end of the substrate carrier 1, a conductive plate 210 disposed on both sides of the clamping grooves 206, an elastic column 212 fixedly connected to one side of the conductive plate 210, and a spring 211 fixedly connected to the surface of the elastic column 212;

[0051] The conductive plate 210 is flush with the corresponding connecting groove 209 .

[0052] The clamping unit 2 further includes a plurality of threaded holes 204 formed on both sides of the upper line of the substrate carrier 1 and bolts 201 threadedly connected to the inside of the threaded holes 204;

[0053] One end of the plurality of bolts 201 extends into the interior of the limiting frame 207 .

[0054] The clamping unit 2 further includes a trapezoidal groove 205 formed inside the shell of the substrate carrier 1, two arc-shaped blocks 213 disposed inside the trapezoidal groove 205, and curved grooves 208 formed on both sides of the limiting frame 207;

[0055] The arc block 213 is engaged with the corresponding curved groove 208 , and one end of the limiting frame 207 extends to the inside of the trapezoidal groove 205 .

[0056] A certain friction force will be generated between the trapezoidal groove 205 and the limit frame 207, thereby limiting the shaking of the top plate 202, and the arc block 213 further provides friction force to the side of the limit frame 207 to limit the shaking of the top plate 202, thereby improving the stability of the top plate 202 and the stability of the semiconductor connection.

[0057] The spring 211 and the elastic column 212 in the clamping unit 2 are both arranged inside the conductive layer 301 .

[0058] The bottom of the semiconductor contacts the conductive plate 210 , and the spring 211 and the elastic column 212 are arranged inside the conductive layer 301 . The conductive layer 301 can energize the conductive plate 210 and then test the bottom of the semiconductor.

[0059] The bolt 201 is inserted into the threaded hole 204 so that one end of the bolt 201 extends to the inside of the shell of the limit frame 207. When the semiconductor is connected to the substrate structure, the bottom end of the semiconductor extends to the inner bottom end of the mounting column 203 until the bottom end of the semiconductor is flush with the connecting groove 209. At this time, the bottom end of the semiconductor is restricted from moving by the squeezing force generated by the spring 211 and the elastic column 212, and the conductive plate 210 contacts the bottom end of the semiconductor to complete the corresponding test work.

[0060] The side surfaces of the conductive layer 301 , the dielectric layer 302 , the anti-oxidation film 303 and the insulating filling layer 304 in the filling unit 3 are fixedly connected to the inner wall of the substrate carrier 1 .

[0061] The dielectric layer 302, the anti-oxidation film 303 and the insulating filling layer 304 cooperate to provide multiple protections for the semiconductor, and the installation column 203 is used to further reduce the damage to the semiconductor in unexpected situations.

[0062] The above shows and describes the basic principle and main features of the utility model and the advantages of the utility model. Those skilled in the art should understand that the utility model is not limited by the above embodiments. The above embodiments and descriptions are only for explaining the principle of the utility model. Without departing from the spirit and scope of the utility model, the utility model may have various changes and improvements, which fall within the scope of the utility model to be protected. The scope of protection claimed by the utility model is defined by the attached claims and their equivalents.

Claims

1. A semiconductor substrate structure, comprising a substrate carrier (1), characterized in that: It also comprises a clamping unit (2) arranged on one side of the substrate carrier (1), and a filling unit (3) arranged inside the substrate carrier (1); The clamping unit (2) comprises a top plate (202) arranged at the top end of the substrate carrier (1), a limiting component arranged at the back of the top plate (202), and a clamping component arranged at one side of the limiting component; The filling unit (3) comprises a conductive layer (301) fixedly connected to the inner wall of the substrate carrier (1), a dielectric layer (302) arranged on one side of the conductive layer (301), an anti-oxidation film (303) arranged on one side of the dielectric layer (302), and an insulating filling layer (304) arranged on one side of the anti-oxidation film (303).

2. A semiconductor substrate structure according to claim 1, characterized in that: The limiting assembly in the clamping unit (2) comprises a limiting frame (207) fixedly connected to one side of the top plate (202), a plurality of grooves formed on the front side of the top plate (202), a mounting column (203) connected to one side of the corresponding grooves, and a connecting groove (209) formed on both sides of the mounting column (203).

3. A semiconductor substrate structure according to claim 2, characterized in that: The clamping assembly in the clamping unit (2) comprises a plurality of clamping grooves (206) fixedly connected to the inner wall of the bottom end of the substrate carrier (1), conductive plates (210) arranged on both sides of the clamping grooves (206), an elastic column (212) fixedly connected to one side of the conductive plate (210), and a spring (211) fixedly connected to the surface of the elastic column (212); The conductive plate (210) is flush with the corresponding connecting groove (209).

4. A semiconductor substrate structure according to claim 3, characterized in that: The clamping unit (2) further comprises a plurality of threaded holes (204) formed on both sides of the upper line of the substrate carrier (1), and bolts (201) threadedly connected to the inside of the threaded holes (204); One end of the plurality of bolts (201) extends into the interior of the limiting frame (207).

5. A semiconductor substrate structure according to claim 4, characterized in that: The clamping unit (2) further comprises a trapezoidal groove (205) provided inside the shell of the substrate carrier (1), two arc-shaped blocks (213) arranged inside the trapezoidal groove (205), and curved grooves (208) provided on both sides of the limiting frame (207); The arc block (213) is snap-connected with the corresponding curved groove (208), and one end of the limit frame (207) extends to the inside of the trapezoidal groove (205).

6. A semiconductor substrate structure according to claim 5, characterized in that: The spring (211) and the elastic column (212) in the clamping unit (2) are both arranged inside the conductive layer (301).

7. A semiconductor substrate structure according to claim 6, characterized in that: The side surfaces of the conductive layer (301), the dielectric layer (302), the anti-oxidation film (303) and the insulating filling layer (304) in the filling unit (3) are all fixedly connected to the inner wall of the substrate carrier (1).

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