Voltage diagnosis self-locking protection circuit

Abstract

The utility model belongs to the field of power supply protection, and relates to a voltage diagnosis self-locking protection circuit. Comprising a main power supply Power0, the main power supply Power0 is connected with a voltage division circuit through a main power supply control circuit, and the voltage division circuit is connected with a voltage diagnosis circuit. The main power supply Power0 is connected with the voltage diagnosis circuit through the delay control circuit; and the delay control circuit is used for realizing delay power-on of the voltage diagnosis circuit, so that the self-locking phenomenon caused by disconnection of the main power supply Power0 and the voltage division circuit due to misjudgment of the voltage diagnosis circuit caused by unstable power supply voltage at the beginning of power-on is avoided, and the reliability is high. And the main power supply Power0 and the voltage diagnosis circuit are connected with the main power supply control circuit through a triode Q2. When the voltage diagnosis circuit is powered on, the voltage diagnosis circuit can monitor the voltage division circuit in real time, and if the voltage division circuit is abnormal, the voltage diagnosis circuit controls the main power supply control circuit to cut off the power supply of the main power supply Power0 to the voltage division circuit, so that self-locking is formed, and the voltage diagnosis circuit is powered off and restarted until a fault is eliminated.

Description

Technical Field

[0001] The utility model belongs to the field of power supply protection and relates to a voltage diagnosis self-locking protection circuit. Background Art

[0002] In the power supply system, when the feedback loop fails, the output voltage is not controlled and the voltage rises beyond the specified range. At this time, the excessively high output voltage may cause damage to subsequent electrical equipment. When the voltage is too low, it will cause undervoltage of subsequent devices, thus affecting the performance of the devices. To deal with this problem, an overvoltage or undervoltage protection circuit is usually added to the power supply. The clamping overvoltage protection circuit clamps the output voltage at a fixed value. The accuracy of the protected voltage is not high, and the leakage current of the protection state circuit is large; the intermittent overvoltage and undervoltage protection circuit will cause the circuit to restart back and forth, and the product reliability cannot be guaranteed; when used in occasions with certain safety requirements, a self-locking protection circuit is required. Generally, the self-locking protection circuit with overvoltage and undervoltage is built with a voltage regulator and a triode, which has large errors and high power consumption. It is easy to malfunction at the moment of power-on. In order to avoid malfunction, a delay circuit is used, but the delay circuit uses a large capacitor and the timing accuracy is not high. Utility Model Content

[0003] In order to overcome the shortcomings of the above-mentioned prior art, the purpose of the utility model is to provide a voltage diagnosis self-locking protection circuit. The utility model can realize delayed power-on of the voltage diagnosis circuit, and the delay time is accurately adjustable. It can avoid misjudgment of the voltage diagnosis circuit caused by unstable power supply voltage at the beginning of power-on, and has high reliability. At the same time, the voltage accuracy of the protected power supply is high and the power consumption is low.

[0004] In order to achieve the above purpose, the utility model adopts the following technical solutions:

[0005] The utility model discloses a voltage diagnosis self-locking protection circuit, comprising a main power supply Power0, the main power supply Power0 is connected to a voltage dividing circuit through a main power supply control circuit, and the voltage dividing circuit is connected to a voltage diagnosis circuit;

[0006] The main power supply Power0 is connected to the voltage diagnosis circuit through the delay control circuit;

[0007] The main power supply Power0 and the voltage diagnosis circuit are both connected to the main power supply control circuit through the transistor Q2.

[0008] Furthermore, the main power control circuit includes a MOS tube M2, a source of the MOS tube M2 is connected to the main power Power0, a drain of the MOS tube M2 is connected to the voltage divider circuit, and a gate of the MOS tube M2 is connected to the transistor Q2.

[0009] Furthermore, a resistor R22 is connected between the MOS tube M2 and the transistor Q2. The MOS tube M2 is connected in parallel with the capacitor C7 and the resistor R21 respectively. The MOS tube M2, the capacitor C7 and the resistor R21 are all connected to the total power supply Power0 through the resistor R20.

[0010] Furthermore, the number of the voltage divider circuit is at least one and at most four.

[0011] Further, the voltage-dividing circuit includes a voltage-dividing power supply, the voltage-dividing power supply is connected in series with a first voltage-dividing resistor, a second voltage-dividing resistor and a third voltage-dividing resistor in sequence, the first voltage-dividing resistor is grounded, and both ends of the second voltage-dividing resistor are connected to the voltage diagnosis circuit;

[0012] The divided voltage power supply is connected to the drain of the MOS tube M2.

[0013] Furthermore, when there are two to four voltage-dividing circuits, the voltage-dividing power supply of the first voltage-dividing circuit supplies power to the voltage-dividing power supplies of the remaining voltage-dividing circuits.

[0014] Further, the delay control circuit includes a voltage monitoring chip U1, the voltage monitoring chip U1 is connected in parallel with a resistor R25, the voltage monitoring chip U1 and the resistor R25 are both connected to a delay power supply Power4, the delay power supply Power4 is connected to a total power supply Power0, the voltage monitoring chip U1 and the resistor R25 are both connected to a MOS tube M1 through the resistor R4 and the transistor Q1, and the voltage monitoring chip U1 is grounded through a capacitor C3;

[0015] The delay power supply Power4 is connected to the voltage diagnosis power supply Power5 through the MOS tube M1, and the voltage diagnosis power supply Power5 is connected to the voltage diagnosis circuit.

[0016] Furthermore, the gate of the MOS tube M1 is connected to the collector of the transistor Q1 through the resistor R3, the MOS tube M1 is connected in parallel with the capacitor C1, and both the MOS tube M1 and the capacitor C1 are connected to the delay power supply Power4 through the resistor R1.

[0017] Further, the voltage diagnosis circuit includes a voltage monitoring chip U2, the voltage monitoring chip U2 is connected to the voltage dividing circuit, the VCC contact and the SEL contact of the voltage monitoring chip U2 are connected to the voltage diagnosis power supply Power5, and the VCC contact, the SEL contact and the TIMER contact of the voltage monitoring chip U2 are grounded through the capacitor C5;

[0018] The voltage diagnosis power supply Power5 is connected to the DIS contact of the voltage monitoring chip U2 through the capacitor C6, and the DIS contact and the capacitor C6 are both connected to the resistor R14, and the resistor R14 is grounded;

[0019] The UV contact of the voltage monitoring chip U2 is connected to the resistor R11, the OV contact of the voltage monitoring chip U2 is connected to the resistor R15, and the resistor R11 and the resistor R15 are both connected to the base of the transistor Q2 through the resistor R24.

[0020] Furthermore, the delay power supply Power4 is connected to the base of the transistor Q2 via the resistor R23.

[0021] Compared with the prior art, the utility model has the following beneficial effects:

[0022] 1. The total power supply Power0 of the utility model is connected to the voltage divider circuit through the total power supply control circuit, and the voltage divider circuit is connected to the voltage diagnosis circuit. The total power supply control circuit is used to realize the connection and disconnection between the total power supply Power0 and the voltage divider circuit. The total power supply Power0 is connected to the total power supply control circuit through the transistor Q2 to ensure that when the voltage diagnosis circuit is not powered on, the total power supply Power0 is connected to the total power supply control circuit through the transistor Q2 to ensure that the total power supply control circuit is connected to the voltage divider circuit and the total power supply Power0, and the voltage divider circuit is powered on normally.

[0023] 2. The main power supply Power0 of the utility model is connected to the voltage diagnosis circuit through a delay control circuit. The delay control circuit is used to realize delayed power-on of the voltage diagnosis circuit, thereby avoiding the misjudgment of the voltage diagnosis circuit caused by the unstable power supply voltage at the beginning of power-on, thereby disconnecting the main power supply Power0 and the voltage divider circuit, resulting in self-locking and locking phenomenon with high reliability; when the voltage diagnosis circuit is powered on, the voltage diagnosis circuit can realize real-time monitoring of the voltage divider circuit. If the voltage divider circuit is abnormal, the voltage diagnosis circuit controls the main power control circuit to disconnect the power supply of the main power supply Power0 to the voltage divider circuit, thereby forming self-locking until the power is cut off and restarted after the fault is eliminated.

[0024] 3. The accuracy of the protected voltage of the utility model can be adjusted according to the voltage-dividing resistor, which is very flexible. The voltage-dividing resistor adopts low-temperature drift and high-precision end resistor, and the power supply voltage to be monitored and protected has high accuracy.

[0025] 4. The delay circuit of the utility model can be adjusted according to the value of capacitor C3, the delay time can be adjusted flexibly, and the delay time is accurate;

[0026] 5. The entire circuit of the utility model adopts a low-power design and is suitable for low-power and high-reliability applications. BRIEF DESCRIPTION OF THE DRAWINGS

[0027] Figure 1 The utility model is a schematic diagram of a voltage diagnosis self-locking protection circuit.

[0028] Among them: 1. Voltage divider circuit; 2. Voltage diagnosis circuit; 3. Delay control circuit; 4. Main power supply control circuit. DETAILED DESCRIPTION

[0029] In order to enable those skilled in the art to better understand the solution of the utility model, the technical solution in the embodiment of the utility model will be clearly and completely described below in conjunction with the drawings in the embodiment of the utility model. Obviously, the described embodiment is only a part of the embodiment of the utility model, not all of the embodiments. Based on the embodiment of the utility model, all other embodiments obtained by ordinary technicians in this field without creative work should fall within the scope of protection of the utility model.

[0030] It should be noted that the terms "first", "second", etc. in the specification and claims of the utility model and the above-mentioned drawings are used to distinguish similar objects, and are not necessarily used to describe a specific order or sequence. It should be understood that the data used in this way can be interchanged where appropriate, so that the embodiments of the utility model described here can be implemented in an order other than those illustrated or described here. In addition, the terms "including" and "having" and any of their variations are intended to cover non-exclusive inclusions, for example, a process, method, system, product or device that includes a series of steps or units is not necessarily limited to those steps or units clearly listed, but may include other steps or units that are not clearly listed or inherent to these processes, methods, products or devices.

[0031] The utility model is further described in detail below with reference to the accompanying drawings:

[0032] See also Figure 1 The utility model discloses a voltage diagnosis self-locking protection circuit, including a main power supply Power0, the main power supply Power0 is connected to a voltage divider circuit 1 through a main power supply control circuit 4, the voltage divider circuit 1 is connected to a voltage diagnosis circuit 2, and the main power supply control circuit 4 is used to realize the connection and disconnection between the main power supply Power0 and the voltage divider circuit 1;

[0033] The main power supply Power0 is connected to the voltage diagnosis circuit 2 through the delay control circuit 3. The delay control circuit 3 is used to realize the delayed power-on of the voltage diagnosis circuit 2, thereby avoiding the misjudgment of the voltage diagnosis circuit 2 caused by the unstable power supply voltage at the beginning of power-on, thereby disconnecting the main power supply Power0 and the voltage divider circuit 1, resulting in a self-locking phenomenon, and having high reliability;

[0034] The main power supply Power0 and the voltage diagnosis circuit 2 are both connected to the main power supply control circuit 4 through the transistor Q2. When the voltage diagnosis circuit 2 is not powered on, the main power supply Power0 is connected to the main power supply control circuit 4 through the transistor Q2 to ensure that the main power supply control circuit 4 is connected to the voltage divider circuit 1 and the main power supply Power0, and the voltage divider circuit 1 is powered on normally; when the voltage diagnosis circuit 2 is powered on, the voltage diagnosis circuit 2 can realize real-time monitoring of the voltage divider circuit 1. If the voltage divider circuit 1 is abnormal, the voltage diagnosis circuit 2 controls the main power supply control circuit 4 to disconnect the power supply from the main power supply Power0 to the voltage divider circuit 1, thereby forming a self-locking state until the fault is eliminated and the power is turned off and restarted.

[0035] The utility model can realize delayed power-on of the voltage diagnosis circuit, and the delay time is accurately adjustable, which can avoid misjudgment of the voltage diagnosis circuit 2 caused by unstable power supply voltage at the beginning of power-on, and has high reliability. At the same time, the voltage accuracy of the protected power supply is high and the power consumption is low.

[0036] See also Figure 1 In another feasible embodiment of the utility model, the following is adaptively modified according to the situation. It includes a total power supply Power0, the total power supply Power0 is connected to a voltage divider circuit 1 through a total power supply control circuit 4, and the voltage divider circuit 1 is connected to a voltage diagnosis circuit 2;

[0037] The main power supply Power0 is connected to the voltage diagnosis circuit 2 through the delay control circuit 3;

[0038] The main power supply Power0 and the voltage diagnosis circuit 2 are both connected to the main power supply control circuit 4 through the transistor Q2.

[0039] When in use, the total power supply Power0 first conducts the total power supply control circuit 4 through the transistor Q2, and the total power supply control circuit 4 connects the voltage divider circuit 1 and the total power supply Power0, and the voltage divider circuit 1 is powered on normally. At the same time, due to the delay effect of the delay control circuit 3, the voltage diagnosis circuit 2 is delayed to power on, ensuring that the voltage diagnosis circuit 2 is powered on later than the voltage divider circuit 1, avoiding the misjudgment of the voltage diagnosis circuit 2 caused by the unstable power supply voltage at the beginning of power-on, thereby disconnecting the total power supply Power0 and the voltage divider circuit 1, resulting in self-locking. After the voltage diagnosis circuit 2 is powered on, it can realize normal detection of the voltage divider circuit 1.

[0040] Embodiment 1:

[0041] See also Figure 1 , this embodiment discloses a voltage diagnosis self-locking protection circuit, including a main power supply Power0, the main power supply Power0 is connected to a voltage divider circuit 1 through a main power supply control circuit 4, and the voltage divider circuit 1 is connected to a voltage diagnosis circuit 2;

[0042] The main power supply Power0 is connected to the voltage diagnosis circuit 2 through the delay control circuit 3;

[0043] The delay power supply Power4 and the voltage diagnosis circuit 2 are both connected to the main power control circuit 4 through the transistor Q2.

[0044] Preferably, the main power control circuit 4 includes a MOS tube M2, a source of the MOS tube M2 is connected to the main power Power0, a drain of the MOS tube M2 is connected to the voltage divider circuit 1, and a gate of the MOS tube M2 is connected to the transistor Q2.

[0045] A resistor R22 is connected between the MOS tube M2 and the transistor Q2. The MOS tube M2 is connected in parallel with the capacitor C7 and the resistor R21 respectively. The MOS tube M2, the capacitor C7 and the resistor R21 are all connected to the total power supply Power0 through the resistor R20.

[0046] Preferably, the voltage divider circuit 1 has at least one circuit and at most four circuits.

[0047] The voltage dividing circuit 1 includes a voltage dividing power supply, the voltage dividing power supply is connected in series with a first voltage dividing resistor, a second voltage dividing resistor and a third voltage dividing resistor, the first voltage dividing resistor is grounded, and both ends of the second voltage dividing resistor are connected to the voltage diagnosis circuit 2;

[0048] The divided voltage power supply is connected to the drain of the MOS tube M2.

[0049] When there are two to four voltage-dividing circuits 1 , the voltage-dividing power supply of the first voltage-dividing circuit 1 supplies power to the voltage-dividing power supplies of the remaining voltage-dividing circuits 1 .

[0050] Embodiment 2:

[0051] See also Figure 1 , this embodiment discloses a voltage diagnosis self-locking protection circuit, including a main power supply Power0, the main power supply Power0 is connected to a voltage divider circuit 1 through a main power supply control circuit 4, and the voltage divider circuit 1 is connected to a voltage diagnosis circuit 2;

[0052] The main power supply Power0 is connected to the voltage diagnosis circuit 2 through the delay control circuit 3;

[0053] The delay power supply Power4 and the voltage diagnosis circuit 2 are both connected to the main power control circuit 4 through the transistor Q2.

[0054] Preferably, the delay control circuit 3 includes a voltage monitoring chip U1, the voltage monitoring chip U1 is connected in parallel with a resistor R25, the voltage monitoring chip U1 and the resistor R25 are both connected to a delay power supply Power4, the delay power supply Power4 is connected to a total power supply Power0, the voltage monitoring chip U1 and the resistor R25 are both connected to a MOS tube M1 through a resistor R4 and a transistor Q1, and the voltage monitoring chip U1 is grounded through a capacitor C3;

[0055] The delay power supply Power4 is connected to the voltage diagnosis power supply Power5 through the MOS tube M1, and the voltage diagnosis power supply Power5 is connected to the voltage diagnosis circuit 2. The delay power supply Power4 supplies power to the voltage diagnosis power supply Power5 through the MOS tube M1, and the MOS tube M1 is used to control the on and off between the delay power supply Power4 and the voltage diagnosis power supply Power5. The voltage monitoring chip U1 and the capacitor C3 can play the role of delaying power supply.

[0056] During specific operation, the voltage monitoring chip U1 monitors the voltage of Power4. When Power4 rises to the normal voltage range, the delay timing is started. The value of C3 determines the delay time. During the delay time, a low level is continuously input to the transistor Q1. After the delay, it will be pulled to a high level, thereby controlling the transistor Q1 to turn on. When the transistor Q1 is turned on, the MOS tube M1 is turned on, and the delay power supply Power4 supplies power to the voltage diagnosis power supply Power5 through the MOS tube M1.

[0057] Preferably, the gate of the MOS tube M1 is connected to the collector of the transistor Q1 through the resistor R3, the MOS tube M1 is connected in parallel with the capacitor C1, and both the MOS tube M1 and the capacitor C1 are connected to the delay power supply Power4 through the resistor R1.

[0058] Preferably, the voltage diagnosis circuit 2 includes a voltage monitoring chip U2, the voltage monitoring chip U2 is connected to the voltage divider circuit 1, the VCC contact and the SEL contact of the voltage monitoring chip U2 are connected to the voltage diagnosis power supply Power5, and the VCC contact, the SEL contact and the TIMER contact of the voltage monitoring chip U2 are grounded through the capacitor C5;

[0059] The voltage diagnosis power supply Power5 is connected to the DIS contact of the voltage monitoring chip U2 through the capacitor C6, and the DIS contact and the capacitor C6 are both connected to the resistor R14, and the resistor R14 is grounded;

[0060] The UV contact of the voltage monitoring chip U2 is connected to the resistor R11, the OV contact of the voltage monitoring chip U2 is connected to the resistor R15, and the resistor R11 and the resistor R15 are both connected to the base of the transistor Q2 through the resistor R24.

[0061] Preferably, the delay power supply Power4 is connected to the base of the transistor Q2 through the resistor R23. When the voltage diagnosis circuit 2 is not powered on, the main power supply Power0 is connected to the main power control circuit 4 through the delay power supply Power4 and the transistor Q2 in sequence, ensuring that the main power control circuit 4 is connected to the voltage divider circuit 1 and the main power supply Power0, and the voltage divider circuit 1 is powered on normally.

[0062] Embodiment three:

[0063] The present embodiment discloses a voltage diagnosis self-locking protection circuit, comprising a voltage divider circuit 1, a voltage diagnosis circuit 2, a delay control circuit 3 and a main power supply control circuit 4; the voltage divider circuit 1 comprises four groups, wherein resistors R5, R7 and R9 constitute a first voltage divider circuit; resistors R6, R8 and R10 constitute a second voltage divider circuit; resistors R12, R16 and R18 constitute a third voltage divider circuit; resistors R13, R17 and R19 constitute a fourth voltage divider circuit; wherein resistors R5, R12, R6 and R13 are all first voltage divider resistors, resistors R7, R16, R8 and R17 are all second voltage divider resistors, and resistors R9, R18, R10 and R19 are all second voltage divider resistors. The voltage diagnosis circuit includes a voltage monitoring chip U2, a capacitor C4, a capacitor C5, a capacitor C6, a resistor R14, a resistor R11 and a resistor R15. The four voltage divider circuits are respectively connected to the voltage diagnosis circuit after voltage division; the delay control circuit includes a voltage monitoring chip U1, a capacitor C3, a resistor R1, a capacitor C1, a resistor R25, a MOS tube M1, a capacitor C2, a resistor R3, a transistor Q1 and a resistor R4. The delay control circuit controls the power supply of the voltage monitoring chip U2 in the voltage diagnosis circuit; the total power control circuit includes a resistor R20, a capacitor C7, a resistor R21, a MOS tube M2, a capacitor C8, a resistor R22, a transistor Q2, a resistor R23 and a resistor R24. The voltage diagnosis circuit is connected to the total power control circuit through a resistor R11 and a resistor R15.

[0064] Four groups of voltage divider circuits, resistors R5, R7, and R9 form the first group of voltage divider circuits; resistors R6, R8, and R10 form the second group of voltage divider circuits; resistors R12, R16, and R18 form the third group of voltage divider circuits; resistors R13, R17, and R19 form the fourth group of voltage divider circuits; after the resistor voltage divider, the voltages at points VH1, VH2, VH3, and VH4 are respectively higher than 0.5V, and the voltages at points VL1, VL2, VL3, and VL4 are respectively lower than 0.5V;

[0065] The voltage diagnosis circuit includes a voltage monitoring chip U2, capacitors C4, C5, C6, resistors R14, R11, and R15. The four-way voltage divider circuit is connected to the voltage monitoring chip U2 in the voltage diagnosis circuit after voltage division. Each of VH1, VH2, VH3, VH4, VL1, VL2, VL3, and VL4 works independently. Any voltage abnormality will cause K1 to pull down the output low level. For example, if the power supply of the voltage-dividing power supply PoweR1 fluctuates, after voltage division, the voltage at point VH1 is less than 0.5V, and network number K1 outputs a low level. The voltage at point VL1 is greater than 0.5V, and network number K1 also outputs a low level.

[0066] The delay control circuit includes a voltage monitoring chip U1, a capacitor C3, a resistor R1, a capacitor C1, a resistor R25, a MOS tube M1, a capacitor C2, a resistor R3, a transistor Q1, and a resistor R4. The delay control circuit controls the power supply of the voltage monitoring chip U2 in the voltage diagnosis circuit; the voltage monitoring chip U1 monitors the voltage of PoweR4. When PoweR4 rises to a normal voltage range, the delay timing is started. The value of C3 determines the delay time. During the delay time, K2 continuously outputs a low level, and after the delay, it will be pulled to a high level, thereby controlling the transistor Q1 to turn on. When the transistor Q1 is turned on, the MOS tube M1 is turned on, the PoweR5 power supply is powered on, and the voltage monitoring chip U2 is powered on. After the voltage monitoring chip U2 works normally, it starts to detect the four voltages of the divided power supply PoweR1 / 2 / 3 / 6. At this time, the four voltages have been powered on.

[0067] Resistor R20, capacitor C7, resistor R21, MOS tube M2, capacitor C8, resistor R22, transistor Q2, resistor R23, and resistor R24 ​​form a total power control circuit to control the on and off of the input total power supply PoweR0. The total power supply PoweR0 is the input power supply of the power divider power supply PoweR1. The power divider power supply PoweR1 provides input power to the three power supplies of the divider power supply PoweR2, the divider power supply PoweR3, and the divider power supply PoweR6. After normal power-on, if it is detected that any one of the three power supplies of the divider power supply PoweR1 to the divider power supply PoweR2, the divider power supply PoweR3, and the divider power supply PoweR6 is abnormal, the voltage monitoring chip U2 controls the transistor Q2 to disconnect the power supply of the total power supply PoweR0 to the divider power supply PoweR1; thus forming a self-locking, until the fault is eliminated and the power is cut off and restarted.

[0068] The main power supply PoweR0 directly provides input power to the delay power supply PoweR4, which can be powered on at the first time in the power-on sequence to power the delay circuit, while ensuring the independence of the power supplies of the delay circuit and the diagnosis circuit. The delay power supply PoweR4 provides power input to PoweR5. PoweR5 is the power supply of the voltage monitoring chip U2 in the voltage diagnosis circuit and is controlled by the delay circuit. When the voltage monitoring chip U2 is not powered on, K1 is at a high level through the pull-up resistor R23, the transistor Q2 is turned on, and then the MOS tube M2 is turned on. The voltage-dividing power supplies PoweR1, PoweR2, PoweR3 and PoweR6 of the four-way voltage-dividing circuit are powered on normally. After the delay circuit is delayed, the voltage monitoring chip U2 works and starts to monitor the four-way voltage.

[0069] After the timing delay power supply PoweR4 is powered on, the four power supplies of voltage-dividing power supply PoweR1, voltage-dividing power supply PoweR2, voltage-dividing power supply PoweR3 and voltage-dividing power supply PoweR6 are powered on, and finally the voltage monitoring chip U2 is powered on, avoiding the misjudgment of the voltage monitoring chip U2 caused by the unstable power supply voltage at the beginning of power-on, thereby disconnecting the main power supply PoweR0 and the voltage-dividing power supply PoweR1, resulting in self-locking.

[0070] The utility model can detect 1 to 4 voltages at the same time. The voltage accuracy can be adjusted according to the voltage-dividing resistor, which is very flexible. The voltage-dividing resistor adopts low-temperature drift and high-precision end resistor, and the voltage of the monitored and protected power supply is highly accurate; the delay circuit can be adjusted according to the value of the capacitor C3, and the delay time can be flexibly adjusted, and the delay time is accurate; the whole circuit adopts low-power design, and the resistance values ​​of R21 and R22 are both 1MΩ. After conduction, the current is very small; the resistors R5, R7 and other resistors in the voltage-dividing circuit all adopt relatively large resistors, generally tens of KΩ to 1MΩ resistors, and the current of the voltage-dividing path is very small, all around 10uA. It is suitable for low-power and high-reliability applications.

[0071] The above content is only for explaining the technical idea of ​​the utility model and cannot be used to limit the protection scope of the utility model. Any changes made on the basis of the technical solution in accordance with the technical idea proposed by the utility model shall fall within the protection scope of the claims of the utility model.

Claims

1. A voltage diagnosis self-locking protection circuit, characterized in that: It includes a main power supply Power0, the main power supply Power0 is connected to a voltage divider circuit (1) through a main power supply control circuit (4), and the voltage divider circuit (1) is connected to a voltage diagnosis circuit (2); The main power supply Power0 is connected to the voltage diagnosis circuit (2) via the delay control circuit (3); The main power supply Power0 and the voltage diagnosis circuit (2) are both connected to the main power supply control circuit (4) via the transistor Q2.

2. A voltage diagnosis self-locking protection circuit according to claim 1, characterized in that: The total power control circuit (4) comprises a MOS tube M2, the source of the MOS tube M2 is connected to the total power Power0, the drain of the MOS tube M2 is connected to the voltage divider circuit (1), and the gate of the MOS tube M2 is connected to the transistor Q2.

3. A voltage diagnosis self-locking protection circuit according to claim 2, characterized in that: A resistor R22 is connected between the MOS tube M2 and the transistor Q2. The MOS tube M2 is connected in parallel with the capacitor C7 and the resistor R21 respectively. The MOS tube M2, the capacitor C7 and the resistor R21 are all connected to the total power supply Power0 through the resistor R20.

4. A voltage diagnosis self-locking protection circuit according to claim 2, characterized in that: The voltage divider circuit (1) has at least one circuit and at most four circuits.

5. A voltage diagnosis self-locking protection circuit according to claim 4, characterized in that: The voltage-dividing circuit (1) comprises a voltage-dividing power supply, wherein the voltage-dividing power supply is connected in series with a first voltage-dividing resistor, a second voltage-dividing resistor and a third voltage-dividing resistor in sequence, the first voltage-dividing resistor is grounded, and both ends of the second voltage-dividing resistor are connected to a voltage diagnosis circuit (2); The divided voltage power supply is connected to the drain of the MOS tube M2.

6. A voltage diagnosis self-locking protection circuit according to claim 5, characterized in that: When the voltage divider circuit (1) is provided in two to four groups, the voltage divider power supply of the first voltage divider circuit (1) supplies power to the voltage divider power supplies of the remaining voltage divider circuits (1).

7. A voltage diagnosis self-locking protection circuit according to claim 1, characterized in that: The delay control circuit (3) comprises a voltage monitoring chip U1, the voltage monitoring chip U1 is connected in parallel with a resistor R25, the voltage monitoring chip U1 and the resistor R25 are both connected to a delay power supply Power4, the delay power supply Power4 is connected to a main power supply Power0, the voltage monitoring chip U1 and the resistor R25 are both connected to a MOS tube M1 via the resistor R4 and the transistor Q1, and the voltage monitoring chip U1 is grounded via a capacitor C3; The delay power supply Power4 is connected to the voltage diagnosis power supply Power5 through the MOS tube M1, and the voltage diagnosis power supply Power5 is connected to the voltage diagnosis circuit (2).

8. A voltage diagnosis self-locking protection circuit according to claim 7, characterized in that: The gate of the MOS tube M1 is connected to the collector of the transistor Q1 through the resistor R3, the MOS tube M1 is connected in parallel with the capacitor C1, and both the MOS tube M1 and the capacitor C1 are connected to the delay power supply Power4 through the resistor R1.

9. A voltage diagnosis self-locking protection circuit according to claim 7, characterized in that: The voltage diagnosis circuit (2) comprises a voltage monitoring chip U2, the voltage monitoring chip U2 is connected to the voltage dividing circuit (1), the VCC contact and the SEL contact of the voltage monitoring chip U2 are connected to the voltage diagnosis power supply Power5, and the VCC contact, the SEL contact and the TIMER contact of the voltage monitoring chip U2 are grounded via a capacitor C5; The voltage diagnosis power supply Power5 is connected to the DIS contact of the voltage monitoring chip U2 through the capacitor C6, and the DIS contact and the capacitor C6 are both connected to the resistor R14, and the resistor R14 is grounded; The UV contact of the voltage monitoring chip U2 is connected to the resistor R11, the OV contact of the voltage monitoring chip U2 is connected to the resistor R15, and the resistor R11 and the resistor R15 are both connected to the base of the transistor Q2 through the resistor R24.

10. A voltage diagnosis self-locking protection circuit according to claim 7, characterized in that: The delay power supply Power4 is connected to the base of the transistor Q2 via the resistor R23.

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