Main power circuit with voltage reduction complementary structure

Abstract

The utility model discloses a main power circuit with a step-down complementary structure, which comprises a first power module, a second power module and an output module, the control end of the first power module is connected with a first control signal, and the control end of the second power module is connected with a second control signal. The output end of the first power module is connected with the output end of the second power module, and the output module is connected with the output end of the first power module. According to the utility model, the two power modules which are connected in parallel are arranged, two complementary control signals are utilized to control the two power modules respectively, and when one power module stops working, the other power module works to play a complementary role, so that the subsequent step-down module can receive high-frequency input voltage; therefore, the output power is greatly increased, high-power output can be obtained when the power circuit works under the condition of a low-frequency control signal, excessive temperature rise of components cannot be caused, and the reliability of the circuit is improved.

Description

Technical Field

[0001] The utility model relates to the technical field of power circuits, in particular to a main power circuit with a step-down complementary structure. Background Art

[0002] The inverter generally includes an MCU control module, a drive module, a main power module and a buck module. Its working principle mainly utilizes the switching characteristics of the main power module to introduce the input voltage, and the input voltage then passes through the buck module to obtain the required voltage. The switching characteristics of the main power module provide control signals through the drive module, and the drive module is controlled by the instructions of the MCU control module.

[0003] At present, the main power module in the existing inverter often has only one or a group of switching circuits, which are only controlled by a high-level control signal. When the control signal is at a low level, the main power module loses its function and cannot provide input voltage for the step-down module, resulting in low output power of the product. If the frequency of the control signal is increased to increase the output power, it will cause serious heating of the components, there is a risk of damage, and the reliability of the product is low. Utility Model Content

[0004] The purpose of the utility model is to provide a main power circuit with a buck complementary structure in response to the above-mentioned problems. The circuit sets two parallel-connected power modules and uses two complementary control signal pairs to control the two power modules respectively. When one power module stops working, the other power module is made to work, which plays a complementary role and allows the subsequent buck module to accept a high-frequency input voltage, thereby greatly increasing the output power. The power circuit can obtain high-power output when working under a low-frequency control signal, which will not cause excessive heating of components and improve the reliability of the circuit.

[0005] In order to achieve the above utility model purpose, the technical solution adopted by the utility model is as follows:

[0006] According to one aspect of the utility model, a main power circuit with a buck complementary structure is provided, comprising a first power module, a second power module and an output module;

[0007] The control end of the first power module is connected to a first control signal, and the control end of the second power module is connected to a second control signal;

[0008] The output end of the first power module is connected to the output end of the second power module and then connected to the output module.

[0009] Preferably, the first power module includes a first switching unit, a first bias unit and a first output unit, the control end of the first switching unit is connected to a first control signal, the input end of the first switching unit is connected to an input voltage, the output end of the first switching unit is connected to the first bias unit, and the first output unit is connected to the output end of the first switching unit.

[0010] Preferably, the first switching unit includes a first field effect transistor, a gate of the first field effect transistor is connected to the first control signal, a drain of the first field effect transistor is connected to an input voltage, a source of the first field effect transistor is connected to the first bias unit, and the first output unit is connected to the source of the first field effect transistor.

[0011] Preferably, the first bias unit comprises a first Schottky diode, a cathode of the first Schottky diode is connected to a source of the first field effect transistor, and an anode of the first Schottky diode is grounded.

[0012] Preferably, the first output unit comprises a first inductor, one end of the first inductor is connected to the source of the first field effect transistor, and the other end of the first inductor is connected to the second power module and the output module respectively.

[0013] Preferably, the second power module includes a second switch unit, a second bias unit and a second output unit, the control end of the second switch unit is connected to the second control signal, the input end of the second switch unit is connected to the input voltage, the output end of the second switch unit is connected to the second bias unit, and the second output unit is connected to the output end of the second switch unit.

[0014] Preferably, the second switch unit includes a second field effect transistor, a gate of the second field effect transistor is connected to the second control signal, a drain of the second field effect transistor is connected to an input voltage, and a source of the second field effect transistor is connected to the second bias unit.

[0015] Preferably, the second bias unit comprises a second Schottky diode, a cathode of the second Schottky diode is connected to a source of the second field effect transistor, and an anode of the second Schottky diode is grounded.

[0016] Preferably, the second output unit includes a second inductor, one end of the second inductor is connected to the source of the second field effect transistor, and the other end of the second inductor is connected to the first inductor respectively.

[0017] Preferably, the output module comprises a resistor and a capacitor, and the resistor and the capacitor are connected in parallel and then connected to the first inductor.

[0018] In summary, due to the adoption of the above technical solution, the beneficial effects of the utility model are:

[0019] The utility model sets two parallel-connected power modules and uses two complementary control signal pairs to control the two power modules respectively. When one power module stops working, the other power module is operated to play a complementary role, so that the subsequent step-down module can accept a high-frequency input voltage, thereby greatly increasing the output power. The power circuit can obtain high-power output when working with a low-frequency control signal, which will not cause excessive heating of components and improve the reliability of the circuit. BRIEF DESCRIPTION OF THE DRAWINGS

[0020] Figure 1 It is a circuit schematic diagram of the utility model;

[0021] Figure 2 It is a circuit schematic diagram of the first control signal of the utility model;

[0022] Figure 3 It is a circuit principle diagram of the second control signal of the utility model. DETAILED DESCRIPTION

[0023] In order to make the purpose, technical solution and advantages of the utility model more clear, the utility model is further described in detail with reference to the accompanying drawings and preferred embodiments. However, it should be noted that many details listed in the specification are only for the purpose of enabling readers to have a thorough understanding of one or more aspects of the utility model, and these aspects of the utility model can be realized even without these specific details.

[0024] See also Figures 1 to 3 The utility model provides a main power circuit with a buck complementary structure, and the technical solution is as follows:

[0025] like Figure 1 As shown, a main power circuit with a buck complementary structure includes a first power module, a second power module and an output module. The first power module includes a first switch unit, a first bias unit and a first output unit. The first switch unit includes a transistor Q3 and a transistor Q4. The transistor Q3 and the transistor Q4 are first field effect transistors. The transistor Q3 and the transistor Q4 are connected in parallel. The drain of the transistor Q3 is connected to the drain of the transistor Q4. The node where the drain of the transistor Q3 is connected to the drain of the transistor Q4 is connected to the output voltage. The input voltage is grounded through the capacitor C25. The source of the transistor Q3 is connected to the source of the transistor Q4.

[0026] The gate of transistor Q3 is connected to the first control signal through the first protection structure. The first protection circuit includes a resistor R29, a diode D14 and a resistor R31. The gate of transistor Q3 is connected to the anode of diode D14, the cathode of diode D14 is connected to one end of resistor R29, the other end of resistor R29 is connected to the first control signal, one end of resistor R31 is connected to the anode of diode D14, and the other end of resistor R31 is connected to the first control signal. A resistor R33 is provided between the gate and source of transistor Q3, one end of resistor R33 is connected to the gate of transistor Q3, and the other end is connected to the source of transistor Q3.

[0027] The gate of transistor Q4 is connected to the first control signal through the second protection structure. The second protection circuit includes a resistor R30, a diode D15 and a resistor R32. The gate of transistor Q4 is connected to the anode of diode D15, the cathode of diode D15 is connected to one end of resistor R30, the other end of resistor R30 is connected to the first control signal, one end of resistor R32 is connected to the anode of diode D15, and the other end of resistor R32 is connected to the first control signal. A resistor R34 is provided between the gate and the source of transistor Q4, one end of resistor R34 is connected to the gate of transistor Q4, and the other end is connected to the source of transistor Q4.

[0028] The transistor Q3 and the transistor Q4 are used as switch tubes, and the first control signal is connected to control the on or off of the transistor Q3 and the transistor Q4 by using the first control signal.

[0029] The sources of transistors Q3 and Q4 are connected to the first bias unit, and the first bias unit includes Schottky diodes D16 and D17. Both Schottky diodes D16 and D17 are first Schottky diodes, and the insides of both are formed by two diodes connected in parallel, the common cathode of the two diodes is the second pin of the Schottky diode, and the common anode of the two diodes is the first and third pins of the Schottky diode. Schottky diodes D16 and D17 are connected in parallel, the first pins of Schottky diodes D16 and D17 are connected to the sources of transistors Q3 and Q4, and the second and third pins of Schottky diodes D16 and D17 are grounded respectively.

[0030] The sources of transistors Q3 and Q4 are connected to the first output unit, and the first output unit includes a first inductor L4, one end of the inductor L4 is connected to the sources of transistors Q3 and Q4, and the other end of the inductor L4 is used as an output end, and the power circuit voltage is output. A diode D12, a resistor R24, and a capacitor C24 are arranged between the inductor L4 and the input voltage, the cathode of the diode D12 is connected to the input voltage, the anode of the diode D12 is connected to one end of the resistor R24, the other end of the resistor R24 ​​is connected to the end of the inductor L4 connected to the transistor, and the capacitor C24 is connected in parallel with the resistor R24. A capacitor C35, a resistor R38, and a resistor R39 are arranged between the inductor L4 and the ground, one end of the capacitor C35 is connected to the inductor L4, and the other end is connected to the resistor R38, the other end of the resistor R38 is grounded, and the resistor R39 is connected in parallel with the resistor R38.

[0031] Among them, Figure 2 As shown, the first control signal is provided by the driver chip U4, the model of the driver chip U4 is IR2110S, the 12th pin of the driver chip U4 is the control signal input pin, the 12th pin of the driver chip U4 is connected to the PWM1 pulse signal through the resistor R25, the PWM1 pulse signal is provided by the main control chip, and the PWM1 pulse signal is grounded through the resistor R27. The 8th pin of the driver chip U4 is the first control signal output pin, which is respectively connected to the gates of the transistors Q3 and Q4. A specific PWM1 pulse signal is given by the main control chip, and the PWM1 pulse signal outputs the first control signal through the driver chip U4. The first control signal controls the conduction and closing of the transistors Q3 and Q4, thereby controlling whether the input voltage is transmitted to the subsequent step-down module to step down the input voltage.

[0032] One end of the inductor L4 serving as an output end is connected to the second power module and the output module.

[0033] Specifically, the second power module includes a second switch unit, a second bias unit and a second output unit, the second switch unit includes a transistor Q5 and a transistor Q6, the transistor Q5 and the transistor Q6 are second field effect transistors, the transistor Q5 and the transistor Q6 are connected in parallel, the drain of the transistor Q5 is connected to the drain of the transistor Q6, the node where the drain of the transistor Q5 and the drain of the transistor Q6 are connected is connected to the output voltage, and the input voltage is grounded through the capacitor C38. The source of the transistor Q5 is connected to the source of the transistor Q6.

[0034] The gate of transistor Q5 is connected to the second control signal through the third protection structure. The third protection circuit includes a resistor R45, a diode D20 and a resistor R47. The gate of transistor Q5 is connected to the anode of diode D20, the cathode of diode D20 is connected to one end of resistor R45, the other end of resistor R45 is connected to the first control signal, one end of resistor R47 is connected to the anode of diode D20, and the other end of resistor R47 is connected to the first control signal. A resistor R49 is provided between the gate and the source of transistor Q5, one end of resistor R49 is connected to the gate of transistor Q5, and the other end is connected to the source of transistor Q5.

[0035] The gate of transistor Q6 is connected to the second control signal through the fourth protection structure. The fourth protection circuit includes a resistor R46, a diode D21 and a resistor R48. The gate of transistor Q6 is connected to the anode of diode D21, the cathode of diode D21 is connected to one end of resistor R46, the other end of resistor R46 is connected to the first control signal, one end of resistor R48 is connected to the anode of diode D21, and the other end of resistor R48 is connected to the first control signal. A resistor R50 is provided between the gate and source of transistor Q6, one end of resistor R50 is connected to the gate of transistor Q6, and the other end is connected to the source of transistor Q6.

[0036] The transistor Q5 and the transistor Q6 are used as switch tubes, and the second control signal is connected to control the conduction or closing of the transistor Q5 and the transistor Q6 by using the second control signal.

[0037] The sources of transistors Q5 and Q6 are connected to the second bias unit, and the second bias unit includes Schottky diodes D22 and D23. Both Schottky diodes D22 and D23 are second Schottky diodes, and the insides of both are formed by two diodes connected in parallel, the common cathode of the two diodes is the second pin of the Schottky diode, and the common anode of the two diodes is the first and third pins of the Schottky diode. Schottky diodes D22 and D23 are connected in parallel, the first pins of Schottky diodes D22 and D23 are connected to the sources of transistors Q5 and Q6, and the second and third pins of Schottky diodes D22 and D23 are grounded respectively.

[0038] The sources of transistors Q5 and Q6 are connected to the second output unit, and the second output unit includes a second inductor L5, one end of the inductor L5 is connected to the sources of transistors Q5 and Q6, and the other end of the inductor L5 is used as an output end, and the power circuit voltage is output. A diode D19, a resistor R44, and a capacitor C39 are arranged between the inductor L5 and the input voltage, the cathode of the diode D19 is connected to the input voltage, the anode of the diode D19 is connected to one end of the resistor R44, the other end of the resistor R44 is connected to the end of the inductor L5 connected to the transistor, and the capacitor C39 is connected in parallel with the resistor R44. A capacitor C47, a resistor R51, and a resistor R52 are arranged between the inductor L5 and the ground, one end of the capacitor C47 is connected to the inductor L5, and the other end is connected to the resistor R51, the other end of the resistor R51 is grounded, and the resistor R52 is connected in parallel with the resistor R51.

[0039] Among them, Figure 3 As shown, the second control signal is provided by the driver chip U5, the model of the driver chip U5 is IR2110S, the 12th pin of the driver chip U5 is the control signal input pin, the 12th pin of the driver chip U5 is connected to the PWM2 pulse signal through the resistor R40, the PWM2 pulse signal is provided by the main control chip, and the PWM2 pulse signal is grounded through the resistor R42. The 8th pin of the driver chip U5 is the second control signal output pin, which is respectively connected to the gates of the transistor Q5 and the transistor Q6. A specific PWM2 pulse signal is given by the main control chip, and the PWM2 pulse signal outputs the first control signal through the driver chip U5. The first control signal controls the conduction and closing of the transistor Q5 and the transistor Q6, thereby controlling whether the input voltage is transmitted to the subsequent buck module to buck the input voltage.

[0040] The first control signal is used to control the on and off of transistor Q3 and transistor Q4, and the second control signal is used to control the on and off of transistor Q5 and transistor Q6. The first control signal and the second control signal are set as complementary control signals. When the first control signal controls transistor Q3 and transistor Q4 to be turned off, the second control signal can be used to control transistor Q5 and transistor Q6 to be turned on, and continue to provide voltage input for the subsequent step-down circuit, thereby ensuring that the output power is maximized. Since the two control signals control the two power modules to work alternately, while increasing the output power of the product, it will not cause the product temperature to increase, and the reliability is high.

[0041] The output module includes multiple resistors and multiple capacitors. In the present embodiment, the resistor includes resistor 35, resistor R36, and resistor R37, and the capacitor includes capacitor C28-34 and capacitor C41-46. One end of capacitor C28 is connected to inductor L4, and the other end is connected to one end of resistor R37, and the other end of resistor R37 is grounded. Capacitor C29 and capacitor C30 are all connected in parallel with capacitor C28, and resistor R36 is connected in parallel with resistor R37. One end of capacitor C31 is connected to inductor L4, and the other end is grounded. Resistor R35 and capacitor C33 are connected in parallel with capacitor C31 respectively, one end of capacitor C32 is connected to inductor L4, and the other end is grounded. One end of capacitor C41 is connected to inductor L4, and the other end is grounded. Capacitor C42-46 are connected in parallel with capacitor C41 respectively. The output terminal is connected to the ground terminal by capacitor, and the output voltage is filtered by capacitor to make the output voltage more stable.

[0042] The above is only a preferred embodiment of the present invention. It should be pointed out that for ordinary technicians in this technical field, several improvements and modifications can be made without departing from the principle of the present invention. These improvements and modifications should also be regarded as the protection scope of the present invention.

Claims

1. A main power circuit with a buck complementary structure, characterized in that: It includes a first power module, a second power module and an output module; The control end of the first power module is connected to a first control signal, and the control end of the second power module is connected to a second control signal; The output end of the first power module is connected to the output end of the second power module; The output module is connected to the output end of the first power module.

2. A main power circuit with a buck complementary structure according to claim 1, characterized in that: The first power module includes a first switch unit, a first bias unit and a first output unit, the control end of the first switch unit is connected to a first control signal, the input end of the first switch unit is connected to an input voltage, the output end of the first switch unit is connected to the first bias unit, and the first output unit is connected to the output end of the first switch unit.

3. A main power circuit with a buck complementary structure according to claim 2, characterized in that: The first switch unit includes a first field effect transistor, a gate of the first field effect transistor is connected to the first control signal, a drain of the first field effect transistor is connected to an input voltage, a source of the first field effect transistor is connected to the first bias unit, and the first output unit is connected to the source of the first field effect transistor.

4. A main power circuit with a buck complementary structure according to claim 3, characterized in that: The first bias unit includes a first Schottky diode, a cathode of the first Schottky diode is connected to a source of the first field effect transistor, and an anode of the first Schottky diode is grounded.

5. The main power circuit with a buck complementary structure according to claim 3, characterized in that: The first output unit includes a first inductor, one end of the first inductor is connected to the source of the first field effect transistor, and the other end of the first inductor is connected to the second power module and the output module respectively.

6. A main power circuit with a buck complementary structure according to claim 5, characterized in that: The second power module includes a second switch unit, a second bias unit and a second output unit, the control end of the second switch unit is connected to the second control signal, the input end of the second switch unit is connected to the input voltage, the output end of the second switch unit is connected to the second bias unit, and the second output unit is connected to the output end of the second switch unit.

7. A main power circuit with a buck complementary structure according to claim 6, characterized in that: The second switch unit includes a second field effect transistor, a gate of the second field effect transistor is connected to the second control signal, a drain of the second field effect transistor is connected to an input voltage, and a source of the second field effect transistor is connected to the second bias unit.

8. The main power circuit with a buck complementary structure according to claim 7, characterized in that: The second bias unit includes a second Schottky diode, a cathode of the second Schottky diode is connected to the source of the second field effect transistor, and an anode of the second Schottky diode is grounded.

9. The main power circuit with a buck complementary structure according to claim 8, characterized in that: The second output unit includes a second inductor, one end of the second inductor is connected to the source of the second field effect transistor, and the other end of the second inductor is connected to the first inductor respectively.

10. The main power circuit with a buck complementary structure according to claim 5, characterized in that: The output module includes a resistor and a capacitor, and the resistor and the capacitor are connected in parallel and then connected to the first inductor.

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