Chip packaging structure

Abstract

The utility model provides a chip packaging structure. The chip packaging structure comprises a lead frame which is provided with a lower surface and an upper surface which are oppositely arranged, the lead frame comprises a base island and pins located on the two sides of the base island, the lower surfaces of the pins partially protrude to form first conductive columns, the upper surfaces of the pins partially protrude to form at least one group of second conductive columns which are arranged at intervals, and the second conductive columns in the same group have the same height; the heights of the second conductive columns are sequentially reduced in the direction from the outer side edges of the pins to the base islands; the first chip is attached to the lower surface of the base island and connected with the pins through bonding wires, and the packaging height of the first chip is smaller than the height of the first conductive column; the second chips are located above the upper surface of the base island and are sequentially arranged at intervals in the direction perpendicular to the upper surface of the base island, a distance is formed between the second chip on the bottommost layer and the upper surface of the base island, and each second chip is inversely arranged on the same group of second conductive columns. According to the technical scheme, the conductive columns with different heights are arranged on the two faces of the pins, and stacking of multiple chips is achieved.

Description

Technical Field

[0001] The utility model relates to the field of chip packaging, in particular to a chip packaging structure. Background Art

[0002] As a chip carrier of semiconductor integrated circuits, the lead frame is a key structural component that uses bonding materials (gold wire, aluminum wire, copper wire) to achieve electrical connection between the internal circuit lead ends of the chip and the external leads.

[0003] Traditional lead frame packaging products only mount chips and weld metal wires on the upper surface of the lead frame, which cannot achieve high integration of packaging products and improve space utilization. In order to improve integration and space utilization, there is currently provided a packaging product that mounts chips on the upper and lower surfaces of the lead frame respectively, and welds the pins of the chips on the upper and lower surfaces respectively through metal wires. However, when different chips are packaged separately on the upper surface of the lead frame (double-sided packaging), since the packaging thickness of different chips is different, different special jigs need to be developed and designed for packaging. The development and design of special jigs takes a long time and is costly, which is not conducive to the double-sided packaging process.

[0004] Therefore, how to improve the utilization of packaging space is a problem that needs to be solved at present. Summary of the invention

[0005] The technical problem to be solved by the utility model is how to improve the utilization rate of packaging space, which is a problem that needs to be solved at present. A chip packaging structure is provided.

[0006] In order to solve the above problems, the utility model provides a chip packaging structure, including: a lead frame, having a lower surface and an upper surface arranged opposite to each other, the lead frame including a base island and pins located on both sides of the base island, the lower surface portion of the pins protrudes to form a first conductive column, the upper surface portion of the pins protrudes to form at least one group of second conductive columns arranged at intervals, the same group of second conductive columns have the same height, and the height of the second conductive columns decreases successively in the direction from the outer edge of the pin to the base island; a first chip is mounted on the lower surface of the base island and connected to the pins by welding wires, the packaging height of the first chip is less than the height of the first conductive column; a plurality of second chips are located above the upper surface of the base island and are arranged in sequence at intervals in a direction perpendicular to the upper surface of the base island, the second chip at the bottom layer has a spacing from the upper surface of the base island, and each of the second chips is flipped on the same group of second conductive columns.

[0007] In some embodiments, the lower surface of the pin also partially protrudes to form at least one group of spaced third conductive columns, which are located on the side of the first conductive column close to the base island; the third conductive columns in the same group have the same height, the height of the third conductive columns is smaller than that of the first conductive columns, and the height of the third conductive columns decreases successively in the direction from the outer edge of the pin to the base island.

[0008] In some embodiments, the third conductive pillar and the second conductive pillar are symmetrically arranged relative to the lead frame.

[0009] In some embodiments, at least one third chip is further included, which is located below the lower surface of the base island, and multiple third chips are arranged in sequence in a direction perpendicular to the lower surface of the base island. The third chip at the bottom layer has a distance from the surface of the first chip, and each third chip is flipped on the same group of third conductive pillars.

[0010] In some embodiments, the connection between the lead and the pin is located on the inner side of the third conductive column.

[0011] In some embodiments, the upper surface of the pin also partially protrudes to form a fourth conductive column, the fourth conductive column is located on a side of all the second conductive columns away from the base island, and the height of the fourth conductive column is greater than that of all the second conductive columns.

[0012] In some embodiments, the fourth conductive pillar is located on a side of the first conductive pillar close to the base island.

[0013] In some embodiments, a heat sink is further included, which is disposed on the surface of the fourth conductive column.

[0014] In some embodiments, the first chip is mounted on the lower surface of the base island via an adhesive layer.

[0015] In some embodiments, solder balls are further disposed on the surfaces of the second conductive pillar and the third conductive pillar, and the second chip and the third chip are flip-mounted on the second conductive pillar and the third conductive pillar respectively by welding.

[0016] In some embodiments, a plastic package is further included, covering the lead frame, the first chip, and the second chip, and an end surface of the first conductive column is exposed to the plastic package.

[0017] The above technical solution can realize the stacking of multiple chips by arranging multiple groups of integrally formed conductive pillars with different heights on both sides of the pins of the lead frame, thereby meeting the needs of more packaging unit integration and application scenarios; at the same time, during the packaging process, the conductive pillars can be supported and suspended in the air, thereby providing sufficient space for chip mounting, thereby simply and advantageously realizing double-sided chip packaging of the lead frame. During the packaging process, there is no need to use a special fixture to support the lead frame, thereby simplifying the packaging process.

[0018] It should be understood that the above general description and the detailed description below are only exemplary and explanatory and cannot limit the present invention. The techniques, methods and devices known to ordinary technicians in the relevant field may not be discussed in detail, but in appropriate cases, the techniques, methods and devices should be considered as part of the authorization specification. BRIEF DESCRIPTION OF THE DRAWINGS

[0019] In order to more clearly illustrate the technical solutions in the specific implementation of the utility model, the following is a brief introduction to the drawings required for the description of the specific implementation. Obviously, the drawings described below are only some specific implementations of the utility model. For ordinary technicians in this field, other drawings can be obtained based on these drawings without creative work.

[0020] Figure 1 It is a structural schematic diagram of the first embodiment of the chip packaging structure of the present invention.

[0021] Figure 2 It is a structural schematic diagram of the second embodiment of the chip packaging structure of the present invention.

[0022] Figure 3 It is a structural schematic diagram of the third embodiment of the chip packaging structure of the present invention. DETAILED DESCRIPTION

[0023] The technical scheme in the embodiment of the utility model will be described clearly and completely below in conjunction with the accompanying drawings. Obviously, the described embodiment is only a part of the embodiment of the utility model, not all of the embodiments. Based on the embodiment of the utility model, all other embodiments obtained by those skilled in the art without creative work are within the scope of protection of the utility model.

[0024] See also Figure 1 , which is a schematic diagram of the structure of the first embodiment of the chip packaging structure of the utility model. Figure 1As shown, the chip packaging structure of the utility model includes: a lead frame 10, a first chip 111, and a plurality of second chips 112. The lead frame 10 has a lower surface S1 and an upper surface S2 that are arranged opposite to each other. The lead frame 10 includes a base island 101 and pins 102 located on both sides of the base island 101. The lower surface S1 of the pins 102 partially protrudes to form a first conductive column 121, and the upper surface S2 of the pins 102 partially protrudes to form at least one group of second conductive columns 122 that are arranged at intervals. The second conductive columns 122 of the same group have the same height, and the height of the second conductive columns 122 decreases in sequence from the outer edge of the pins 102 to the base island 101. The first chip 111 is mounted on the lower surface S1 of the base island 101 and connected to the pins 102 by a welding wire 103. The packaging height of the first chip 111 is less than the height of the first conductive column 121. A plurality of second chips 112 are located above the upper surface S2 of the base island 101, and are arranged in sequence at intervals along a direction perpendicular to the upper surface S2 of the base island 101. The second chip 112 at the bottom layer has a distance from the upper surface S2 of the base island 101, and each second chip 112 is flipped on the same group of second conductive pillars 122.

[0025] The above technical solution can realize the stacking of multiple chips by arranging multiple groups of integrally formed conductive pillars with different heights on both sides of the pins of the lead frame, thereby meeting the needs of more packaging unit integration and application scenarios; at the same time, during the packaging process, the conductive pillars can be supported and suspended in the air, thereby providing sufficient space for chip mounting, thereby simply and advantageously realizing double-sided chip packaging based on the lead frame. During the packaging process, there is no need to use a special fixture to support the lead frame, thereby simplifying the packaging process.

[0026] Specifically, the first conductive pillar 121 is located at the outer edge of the lead frame 10, and can be used as an external pin of the chip packaging structure for connecting an external circuit. The second conductive pillar 122 is located on the side of the first conductive pillar 121 close to the base island 101. The height of the second conductive pillar 122 far from the base island 101 in two adjacent groups of the second conductive pillars 122 is greater than the packaging height of the second chip 112 on the surface of the second conductive pillar 122 close to the base island 101, providing sufficient space for the packaging of the second chip 112.

[0027] In some embodiments, the first chip 111 is mounted on the lower surface S1 of the base island 101 through an adhesive layer 13 .

[0028] In some embodiments, solder balls 14 are further disposed on the surface of the second conductive pillars 122 , and the second chip 112 is flip-mounted on the second conductive pillars 122 via the solder balls 14 .

[0029] In some embodiments, the chip packaging structure further includes a plastic package 15 covering the lead frame 10 , the first chip 111 , and the second chip 112 , and the end surface of the first conductive column 121 is exposed to the plastic package 15 for connecting to an external circuit.

[0030] See also Figure 2 , which is a schematic diagram of the structure of the second embodiment of the chip packaging structure of the utility model. Figure 2 As shown, the chip packaging structure described in this embodiment is Figure 1 The difference from the embodiment shown is that, in some embodiments, the upper surface S2 of the pin 202 further protrudes to form a fourth conductive column 224, and the fourth conductive column 224 is located on a side of all the second conductive columns 222 away from the base island 201, and the height of the fourth conductive column 224 is greater than the height of all the second conductive columns 222, thereby providing sufficient space for flip-mounting the second chip 212 on the surface of the second conductive column 222. Specifically, the height of the fourth conductive column 224 is greater than the packaging height of the second chip 212 on the surface of the highest second conductive column 222, providing sufficient space for packaging the second chip 212.

[0031] In some embodiments, the fourth conductive pillar 224 is located on a side of the first conductive pillar 221 close to the base island 201. In other embodiments, the fourth conductive pillar 224 can also be symmetrically arranged with the first conductive pillar 221 relative to the lead frame 20, and the structure of the pin 202 symmetrical on both sides can reduce the difficulty of the formation process of the pin 202 and reduce the difficulty of chip flipping; at the same time, the lead frame 20 can be more evenly stressed, reducing the possibility of damage to the packaging structure and improving the stability of the device.

[0032] In some embodiments, the chip packaging structure further includes a heat sink 26, which is arranged on the surface of the fourth conductive column 224 through an insulating adhesive material. In this embodiment, the heat sink 26 has a spacing with the adjacent second chip 212, providing sufficient space for the packaging of the second chip 212 to avoid problems such as short circuits. In some embodiments, a thermally conductive material is filled between the heat sink 26 and the adjacent second chip 212 to further improve the heat dissipation capacity of the chip packaging structure. In some embodiments, the plastic package 25 covers the fourth conductive column 224. The heat sink 26 is exposed on the surface of the plastic package 25, further improving the heat dissipation capacity of the heat sink 26.

[0033] In other embodiments, no components may be disposed on the surface of the fourth conductive pillar 224, and the fourth conductive pillar 224 is used to connect to an external circuit, forming a double-sided pin packaging structure together with the first conductive pillar 221. In this embodiment, the plastic package 25 covers the side surface of the fourth conductive pillar 224 and exposes the end surface of the fourth conductive pillar for connecting to an external circuit.

[0034] See also Figure 3 , which is a schematic diagram of the structure of the third embodiment of the chip packaging structure of the utility model. Figure 3 As shown, the chip packaging structure described in this embodiment is Figure 2 The embodiment shown is different in that the lower surface S1 of the pin 302 also protrudes to form at least one group of third conductive pillars 323 arranged at intervals, which are located on the side of the first conductive pillar 321 close to the base island 301; the third conductive pillars 323 of the same group have the same height, the height of the third conductive pillars 323 is less than the first conductive pillar 321, and the height of the third conductive pillars 323 decreases in sequence from the outer edge of the pin 302 to the base island 301. A plurality of groups of third conductive pillars 323 with different heights are provided on the lower surface S1 of the pin 302 of the lead frame 30, so that multiple chips can be stacked to meet more packaging unit integration and application scenario requirements.

[0035] In some embodiments, the third conductive pillar 323 and the second conductive pillar 322 are symmetrically arranged relative to the lead frame 30. The structure of the pin 302 being symmetrical on both sides can reduce the difficulty of the formation process of the pin 302 and reduce the difficulty of chip flipping; at the same time, the force on the lead frame 30 can be more uniform, reducing the possibility of damage to the packaging structure and improving the stability of the device.

[0036] In some embodiments, at least one third chip 313 is further included, which is located below the lower surface S1 of the base island 301, and a plurality of the third chips 313 are sequentially spaced apart in a direction perpendicular to the lower surface S1 of the base island 301, and the third chip 313 at the bottom layer is spaced apart from the surface of the first chip 311, and each of the third chips 313 is flip-chip mounted on the same group of the third conductive pillars 323. The stacked third chips 313 are arranged on the third conductive pillars 323 to further improve the packaging density.

[0037] In some embodiments, the connection between the lead 303 and the pin 302 is located inside the third conductive column 323 .

[0038] In some embodiments, solder balls 34 are further disposed on the surface of the third conductive pillars 323 , and the third chip 313 is flip-mounted on the third conductive pillars 323 via the solder balls 34 .

[0039] In this embodiment, the plastic package 35 covers the third conductive pillar 323 and the third chip 313 to provide protection for the third conductive pillar 323 and the third chip 313 .

[0040] The above technical solution can realize the stacking of multiple chips by arranging multiple groups of integrally formed conductive pillars with different heights on both sides of the pins of the lead frame, thereby meeting the needs of more packaging unit integration and application scenarios; at the same time, during the packaging process, the conductive pillars can be supported and suspended in the air, thereby providing sufficient space for chip mounting, thereby simply and advantageously realizing double-sided chip packaging of the lead frame. During the packaging process, there is no need to use a special fixture to support the lead frame, thereby simplifying the packaging process.

[0041] It should be noted that references in the specification to "an embodiment", "an embodiment", "an exemplary embodiment", "some embodiments", etc. indicate that the described embodiment may include a particular feature, structure, or characteristic, but every embodiment may not necessarily include the particular feature, structure, or characteristic. Moreover, such phrases do not necessarily refer to the same embodiment. In addition, when a particular feature, structure, or characteristic is described in conjunction with an embodiment, whether or not explicitly described, it is within the knowledge of a technician in the relevant art to implement such feature, structure, or characteristic in conjunction with other embodiments.

[0042] Typically, a term can be understood at least in part from usage in context. For example, the term "one or more" as used herein depends at least in part on the context and can be used to describe any feature, structure or characteristic in a singular sense, or can be used to describe a combination of features, structures or features in a plural sense. Similarly, terms such as "one", "a" or "the" can also be understood to express singular usage or to express plural usage, depending at least in part on the context. In addition, the term "based on" can be understood to not necessarily be intended to express a set of exclusive factors, but can alternatively, also at least in part depending on the context, allow for the presence of other factors that are not necessarily explicitly described. It should also be noted in this specification that "connected / coupled" refers not only to the direct coupling of one component to another component, but also to the indirect coupling of one component to another component through an intermediate component.

[0043] It should be noted that the terms "including" and "having" and their variations involved in the documents of the present utility model are intended to cover non-exclusive inclusions. The terms "first", "second", etc. are used to distinguish similar objects and are not necessarily used to describe a specific order or sequence. Unless the context clearly indicates otherwise, it should be understood that the data used in this way can be interchanged under appropriate circumstances. In addition, the embodiments of the present utility model and the features in the embodiments can be combined with each other unless there is a conflict. In addition, in the above description, the description of well-known components and technologies is omitted to avoid unnecessary confusion of the concepts of the present utility model. In the above-mentioned embodiments, each embodiment focuses on the differences from other embodiments, and the same / similar parts between the embodiments can be referred to each other.

[0044] The above is only a preferred embodiment of the present invention. It should be pointed out that ordinary technicians in this technical field can make several improvements and modifications without departing from the principle of the present invention. These improvements and modifications should also be regarded as the protection scope of the present invention.

Claims

1. A chip packaging structure, characterized in that: include: A lead frame having a lower surface and an upper surface arranged opposite to each other, the lead frame comprising a base island and pins located on both sides of the base island, the lower surface portion of the pins protruding to form a first conductive column, the upper surface portion of the pins protruding to form at least one group of second conductive columns arranged at intervals, the second conductive columns in the same group have the same height, and the height of the second conductive columns decreases in sequence in the direction from the outer edge of the pin to the base island; A first chip is mounted on the lower surface of the base island and connected to the pins by welding wires, and a package height of the first chip is smaller than a height of the first conductive pillar; A plurality of second chips are located above the upper surface of the base island and are arranged in sequence in a direction perpendicular to the upper surface of the base island. The second chip at the bottom layer is spaced apart from the upper surface of the base island. Each second chip is flipped on the same group of second conductive pillars.

2. The packaging structure according to claim 1, characterized in that: The lower surface of the pin also partially protrudes to form at least one group of third conductive pillars arranged at intervals, which are located on the side of the first conductive pillar close to the base island; the third conductive pillars in the same group have the same height, the height of the third conductive pillars is smaller than that of the first conductive pillars, and the height of the third conductive pillars decreases successively in the direction from the outer edge of the pin to the base island.

3. The packaging structure according to claim 2, characterized in that: The third conductive pillar and the second conductive pillar are symmetrically arranged relative to the lead frame.

4. The packaging structure according to claim 2, characterized in that: It also includes at least one third chip located below the lower surface of the base island, and multiple third chips are arranged in sequence in a direction perpendicular to the lower surface of the base island, the third chip at the bottom layer has a distance from the surface of the first chip, and each third chip is flipped on the same group of third conductive pillars.

5. The packaging structure according to claim 4, characterized in that: The connection point between the lead wire and the pin is located inside the third conductive column.

6. The packaging structure according to claim 1, characterized in that: The upper surface of the pin also partially protrudes to form a fourth conductive column, the fourth conductive column is located on a side of all the second conductive columns away from the base island, and the height of the fourth conductive column is greater than the height of all the second conductive columns.

7. The packaging structure according to claim 6, characterized in that: The fourth conductive column is located on a side of the first conductive column close to the base island.

8. The packaging structure according to claim 6, characterized in that: It also includes a heat sink, which is arranged on the surface of the fourth conductive column.

9. The packaging structure according to claim 1, characterized in that: The first chip is mounted on the lower surface of the base island through an adhesive layer.

10. The packaging structure according to claim 4, characterized in that: Solder balls are also disposed on the surfaces of the second conductive pillar and the third conductive pillar, and the second chip and the third chip are flip-mounted on the second conductive pillar and the third conductive pillar respectively by welding.

11. The packaging structure according to claim 1, characterized in that: It also includes a plastic package, covering the lead frame, the first chip, and the second chip, and the end surface of the first conductive column is exposed to the plastic package.

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