Numerical control attenuator with temperature compensation

Abstract

The embodiment of the utility model provides a numerical control attenuator with temperature compensation, which comprises at least one of an attenuator circuit, a first voltage generation circuit and a second voltage generation circuit, and is characterized in that the attenuator circuit comprises a first transistor, a resistance attenuation network and a second transistor; a first voltage generation circuit for generating a first control voltage having a first relationship with the temperature; a second voltage generation circuit for generating a second control voltage having a second relationship with the temperature; the first switch is used for outputting a first control voltage or a first turn-off voltage to a grid electrode of the first transistor; the second switch is used for outputting a second control voltage or a second turn-off voltage to the grid electrode of the second transistor. According to the embodiment of the invention, the insertion loss of the numerical control attenuator and the change of the attenuation amount along with the temperature can be improved, so that the numerical control attenuator can maintain stable performance at different temperatures.

Description

Technical Field

[0001] The present disclosure relates to the field of communication technology, and in particular to a digitally controlled attenuator with temperature compensation. Background Art

[0002] In active phased array systems, digitally controlled attenuators are one of the important components of the transmit / receive (T / R) components. Their functions include calibrating the gain differences between different channels and improving the sidelobe suppression ratio of the signal. In order to accurately adjust the size, direction and main-sidelobe ratio of the phased array antenna beam, the digitally controlled attenuator requires precise amplitude control. However, in actual applications, due to the large changes in ambient temperature, the attenuation characteristics of existing digitally controlled attenuators at high and low temperatures have deviations, which reduces the amplitude control accuracy. Summary of the invention

[0003] An embodiment of the present disclosure provides a digitally controlled attenuator with temperature compensation, comprising an attenuator circuit and at least one of a first voltage generating circuit or a second voltage generating circuit, wherein:

[0004] The attenuator circuit includes a first transistor, a resistance attenuation network, and a second transistor, wherein the first transistor is connected in parallel with the resistance attenuation network, and the second transistor is connected in series with the resistance attenuation network;

[0005] The first voltage generating circuit is used to generate a first control voltage having a first relationship with temperature, wherein the relationship between the change in the equivalent resistance value of the resistance attenuation network in the reference state of the digitally controlled attenuator and the temperature is complementary to the first relationship;

[0006] The second voltage generating circuit is used to generate a second control voltage having a second relationship with temperature, wherein the relationship between the change in the equivalent resistance value of the resistance attenuation network in the attenuation state of the digitally controlled attenuator and the temperature is complementary to the second relationship;

[0007] The gate of the first transistor is connected to the first voltage generating circuit via a first switch, and the first switch is used to output the first control voltage or the first shutdown voltage to the gate of the first transistor;

[0008] The gate of the second transistor is connected to the second voltage generating circuit via a second switch, and the second switch is used to output the second control voltage or the second shutdown voltage to the gate of the second transistor.

[0009] In an embodiment of the present disclosure, a first control voltage having a first relationship with temperature or / and a second control voltage having a second relationship with temperature are generated. The first control voltage acts on the gate of the first transistor to control the first transistor to present different on-resistances at different temperatures, so as to offset the insertion loss variation of the attenuator circuit caused by temperature, so that the insertion loss of the attenuator circuit is stable with temperature; or / and, the second control voltage acts on the gate of the second transistor to control the second transistor to present different on-resistances at different temperatures, so as to offset the attenuation variation of the attenuator circuit caused by temperature, so that the attenuation of the attenuator circuit is stable with temperature.

[0010] In this way, when the gate of the transistor (the first transistor or / and the second transistor) receives the shutdown voltage (the first shutdown voltage or / and the second shutdown voltage), the transistor is turned off, and the branch where the transistor is located does not provide attenuation; when the control voltage (the first control voltage or / and the second control voltage) is output to the gate of the transistor (the first transistor or / and the second transistor), the transistor is turned on, and the branch where the transistor is located provides attenuation. When the branch where the transistor is located provides attenuation, when the temperature changes, since the control voltage changes with the temperature, the on-resistance of the transistor changes with the temperature, and the resistance value of the attenuation resistance changes with the temperature can be compensated, so that the equivalent resistance value of the attenuator circuit also remains stable, and the insertion loss and attenuation of the attenuator circuit are stable with the temperature, which improves the attenuation characteristic deviation at high and low temperatures, and is conducive to improving the amplitude control accuracy. In addition, the embodiments of the present disclosure utilize switches (first switches and / or second switches) to apply control voltages (first control voltages and / or second control voltages) or turn-off voltages (first turn-off voltages and / or second turn-off voltages) to transistors (first transistors and / or second transistors). When turning off the transistors, a fixed turn-off voltage is directly applied to the corresponding transistors. The turn-off voltage is not affected by temperature, so that the turn-off control of the transistors is simple and convenient. At the same time, when the circuit operates in different states, the gate voltage of the transistors is switched by switches, so that the control method of the circuit is simple and easy to implement. BRIEF DESCRIPTION OF THE DRAWINGS

[0011] Figure 1 A schematic diagram of an equivalent circuit of a π-type attenuator provided by an embodiment of the present disclosure when in different states;

[0012] Figure 2 A schematic diagram of an equivalent circuit of a bridge T-type attenuator provided by an embodiment of the present disclosure when in different states;

[0013] Figure 3 A schematic diagram of an equivalent circuit of a T-type attenuator in different states provided by an embodiment of the present disclosure;

[0014] Figure 4 A schematic diagram of the structure of a digitally controlled attenuator provided in an embodiment of the present disclosure;

[0015] Figure 5 A schematic diagram of the relationship between the first control voltage, the second control voltage and the temperature of a π-type attenuator provided in an embodiment of the present disclosure;

[0016] Figure 6 A schematic diagram of the relationship between insertion loss, attenuation and temperature of a π-type attenuator provided in an embodiment of the present disclosure;

[0017] Figure 7 A schematic diagram of the relationship between the first control voltage, the second control voltage and the temperature of a bridge T-type attenuator provided in an embodiment of the present disclosure;

[0018] Figure 8 A schematic diagram of the relationship between insertion loss, attenuation and temperature of a bridge T-type attenuator provided in an embodiment of the present disclosure;

[0019] Fig. 9 A schematic diagram of the relationship between the first control voltage, the second control voltage and the temperature of a T-type attenuator provided in an embodiment of the present disclosure;

[0020] Fig.10 A schematic diagram of the relationship between insertion loss, attenuation and temperature of a T-type attenuator provided in an embodiment of the present disclosure;

[0021] Fig.11 A schematic diagram of the composition structure of another digitally controlled attenuator provided in an embodiment of the present disclosure;

[0022] Fig.12 A schematic diagram of the connection relationship when the attenuator circuits in a digitally controlled attenuator provided by an embodiment of the present disclosure are respectively a π-type attenuator circuit, a bridge T-type attenuator circuit, and a T-type attenuator circuit;

[0023] Fig.13 A detailed structural diagram of a digitally controlled attenuator provided in an embodiment of the present disclosure;

[0024] Fig.14 A schematic diagram of principle analysis of a PTAT voltage generating circuit provided in an embodiment of the present disclosure;

[0025] Fig.15 A schematic diagram of the relationship between voltage and temperature involved in the first voltage generating circuit or the third voltage generating circuit provided in an embodiment of the present disclosure;

[0026] Fig.16 A schematic diagram of the relationship between voltage and temperature involved in the second voltage generating circuit and the subtractor provided in an embodiment of the present disclosure;

[0027] Fig.17A schematic diagram of the structure of an attenuator circuit in which the resistor is a MOS tube provided in an embodiment of the present disclosure;

[0028] Fig.18 A schematic diagram of the relationship between the first control voltage, the second control voltage, the third control voltage and the temperature of a π-type attenuator provided in an embodiment of the present disclosure;

[0029] Fig.19 A schematic diagram of the relationship between insertion loss, attenuation and temperature of another π-type attenuator provided in an embodiment of the present disclosure;

[0030] Fig. 20 A schematic diagram of the relationship between the first control voltage, the second control voltage, the third control voltage and the temperature of a bridge T-type attenuator provided in an embodiment of the present disclosure;

[0031] Fig.21 A schematic diagram of the relationship between insertion loss, attenuation and temperature of another bridge T-type attenuator provided in an embodiment of the present disclosure;

[0032] Fig. 22 A schematic diagram of the relationship between the first control voltage, the second control voltage, the third control voltage and the temperature of a T-type attenuator provided in an embodiment of the present disclosure;

[0033] Fig.23 A schematic diagram of the relationship between insertion loss, attenuation and temperature of another T-type attenuator provided in an embodiment of the present disclosure;

[0034] Fig.24 A schematic diagram of the structure of another digitally controlled attenuator provided in an embodiment of the present disclosure;

[0035] Fig.25 A schematic diagram of the connection relationship when the attenuator circuits in another digitally controlled attenuator provided in an embodiment of the present disclosure are respectively a π-type attenuator circuit, a bridge T-type attenuator circuit, and a T-type attenuator circuit;

[0036] Fig.26 A schematic diagram of the structure of another digitally controlled attenuator provided in an embodiment of the present disclosure;

[0037] Fig. 27 A schematic diagram of the relationship between the first control voltage, the third control voltage and the temperature of a π-type attenuator provided in an embodiment of the present disclosure;

[0038] Fig.28 A schematic diagram of the relationship between insertion loss, attenuation and temperature of another π-type attenuator provided in an embodiment of the present disclosure;

[0039] Fig.29A schematic diagram of the relationship between the first control voltage, the third control voltage and the temperature of a bridge T-type attenuator provided in an embodiment of the present disclosure;

[0040] Fig.30 A schematic diagram of the relationship between insertion loss, attenuation and temperature of another bridge T-type attenuator provided in an embodiment of the present disclosure;

[0041] Fig.31 A schematic diagram of the relationship between the first control voltage, the third control voltage and the temperature of a T-type attenuator provided in an embodiment of the present disclosure;

[0042] Fig.32 A schematic diagram of the relationship between insertion loss, attenuation and temperature of another T-type attenuator provided in an embodiment of the present disclosure;

[0043] Fig.33 A schematic diagram of the connection relationship when the attenuator circuits in another digitally controlled attenuator provided in an embodiment of the present disclosure are respectively a π-type attenuator circuit, a bridge T-type attenuator circuit, and a T-type attenuator circuit. DETAILED DESCRIPTION

[0044] The following will be combined with the drawings in the embodiments of the present disclosure to clearly and completely describe the technical solutions in the embodiments of the present disclosure. It is understood that the specific embodiments described herein are only used to explain the relevant disclosure, rather than to limit the disclosure. It should also be noted that, for the convenience of description, only the parts related to the relevant disclosure are shown in the drawings.

[0045] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as those commonly understood by those skilled in the art to which the present disclosure belongs. The terms used herein are only for the purpose of describing the embodiments of the present disclosure and are not intended to limit the present disclosure.

[0046] In the following description, reference is made to “some embodiments”, which describe a subset of all possible embodiments, but it will be understood that “some embodiments” may be the same subset or different subsets of all possible embodiments and may be combined with each other without conflict.

[0047] It should be pointed out that the terms "first\second\third" involved in the embodiments of the present disclosure are merely used to distinguish similar objects and do not represent a specific ordering of the objects. It can be understood that "first\second\third" can be interchanged in a specific order or sequence where permitted, so that the embodiments of the present disclosure described here can be implemented in an order other than that illustrated or described here.

[0048] Figure 1 The equivalent circuit diagram of the π-type digitally controlled attenuator (π-type attenuator for short) in different states is shown; Figure 1As shown, the π-type attenuator is composed of a switching transistor M1, two switching transistors M2, a resistor R1 connected in parallel with the switching transistor M1, and a resistor R2 connected in series with the two switching transistors M2. The connection relationship of each part is as follows: Figure 1 As shown. When the π-type attenuator is in the reference state, the switching transistor M1 is in the on state, which is equivalent to the on-resistance Ron1, and the two switching transistors M2 are in the off state, which is equivalent to the off-capacitor Coff2, so that the input signal Rfin (RF input signal) is not attenuated, and the output signal Rfout (RF output signal) is obtained. When the π-type attenuator is in the attenuation state, the switching transistor M1 is in the off state, which is equivalent to the off-capacitor Coff1, and the two switching transistors M2 are in the on state, which is equivalent to the on-resistance Ron2, so that the input signal Rfin is attenuated and the output signal Rfout is obtained.

[0049] Figure 2 The equivalent circuit diagram of the bridge T-type digital controlled attenuator (bridge T-type attenuator for short) in different states is shown; Figure 2 As shown, the bridge T-type attenuator is composed of a switching transistor M1, a switching transistor M2, a resistor R1 connected in parallel with the switching transistor M1, two resistors Z0 connected in series and in parallel with the switching transistor M1, and a resistor R2 connected in series with the switching transistor M2 and connected to the two resistors Z0. The connection relationship of each part is as follows: Figure 2 As shown. When the bridge T-type attenuator is in the reference state, the switch transistor M1 is in the on state, which is equivalent to the on-resistance Ron1, and the switch transistor M2 is in the off state, which is equivalent to the off-capacitor Coff2, so that the input signal Rfin is not attenuated, and the output signal Rfout is obtained. When the bridge T-type attenuator is in the attenuation state, the switch transistor M1 is in the off state, which is equivalent to the off-capacitor Coff1, and the switch transistor M2 is in the on state, which is equivalent to the on-resistance Ron2, so that the input signal Rfin is attenuated and the output signal Rfout is obtained.

[0050] Figure 3 The equivalent circuit diagram of the T-type digital controlled attenuator (T-type attenuator for short) in different states is shown; Figure 3 As shown, the T-type attenuator is composed of a switching transistor M1, a switching transistor M2, two resistors R1 connected in series and in parallel with the switching transistor M1, and a resistor R2 connected in series with the switching transistor M2 and connected to the two resistors R1. The connection relationship of each part is as follows Figure 3As shown. When the T-type attenuator is in the reference state, the switching transistor M1 is in the on state, which is equivalent to the on-resistance Ron1, and the switching transistor M2 is in the off state, which is equivalent to the off-capacitor Coff2, so that the input signal Rfin is not attenuated, and the output signal Rfout with almost no loss is output. When the T-type attenuator is in the attenuation state, the switching transistor M1 is in the off state, which is equivalent to the off-capacitor Coff1, and the switching transistor M2 is in the on state, which is equivalent to the on-resistance Ron2, so that the input signal Rfin is attenuated and the output signal Rfout is obtained.

[0051] For these three digitally controlled attenuators (referred to as attenuators), the mechanism of the insertion loss of the attenuator changing with temperature is as follows: when the attenuator is in the reference state, the switch transistor M1 is turned on (i.e., turned on), which is equivalent to the on-resistance Ron1; the switch transistor M2 is turned off, which is equivalent to the off-capacitor Coff2, which can be regarded as an open circuit at low frequencies. At this time, since the resistances R1 and Ron1 will change with temperature, the insertion loss of the attenuator will also change with temperature.

[0052] The mechanism of the attenuator's attenuation changing with temperature is as follows: when the attenuator is in the attenuation state, the switch transistor M1 is turned off, which is equivalent to the off capacitor Coff1, which can be regarded as an open circuit at low frequencies; the switch transistor M2 is turned on, which is equivalent to the on-resistance Ron2. Similarly, since the resistance values ​​of resistors R1, R2, and Ron2 will change with temperature, the attenuation of the attenuator will also change with temperature.

[0053] Based on this, an embodiment of the present disclosure provides a digitally controlled attenuator, which, in a reference state, provides a first control voltage having a first relationship with temperature to the first transistor M1, so that the resistance value of the equivalent resistance of the attenuator circuit in the reference state is stable and does not change with temperature (a slight change within an allowable error range, and the same applies subsequently), thereby making the insertion loss of the digitally controlled attenuator in the reference state not change with temperature; and / or, in the attenuation state, provides a second control voltage having a second relationship with temperature to the second transistor M2, so that the resistance value of the equivalent resistance of the attenuator circuit in the attenuation state is stable and does not change with temperature, thereby making the attenuation amount of the digitally controlled attenuator in the reference state not change with temperature. In addition, the embodiments of the present disclosure utilize switches (first switch and / or second switch) to implement application of a control voltage (first control voltage and / or second control voltage) or a shutdown voltage (first shutdown voltage and / or second shutdown voltage) to a transistor (first transistor and / or second transistor). When the transistor is turned off, a fixed shutdown voltage is directly applied to the corresponding transistor, and the shutdown voltage is not affected by temperature, so that the shutdown control of the transistor is simple and convenient. At the same time, when the circuit is operating in different states, the gate voltage of the transistor is switched by the switch, so that the control method of the circuit is simple and easy to implement.

[0054] The branch where the switch transistor M1 is located can be understood as an attenuation trunk, which is connected between the signal input terminal and the signal output terminal; the branch where the switch transistor M2 is located can be understood as an attenuation branch, which is connected between the signal input terminal and the ground, and / or it is connected between the signal output terminal and the ground. The input signal Rfin is input at the signal input terminal, and the output signal Rfout is output at the signal output terminal.

[0055] The embodiments of the present disclosure will be described in detail below with reference to the accompanying drawings.

[0056] In one embodiment of the present disclosure, see Figure 4 , which shows a schematic diagram of the composition structure of a digitally controlled attenuator provided by an embodiment of the present disclosure. Figure 4 As shown, the digital controlled attenuator 10 comprises an attenuator circuit 104, and at least one of a first voltage generating circuit 101 or a second voltage generating circuit 102, wherein:

[0057] The attenuator circuit 104 includes a first transistor M1, a resistor attenuation network 1041, and a second transistor M2, wherein the first transistor M1 is connected in parallel with the resistor attenuation network 1041, and the second transistor M2 is connected in series with the resistor attenuation network 1041;

[0058] A first voltage generating circuit 101, configured to generate a first control voltage having a first relationship with temperature;

[0059] A second voltage generating circuit 102, used to generate a second control voltage having a second relationship with temperature;

[0060] The gate of the first transistor M1 is connected to the first voltage generating circuit 101 via a first switch S1, and the first switch S1 is used to output the first control voltage or the first off voltage to the gate of the first transistor M1;

[0061] The gate of the second transistor M2 is connected to the second voltage generating circuit 102 via a second switch S2 , and the second switch S2 is used to output the second control voltage or the second shutdown voltage to the gate of the second transistor M2 .

[0062] It should be noted that the attenuator circuit 104 can be the aforementioned π-type attenuator, T-type attenuator or bridge T-type attenuator, and the resistors in the attenuator form a resistor attenuation network 1041. It can be understood that for the π-type attenuator, it includes two transistors M2. In various attenuator circuits, whether there is one transistor M2 or two transistors M2, the control method of the transistor M2 can be the same.

[0063] In addition, the first transistor M1 (ie Figures 1 to 3The number of the switch transistors M1 in the attenuator can be one or more. When the number of the first transistors M1 is more than one, the multiple first transistors M1 are connected in series and then connected in parallel with the resistance attenuation network 1041. The gates of the multiple first transistors M1 can be connected to the first switch S1, or connected to the multiple first switches S1 respectively. For the T-type attenuator and the bridge T-type attenuator, the second transistor M2 (i.e. Figures 1 to 3 The number of the switch transistors M2 in the attenuator may be one or more. When the number of the second transistors M2 is more than one, the multiple second transistors M2 are connected in series with the resistor attenuation network 1041, and the gates of the multiple second transistors M2 may be connected to the second switch S2, or may be connected to the multiple second switches S2 respectively. For the π-type attenuator, the number of the second transistors M2 may be two or more. When the number of the second transistors M2 is more than one, a part of the second transistors M2 are connected in series with one end of the resistor attenuation network 1041, and another part of the second transistors M2 are connected in series with the other end of the resistor attenuation network 1041, and the gates of the multiple second transistors M2 may be connected to the second switch S2, or may be connected to the multiple second switches S2 respectively.

[0064] It should also be noted that if Figure 4 As shown, one end of the second transistor M1 is connected to the resistor attenuation network 1041, and the other end is grounded, Rfin represents the input signal, and Rfout represents the output signal. In the embodiment of the present disclosure, the first transistor M1 and the second transistor M2 are both NMOS transistors, but this is not specifically limited.

[0065] The first turn-off voltage is a fixed voltage that turns off the first transistor M1, and the second turn-off voltage is a fixed voltage that turns off the second transistor M2. These two turn-off voltages only need to meet a certain threshold to ensure that the corresponding transistors are turned off. For example, when the first transistor M1 is NMOS, the first turn-off voltage is 0V, when the second transistor M1 is NMOS, the second turn-off voltage is 0V, when the first transistor M1 is PMOS, the first turn-off voltage is -2.5V, and when the second transistor M1 is PMOS, the second turn-off voltage is -2.5V.

[0066] When the digital controlled attenuator 10 is in the reference state (i.e., the state without attenuation), the first switch S1 outputs the first control voltage to the gate of the first transistor M1 to control the first transistor M1 to be turned on, which is equivalent to the on-resistance, and the second switch S2 outputs the second off voltage to the gate of the second transistor M2 to control the second transistor M2 to be turned off, which is equivalent to the off-capacitance. Since the resistance of the resistance attenuation network 1041 changes with temperature, the on-resistance of the first transistor M1 also changes with temperature. In order to ensure that the insertion loss remains unchanged, the relationship between the resistance of the resistance attenuation network 1041 and the temperature is obtained in advance through experimental measurement and other methods, and the relationship between the on-resistance of the first transistor M1 and the temperature is calculated while ensuring that the overall resistance remains unchanged, and then the relationship between the first control voltage applied to the gate of the first transistor M1 and the temperature (i.e., the first relationship) is obtained, so that the on-resistance of the first transistor M1 is controlled by the first control voltage, which can ensure that the insertion loss of the attenuator circuit 104 is stable in the reference state. The first relationship is complementary to the relationship between the equivalent resistance of the resistance attenuation network 1041 in the reference state and the temperature change, so as to compensate the resistance of the resistance attenuation network 1041 in the reference state, so that the sum of the on-resistance of the first transistor M1 and the equivalent resistance of the resistance attenuation network 1041 in the reference state remains unchanged at different temperatures.

[0067] When the digital controlled attenuator 10 is in the attenuation state, the first switch S1 outputs the first turn-off voltage to the gate of the first transistor M1 to control the first transistor M1 to turn off, which is equivalent to turning off the capacitance, and the second switch S2 outputs the second control voltage to the gate of the second transistor M2 to control the second transistor M2 to turn on, which is equivalent to the on-resistance. Since the resistance value of 1041 in the resistance attenuation network changes with temperature, the on-resistance of the second transistor M2 also changes with temperature. In order to ensure that the attenuation of the attenuator circuit 104 remains unchanged, the relationship between the second control voltage and the temperature (i.e., the second relationship) that makes the overall resistance of the attenuator circuit 104 not change with temperature is obtained in advance through experimental measurement and other methods, so that the on-resistance of the second transistor M2 is controlled by the second control voltage, it can be ensured that the attenuation of the attenuator circuit 104 remains basically unchanged in the attenuation state. The second relationship is complementary to the relationship between the change in the equivalent resistance of the resistance attenuation network 1041 in the attenuation state and the temperature, so as to compensate the resistance of the resistance attenuation network 1041 in the reference state, so that the sum of the on-resistance of the second transistor M2 and the equivalent resistance of the resistance attenuation network 1041 in the attenuation state remains unchanged at different temperatures.

[0068] In this way, the embodiment of the present disclosure generates a first control voltage and / or a second control voltage having a preset relationship with temperature, and controls the first transistor to present a different on-resistance in a reference state to offset the insertion loss change of the attenuator circuit caused by temperature, so that the insertion loss of the attenuator circuit is stable with temperature; and / or controls the second transistor to present a different on-resistance in an attenuation state to offset the attenuation change of the attenuator circuit caused by temperature, so that the attenuation of the attenuator circuit is stable with temperature.

[0069] With the aforementioned Figures 1 to 3 Taking the three types of attenuators shown as examples, when the digitally controlled attenuator 10 includes a first voltage generating circuit 101 and a second voltage generating circuit 102, the on-resistances Ron1 and Ron2 of the first transistor M1 and the second transistor M2 are controlled to achieve that the performance of the digitally controlled attenuator does not change with temperature. Specifically, the on-resistance at different temperatures is adjusted by controlling the turn-on control voltages (i.e., the first control voltage and the second control voltage) of the first transistor M1 and the second transistor M2; when the attenuator is in a reference state, the gate bias of the second transistor M2 is the second off-voltage, the gate bias of the first transistor M1 is the first control voltage, and the first control voltage is a control voltage that changes with temperature; when the attenuator is in an attenuation state, the gate bias of the first transistor M1 is the first off-voltage, the gate bias of the second transistor M2 is the second control voltage, and the second control voltage is a control voltage that changes with temperature.

[0070] The following is an explanation of the three attenuators:

[0071] For the attenuator circuit, it is a π-type attenuator (structure reference Figure 1 ), Figure 5 shows a first control voltage V ctrl 1 and the temperature change relationship diagram, the second control voltage V ctrl 2 Schematic diagram of the relationship between temperature and Figure 6 The schematic diagram of the relationship between insertion loss and temperature in the reference state and the schematic diagram of the relationship between attenuation and temperature in the attenuation state (taking a π-type 8dB attenuator as an example) are shown. In the schematic diagram of the relationship between insertion loss and temperature, the ordinate is insertion loss in dB, and the abscissa is temperature in °C; in the schematic diagram of the relationship between attenuation and temperature in the attenuation state, the ordinate is attenuation in dB, and the abscissa is temperature in °C; the abscissa and ordinate of the schematic diagram will not be described in detail below.

[0072] For the attenuator circuit, a bridge T-type attenuator (structure reference Figure 1 ), Figure 7 shows a first control voltage V ctrl_1 Schematic diagram of the relationship between the change of temperature and the second control voltage V ctrl_2Schematic diagram of the relationship with temperature change, Figure 8 A schematic diagram of the relationship between insertion loss and temperature in the reference state and a schematic diagram of the relationship between attenuation and temperature in the attenuation state are shown (taking a bridge T-type 4dB attenuator as an example).

[0073] The attenuator circuit is a T-type attenuator (refer to the structure Figure 1 ), Fig. 9 shows a first control voltage V ctrl_1 Schematic diagram of the relationship between the change of temperature and the second control voltage V ctrl_2 Schematic diagram of the relationship with temperature change, Fig.10 A schematic diagram of the relationship between insertion loss and temperature in the reference state and a schematic diagram of the relationship between attenuation and temperature in the attenuation state are shown (taking a T-type 4dB attenuator as an example).

[0074] For these three digitally controlled attenuators, for the reference state, the equivalent circuit of the attenuator circuit 104 is the parallel connection of R1 and Ron1. Among them, the resistance R1 increases approximately linearly with the increase of temperature. In order to ensure that the insertion loss remains unchanged, the on-resistance Ron1 of the first transistor M1 should be reduced with the increase of temperature. For the switching transistor, the larger the gate-drain voltage difference, the smaller the on-resistance. Therefore, the on-voltage of the first transistor M1 should be increased with the increase of temperature. The first relationship can be the first control voltage V ctrl_1 Increases with increasing temperature (e.g. Figure 5 / 7 / 9). The parallel resistance of R1 and Ron1 is Ron1 / / R1. In order to make Ron1 / / R1 not change with temperature, the relationship between R1 and temperature can be calculated, and then the required first control voltage V can be calculated. ctrl_1 In the reference state, the gate voltage of the first transistor M1 is the first control voltage V ctrl_1 , the curve is as Figure 5 As shown in FIG. 7 / 9, the gate voltage of the second transistor M2 is a second turn-off voltage, such as -2V, and the second transistor M2 is in a turn-off state.

[0075] Similarly, in order to make the equivalent resistance of the π-type attenuator not change with temperature, if the relationship between R1 and R2 with temperature is known, the relationship between the on-resistance Ron2 of the second transistor M2 and temperature can be calculated, and then the required second control voltage V ctrl_2 The second relationship varies with temperature. Figure 5 As shown, in this example, the second relationship is the second control voltage V ctrl_2 As the temperature increases, it decreases. In the attenuation state, the gate voltage of the second transistor M2 is the second control voltage V ctrl_2 , the curve is as Figure 5As shown; the gate voltage of the first transistor M1 is the first turn-off voltage, for example -2V (-2V is used as an example in the following), and the first transistor M1 is in the turn-off state.

[0076] In the embodiment of the present disclosure, taking the gate on voltage of each transistor as 2.5V as an example, compared with this, Figure 6 As shown in FIG. 8 and FIG. 10, a linearly increasing first control voltage V is applied to the first transistor M1 in the reference state. ctrl_1 The insertion loss can be made not to change with temperature; by applying a linearly decreasing second control voltage V to the second transistor M2 in the attenuation state ctrl_2 The attenuation can be made not to change with temperature. In the RF circuit, S parameters can be used to describe its input and output impedance, forward and reverse transfer functions. Among them, S21 is used to describe the forward transfer function of the circuit, and under certain conditions, it can also be understood as the gain of the circuit. For active circuits, the gain is usually positive, that is, the signal is amplified, and S21 is greater than 1; for passive circuits, the gain is usually negative, that is, the signal is attenuated, and S21 is less than 1.

[0077] Regarding the generation method of the first control voltage and the second control voltage, in some embodiments, Figure 4 On the basis of Fig.11 As shown, the digitally controlled attenuator 10 further includes a linear voltage generating circuit 105 for generating an initial linear voltage having a variable relationship with temperature;

[0078] The first voltage generating circuit 101 is used for receiving an initial linear voltage, and performing slope adjustment and intercept adjustment on the initial linear voltage according to a first relationship to generate a first control voltage;

[0079] The second voltage generating circuit 102 is used for receiving the initial linear voltage, and performing slope adjustment and intercept adjustment on the initial linear voltage according to the second relationship to generate a second control voltage.

[0080] It should be noted that the linear voltage generating circuit 105 can be a PTAT voltage generating circuit, wherein PTAT (Proportional to absolute temperature) is proportional to the absolute temperature, that is, the initial linear voltage (or PTAT voltage) is a voltage proportional to the absolute temperature. Based on the initial linear voltage, the first voltage generating circuit 101 is adjusted according to the first relationship to obtain a first control voltage having a first relationship with the temperature; the second voltage generating circuit 102 is adjusted according to the second relationship to obtain a second control voltage having a second relationship with the temperature. Alternatively, the linear voltage generating circuit can also be a complementary to absolute temperature (CTAT) voltage generating circuit, which is not specifically limited. In the embodiments of the present disclosure, only the PTAT voltage generating circuit is taken as an example.

[0081] exist Fig.11 Based on Fig.12 , wherein (a), (b), and (c) correspond to the connection diagrams of the attenuator circuit 10 when the attenuator circuit 104 is a π-type attenuator circuit, a bridge T-type attenuator circuit, and a T-type attenuator circuit, respectively. Fig.12 As shown, the digitally controlled attenuator 10 may further include a subtractor 106, which is located between the second voltage generating circuit 102 and the second switch S2. The subtractor 106 is used to change the trend of the second control voltage. The subtractor 106 is used to change the trend of the second control voltage changing with temperature. For example, the subtractor 106 may change the trend of the voltage increasing with increasing temperature to the trend of the voltage decreasing with increasing temperature, or the subtractor 106 may change the trend of the voltage decreasing with increasing temperature to the trend of the voltage increasing with increasing temperature.

[0082] It should be noted that in the embodiment of the present disclosure, one or both of the first voltage generating circuit 101 and the second voltage generating circuit 102 are slope intercept adjustment circuits. Fig.12 As shown, the linear voltage generating circuit is a PTAT voltage generating circuit, and the first voltage control circuit 101 and the second voltage control circuit 102 are both slope intercept adjustment circuits. At this time, the voltages output by the two have the same trend, such as both increase with temperature or both decrease with temperature. Figure 5For example, the first control voltage increases linearly with increasing temperature, and the second control voltage decreases linearly with increasing temperature. If the first voltage generating circuit 101 and the second voltage generating circuit 102 both generate circuits that increase linearly with temperature, a subtractor 106 is set between the second voltage generating circuit 102 and the second switch S2 to change the trend of the second control voltage from increasing linearly with temperature to decreasing linearly with temperature to meet actual needs.

[0083] Similarly, a circuit for changing the voltage trend may be provided between the first voltage generating circuit 101 and the first switch S1 in combination with actual conditions, which will not be described in detail here.

[0084] Further, taking the π-type attenuator as an example, Fig.13 FIG. 1 is a detailed structural diagram of the attenuator circuit 10 provided in an embodiment of the present disclosure. Fig.13 As shown, before generating the required bias voltage (ie, the first control voltage Vctrl_1 and the second control voltage Vctrl_2), an initial linear voltage V that is proportional to the absolute temperature is required. TC Taking the linear voltage generating circuit 105 as a PTAT voltage generating circuit as an example, the typical PTAT voltage generating circuit is composed of five NMOS tubes (M11, M12, M13, M14, M15), two triodes (Q11 and Q12), and two resistors (R11 and R12), and the connection method is as follows: Fig.13 As shown, no further details are given here, VDD represents the power supply voltage.

[0085] For PTAT voltage generation circuit, see Fig.14 , where (a) is a simplified schematic diagram of the PTAT voltage generation circuit. The collector currents of tubes Q1 and Q2 are nI0 and I0 respectively, so: V TC =V T lnn, where V T Represents thermal pressure drop, which is a constant related to temperature. Specifically: T is the absolute temperature, q is the electron charge, k is a constant, and n is the area ratio of the tube. It can be seen that V TC It is only proportional to temperature. (b) is a simple circuit that generates a current that is independent of the power supply. In this circuit, the final output current Iout is independent of the power supply voltage VDD. Based on (a) and (b), (c) is a circuit that generates a PTAT current. M11 and M12 are the same pair of transistors, M13, M14, and M15 are the same pair of transistors, the area of ​​Q11 is A, and the area of ​​Q12 is nA. To make the current I of M11 D1 Circuit I equal to M12 D2 , the voltage V at the X node must be guaranteed XEqual to the voltage V at the Y node Y , therefore, I D1 =I D2 =V T lnn / R 11 , here it can be understood that the voltage difference between the two ends of R11 is V T lnn, since M13, M14, and M15 are the same, then: I D1 =I D2 =I D5 =V T lnn / R 11 , I D5 represents the current of M5, that is, the PTAT current. Further, based on (c), as Fig.13 As shown in 105, the final output initial linear voltage is: V TC =(V T lnn) / R 21 / R 11 .

[0086] For the slope intercept adjustment circuit, in some embodiments, as Fig.13 As shown, the slope intercept adjustment circuit ( Fig.13 The first voltage generating circuit 101 or the second voltage generating circuit 102 in the embodiment includes a first bias circuit 1011 and a second bias circuit 1012; wherein:

[0087] The first bias circuit 1011 is used to receive the initial linear voltage V TC and the first voltage V R1 , change the initial linear voltage V TC The slope and intercept of O1 ;

[0088] The second bias circuit 1012 is used to receive the first bias voltage V O1 and the second voltage V R2 , change the first bias voltage V O1 The slope and intercept of are used to generate the first control voltage Vtrcl1 or the second control voltage Vctrl2.

[0089] It should be noted that if Fig.13 As shown, the first bias circuit 1011 includes a first operational amplifier A1 and a first resistor voltage divider network 1013. The positive phase input terminal of the first operational amplifier A1 receives the initial linear voltage. The output terminal of the first operational amplifier A1 is connected to the first resistor voltage divider network 1013. The negative phase input terminal of the first operational amplifier A1 is connected to the positive phase input terminal of the first operational amplifier A1 through the first resistor voltage divider network 1013. The first resistor voltage divider network 1013 may include a first resistor R 21 and the second resistor R22 The second bias circuit 1012 includes a second operational amplifier A2 and a second resistor voltage divider network 1014, the second resistor voltage divider network 1012 is connected to the output terminal of the first operational amplifier A1, the positive phase input terminal of the second operational amplifier A2 is connected to the second resistor voltage divider network 1012, the negative phase input terminal of the second operational amplifier A2 is connected to the positive phase input terminal of the second operational amplifier A2, and the second resistor voltage divider network 1014 may include a third resistor R 23 and the fourth resistor R 24 The subtractor 106 includes a differential amplifier circuit, which includes a third operational amplifier A3, a fifth resistor R 25 , the sixth resistor R 26 , the seventh resistor R 27 and the eighth resistor R 28 ;in:

[0090] The positive input terminal (+) of the first operational amplifier A1 receives the initial linear voltage V TC The output terminals of the first operational amplifier A1 are connected to the first resistor R 21 The first end of the third resistor R 23 The first end is connected to output a first bias voltage V O1 ; The first resistor R 21 The second end of the second resistor R 22 The first end of the first operational amplifier A1 is connected to the inverting input terminal (-); the second resistor R 22 The second end receives the first voltage V R1 ; The third resistor R 23 The second end of the fourth resistor R 24 The first end of the fourth resistor R 24 The second end receives the second voltage V R2 The output terminal of the second operational amplifier A2 is connected to the inverting input terminal of the second operational amplifier A2, and is used to output a first control voltage V trcl 1 or the second control voltage V ctrl 2.

[0091] Here, for the sake of distinction, in the case of the subtractor 106, the voltage output by the second voltage generating circuit 102 is recorded as the second bias voltage V O2 ;

[0092] The fifth resistor R 25 The first end receives the second bias voltage V O2 ; The fifth resistor R 25 The second end of the sixth resistor R 26The output end of the third operational amplifier A3 is connected to the sixth resistor R 26 The second end is connected to output a second control voltage Vctrl_2 ; The seventh resistor R 27 The first end of the eighth resistor R 28 The first end of the seventh resistor R is connected to the inverting input end of the third operational amplifier A3; 27 The second end receives the third voltage V R3 ; The eighth resistor R 28 The second end is grounded.

[0093] It should be noted that, for the first voltage generating circuit 101, the first voltage V R1 and the second voltage V R2 is a fixed voltage, the first resistor R 21 ~Fourth resistor R 24 The slope intercept generating circuit is formed by cascading two bias generating circuits, namely, the first bias circuit 1011 and the second bias circuit 1012. The first bias circuit 1011 generates a linear voltage with a slope greater than 1 (i.e., the first bias voltage V O1 ), whose expression is: The second bias circuit 1012 generates a linear voltage with a slope less than 1 (ie, the first control voltage V ctrl_1 ), whose expression is: Combining the above two formulas, finally, the slope intercept generation circuit

[0094] Generate a first control voltage V with adjustable slope and intercept ctrl_1 :

[0095] like Fig.15 As shown in FIG. 1 , (a), (b), and (c) are respectively the initial linear voltage V involved in the first voltage generating circuit 101 (ie, the slope intercept generating circuit). TC , the first bias voltage V O1 and the first control voltage V trcl_1 The relationship between the voltage value and temperature. Among them, the initial linear voltage V TC is a voltage that increases linearly with temperature. TC -The slope and intercept of the temperature curve are fixed. Fig.15 (a) is V TC The slope k0 and intercept a0 of the temperature variation curve are both constants; after passing through the two-stage bias circuit, the first control voltage V shown in (c) is generated. ctrl_1, whose slope is positive and adjustable, and whose intercept is adjustable; thus, by reasonably setting the first resistor R in the first voltage generating circuit 101 21 ~Fourth resistor R 24 The resistance value and the first voltage V R1 , the second voltage V R2 The voltage value can obtain the required first control voltage V ctrl_1 , and the first control voltage V can be adjusted according to the actual situation ctrl_1 The slope and intercept of the first control voltage V ctrl_1 The slope and intercept of the linear change with temperature are related to the resistance values ​​of the first resistor, the second resistor, the third resistor, and the fourth resistor, and are related to the voltage values ​​of the first voltage and the second voltage.

[0096] It should also be noted that if Fig.13 As shown, for the second voltage generating circuit 102 and the subtractor 106, the second voltage generating circuit 102 generates a second bias voltage V which increases linearly with increasing temperature. O2 , the subtractor 106 generates a voltage according to the second bias voltage V O2 Generates a second control voltage V that decreases linearly with increasing temperature ctrl_2 The structure and working principle of the slope intercept generating circuit (ie, the second voltage generating circuit 102) are consistent with the above. 25 ~The eighth resistor R 28 Also a fixed resistor, the third voltage V R3 The fifth resistor R25 and the seventh resistor R27 have the same resistance value, and the sixth resistor R26 and the eighth resistor R28 have the same resistance value.

[0097] The second voltage generating circuit 102 and the subtractor 106 can be considered as two bias circuits, which are cascaded to form the final output second control voltage V ctrl_2 The first bias generating circuit (second voltage generating circuit 102) generates a linear voltage (i.e., the second bias voltage V O2 ), whose expression is: The second stage bias generating circuit is a subtractor 106, which outputs a second control voltage V ctrl_2 The expression is: Finally, a second control voltage Vtrcl_2 is generated, which has an adjustable slope and an intercept and decreases with increasing temperature. The expression is:

[0098]

[0099] like Fig.16As shown in FIG. 1 , (a), (b), and (c) are respectively the initial linear voltage V involved in the second voltage generating circuit 102 and the subtractor 106. TC , the second bias voltage V O2 and the second control voltage V trcl_2 The relationship between the voltage value and temperature. (a) is the initial linear voltage V TC The slope k0 and intercept a0 of the temperature variation curve are both constants; (b) is the second bias voltage V O2 The slope of the temperature-varying curve is positive and adjustable, and the intercept is adjustable; (c) is the second control voltage V ctrl_2 The slope of the temperature-varying curve is negative and adjustable, and the intercept is adjustable. Reasonably set the first resistor R in the second voltage generating circuit 102 and the subtractor 106 21 ~The eighth resistor R 28 The resistance value and the first voltage V R1 ~The third voltage V R3 The voltage value of the second control voltage V ctrl_2 , and the second control voltage V can be adjusted according to the actual situation ctrl_2 The slope and intercept of .

[0100] It should also be noted that, for the first switch S1 and the second switch S2, Fig.12 Or as shown in 13, in some embodiments, the first switch S1 is used to receive the first state control signal C trl1 , based on the first state control signal C trl1 , the first control voltage V ctrl_1 Or the first off voltage V out1 Output to the gate of the first transistor M1;

[0101] The second switch S2 is used to receive the second state control signal C trl2 , based on the second state control signal C trl2 , the second control voltage V ctrl_2 Or the second cut-off voltage V out2 Output to the gate of the second transistor M2.

[0102] Specifically, the first switch S1 is used to control the signal C in the first state. trl1 When the first control voltage V ctrl_1 Output; and, in the first state control signal C trl1 When the first cut-off voltage V out1 Output;

[0103] The second switch S2 is used to control the signal C in the second state. trl2 When the second control voltage Vctrl_2 Output; and, in the second state control signal C trl2 When the second cut-off voltage V out2 Output.

[0104] Here, the first state control signal C trl1 and the second state control signal C trl2 It can be the same signal or different signals, used to indicate the working state of the digital controlled attenuator 10. For example, the first value indicates the reference state, the second value indicates the attenuation state, or vice versa, which is not specifically limited. Among them, the first value can be a high level of logic 1, the second value can be a low level of logic 0, or vice versa or other values, which is not specifically limited here.

[0105] Thus, the first switch S1 and the second switch S2 are selective output devices, specifically selectors, etc. In different working states, the first switch S1 and the second switch S2 are controlled to output the required voltage to the gate of the corresponding transistor to ensure the normal operation of the digital controlled attenuator.

[0106] In some embodiments, the attenuator circuit 104 is a π-type digitally controlled attenuator, such as Fig.12 As shown in (a), the resistance attenuation network includes two resistors R2, the two resistors R2 are respectively connected in series with two second transistors M2, a branch formed by one resistor R2 and one second transistor M2 is connected between the signal input terminal and the ground, and another resistor R2 and another second transistor M2 form a branch connected between the signal output terminal and the ground. The attenuator circuit 104 may also include a resistor R1, which is connected between the signal input terminal and the signal output terminal.

[0107] In some embodiments, the attenuator circuit 104 is a bridge-T type digitally controlled attenuator, such as Fig.12 As shown in (b), the resistance attenuation network includes a resistor R1, a resistor R2, and two resistors Z0, wherein the resistor R1 is connected between the signal input terminal and the signal output terminal, the two resistors Z0 are connected in series between the signal input terminal and the signal output terminal, and after the resistor R2 is connected in series with the second transistor M2, one end is connected between the two resistors Z0, and the other end is grounded.

[0108] In some embodiments, the attenuator circuit 104 is a T-type digitally controlled attenuator, such as Fig.12 As shown in (c), the resistance attenuation network includes two resistors R1 and a resistor R2, wherein the two resistors R1 are connected in series between the signal input terminal and the signal output terminal, and after the resistor R2 is connected in series with the second transistor M2, one end is connected between the two resistors R1 and the other end is grounded.

[0109] Furthermore, in some embodiments, the resistor in the resistance attenuation network may be a MOS transistor, and a gate of the MOS transistor receives a third control voltage, and the third control voltage has a third relationship with temperature.

[0110] The third relationship is complementary to the relationship between the change in the equivalent resistance of the second transistor M2 in the attenuation state and the temperature, so that in the attenuation state, the resistance change of the resistance attenuation network 1041 and the second transistor M2 can be complementary, so that the sum of the on-resistance of the second transistor M2 and the equivalent resistance of the resistance attenuation network 1041 in the attenuation state remains unchanged at different temperatures.

[0111] It should be noted that any one or more resistors in the resistor attenuation network can be implemented by MOS tubes, so that the on-resistance of the MOS tube can be controlled to be stable with temperature by a third control voltage, so as to stabilize the insertion loss and attenuation of the digitally controlled attenuator.

[0112] For example Fig.17 As shown, the resistor R2 connected in series with the second transistor M2 is implemented by a MOS tube (here an NMOS tube is taken as an example, but it can also be a PMOS tube, which is not specifically limited). ctrl_R2 In this example, the on-resistance Ron1 of the first transistor M1, the on-resistance Ron2 of the second transistor M2, and the resistor R2 are controlled to ensure that the performance of the digital controlled attenuator does not change with temperature. The on-resistance Ron1 of the first transistor M1, the on-resistance Ron2 of the second transistor M2, and the resistor R2 are all adjustable, and the variable resistor R2 is implemented by a switching transistor (MOS tube). By controlling the first control voltage V ctrl_1 , the second control voltage V ctrl_2 and the third control voltage V ctrl_R2 The on-resistance Ron1 of the first transistor M1 , the on-resistance Ron2 of the second transistor M2 , and the resistor R2 are adjusted.

[0113] Specifically, when the attenuator circuit 104 is in the reference state, the gate bias voltage of the second transistor M2 is the second off-state voltage, and the gate bias voltage of the first transistor M1 is the first control voltage V that varies with temperature. ctrl_1 , the gate bias voltage of resistor R2 is a third control voltage V that varies with temperature ctrl_R2 When the attenuator is in the attenuation state, the gate bias voltage of the first transistor M1 is the first off voltage, and the gate bias voltage of the second transistor M2 is the second control voltage V that varies with temperature. ctrl_2 , the gate bias voltage of resistor R2 is a third control voltage V that varies with temperature ctrl_R2 The following describes the three types of attenuators:

[0114] For a π-type attenuator, Fig.18 shows a first control voltage V ctrl_1 Schematic diagram of the relationship between the change of temperature and the second control voltage V ctrl_2 Schematic diagram of the relationship between the change of the third control voltage V ctrl_R2 Schematic diagram of the relationship with temperature change, Fig.19 A schematic diagram of the relationship between insertion loss and temperature in the reference state and a schematic diagram of the relationship between attenuation and temperature in the attenuation state are shown (taking a π-type 8dB attenuator as an example).

[0115] For the Bridge-T attenuator, Fig. 20 shows a first control voltage V ctrl_1 Schematic diagram of the relationship between the change of temperature and the second control voltage V ctrl_2 Schematic diagram of the relationship between the change of the third control voltage V ctrl_R2 Schematic diagram of the relationship with temperature change, Fig.21 A schematic diagram of the relationship between insertion loss and temperature in the reference state and a schematic diagram of the relationship between attenuation and temperature in the attenuation state are shown (taking a bridge T-type 4dB attenuator as an example).

[0116] For a T-type attenuator, Fig. 22 shows a first control voltage V ctrl_1 Schematic diagram of the relationship between the change of temperature and the second control voltage V ctrl_2 Schematic diagram of the relationship between the change of the third control voltage V ctrl_R2 Schematic diagram of the relationship with temperature change, Fig.23 A schematic diagram of the relationship between insertion loss and temperature in the reference state and a schematic diagram of the relationship between attenuation and temperature in the attenuation state are shown (taking a T-type 4dB attenuator as an example).

[0117] It should be noted that the second control voltage V ctrl_2 and the third control voltage V ctrl_R2 There are many different trend combinations and the associated figure is just one example of this type of attenuator.

[0118] In the attenuation state, the gate voltage of the resistor R2 is the third control voltage V ctrl_R2 , the gate voltage of the second transistor M2 is the second control voltage V ctrl_2 , the curve is as Fig.18 / 20 / 22, the gate voltage of the first transistor M1 is -2V, which is in the off state. It can be seen that by applying a first control voltage V linearly increasing with temperature to the first transistor M1 in the reference state, ctrl_1 The insertion loss can be made not to change with temperature; by applying a third control voltage V which increases linearly with temperature to the resistor R2 in the attenuation state ctrl_R2Applying a second control voltage Vctrl_2 that decreases linearly with temperature to the second transistor M2 can make the attenuation not change with temperature. It can be seen that the third relationship can be that the third control voltage increases with increasing temperature.

[0119] Further, the third control voltage may be generated by a third voltage generating circuit. Fig.24 As shown, the digitally controlled attenuator 10 may further include a third voltage generating circuit 103, which is used to generate a third control voltage having a third relationship with the temperature. Here, the third control voltage is generated in the same manner as the first control voltage, that is, the third voltage generating circuit 103 is used to receive the initial linear voltage, and perform slope adjustment and intercept adjustment on the initial linear voltage according to the third relationship to generate the third control voltage.

[0120] exist Fig.24 On the basis of Fig.25 As shown, the third voltage generating circuit 103 may also be a slope intercept adjusting circuit. Here, the structure of the slope intercept adjusting circuit may still refer to the aforementioned Fig.13 The corresponding curve of temperature and voltage for generating the third voltage can still be referred to Fig.15 .like Fig.15 As shown, for the initial linear voltage V TC After passing through the two-stage bias circuit, the third control voltage V shown in Figure (c) is generated. ctrl_R2 , whose slope is positive and adjustable, and whose intercept is adjustable; by reasonably setting the first resistor R in the third voltage generating circuit 103 21 ~Fourth resistor R 24 The resistance value and the first voltage V R1 , the second voltage V R2 The voltage value can obtain the required third control voltage V ctrl_R2 , and the third control voltage V can be adjusted according to the actual situation ctrl_R2 The slope and intercept of the voltage.

[0121] Furthermore, on the basis that the resistance attenuation network includes a MOS tube, the embodiment of the present disclosure can also only control the resistance of the first transistor M1 and the resistor R2. Fig.26 As shown, in this case, the digital controlled attenuator includes a first voltage generating circuit 101, a third voltage generating circuit 103, an attenuator circuit 104, a first switch S1 and a second switch S2; and may also include a linear voltage generating circuit 105 for providing an initial linear voltage. The second on-voltage is a fixed voltage for turning on the second switch S2, such as 2.5V as shown in the above figure.

[0122] In this example, the on-resistance Ron1 of the first transistor M1 and the resistor R2 are adjustable, wherein the variable resistor R2 is implemented by a switch transistor, and the on-resistance Ron1 and the resistor R2 are adjustable by controlling the first control voltage V ctrl_1 and the third control voltage V ctrl_R2 The on-resistance Ron1 and R2 of the first transistor M1 are adjusted. When the attenuator is in the reference state, the gate bias voltage of the resistor R2 is the off voltage, and the gate bias voltage of the first transistor M1 is the first control voltage V that varies with temperature. ctrl_1 When the attenuator is in the attenuation state, the gate bias voltage of the first transistor M1 is the first off voltage, and the gate bias voltage of the resistor R2 is the third control voltage V that varies with temperature. ctrl_R2 The following describes the three types of attenuators separately:

[0123] For a π-type attenuator, Fig. 27 shows a first control voltage V ctrl_1 Schematic diagram of the relationship between the change of the third control voltage V ctrl_R2 Schematic diagram of the relationship with temperature change, Fig.28 A schematic diagram of the relationship between insertion loss and temperature in the reference state and a schematic diagram of the relationship between attenuation and temperature in the attenuation state are shown (taking a π-type 8dB attenuator as an example).

[0124] For the Bridge-T attenuator, Fig.29 shows a first control voltage V ctrl_1 Schematic diagram of the relationship between the change of the third control voltage V ctrl_R2 Schematic diagram of the relationship with temperature change, Fig.30 A schematic diagram of the relationship between insertion loss and temperature in the reference state and a schematic diagram of the relationship between attenuation and temperature in the attenuation state are shown (taking a bridge T-type 4dB attenuator as an example).

[0125] For a T-type attenuator, Fig.31 The schematic diagram shows the relationship between the first control voltage Vctrl_1 and the temperature, the third control voltage V ctrl_R2 Schematic diagram of the relationship with temperature change, Fig.32 A schematic diagram of the relationship between insertion loss and temperature in the reference state and a schematic diagram of the relationship between attenuation and temperature in the attenuation state are shown (taking a T-type 4dB attenuator as an example).

[0126] For the three attenuators, it can be seen that in the reference state, the gate voltage of the first transistor M1 is the first control voltage V ctrl_1 The curves are as follows Fig. 27 / 29 / 31, the gate voltage of the second transistor M2 is -2V, and the second transistor M2 is in the off state. In the attenuation state, the gate voltage of the resistor R2 is the third control voltage V ctrl_R2 , the curve is as Fig. 27 / 29 / 31; the gate voltage of the second transistor M2 is 2.5V, the second transistor M2 is in the on state, and the gate voltage of the first transistor M1 is -2V, which is in the off state. Fig.28 As shown in / 30 / 32, by applying a linearly increasing first control voltage V to the first transistor M1 in the reference state, ctrl_1 The insertion loss can be made not to change with temperature; by applying a linearly decreasing third control voltage V to the resistor R2 in the attenuation state ctrl_R2 This makes the attenuation independent of temperature.

[0127] For different types of attenuators, their connection relationships are as follows: Fig.33 As shown. Wherein, Von2 represents the second on-voltage.

[0128] In summary, in order to make the digital controlled attenuator maintain the same attenuation accuracy under high and low temperature conditions, the disclosed embodiment provides a digital controlled attenuator whose performance does not drift with temperature, and provides at least three feasible solutions, by controlling the on-resistance of the switch transistor (i.e., the first transistor and the second transistor) of the attenuator, and changing the fixed resistance of the attenuation branch (i.e., the resistance attenuation network) to compensate for the temperature drift of the insertion loss and attenuation, so as to achieve the effect that the insertion loss and attenuation of a single attenuation unit do not change with temperature. This is conducive to ensuring the performance consistency of the chip under different temperature environments, without the need for additional feedback networks or compensation of other attenuation units, and without the need for additional digital control signals, thus reducing the design cost of the chip.

[0129] The above description is only a preferred embodiment of the present disclosure and is not intended to limit the protection scope of the present disclosure.

[0130] It should be noted that in the present disclosure, the terms "include", "comprises" or any other variants thereof are intended to cover non-exclusive inclusion, so that a process, method, article or device including a series of elements includes not only those elements, but also includes other elements not explicitly listed, or also includes elements inherent to such process, method, article or device. In the absence of further restrictions, an element defined by the sentence "includes a ..." does not exclude the existence of other identical elements in the process, method, article or device including the element.

[0131] The serial numbers of the above-mentioned embodiments of the present disclosure are only for description and do not represent the advantages or disadvantages of the embodiments.

[0132] The methods disclosed in several method embodiments provided in the present disclosure can be arbitrarily combined without conflict to obtain new method embodiments.

[0133] The features disclosed in several product embodiments provided in the present disclosure can be arbitrarily combined without conflict to obtain new product embodiments.

[0134] The features disclosed in several method or device embodiments provided in the present disclosure may be arbitrarily combined without conflict to obtain new method embodiments or device embodiments.

[0135] The above is only a specific embodiment of the present disclosure, but the protection scope of the present disclosure is not limited thereto. Any person skilled in the art who is familiar with the technical field can easily think of changes or substitutions within the technical scope disclosed in the present disclosure, which should be included in the protection scope of the present disclosure. Therefore, the protection scope of the present disclosure should be based on the protection scope of the claims.

Claims

1. A digitally controlled attenuator with temperature compensation, characterized in that: The invention comprises an attenuator circuit and at least one of a first voltage generating circuit or a second voltage generating circuit, wherein: The attenuator circuit includes a first transistor, a resistance attenuation network, and a second transistor, wherein the first transistor is connected in parallel with the resistance attenuation network, and the second transistor is connected in series with the resistance attenuation network; The first voltage generating circuit is used to generate a first control voltage having a first relationship with temperature, wherein the relationship between the change in the equivalent resistance value of the resistance attenuation network in the reference state of the digitally controlled attenuator and the temperature is complementary to the first relationship; The second voltage generating circuit is used to generate a second control voltage having a second relationship with temperature, wherein the relationship between the change in the equivalent resistance value of the resistance attenuation network in the attenuation state of the digitally controlled attenuator and the temperature is complementary to the second relationship; The gate of the first transistor is connected to the first voltage generating circuit via a first switch, and the first switch is used to output the first control voltage or the first shutdown voltage to the gate of the first transistor; The gate of the second transistor is connected to the second voltage generating circuit via a second switch, and the second switch is used to output the second control voltage or the second shutdown voltage to the gate of the second transistor.

2. The digital controlled attenuator according to claim 1, characterized in that: The digital controlled attenuator further comprises a linear voltage generating circuit for generating an initial linear voltage having a linear variation relationship with temperature; The first voltage generating circuit is configured to receive the initial linear voltage, and perform slope adjustment and intercept adjustment on the initial linear voltage according to the first relationship to generate the first control voltage; The second voltage generating circuit is used to receive the initial linear voltage, and perform slope adjustment and intercept adjustment on the initial linear voltage according to the second relationship to generate the second control voltage.

3. The digital controlled attenuator according to claim 1, characterized in that: The digitally controlled attenuator further comprises a third voltage generating circuit for generating a third control voltage having a third relationship with temperature, wherein the relationship between the change in the equivalent resistance value of the second transistor in the attenuation state of the digitally controlled attenuator and the temperature is complementary to the third relationship; The resistance attenuation network includes at least one resistor, the resistor is a MOS tube, and a gate of the MOS tube receives the third control voltage.

4. The digital controlled attenuator according to claim 3, characterized in that: The digital controlled attenuator further comprises a linear voltage generating circuit for generating an initial linear voltage having a linear variation relationship with temperature; The third voltage generating circuit is used to receive the initial linear voltage, perform slope adjustment and intercept adjustment on the initial linear voltage according to the third relationship, and generate the third control voltage.

5. The digital controlled attenuator according to claim 2 or 4, characterized in that: The linear voltage generating circuit includes a PTAT voltage generating circuit.

6. The digitally controlled attenuator according to claim 5, characterized in that: The digitally controlled attenuator further includes a subtractor located between the second voltage generating circuit and the second switch.

7. The digitally controlled attenuator according to claim 6, characterized in that: The subtractor includes a differential amplifier circuit.

8. The digital controlled attenuator according to claim 2, characterized in that: Any one or more of the first voltage generating circuit or the second voltage generating circuit is a slope intercept adjustment circuit; the slope intercept adjustment circuit includes a first bias circuit and a second bias circuit; wherein: The first bias circuit includes a first operational amplifier and a first resistor voltage divider network, a non-inverting input terminal of the first operational amplifier receives the initial linear voltage, an output terminal of the first operational amplifier is connected to the first resistor voltage divider network, and a negative input terminal of the first operational amplifier is connected to a positive input terminal of the first operational amplifier through the first resistor voltage divider network; The second bias circuit includes a second operational amplifier and a second resistor voltage divider network, the second resistor voltage divider network is connected to the output end of the first operational amplifier, the positive phase input end of the second operational amplifier is connected to the second resistor voltage divider network, and the negative phase input end of the second operational amplifier is connected to the positive phase input end of the second operational amplifier.

9. The digitally controlled attenuator according to claim 1, characterized in that: The first switch is configured to receive a first state control signal, and output the first control voltage or the first off voltage to the gate of the first transistor based on the first state control signal; The second switch is used to receive a second state control signal, and output the second control voltage or the second turn-off voltage to the gate of the second transistor based on the second state control signal.

10. The digitally controlled attenuator according to claim 1, characterized in that: The attenuator circuit is a T-type attenuator circuit, a bridge T-type attenuator circuit or a π-type attenuator circuit.

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