Chip carrier frame capable of accurately positioning and semiconductor package
By using the first and second joints in the chip carrier frame to fix the connection between the wiring part and the positioning part, the problem of wiring part offset in the prior art is solved, and the stability of chip connection and product quality are improved.
Patent Information
- Application Number
- CN202421585361.2
- Authority / Receiving Office
- CN · China
- Patent Type
- Utility models(China)
- Current Assignee / Owner
- Filing Date
- 2024-07-05
- Publication Date
- 2025-05-09
- Estimated Expiration
- 2034-07-05
AI Technical Summary
During the welding lead or injection molding packaging of existing chip carrier frames, the wiring part is prone to offset, resulting in inaccurate positioning and affecting the stability of chip connection and product quality.
By introducing a first joint into the chip carrier frame, the wiring part is fixedly connected to the carrier table, and the positioning part is fixedly connected to the carrier table through the second joint to ensure the precise positioning of the wiring part and the positioning part.
The precise positioning of the wiring part is achieved, avoiding deviation during welding or injection molding, improving the stability of the wiring part and chip connection, thereby improving the quality of the product.
Smart Images

Figure CN222851433U_ABST
Abstract
Description
Technical Field
[0001] The utility model relates to the technical field of electronic components, and in particular to a chip carrier frame and semiconductor package that can be precisely positioned. Background Art
[0002] Chip carrier frames are widely used in the packaging of integrated circuits (ICs), discrete components and other electronic components, that is, the chip carrier frame and the chip are packaged in a package base, and the package base is used to protect the chip. With the continuous development of microelectronics technology, the size of semiconductor packages is getting smaller and smaller, which requires the size of the chip carrier frame to be smaller and smaller. The chip carrier frame provides mechanical support and electrical connection for the chip, and connects the chip to the external circuit. The chip carrier frame includes a wiring part, a positioning part and a carrier platform. The carrier platform is used to carry the chip. One end of the wiring part is connected to the chip through a lead, and the other end of the wiring part is connected to the external circuit.
[0003] In the prior art, the wiring part and the carrier are spaced apart, that is, the wiring part is suspended. As the size of the wire frame decreases, the structural strength of the wiring part will also weaken. When the wiring part is subjected to external force, it is easy to cause deformation, especially in the process of welding the leads or the process of packaging by injection molding the packaging base, the wiring part is easy to deviate in the up and down or left and right directions, and it is difficult to achieve accurate positioning between the wiring part and the carrier, which will also affect the connection stability of the chip and the quality of the product. The wiring part and the positioning part are connected together by a material strip, and the positioning part and the carrier are fixed by riveting through rivets and rivets. Due to assembly requirements and dimensional tolerances, the size of the rivet hole is usually larger than that of the loose rivet. There will be a matching gap between the rivet hole and the rivet after riveting. In this way, during the process of fixing and matching the chip and the carrier or the process of packaging by injection molding the packaging base, the carrier will be offset relative to the wiring part and the positioning part, which will seriously affect the connection stability of the chip and the yield of the product.
[0004] Therefore, the existing chip carrier framework needs to be improved. Summary of the invention
[0005] The purpose of the utility model is to provide a chip carrier frame and semiconductor package that can be accurately positioned, which can prevent the wiring part from being offset during the process of welding leads or the process of packaging by injection molding the packaging base, thereby achieving accurate positioning, and can also prevent the carrier from being offset relative to the wiring part and the positioning part, thereby improving the stability of the connection between the wiring part and the chip, and thus improving the quality of the product.
[0006] The purpose of the utility model is achieved by the following technical solutions:
[0007] A chip carrier frame capable of accurate positioning, comprising:
[0008] A frame body, the frame body comprising a wiring portion and a positioning portion;
[0009] A carrier platform, the carrier platform is used to carry a chip, the wiring portion and the positioning portion are arranged around the carrier platform, the wiring portion and the carrier platform are spaced apart, the wiring portion and the carrier platform are fixedly connected via a first combining portion, the positioning portion and the carrier platform are fixedly connected via a second combining portion, at least a portion of the surface of the wiring portion is exposed from the first combining portion, so that the wiring portion and the chip are connected via leads.
[0010] Preferably, a welding part is provided on the wiring part, and the welding part is fixedly connected to the supporting platform through the first bonding part, and at least part of the surface of the welding part is exposed from the first bonding part, so that the welding part is connected to the chip through leads.
[0011] Preferably, the number of the positioning parts is four, and the four positioning parts are respectively arranged near the four corners of the supporting platform; and / or,
[0012] The number of the welding parts is one or more. When the number of the welding parts is multiple, the multiple welding parts are arranged at intervals, the number of the first connecting parts is equal to the number of the welding parts, and the multiple first connecting parts are arranged one by one with the multiple welding parts.
[0013] Preferably, a first welding layer is provided on the surface of the welding portion; and / or,
[0014] A second welding layer is provided at a position corresponding to the chip on the carrier platform to increase the bonding force between the carrier platform and the chip; and / or,
[0015] The upper surface of the welding portion exposed from the first bonding portion is flush with the upper surface of the chip to shorten the length of the lead; and / or,
[0016] The upper surface of the first combining portion is flush with the upper surface of the welding portion.
[0017] Preferably, the projection area of the second welding layer on the carrier is larger than the projection area of the chip on the carrier; and / or,
[0018] The thickness of the second welding layer is 1 to 20 μm; and / or,
[0019] The second welding layer is a gold-tin alloy layer.
[0020] Preferably, a penetrating first accommodating groove is provided on the welding portion, and part of the first combining portion is filled in the first accommodating groove to increase the bonding force between the first combining portion and the welding portion; and / or,
[0021] A second receiving groove is provided on the carrying platform, and part of the first combining portion is filled in the second receiving groove to increase the combining force between the first combining portion and the carrying platform; and / or,
[0022] The carrying platform is provided with a third receiving groove, and part of the second combining portion is filled in the third receiving groove to increase the combining force between the second combining portion and the carrying platform.
[0023] Preferably, the material of the first combining part and the material of the second combining part are both thermoplastic materials, the thermoplastic material is polyphenylene sulfide material, the first combining part is connected to the wiring part and the supporting platform as a whole by injection molding, the first combining part is simultaneously covered on the lower surface of the welding part and the two outer side surfaces of the welding part, and the upper surface of the welding part and the front end surface of the welding part are simultaneously exposed to the first combining part, and the second combining part is connected to the positioning part and the supporting platform as a whole by injection molding.
[0024] Preferably, the first combining portion and the second combining portion are spaced apart from each other, or the first combining portion and the second combining portion are connected end to end; and / or,
[0025] The wiring portion and the positioning portion are connected to the same material strip; or,
[0026] The connection portion and the positioning portion are cut from the same material strip.
[0027] Preferably, the carrier platform has a first side and a second side opposite to each other, the first side of the carrier platform and the second side of the carrier platform are both provided with the first combining portion, a receiving space is formed between the first combining portion located on the first side of the carrier platform and the first combining portion located on the second side of the carrier platform, and the chip is arranged in the receiving space.
[0028] A semiconductor package comprises a chip carrier frame, a chip and a package base as described in any one of the above items, wherein the chip is arranged on a carrier platform of the chip carrier frame, the package base covers at least part of the chip and at least part of the chip carrier frame, at least part of the wiring portion is exposed from the package base, the package base is formed by injection molding, and the material of the package base is a thermosetting material, and the thermosetting material is a thermosetting resin.
[0029] Compared with the prior art, the beneficial effects of the present invention include at least:
[0030] The chip carrier frame and semiconductor package of the utility model that can be precisely positioned, the wiring part is fixedly connected to the carrier platform through the first joint part, which not only accurately positions the wiring part, avoiding the wiring part from being offset in the up-down direction or the front-back-left-right direction during the process of welding the leads or the process of encapsulating the package base by injection molding, but also ensures the flatness of the wiring part, improves the stability of the connection between the wiring part and the chip, and thus improves the quality of the product. Compared with the riveting method, the positioning part is fixedly connected to the carrier platform through the second joint part, which can avoid the positional offset of the carrier platform relative to the wiring part and the positioning part during the process of fixing the chip and the carrier platform or the process of encapsulating the package base by injection molding, improves the stability of the connection between the wiring part and the chip, and thus improves the quality of the product. BRIEF DESCRIPTION OF THE DRAWINGS
[0031] Figure 1 It is a three-dimensional structural schematic diagram of the frame body in the embodiment of the utility model.
[0032] Figure 2 yes Figure 1 A local enlarged schematic diagram of point A in the middle.
[0033] Figure 3 It is a schematic diagram of the three-dimensional structure of the supporting platform in the embodiment of the utility model.
[0034] Figure 4 It is a three-dimensional structural schematic diagram of a semiconductor package according to an embodiment of the utility model.
[0035] Figure 5 It is a schematic diagram of the planar structure of a semiconductor package according to an embodiment of the utility model.
[0036] Figure 6 yes Figure 5 Schematic diagram of the cross section along the AA direction.
[0037] Figure 7 It is a schematic diagram of the three-dimensional structure of the semiconductor package of the embodiment of the utility model when no package base is provided.
[0038] Figure 8 It is a schematic diagram of the planar structure of the semiconductor package of the embodiment of the utility model when no package base is provided.
[0039] Fig. 9 yes Figure 8 Schematic diagram of the cross section along direction BB.
[0040] In the figure: 100, semiconductor package; 1, chip carrier frame; 11, frame body; 111, wiring portion; 1111, welding portion; 1112, first welding layer; 1113, first receiving groove; 112, positioning portion; 113, material strip; 12, carrier platform; 121, first surface; 122, second surface; 123, first side; 124, second side; 125, second welding layer; 126, second receiving groove; 127, third receiving groove; 13, first combining portion; 14, second combining portion; 2, chip; 3, package base. DETAILED DESCRIPTION
[0041] Example embodiments will now be described more fully with reference to the accompanying drawings. However, example embodiments can be implemented in a variety of forms and should not be construed as limited to the embodiments set forth herein; rather, these embodiments are provided to make the present invention more comprehensive and complete and to fully convey the concepts of example embodiments to those skilled in the art. The same reference numerals in the figures represent the same or similar structures, and thus their repeated description will be omitted.
[0042] The words expressing positions and directions described in the present utility model are all explained by taking the drawings as examples, but they can be changed as needed, and all the changes are included in the protection scope of the present utility model.
[0043] Reference Figures 1 to 9 The utility model provides a chip carrier frame 1 that can be accurately positioned. The chip carrier frame 1 is used to install a chip 2. The chip carrier frame 1 includes: a frame body 11 and a carrier platform 12. The chip 2 can be set on the carrier platform 12.
[0044] Reference Figure 1 , Figure 2 , Figure 7 The frame body 11 may include a wiring portion 111 and a positioning portion 112. One end of the wiring portion 111 may be electrically connected to the chip 2 through a lead (not shown), such as a gold wire, and the other end of the wiring portion 111 may be electrically connected to an external circuit, such as a circuit board. The chip 2 is electrically connected to the wiring portion 111 through the lead, and then electrically connected to the external circuit through the wiring portion 111, so that the chip 2 and the external circuit can communicate with each other. The number of the wiring portion 111 may be one or more, and each wiring portion 111 may be connected to one or more leads.
[0045] The connection portion 111 is preferably made of a conductive material, more preferably a metal material or an alloy material. The material of the positioning portion 112 can be the same as or different from that of the connection portion 111 . In this embodiment, the material of the positioning portion 112 is the same as that of the connection portion 111 .
[0046] The wiring portion 111 and the positioning portion 112 can be connected to the same material strip 113, and the material strip 113 can connect the wiring portion 111 and the positioning portion 112 together, which not only facilitates automated production and improves production efficiency, but also avoids positional deviation of the wiring portion 111 and the positioning portion 112 during the manufacturing process.
[0047] Reference Figure 1 , Figure 2 The connection portion 111 and the positioning portion 112 can also be cut from the same material strip 113, which can further improve the position accuracy of the connection portion 111 and the positioning portion 112. The cutting method includes one or more of laser cutting, punching cutting, etc.
[0048] As a preferred embodiment, the upper surface of the welding part 1111 of the wiring part 111 is flush with the upper surface of the positioning part 112, that is, the upper surface of the welding part 1111 of the wiring part 111 is coplanar with the upper surface of the positioning part 112, so that the thickness of the chip carrier frame 1 can be reduced as a whole, which is conducive to the development trend of thinning and miniaturization of the semiconductor package 100. The wiring part 111 can be a flat plate structure as a whole, and the positioning part 112 can also be a flat plate structure as a whole. The thickness of the wiring part 111 and the thickness of the positioning part 112 are preferably the same or substantially the same, which is easier to manufacture, can reduce manufacturing costs and is easy to control accuracy.
[0049] Reference Figure 3 , Figure 7 The whole of the carrier 12 can be a rectangular parallelepiped, and of course it can be set to other shapes as needed. In this embodiment, the carrier 12 is a rectangular parallelepiped as a whole, and the carrier 12 has a first surface 121 and a second surface 122 that are arranged opposite to each other. The first surface 121 and the second surface 122 are preferably two surfaces with larger areas on the carrier 12. The chip 2 can be arranged on the first surface 121 of the carrier 12. The carrier 12 is used to carry the chip 2 and provide support for the chip 2. The chip 2 is preferably arranged near the center of the carrier 12.
[0050] The wiring portion 111 can be arranged around the carrier 12 and spaced apart from the carrier 12, and the positioning portion 112 can be arranged around the carrier 12 and spaced apart from the carrier 12. The wiring portion 111 can be arranged around the chip 2, and one end of the wiring portion 111 connected to the lead is preferably arranged close to the chip 2, which can shorten the distance between the wiring portion 111 and the chip 2, thereby shortening the length of the lead.
[0051] The positioning portion 112 is placed above the first surface 121 of the carrier 12, and the positioning portion 112 can also be placed close to the carrier 12. The wiring portion 111 and the carrier 12 can be fixedly connected through the first bonding portion 13, and the positioning portion 112 and the carrier 12 can be fixedly connected through the second bonding portion 14, and at least part of the surface of the wiring portion 111 is exposed from the first bonding portion 13, so that the wiring portion 111 and the chip 2 are electrically connected through the leads, ensuring that the wiring portion 111 and the chip 2 are electrically connected through the leads.
[0052] The carrier 12 has a certain structural strength to ensure that the carrier 12 can provide stable support for the chip 2 and ensure the stability of the position of the chip 2. The carrier 12 is preferably made of a material with high thermal conductivity, thereby improving the heat dissipation effect of the carrier 12, and then dissipating the heat generated by the chip 2 when it is working, ensuring that the chip 2 can operate normally. The material of the carrier 12 can be a metal material, and the material of the carrier 12 can also be a non-metallic material.
[0053] Reference Figure 3 , Figure 7 The carrier 12 has a first side 123 and a second side 124 opposite to each other. The first side 123 and the second side 124 of the carrier 12 can both be provided with a first coupling portion 13. A receiving space (not shown) can be formed between the first coupling portion 13 located at the first side 123 of the carrier 12 and the first coupling portion 13 located at the second side 124 of the carrier 12. The chip 2 can be provided in the receiving space, that is, the chip 2 is provided between the first side 123 of the carrier 12 and the second side 124 of the carrier 12. The first coupling portion 13 located at the first side 123 of the carrier 12 and the first coupling portion 13 located at the second side 124 of the carrier 12 can position the chip 2, facilitate the installation of the chip 2, and improve the accuracy of the installation position of the chip 2.
[0054] The number of the first combining parts 13 may be one or more, the number of the first combining parts 13 located on the first side 123 of the supporting platform 12 may be one or more, the number of the first combining parts 13 located on the second side 124 of the supporting platform 12 may also be one or more, and the first combining parts 13 located on the first side 123 of the supporting platform 12 and the first combining parts 13 located on the second side 124 of the supporting platform 12 may also be interconnected to form a whole.
[0055] The number of the positioning parts 112 is preferably four, and the four positioning parts 112 can be respectively arranged near the four corners of the carrying platform 12. Correspondingly, the number of the second combining parts 14 is four, and the four second combining parts 14 are respectively arranged near the four corners of the carrying platform 12. The second combining parts 14 can be arranged independently of each other, that is, the first combining part 13 and the second combining part 14 are arranged at intervals from each other. The second combining parts 14 can also be arranged in connection with each other, which can enhance the bonding force between the second combining part 14 and the carrying platform 12. The second combining part 14 can also be connected to the adjacent first combining part 13, that is, the first combining part 13 and the second combining part 14 are arranged end to end, which can simultaneously enhance the bonding force between the second combining part 14 and the first combining part 13 and the carrying platform 12.
[0056] The first joint part 13 and the second joint part 14 are preferably made of the same material. The first joint part 13 can be connected to the wiring part 111 and the carrier 12 as a whole by injection molding, and the second joint part 14 can be connected to the positioning part 112 and the carrier 12 as a whole by injection molding. The first joint part 13 can be simultaneously covered on the lower surface of the welding part 1111 and the two outer side surfaces of the welding part 1111, and the upper surface of the welding part 1111 and the front end surface of the welding part 1111 are simultaneously exposed to the first joint part 13. The lower surface of the welding part 1111 and the two outer side surfaces of the welding part 1111 are covered by the first joint part 13, which can ensure the electrical insulation performance between the welding part 1111 and the carrier 12 and the adjacent welding parts 1111. The upper surface of the welding part 1111 and the front end surface of the welding part 1111 are exposed to the first joint part 13, which facilitates the welding of the lead wire on the one hand, and ensures the heat dissipation area of the wiring part 111 on the other hand, thereby improving the heat dissipation performance.
[0057] That is to say, the first combining part 13 and the second combining part 14 can both be formed by injection molding. The material of the first combining part 13 and the material of the second combining part 14 are preferably thermoplastic materials. Thermoplastic materials soften and melt when heated, and have a simple molding process, good injection molding properties, and better plasticity. Therefore, the supporting platform 12 and the wiring part 111 can be better insulated and fixedly connected together, and the supporting platform 12 and the positioning part 112 can be fixedly connected together.
[0058] The material of the first bonding part 13 and the material of the second bonding part 14 are further preferably polyphenylene sulfide (PPS). PPS not only has good fluidity and better formability, but also has excellent electrical insulation, so as to better insulate the carrier 12 from the wiring part 111. PPS also has excellent mechanical properties, tensile and bending strength, so as to be able to withstand the impact caused by the secondary injection molding of the packaging base 3. In addition, the high temperature resistance of the semiconductor package 100 is generally required to be higher than 175 degrees, and the heat deformation temperature of PPS is 260°C, so it also has good high temperature resistance. Therefore, the first joint part 13 can better insulate and fix the carrier 12 and the wiring part 111 together, and the second joint part 14 can better fix the carrier 12 and the positioning part 112 together, which not only better positions the fusion part 1111 of the wiring part 111, but also better ensures the flatness of the fusion part 1111. In the process of welding the chip 2 or the process of packaging by injection molding the packaging base 3, it can prevent the wiring part 111 from shifting up and down or front and back and left and right, further improving the connection stability of the chip 2 and the quality of the product. At the same time, the first joint part 13 cannot use thermosetting plastics, such as epoxy resin, because the construction temperature of epoxy resin material is low, the leveling property is poor, and burrs are easy to appear. In addition, its surface is easy to cause surface depression or bubble defects due to insufficient tension, and it is easy to adhere to the surface of the wiring part 111 to affect the electrical performance, and it will also affect the molding accuracy of the chip carrier frame 1.
[0059] As a preferred method, refer to Figure 3 , Figure 6 , Figure 7 A second accommodating groove 126 may be provided on the supporting platform 12, that is, the second accommodating groove 126 is provided on the first surface 121 of the supporting platform 12, and part of the first combining portion 13 may be filled in the second accommodating groove 126. The second accommodating groove 126 may increase the contact area between the first combining portion 13 and the supporting platform 12 to increase the binding force between the first combining portion 13 and the supporting platform 12. The second receiving groove 126 can be an inverted structure or a special-shaped structure, that is, the width of the second receiving groove 126 does not gradually decrease from the opening of the second receiving groove 126 to the bottom of the second receiving groove 126, but the width of the second receiving groove 126 gradually increases from the opening of the second receiving groove 126 to the bottom of the second receiving groove 126, or, the width of the second receiving groove 126 sometimes increases and sometimes decreases from the opening of the second receiving groove 126 to the bottom of the second receiving groove 126, that is, the side wall of the second receiving groove 126 is uneven, which can further increase the bonding force between the first combining portion 13 and the supporting platform 12 to prevent the first combining portion 13 from separating from the supporting platform 12.
[0060] A third receiving groove 127 may be provided on the supporting platform 12, that is, the third receiving groove 127 is provided on the first surface 121 of the supporting platform 12, and part of the second combining portion 14 may be filled in the third receiving groove 127. The third receiving groove 127 may increase the contact area between the second combining portion 14 and the supporting platform 12 to increase the binding force between the second combining portion 14 and the supporting platform 12. The third receiving groove 127 can be an inverted structure or a special-shaped structure, that is, the width of the third receiving groove 127 does not gradually decrease from the opening of the third receiving groove 127 to the bottom of the third receiving groove 127, but the width of the third receiving groove 127 gradually increases from the opening of the third receiving groove 127 to the bottom of the third receiving groove 127, or, the width of the third receiving groove 127 sometimes increases and sometimes decreases from the opening of the third receiving groove 127 to the bottom of the third receiving groove 127, that is, the side wall of the third receiving groove 127 is uneven, which can further increase the bonding force between the second combining portion 14 and the supporting platform 12 to prevent the second combining portion 14 from separating from the supporting platform 12.
[0061] In the present application, the first joint portion 13 is used to fix the connection portion 111 to the carrier 12, which not only accurately positions the connection portion 111 to prevent the connection portion 111 from shifting in the up-down direction or in the front-back direction or in the left-right direction during the process of welding the leads or the process of encapsulating the package base 3 by injection molding, but also ensures the flatness of the connection portion 111, improves the stability of the connection between the connection portion 111 and the chip 2, and thus improves the quality of the product. Compared with the riveting method, the second joint portion 14 is used to fix the positioning portion 112 to the carrier 12, which can prevent the carrier 12 from shifting relative to the connection portion 111 and the positioning portion 112 during the process of fixing the chip 2 with the carrier 12 or the process of encapsulating the package base 3 by injection molding, and improves the stability of the connection between the connection portion 111 and the chip 2, and thus improves the quality of the product.
[0062] In a specific embodiment, referring to Figure 2 , Figure 7The connection part 111 may be provided with a welding part 1111, and a first bonding part 13 may be provided between the welding part 1111 and the carrier 12, and at least a part of the surface of the welding part 1111 is exposed from the first bonding part 13, so that the welding part 1111 is connected to the chip 2 through the lead wire. The welding part 1111 is preferably provided at one end of the connection part 111 close to the chip 2, so that the distance between the welding part 1111 and the chip 2 can be shortened, thereby shortening the length of the lead wire. The welding portion 1111 is preferably arranged above the first surface 121 of the carrier platform 12 and spaced apart from the carrier platform 12. A first connecting portion 13 is arranged below the welding portion 1111. The first connecting portion 13 fixes the welding portion 1111 and the carrier platform 12 to prevent the welding portion 1111 from being offset in the up and down directions or the front and back and left and right directions during the process of welding the leads or the process of packaging by injection molding the packaging base 3. The flatness of the welding portion 1111 is ensured, the stability of the connection between the welding portion 1111 and the chip 2 is improved, and the quality of the product is improved.
[0063] As a preferred manner, the number of the welding parts 1111 can be one or more. In the present embodiment, the number of welding parts 1111 is multiple, and the multiple welding parts 1111 are arranged at intervals. The multiple welding parts 1111 can be divided into two columns, each column can include one or more welding parts 1111, and the two columns of welding parts 1111 are respectively arranged on the first side 123 of the carrier 12 and the second side 124 of the carrier 12. In the present embodiment, the number of welding parts 1111 is six, each column has three welding parts 1111, and the two columns of welding parts 1111 can be symmetrically arranged. The number of first bonding parts 13 and the number of welding parts 1111 can be equal, and the multiple first bonding parts 13 and the multiple welding parts 1111 are respectively arranged one by one, that is, one first bonding part 13 is connected to one welding part 1111, so that the welding parts 1111 can be better spaced, fixed and electrically insulated.
[0064] In some embodiments, one first combining portion 13 may be connected to a plurality of welding portions 1111 at the same time, and one welding portion 1111 may also be connected to a plurality of first combining portions 13 at the same time.
[0065] As a preferred method, refer to Figure 2 , Figure 7 The surface of the welding part 1111 may be provided with a first welding layer 1112. The first welding layer 1112 may be, for example, a silver layer. The silver layer may be formed by electroplating or chemical plating. The first welding layer 1112 may increase the welding performance of the welding part 1111, facilitate welding the lead to the welding part 1111, and enhance the stability and reliability of the connection between the lead and the welding part 1111.
[0066] Reference Figure 2A penetrating first accommodating groove 1113 may also be provided on the welding part 1111, and one or more first accommodating grooves 1113 may be provided on each welding part 1111. Part of the first combining part 13 is filled in the first accommodating groove 1113, and the first combining part 13 and the first accommodating groove 1113 form a concave-convex matching connecting and retaining structure. The first accommodating groove 1113 can increase the contact area between the first combining part 13 and the welding part 1111 to increase the bonding force between the first combining part 13 and the welding part 1111.
[0067] Reference Figure 3 , a second welding layer 125 may be provided at a position corresponding to the carrier 12 and the chip 2, that is, the second welding layer 125 is provided on the first surface 121 of the carrier 12, and the second welding layer 125 may also increase the welding performance of the carrier 12 to increase the bonding force between the carrier 12 and the chip 2, thereby enhancing the stability and reliability of the connection between the carrier 12 and the chip 2. In this embodiment, after the chip 2 is welded to the second welding layer 125, the upper surface of the first welding layer 1112 on the wiring portion 111 is at the same horizontal plane or approximately at the same horizontal plane as the upper surface of the chip 2, which can further shorten the distance between the upper surface of the first welding layer 1112 and the upper surface of the chip 2, thereby further shortening the length of the lead.
[0068] The projection area of the second welding layer 125 on the carrier 12 is preferably larger than the projection area of the chip 2 on the carrier 12, that is, the area of the second welding layer 125 is larger than the area of the chip 2, so that the chip 2 can be fully in contact with the second welding layer 125, reducing the precision requirement for aligning the chip 2 with the second welding layer 125, and making it easier to produce. The second welding layer 125 can be formed by DPC process (Direct Plating Copper), electroplating or chemical plating, and the thickness of the second welding layer 125 is 1 to 20 μm. Compared with the connection between the carrier 12 and the chip 2 by silver glue, the present application no longer needs to apply and control the thickness of the silver glue, and can accurately control the precision of the combination of the chip 2 and the carrier 12, greatly improving the performance and quality of the product.
[0069] The second welding layer 125 is preferably a gold-tin alloy layer, which may include an adhesion layer (not shown), a barrier layer (not shown), a gold-tin layer (not shown) and a protective layer (not shown), wherein the adhesion layer is a titanium layer, the barrier layer is a platinum layer, and the protective layer is a gold layer. The adhesion layer is arranged on the upper surface of the carrier 12, and the barrier layer is arranged between the adhesion layer and the gold-tin layer. The barrier layer can prevent the mutual diffusion between the gold-tin layer above the barrier layer and the adhesion layer below, causing the change of the gold-tin ratio in the gold-tin layer, thereby affecting the welding effect. Eutectic is formed between gold and tin, so that the chip 2 can be welded together by directly contacting and heating with the gold-tin alloy layer without the need for additional solder, which greatly improves the convenience of welding, thus reducing the difficulty of combining and fixing the chip 2 with the carrier 12, and the combination process is faster, which improves the production efficiency of welding. The protective layer is plated on the outer surface of the gold-tin layer, and the protective layer is used to prevent the gold-tin layer from oxidizing.
[0070] In a specific embodiment, the upper surface of the welding part 1111 used to connect the lead wire is flush with the upper surface of the chip 2 to shorten the length of the lead wire. In other words, the upper surface of the welding part 1111 and the upper surface of the chip 2 are on the same horizontal plane, which can further shorten the distance between the upper surface of the welding part 1111 and the upper surface of the chip 2, thereby further shortening the length of the lead wire, which can not only reduce the amount of lead wire used and reduce the manufacturing cost of the product, but also shorten the signal transmission path, reduce the loss of the transmission signal, reduce the current loss, etc., thereby improving the performance of the product.
[0071] Reference Figure 6 , Figure 7 , Fig. 9 The upper surface of the first combining portion 13 and the upper surface of the welding portion 1111 can be arranged flush, that is, the first combining portion 13 is not only connected to the side of the welding portion 1111 facing the supporting platform 12, but also connected to the side of the welding portion 1111, that is, the first combining portion 13 covers multiple partial surfaces of the welding portion 1111, which not only increases the contact area between the first combining portion 13 and the welding portion 1111, thereby increasing the bonding force between the first combining portion 13 and the welding portion 1111, but also facilitates welding the lead to the welding portion 1111.
[0072] In some embodiments, the first bonding portion 13 may also cover a portion of the upper surface of the welding portion 1111, further increasing the contact area between the first bonding portion 13 and the welding portion 1111, thereby increasing the bonding force between the first bonding portion 13 and the welding portion 1111. The first bonding portion 13 may also be protruding from the upper surface of the welding portion 1111, or the first bonding portion 13 may also be recessed in the upper surface of the welding portion 1111, or the first bonding portion 13 may only be connected to one side of the welding portion 1111 facing the support platform 12, that is, the first bonding portion 13 may be placed on the lower surface of the welding portion 1111.
[0073] Reference Figures 4 to 9 The utility model also provides a semiconductor package 100, comprising the above-mentioned chip carrier frame 1, chip 2 and package base 3, wherein the chip 2 is arranged on the carrier platform 12 of the chip carrier frame 1, and the package base 3 can be formed by injection molding, and the package base 3 covers at least part of the chip 2 and at least part of the chip carrier frame 1, and at least part of the wiring portion 111 is exposed from the package base 3. In this embodiment, the chip 2 is completely covered by the package base 3, so that the chip 2 is better protected, and part of the wiring portion 111 is exposed from the package base 3 to ensure that the wiring portion 111 can be electrically connected to the external circuit.
[0074] As a preferred method, the material of the package base 3 can be a thermosetting material, which has good bonding performance and structural strength, and has good heat resistance and thermal conductivity, so as to achieve better packaging performance for the chip carrier frame 1 and the chip 2. The material of the package base 3 is further preferably a thermosetting resin, such as an epoxy resin, which has good bonding, sealing and heat dissipation properties, and has better bonding force with PPS, that is, the bonding force between the package base 3 and the first bonding portion 13 and the second bonding portion 14 is improved, thereby improving the firmness of the bonding of the semiconductor package 100 after secondary injection molding.
[0075] Although the embodiments of the utility model have been shown and described above, it can be understood that the above embodiments are exemplary and cannot be understood as limitations on the utility model. Ordinary technicians in the field can change, modify, replace and modify the above embodiments within the scope of the utility model without departing from the principles and purpose of the utility model. All of these changes should fall within the scope of protection of the claims of the utility model.
Claims
1. A chip carrier frame capable of accurate positioning, characterized in that: include: A frame body, the frame body comprising a wiring portion and a positioning portion; A carrier platform, the carrier platform is used to carry a chip, the wiring portion and the positioning portion are arranged around the carrier platform, the wiring portion and the carrier platform are spaced apart, the wiring portion and the carrier platform are fixedly connected via a first combining portion, the positioning portion and the carrier platform are fixedly connected via a second combining portion, at least part of the surface of the wiring portion is exposed from the first combining portion so that the wiring portion and the chip are connected via leads; a third accommodating groove is arranged on the carrier platform, part of the second combining portion is filled in the third accommodating groove so as to increase the bonding force between the second combining portion and the carrier platform.
2. The chip carrier frame capable of accurate positioning according to claim 1, characterized in that: The connection portion is provided with a welding portion, and the welding portion is fixedly connected to the carrier platform through the first connecting portion, and at least a part of the surface of the welding portion is exposed from the first connecting portion, so that the welding portion is connected to the chip through a lead.
3. The chip carrier frame capable of accurate positioning according to claim 2, characterized in that: The number of the positioning parts is four, and the four positioning parts are respectively arranged near the four corners of the supporting platform; and / or, The number of the welding parts is one or more. When the number of the welding parts is multiple, the multiple welding parts are arranged at intervals, the number of the first connecting parts is equal to the number of the welding parts, and the multiple first connecting parts are arranged one by one with the multiple welding parts.
4. The chip carrier frame capable of accurate positioning according to claim 2, characterized in that: A first welding layer is provided on the surface of the welding portion; and / or, A second welding layer is provided at a position corresponding to the chip on the carrier platform to increase the bonding force between the carrier platform and the chip; and / or, The upper surface of the welding portion exposed from the first bonding portion is flush with the upper surface of the chip to shorten the length of the lead; and / or, The upper surface of the first combining portion is flush with the upper surface of the welding portion.
5. The chip carrier frame capable of accurate positioning according to claim 4, characterized in that: The projection area of the second welding layer on the carrier is larger than the projection area of the chip on the carrier; and / or, The thickness of the second welding layer is 1 to 20 μm; and / or, The second welding layer is a gold-tin alloy layer.
6. The chip carrier frame capable of accurate positioning according to claim 2, characterized in that: The welding part is provided with a first receiving groove penetrating therethrough, and part of the first combining part is filled in the first receiving groove to increase the bonding force between the first combining part and the welding part; and / or, The carrying platform is provided with a second receiving groove, and part of the first combining portion is filled in the second receiving groove to increase the combining force between the first combining portion and the carrying platform.
7. The chip carrier frame capable of accurate positioning according to claim 2, characterized in that: The material of the first combining part and the material of the second combining part are both thermoplastic materials, and the thermoplastic material is polyphenylene sulfide material. The first combining part is connected to the wiring part and the supporting platform as a whole by injection molding. The first combining part is simultaneously covered on the lower surface of the welding part and the two outer side surfaces of the welding part, and the upper surface of the welding part and the front end surface of the welding part are simultaneously exposed to the first combining part. The second combining part is connected to the positioning part and the supporting platform as a whole by injection molding.
8. The chip carrier frame capable of accurate positioning according to claim 1, characterized in that: The first combining portion and the second combining portion are spaced apart from each other, or the first combining portion and the second combining portion are connected end to end; and / or, The wiring portion and the positioning portion are connected to the same material strip; or, The connection portion and the positioning portion are cut from the same material strip.
9. The chip carrier frame capable of accurate positioning according to claim 1, characterized in that: The carrier platform has a first side and a second side opposite to each other, and the first combining portion is disposed on both the first side and the second side of the carrier platform, and a receiving space is formed between the first combining portion located on the first side of the carrier platform and the first combining portion located on the second side of the carrier platform, and the chip is disposed in the receiving space.
10. A semiconductor package, characterized in that: It comprises a chip carrier frame, a chip and a packaging base as described in any one of claims 1 to 9, wherein the chip is arranged on a carrier platform of the chip carrier frame, the packaging base covers at least a portion of the chip and at least a portion of the chip carrier frame, at least a portion of the wiring portion is exposed from the packaging base, the packaging base is formed by injection molding, the material of the packaging base is a thermosetting material, and the thermosetting material is a thermosetting resin.