Voltage equalizing circuit

Abstract

According to the voltage sharing circuit, a first voltage sharing object is arranged between a first node and a fourth node, and a second voltage sharing object is arranged between a second node and the fourth node; the first resistor is arranged between the first node and the third node, and the second resistor is arranged between the second node and the third node; the first end of the first combined tube is connected with the third node, one end of the third resistor is connected with the first node, the other end of the third resistor is connected with the second end of the first combined tube, and the third end of the first combined tube is connected with the fourth node; the first end of the second combined tube is connected with the third node, one end of the fourth resistor is connected with the second node, the other end of the fourth resistor is connected with the second end of the second combined tube, and the third end of the second combined tube is connected with the fourth node. According to the voltage-sharing circuit provided by the invention, the problems of difficulty in device type selection and poor voltage-sharing effect in a high-voltage application scene in an existing voltage-sharing circuit are solved.

Description

Technical Field

[0001] The present application relates to the technical field of converters, and in particular to a voltage equalizing circuit. Background Art

[0002] With the development of power electronic converters, high voltage and high efficiency have become the mainstream. The application of high voltage has brought about the problem of voltage balancing in series connection of busbar capacitors, IGBTs, diodes and other power devices. Figure 1 As shown, resistors are generally used to balance the voltage of the voltage-balancing objects, and the voltage-balancing objects include but are not limited to the aforementioned bus capacitors, IGBTs, diodes, etc.

[0003] like Figure 2 As shown, the patent document with application number 201921661288.1 provides a capacitor voltage-equalizing circuit, in which there is a voltage-equalizing resistor control circuit, that is, a totem pole composed of transistors Q1 and Q2 is used to control two voltage-equalizing resistors, which can reduce power consumption to a very small level and meet the needs of users. However, in practical applications, when the voltage of the voltage-equalizing object is higher than 500V, the voltage resistance of the transistor must be at least 600V. There are relatively few devices available, and it is difficult to select a suitable transistor to meet the requirements, because the amplification factor of high-voltage devices is difficult to increase, and a low amplification factor will cause the device to heat up severely, resulting in poor voltage-equalizing effect. Utility Model Content

[0004] The present application aims to provide a voltage equalizing circuit to solve the problems of difficult device selection and poor voltage equalizing effect in existing voltage equalizing circuits in high-voltage application scenarios.

[0005] The present application provides a voltage balancing circuit, including a first node, a second node, a third node, a fourth node, a first resistor, a second resistor, a third resistor, a fourth resistor, a first voltage balancing object, a second voltage balancing object, a first combination tube, and a second combination tube;

[0006] The first voltage balancing object is arranged between the first node and the fourth node, and the second voltage balancing object is arranged between the second node and the fourth node;

[0007] The first resistor is arranged between the first node and the third node, and the second resistor is arranged between the second node and the third node;

[0008] The first end of the first combination of transistors is connected to the third node, one end of the third resistor is connected to the first node, the other end of the third resistor is connected to the second end of the first combination of transistors, and the third end of the first combination of transistors is connected to the fourth node;

[0009] The first end of the second combination tube is connected to the third node, one end of the fourth resistor is connected to the second node, the other end of the fourth resistor is connected to the second end of the second combination tube, and the third end of the second combination tube is connected to the fourth node.

[0010] In one example, the first voltage balancing object and the second voltage balancing object are two devices with the same specifications.

[0011] In one example, the first voltage balancing object or the second voltage balancing object includes at least one of a capacitor, an IGBT, and a diode.

[0012] In one example, the first combination tube or the second combination tube is composed of a plurality of triodes.

[0013] In one example, the first combination transistor includes a first PNP transistor and a first NPN transistor, and the second combination transistor includes a second PNP transistor and a second NPN transistor;

[0014] The base of the first NPN transistor constitutes the first end of the first combination transistor, the emitter of the first PNP transistor constitutes the second end of the first combination transistor, the base of the first PNP transistor is connected to the collector of the first NPN transistor, the collector of the first PNP transistor is connected to the emitter of the first NPN transistor, and the connection point between the two constitutes the third end of the first combination transistor;

[0015] The base of the second PNP transistor constitutes the first end of the second combination transistor, the emitter of the second NPN transistor constitutes the second end of the second combination transistor, the collector of the second PNP transistor is connected to the base of the second NPN transistor, the emitter of the second PNP transistor is connected to the collector of the second NPN transistor, and the connection point of the two constitutes the third end of the second combination transistor.

[0016] In one example, the first combination transistor includes a third NPN transistor and a fourth NPN transistor, and the second combination transistor includes a third PNP transistor and a fifth NPN transistor;

[0017] The base of the third NPN transistor constitutes the first end of the first combination transistor, the collector of the third NPN transistor is connected to the collector of the fourth NPN transistor and the connection point of the two constitutes the second end of the first combination transistor, the emitter of the third NPN transistor is connected to the base of the fourth NPN transistor, and the emitter of the fourth NPN transistor constitutes the third end of the first combination transistor;

[0018] The base of the third PNP transistor constitutes the first end of the second combination transistor, the emitter of the fifth NPN transistor constitutes the second end of the second combination transistor, the collector of the third PNP transistor is connected to the base of the fifth NPN transistor, the emitter of the third PNP transistor is connected to the collector of the fifth NPN transistor, and the connection point of the two constitutes the third end of the second combination transistor.

[0019] In one example, the first combination of transistors includes a sixth NPN transistor and a seventh NPN transistor, and the second combination of transistors includes a fourth PNP transistor and a fifth PNP transistor;

[0020] The base of the sixth NPN transistor constitutes the first end of the first combination transistor, the collector of the sixth NPN transistor is connected to the collector of the seventh NPN transistor and the connection point of the two constitutes the second end of the first combination transistor, the emitter of the sixth NPN transistor is connected to the base of the seventh NPN transistor, and the emitter of the seventh NPN transistor constitutes the third end of the first combination transistor;

[0021] The base of the fifth PNP transistor constitutes the first end of the second combination transistor, the collector of the fifth PNP transistor is connected to the collector of the fourth PNP transistor and the connection point of the two constitutes the second end of the second combination transistor, the emitter of the fourth PNP transistor constitutes the third end of the second combination transistor, and the emitter of the fifth PNP transistor is connected to the base of the fourth PNP transistor.

[0022] The voltage equalizing circuit provided in the present application solves the problems of difficult device selection and poor voltage equalizing effect in existing voltage equalizing circuits in high-voltage application scenarios. The device selection is easy, the voltage equalizing effect is good, and the circuit cost is low. BRIEF DESCRIPTION OF THE DRAWINGS

[0023] Figure 1 A schematic diagram of a voltage equalization circuit in the prior art;

[0024] Figure 2 It is another schematic diagram of a voltage equalizing circuit in the prior art;

[0025] Figure 3 A block diagram of a voltage equalization circuit provided in an embodiment of the present application;

[0026] Figure 4 is a specific circuit diagram of a voltage equalizing circuit provided in an embodiment of the present application;

[0027] Figure 5 is a specific circuit diagram of another voltage balancing circuit provided in an embodiment of the present application;

[0028] Figure 6 This is a specific circuit diagram of another voltage equalizing circuit provided in an embodiment of the present application.

[0029] The realization of the purpose, functional features and advantages of this application will be further explained in conjunction with embodiments and with reference to the accompanying drawings. DETAILED DESCRIPTION

[0030] In order to make the technical problems, technical solutions and beneficial effects to be solved by the present application clearer and more understandable, the present application is further described in detail below in conjunction with the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are only used to explain the present application and are not used to limit the present application.

[0031] In the description of the present application, it should be understood that the orientations or positional relationships indicated by the terms "center", "upper", "lower", "front", "back", "left", "right", etc. are based on the orientations or positional relationships shown in the drawings, and are only for the convenience of describing the present application and simplifying the description, rather than indicating or implying that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation, and therefore cannot be understood as limiting the present application. In addition, the terms "first" and "second" are used for descriptive purposes only and cannot be understood as indicating or implying relative importance.

[0032] like Figure 3 As shown, an embodiment of the present application provides a voltage balancing circuit, including a first node P, a second node Q, a third node M, a fourth node N, a first resistor, a second resistor, a third resistor, a fourth resistor, a first voltage balancing object, a second voltage balancing object, a first combination tube, and a second combination tube;

[0033] The first voltage balancing object is arranged between the first node P and the fourth node N, and the second voltage balancing object is arranged between the second node Q and the fourth node N;

[0034] The first resistor is arranged between the first node P and the third node M, and the second resistor is arranged between the second node Q and the third node M;

[0035] The first end of the first combination of transistors (indicated by the reference number “1” in the figure) is connected to the third node M, one end of the third resistor is connected to the first node P, the other end of the third resistor is connected to the second end of the first combination of transistors (indicated by the reference number “2” in the figure), and the third end of the first combination of transistors (indicated by the reference number “3” in the figure) is connected to the fourth node N;

[0036] The first end of the second combination tube (shown by the number "1" in the figure) is connected to the third node M, one end of the fourth resistor is connected to the second node Q, the other end of the fourth resistor is connected to the second end of the second combination tube (shown by the number "2" in the figure), and the third end of the second combination tube (shown by the number "3" in the figure) is connected to the fourth node N.

[0037] In one example, the first voltage balancing object or the second voltage balancing object includes at least one of a capacitor, an IGBT, and a diode.

[0038] In one example, the first combination tube or the second combination tube is composed of a plurality of triodes. The combination tube increases the current amplification factor of the high-voltage triode, improves the dynamic response speed, reduces device loss, simplifies the system heat dissipation design, and facilitates the stable operation of the system.

[0039] The following combination Figure 4-Figure 6 , the first combination tube and the second combination tube composed of different triodes are described:

[0040] like Figure 4 As shown, R11 is the first resistor, R12 is the second resistor, R13 is the third resistor, R14 is the fourth resistor, P1 is the first node, Q1 is the second node, M1 is the third node, and N1 is the fourth node.

[0041] The first voltage balancing object is disposed between the first node P1 and the fourth node N1 , and the second voltage balancing object is disposed between the second node Q1 and the fourth node N1 .

[0042] The first resistor R11 is disposed between the first node P1 and the third node M1 , and the second resistor R12 is disposed between the second node Q1 and the third node M1 .

[0043] The first transistor combination includes a first PNP transistor Q11 and a first NPN transistor Q13 , and the second transistor combination includes a second PNP transistor Q14 and a second NPN transistor Q12 .

[0044] The base of the first NPN transistor Q13 constitutes the first end of the first combination transistor, the emitter of the first PNP transistor Q11 (shown as E11 in the figure) constitutes the second end of the first combination transistor, the base of the first PNP transistor Q11 is connected to the collector of the first NPN transistor Q13, the collector of the first PNP transistor Q11 is connected to the emitter of the first NPN transistor Q13, and the connection point of the two constitutes the third end of the first combination transistor.

[0045] The base of the second PNP transistor Q14 constitutes the first end of the second combination transistor, the emitter of the second NPN transistor Q12 (shown as E12 in the figure) constitutes the second end of the second combination transistor, the collector of the second PNP transistor Q14 is connected to the base of the second NPN transistor Q12, the emitter of the second PNP transistor Q14 is connected to the collector of the second NPN transistor Q12, and the connection point of the two constitutes the third end of the second combination transistor.

[0046] The first end of the first combination transistor is connected to the third node M1, one end of the third resistor R13 is connected to the first node P1, the other end of the third resistor R13 is connected to the second end of the first combination transistor, and the third end of the first combination transistor is connected to the fourth node N1;

[0047] The first end of the second combination tube is connected to the third node M1, one end of the fourth resistor R14 is connected to the second node Q1, the other end of the fourth resistor R14 is connected to the second end of the second combination tube, and the third end of the second combination tube is connected to the fourth node N1.

[0048] The voltage equalization circuit formed by the above components has a high resistance accuracy of the first resistor R11 and the second resistor R12, and a small actual resistance error, so R11 and R12 can completely divide the voltage difference between P1 and Q1. When the voltage across the first voltage equalization object is higher than the voltage across the second voltage equalization object, the potential at point M1 is higher than the potential at point N1. At this time, Q13 and Q11 are on, and the first voltage equalization object is discharged through R13 and Q11. At the same time, the second voltage equalization object can be charged a small amount through R11 and Q13, and the voltage across the first voltage equalization object and the second voltage equalization object are soon equalized, and then Q13 and Q11 are turned off. Similarly, when the voltage across the first voltage equalization object is lower than the voltage across the second voltage equalization object, Q12 and Q14 will act to make the voltage of the first voltage equalization object and the voltage of the second voltage equalization object the same, and the specific process will not be repeated.

[0049] When the voltages of the first voltage-equalizing object and the second voltage-equalizing object are completely equal, none of the transistors has the conditions for conduction and is in a blocking voltage state; when the voltages of the first voltage-equalizing object and the second voltage-equalizing object are slightly different, the conduction voltage drop of the transistor BE is only 0.7V, and the transistor will be quickly turned on to form a voltage-equalizing path. After Q13 is turned on, it will provide amplified current to the base of Q11, that is, the combination of Q13 and Q11 can increase the current amplification factor. Similarly, the combination of Q12 and Q14 can also increase the current amplification factor. Compared with a single transistor, the current amplification capability is greatly improved, the circuit operation response speed is also faster, and the device loss is also smaller, which is beneficial to the system's heat dissipation design and subsequent stable operation.

[0050] like Figure 5 As shown, R21 is the first resistor, R22 is the second resistor, R23 is the third resistor, R24 is the fourth resistor, P2 is the first node, Q2 is the second node, M2 is the third node, and N2 is the fourth node.

[0051] The first voltage balancing object is disposed between the first node P2 and the fourth node N2, and the second voltage balancing object is disposed between the second node Q2 and the fourth node N2.

[0052] The first resistor R21 is disposed between the first node P2 and the third node M2 ​​, and the second resistor R22 is disposed between the second node Q2 and the third node M2 ​​.

[0053] The first combination transistor includes a third NPN transistor Q23 and a fourth NPN transistor Q21, and the second combination transistor includes a third PNP transistor Q24 and a fifth NPN transistor Q22;

[0054] The base of the third NPN transistor Q23 constitutes the first end of the first combination transistor, the collector of the third NPN transistor Q23 is connected to the collector of the fourth NPN transistor Q21, and the connection point of the two (as shown by C21 in the figure) constitutes the second end of the first combination transistor, the emitter of the third NPN transistor Q23 is connected to the base of the fourth NPN transistor Q21, and the emitter of the fourth NPN transistor Q21 constitutes the third end of the first combination transistor;

[0055] The base of the third PNP transistor Q24 constitutes the first end of the second combination transistor, the emitter of the fifth NPN transistor Q22 (shown as C22 in the figure) constitutes the second end of the second combination transistor, the collector of the third PNP transistor Q24 is connected to the base of the fifth NPN transistor Q22, the emitter of the third PNP transistor Q24 is connected to the collector of the fifth NPN transistor Q22, and the connection point of the two constitutes the third end of the second combination transistor.

[0056] The first end of the first combination transistor is connected to the third node M2, one end of the third resistor R23 is connected to the first node P2, the other end of the third resistor R23 is connected to the second end of the first combination transistor, and the third end of the first combination transistor is connected to the fourth node N2;

[0057] A first end of the second combination tube is connected to the third node M2, one end of the fourth resistor R24 ​​is connected to the second node Q2, the other end of the fourth resistor R24 ​​is connected to the second end of the second combination tube, and a third end of the second combination tube is connected to the fourth node N2.

[0058] The voltage-equalizing circuit formed by the above-mentioned components has a high resistance accuracy of the first resistor R21 and the second resistor R22, and a small actual resistance error, so R21 and R22 can completely divide the voltage difference between P2 and Q2. When the voltage across the first voltage-equalizing object is higher than the voltage across the second voltage-equalizing object, the potential at point M2 is higher than the potential at point N2. At this time, Q23 and Q21 are on, and the first voltage-equalizing object is discharged through R23 and Q21. At the same time, the second voltage-equalizing object can be charged a small amount through R21, Q23 and Q21, and the voltage across the first voltage-equalizing object and the second voltage-equalizing object are soon equalized, and then Q23 and Q21 are turned off. Similarly, when the voltage across the first voltage-equalizing object is lower than the voltage across the second voltage-equalizing object, Q22 and Q24 will act, so that the voltages of the first voltage-equalizing object and the second voltage-equalizing object are the same, and the specific process will not be repeated.

[0059] When the voltages of the first voltage-equalizing object and the second voltage-equalizing object are completely equal, none of the transistors has the conditions for conduction and is in a blocking voltage state; when the voltages of the first voltage-equalizing object and the second voltage-equalizing object are slightly different, the conduction voltage drop of the transistor BE is only 0.7V, and the transistor will be quickly turned on to form a voltage-equalizing path. After Q23 is turned on, it will provide amplified current to the base of Q21, that is, the combination of Q23 and Q21 can increase the current amplification factor. Similarly, the combination of Q22 and Q24 can also increase the current amplification factor. Compared with a single transistor, the current amplification capability is greatly improved, the circuit operation response speed is also faster, and the device loss is also smaller, which is beneficial to the system's heat dissipation design and subsequent stable operation.

[0060] like Figure 6 As shown, R31 is the first resistor, R32 is the second resistor, R33 is the third resistor, R34 is the fourth resistor, P3 is the first node, Q3 is the second node, M3 is the third node, and N3 is the fourth node.

[0061] The first voltage balancing object is disposed between the first node P3 and the fourth node N3, and the second voltage balancing object is disposed between the second node Q3 and the fourth node N3.

[0062] The first resistor R31 is disposed between the first node P3 and the third node M3 , and the second resistor R32 is disposed between the second node Q2 and the third node M2 ​​.

[0063] The first combination transistor includes a sixth NPN transistor Q33 and a seventh NPN transistor Q31, and the second combination transistor includes a fourth PNP transistor Q32 and a fifth PNP transistor Q34;

[0064] The base of the sixth NPN transistor Q33 constitutes the first end of the first combination transistor, the collector of the sixth NPN transistor Q33 is connected to the collector of the seventh NPN transistor Q31, and the connection point of the two (as shown by C31 in the figure) constitutes the second end of the first combination transistor, the emitter of the sixth NPN transistor Q33 is connected to the base of the seventh NPN transistor Q31, and the emitter of the seventh NPN transistor Q31 constitutes the third end of the first combination transistor;

[0065] The base of the fifth PNP transistor Q34 constitutes the first end of the second combination transistor, the collector of the fifth PNP transistor Q34 is connected to the collector of the fourth PNP transistor Q32 and the connection point of the two (as shown by C32 in the figure) constitutes the second end of the second combination transistor, the emitter of the fourth PNP transistor Q32 constitutes the third end of the second combination transistor, and the emitter of the fifth PNP transistor Q34 is connected to the base of the fourth PNP transistor Q32.

[0066] The first end of the first combination transistor is connected to the third node M3, one end of the third resistor R33 is connected to the first node P3, the other end of the third resistor R33 is connected to the second end of the first combination transistor, and the third end of the first combination transistor is connected to the fourth node N3;

[0067] A first end of the second combination tube is connected to the third node M3, one end of the fourth resistor R34 is connected to the second node Q3, the other end of the fourth resistor R34 is connected to the second end of the second combination tube, and a third end of the second combination tube is connected to the fourth node N3.

[0068] The voltage-equalizing circuit formed by the above-mentioned components has a high resistance accuracy of the first resistor R31 and the second resistor R32, and a small actual resistance error, so R31 and R32 can completely divide the voltage difference between P3 and Q3. When the voltage across the first voltage-equalizing object is higher than the voltage across the second voltage-equalizing object, the potential at point M3 is higher than the potential at point N3. At this time, Q33 and Q31 are on, and the first voltage-equalizing object is discharged through R33 and Q31. At the same time, the second voltage-equalizing object can be charged a small amount through R31, Q33 and Q31, and the voltage across the first voltage-equalizing object and the second voltage-equalizing object are soon equalized, and then Q33 and Q31 are turned off. Similarly, when the voltage across the first voltage-equalizing object is lower than the voltage across the second voltage-equalizing object, Q32 and Q34 will act, so that the voltages of the first voltage-equalizing object and the second voltage-equalizing object are the same, and the specific process will not be repeated.

[0069] When the voltages of the first voltage-equalizing object and the second voltage-equalizing object are completely equal, none of the transistors meet the conduction conditions and are in a blocking voltage state; when the voltages of the first voltage-equalizing object and the second voltage-equalizing object are slightly different, the conduction voltage drop of the transistor BE is only 0.7V, and the transistor will quickly turn on to form a voltage-equalizing path. After Q33 is turned on, it will provide amplified current to the base of Q31, that is, the combination of Q33 and Q31 can increase the current amplification factor. Similarly, the combination of Q32 and Q34 can also increase the current amplification factor. Compared with a single transistor, the current amplification capability is greatly improved, the circuit operation response speed is also faster, and the device loss is also smaller, which is beneficial to the system's heat dissipation design and subsequent stable operation.

[0070] The preferred embodiments of the present application are described above with reference to the accompanying drawings, but the scope of the present application is not limited thereby. Any modification, equivalent substitution and improvement made by a person skilled in the art without departing from the scope and essence of the present application shall be within the scope of the present application.

Claims

1. A voltage equalizing circuit, characterized in that: It includes a first node, a second node, a third node, a fourth node, a first resistor, a second resistor, a third resistor, a fourth resistor, a first voltage balancing object, a second voltage balancing object, a first combination tube and a second combination tube; The first voltage balancing object is arranged between the first node and the fourth node, and the second voltage balancing object is arranged between the second node and the fourth node; The first resistor is arranged between the first node and the third node, and the second resistor is arranged between the second node and the third node; The first end of the first combination tube is connected to the third node, one end of the third resistor is connected to the first node, the other end of the third resistor is connected to the second end of the first combination tube, and the third end of the first combination tube is connected to the fourth node; The first end of the second combination tube is connected to the third node, one end of the fourth resistor is connected to the second node, the other end of the fourth resistor is connected to the second end of the second combination tube, and the third end of the second combination tube is connected to the fourth node.

2. The voltage balancing circuit according to claim 1, characterized in that: The first voltage balancing object and the second voltage balancing object are two devices with the same specifications.

3. The voltage balancing circuit according to claim 2, characterized in that: The first voltage balancing object or the second voltage balancing object includes one of a capacitor, an IGBT, and a diode.

4. The voltage balancing circuit according to claim 1, characterized in that: The first combination tube or the second combination tube is composed of a plurality of triodes.

5. The voltage balancing circuit according to claim 4, characterized in that: The first combination transistor includes a first PNP transistor and a first NPN transistor, and the second combination transistor includes a second PNP transistor and a second NPN transistor; The base of the first NPN transistor constitutes the first end of the first combination transistor, the emitter of the first PNP transistor constitutes the second end of the first combination transistor, the base of the first PNP transistor is connected to the collector of the first NPN transistor, the collector of the first PNP transistor is connected to the emitter of the first NPN transistor, and the connection point between the two constitutes the third end of the first combination transistor; The base of the second PNP transistor constitutes the first end of the second combination transistor, the emitter of the second NPN transistor constitutes the second end of the second combination transistor, the collector of the second PNP transistor is connected to the base of the second NPN transistor, the emitter of the second PNP transistor is connected to the collector of the second NPN transistor, and the connection point of the two constitutes the third end of the second combination transistor.

6. The voltage balancing circuit according to claim 4, characterized in that: The first combination of transistors includes a third NPN transistor and a fourth NPN transistor, and the second combination of transistors includes a third PNP transistor and a fifth NPN transistor; The base of the third NPN transistor constitutes the first end of the first combination transistor, the collector of the third NPN transistor is connected to the collector of the fourth NPN transistor and the connection point of the two constitutes the second end of the first combination transistor, the emitter of the third NPN transistor is connected to the base of the fourth NPN transistor, and the emitter of the fourth NPN transistor constitutes the third end of the first combination transistor; The base of the third PNP transistor constitutes the first end of the second combination transistor, the emitter of the fifth NPN transistor constitutes the second end of the second combination transistor, the collector of the third PNP transistor is connected to the base of the fifth NPN transistor, the emitter of the third PNP transistor is connected to the collector of the fifth NPN transistor, and the connection point of the two constitutes the third end of the second combination transistor.

7. The voltage balancing circuit according to claim 4, characterized in that: The first combination of transistors includes a sixth NPN transistor and a seventh NPN transistor, and the second combination of transistors includes a fourth PNP transistor and a fifth PNP transistor; The base of the sixth NPN transistor constitutes the first end of the first combination transistor, the collector of the sixth NPN transistor is connected to the collector of the seventh NPN transistor and the connection point of the two constitutes the second end of the first combination transistor, the emitter of the sixth NPN transistor is connected to the base of the seventh NPN transistor, and the emitter of the seventh NPN transistor constitutes the third end of the first combination transistor; The base of the fifth PNP transistor constitutes the first end of the second combination transistor, the collector of the fifth PNP transistor is connected to the collector of the fourth PNP transistor and the connection point of the two constitutes the second end of the second combination transistor, the emitter of the fourth PNP transistor constitutes the third end of the second combination transistor, and the emitter of the fifth PNP transistor is connected to the base of the fourth PNP transistor.

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