Display substrate and display device

Abstract

The utility model discloses a display substrate and a display device.The display substrate comprises a substrate, a pixel circuit layer, a first insulating layer and an auxiliary layer, the auxiliary layer comprises an auxiliary capacitor plate, and the auxiliary capacitor plate is connected with a grid electrode of a first transistor in the pixel circuit layer through a first via hole penetrating through the first insulating layer; the auxiliary capacitor plate is further connected with the charging output end of the second transistor through a second via hole penetrating through the first insulating layer, and an overlapping area exists between the orthographic projection of the auxiliary capacitor plate on the substrate and the orthographic projection of a conductive film layer in the pixel circuit layer on the substrate. Therefore, the auxiliary capacitor plate added in the utility model is used as a polar plate of the auxiliary capacitor, and the conductive film layer in the pixel circuit layer is used as another polar plate of the auxiliary capacitor. The increase of the auxiliary capacitor can maintain the continuity and stability of the gate signal of the driving transistor, and can save the wiring space, thereby achieving the improvement of the pixel density of the display screen.

Description

Technical Field

[0001] The present application relates to the field of display technology, and in particular to a display substrate and a display device. Background Art

[0002] Sub-millimeter / micro light emitting diodes (Mini / Micro Light Emitting Diode, referred to as Mini / Micro-LED) are mainly made by miniaturizing, arraying, and thin-filming traditional LED chips using miniaturization process technology, and then transferring LED crystal thin films to the driver backplane in batches through mass transfer technology, using physical deposition to manufacture a protective layer, and finally completing the packaging. Mini LED backlight turns the dozens of LED lamp beads on the side backlight of the display into thousands, tens of thousands or even more lamp beads for the direct backlight; each pixel of the Micro LED display can be addressed and driven to light up individually, which can be regarded as an LED self-luminous display with a pixel pitch of microns and no need for backlight.

[0003] Compared with the liquid crystal display (LCD) technology and organic light emitting diode (OLED) technology that have been mass-produced, Mini / Micro LED has very superior performance advantages in almost every technical dimension: long life, high contrast, high resolution, fast response speed, wider viewing angle, rich colors, ultra-high brightness and lower power consumption, etc.

[0004] Mini (Micro) LED display uses a three-primary color sub-pixel self-luminous structure. The LCD display process requires the use of a backlight source to a polarizer and then a color filter. There is a lot of energy loss in the display process. Compared with the two, the power consumption of Micro-LED in display applications is about 10% lower than that of LCD. Micro-LED uses inorganic materials to emit light, which has higher luminous efficiency. OLED uses organic materials to emit light. Compared with the two, Micro-LED has lower luminous power consumption than OLED. Unlike OLED, which uses organic materials, Micro-LED uses gallium nitride (GaN) materials in the light-emitting part, which can provide significantly better brightness than OLED. Under Micro-LED display technology, each Micro-LED is a self-luminous pixel, and at the same time, a single Micro-LED is at the micron level, so it can achieve very high resolution. The pixel density of Micro-LED display can reach more than 1500PPI, while the PPI of LCD and OLED screens is about 800PPI and 400PPI.

[0005] At present, all parties still have the demand to continue to improve the pixel density of Micro-LED display screens. The pixel drive of Micro-LED direct display mainly adopts 7T1C or 11T3C circuit structure, and the process route often adopts low-temperature polysilicon LTPS technology, which can achieve precise control of the light emission of a single LED. However, in the existing pixel drive circuit architecture, the capacitor area required to maintain the gate voltage of some or a certain transistor accounts for a large proportion, and the circuit routing space is large. This limits the realization of high PPI pixel drive circuits to a certain extent, thereby limiting the improvement of the pixel density of Micro-LED display screens. Utility Model Content

[0006] In view of this, embodiments of the present application provide a display substrate and a display device to solve the problem in the prior art that it is difficult to increase the pixel density of a display screen.

[0007] Therefore, an embodiment of the present application provides a display substrate, comprising:

[0008] substrate;

[0009] A pixel circuit layer, located on one side of the substrate, comprising a first transistor and a second transistor;

[0010] A first insulating layer, located on a side of the pixel circuit layer facing away from the substrate;

[0011] An auxiliary layer is located on a side of the first insulating layer away from the pixel circuit layer, and includes an auxiliary capacitor plate. The auxiliary capacitor plate is connected to the gate of the first transistor through a first via hole penetrating the first insulating layer. The auxiliary capacitor plate is also connected to the charging output terminal of the second transistor through a second via hole penetrating the first insulating layer. The orthographic projection of the auxiliary capacitor plate on the substrate and the orthographic projection of the conductive film layer in the pixel circuit layer on the substrate have an overlapping area.

[0012] In a possible implementation, the pixel circuit layer includes a first metal layer, the first metal layer includes a source and a drain of the first transistor, and the conductive film layer includes the first metal layer.

[0013] In a possible implementation manner, the pixel circuit layer includes a second metal layer, the second metal layer includes a gate of the first transistor, and the conductive film layer includes the second metal layer.

[0014] In a possible implementation manner, the material of the auxiliary capacitor plate includes metal or transparent conductive material.

[0015] In a possible implementation, the display substrate also includes: a second insulating layer and a third metal layer, the second insulating layer is located on the side of the auxiliary layer away from the pixel circuit layer, the third metal layer includes a first metal routing and a second metal routing, the first metal routing is connected to the first power supply, and the second metal routing is connected to the driving current output terminal of the first transistor.

[0016] In a possible implementation, the display substrate also includes: a third insulating layer, the third insulating layer is located on a side of the third metal layer away from the pixel circuit layer, the third insulating layer is provided with a third via and a fourth via, the third via has an overlapping area with the first metal routing, the fourth via has an overlapping area with the second metal routing, and the portion of the first metal routing exposed through the third via and the portion of the second metal routing exposed through the fourth via are used to connect to the light-emitting element.

[0017] In one possible implementation, the pixel circuit layer includes a fourth metal layer, a fourth insulating layer, an active layer, a fifth insulating layer, a second metal layer, a sixth insulating layer and a first metal layer stacked in sequence, the fourth metal layer includes the first gate of the first transistor, and the second metal layer includes the second gate of the first transistor.

[0018] In a possible implementation manner, the display substrate further includes:

[0019] A black matrix layer, located on a side of the third insulating layer away from the pixel circuit layer;

[0020] The portion exposed by the third via hole and the portion exposed by the fourth via hole are exposed through the opening area of ​​the black matrix layer.

[0021] In a possible implementation manner, the display substrate further includes:

[0022] a seventh insulating layer, located on a side of the black matrix layer away from the pixel circuit layer;

[0023] The opening area of ​​the seventh insulating layer overlaps with the opening area of ​​the black matrix layer.

[0024] On the other hand, an embodiment of the present application further provides a display device, including:

[0025] The display substrate described in the above embodiment; and

[0026] A display function layer is arranged on the display substrate.

[0027] In a possible implementation, the display function layer includes Micro-LED.

[0028] The beneficial effects of the embodiments of the present application are as follows:

[0029] The embodiment of the present application provides a display substrate and a preparation method thereof, and a display device, wherein the display substrate includes a substrate, a pixel circuit layer, a first insulating layer and an auxiliary layer, wherein the auxiliary layer includes an auxiliary capacitor plate, wherein the auxiliary capacitor plate is connected to the gate of the first transistor in the pixel circuit layer through a first via hole penetrating the first insulating layer, and the auxiliary capacitor plate is also connected to the charging output terminal of the second transistor through a second via hole penetrating the first insulating layer, and the positive projection of the auxiliary capacitor plate on the substrate and the positive projection of the conductive film layer in the pixel circuit layer on the substrate have an overlapping area. It can be seen that the auxiliary capacitor plate added in the present application serves as one plate of the auxiliary capacitor, and the conductive film layer in the pixel circuit layer serves as another plate of the auxiliary capacitor. The increase of the auxiliary capacitor can, on the one hand, supplement the original capacitor while keeping the original capacitor of the pixel circuit unchanged, and maintain the continuous stability of the gate signal of the driving transistor; on the other hand, according to the size of the auxiliary capacitor, the area occupied by the original capacitor of the pixel circuit on the display substrate can be reduced or even removed, so as to achieve partial or complete replacement of the original capacitor, thereby saving the wiring space of the pixel driving circuit on the display substrate, and thus achieving an increase in the pixel density of the display screen. BRIEF DESCRIPTION OF THE DRAWINGS

[0030] Figure 1 Shown is a circuit diagram of an existing 7T1C pixel circuit;

[0031] Figure 2 Shown is a schematic diagram of the area occupied by a 7T1C pixel circuit on a conventional display substrate;

[0032] Figure 3 Shown is a schematic diagram of an area occupied by a 7T1C pixel circuit on a display substrate provided in an embodiment of the present application;

[0033] Figure 4 Shown is a circuit diagram of a 7T1C pixel circuit provided in an embodiment of the present application;

[0034] Figure 5 Shown Figure 3 The middle partial enlarged view is a cross-sectional view along line Bb;

[0035] Figure 6 Shown is a schematic structural diagram of a display substrate provided in an embodiment of the present application;

[0036] Figure 7 Shown is a schematic diagram of a specific display substrate stack provided in an embodiment of the present application;

[0037] Figure 8Shown is a flow chart of a method for manufacturing a display substrate provided in an embodiment of the present application. DETAILED DESCRIPTION

[0038] The following is a detailed description of the display substrate and its preparation method, and the specific implementation of the display device provided in the embodiments of the present application in conjunction with the accompanying drawings.

[0039] Figure 1 Shown is a circuit diagram of an existing 7T1C pixel circuit; Figure 2 FIG. 1 is a schematic diagram showing the area occupied by a 7T1C pixel circuit on an existing display substrate. Figure 2 As shown, the portion above the dividing line Aa is the area 100 occupied by the transistor circuit of the pixel circuit, for example, the 7 transistors ( Figure 1 The area occupied by the original capacitors of the pixel circuit is the area below the dividing line Aa, for example, a capacitor ( Figure 1 As shown in FIG. 1 , the area occupied by the driving transistor ( Figure 1 The capacitor area required to maintain the voltage of the gate T3) shown in the figure is relatively large, and a large space requirement is placed on the display panel, which, to a certain extent, limits the improvement of the pixel density of the display panel.

[0040] The inventors of the present application have discovered that the area 200 occupied by the original capacitor can be reduced by adding an auxiliary capacitor in the area 100 of the pixel circuit. The original capacitor can even be replaced by an auxiliary capacitor set in the area 100. In this way, there is no need to set a capacitor in the area 200. By reducing or even eliminating the area 200 occupied by the original capacitor, the wiring space of the pixel circuit on the display panel can be saved, thereby improving the pixel density of the display panel.

[0041] Figure 3 Shown is a schematic diagram of an area occupied by a 7T1C pixel circuit on a display substrate provided in an embodiment of the present application; Figure 4 Shown is a circuit diagram of a 7T1C pixel circuit provided in an embodiment of the present application; Figure 5 Shown Figure 3 The partially enlarged view in the middle is a cross-sectional view along line Bb.

[0042] like Figure 3 As shown, the present application adds an auxiliary capacitor plate 110 in the pixel circuit area 100. The auxiliary capacitor plate 110 and the metal connection line in the pixel circuit below it are vertically stacked up and down to form an auxiliary capacitor. Figure 4As shown, the auxiliary capacitor plate 110 is connected to the charging output terminal of the transistor T2. When Data writes a signal, a part of the signal will be synchronously stored in the auxiliary capacitor through the transistor T2. The auxiliary capacitor plate 110 is also connected to the gate of the driving transistor T3. In the light-emitting stage of the pixel circuit, it helps to maintain the gate voltage of the driving transistor T3, thereby realizing continuous and stable light emission of the light-emitting element EL.

[0043] The size of the auxiliary capacitor can be optimized according to actual needs. While maintaining the stable conduction of the T3 transistor, the original capacitor under the pixel circuit can be reduced or even removed, which helps save the space requirements for the arrangement of thin film transistors (TFT) and achieve high pixel density product design.

[0044] The above is an introduction to the inventive concept of the present application based on the 7T1C pixel circuit, but the inventive concept of the present application is not limited thereto and can also be applied to other pixel circuits such as 11T3C.

[0045] Based on the above invention concept, Figure 6 As shown, an embodiment of the present application provides a display substrate, including: a substrate 100 , a pixel circuit layer 200 , a first insulating layer 300 and an auxiliary layer 400 .

[0046] The pixel circuit layer 200 is located on one side of the substrate 100 and includes a first transistor ( Figure 6 not shown) and a second transistor ( Figure 6 not shown); the first transistor may be Figure 4 In the 7T1C pixel circuit shown in FIG. 1 , the driving transistor T3 and the second transistor may be Figure 4 Transistor T2 in the 7T1C pixel circuit shown.

[0047] A first insulating layer 300 is located on a side of the pixel circuit layer 200 away from the substrate 100;

[0048] The auxiliary layer 400 is located on the side of the first insulating layer 300 away from the pixel circuit layer 200, and includes an auxiliary capacitor plate 410. The auxiliary capacitor plate 410 is connected to the gate of the first transistor through a first via 310 penetrating the first insulating layer 300. The auxiliary capacitor plate 410 is also connected to the charging output end of the second transistor through a second via 320 penetrating the first insulating layer 300. The orthographic projection of the auxiliary capacitor plate 410 on the substrate 100 and the orthographic projection of the conductive film layer 210 in the pixel circuit layer 200 on the substrate 100 have an overlapping area.

[0049] The auxiliary capacitor plate 410 and the conductive film layer 210 form an auxiliary capacitor. The capacitance of the auxiliary capacitor is related to the distance between the auxiliary capacitor plate 410 and the conductive film layer 210 and the area of ​​the overlapping region. The distance between the auxiliary capacitor plate 410 and the conductive film layer 210 can be adjusted by the thickness of the first insulating layer 300. The charging output end of the second transistor (the source or drain of the transistor) is connected to the auxiliary capacitor plate 410 to charge the auxiliary capacitor; the auxiliary capacitor plate 410 is connected to the gate of the first transistor, and the gate voltage of the first transistor can be maintained during the light-emitting stage.

[0050] The material of the auxiliary capacitor plate 410 includes metal or transparent conductive material. The metal can be a multi-layer composite structure, such as Ti / AL / Ti, or a single-layer structure, such as Cu. The transparent conductive material can be indium tin oxide (ITO), indium gallium zinc oxide (IGZO), etc.

[0051] Specifically, the pixel circuit layer 200 may include a first metal layer, the first metal layer includes a source S and a drain D of the first transistor, so the first metal layer may be referred to as an SD layer, and the conductive film layer includes an SD layer. That is, the auxiliary capacitor plate 410 may form an auxiliary capacitor with the SD layer in the pixel circuit layer 200 directly below it.

[0052] Specifically, the pixel circuit layer 200 includes a second metal layer, the second metal layer includes the gate of the first transistor, the gate of the first transistor can be one or two, the two gates are a top gate and a bottom gate, the second metal layer refers to the gate closer to the auxiliary capacitor plate 410, such as the top gate, and the conductive film layer includes a Top Gate layer. In other words, the auxiliary capacitor plate 410 can form an auxiliary capacitor with the Top Gate layer in the pixel circuit layer 200 directly below it.

[0053] For ease of understanding, the present application provides the following examples: Figure 7 A specific display substrate stack is shown.

[0054] Specifically, Figure 7As shown, the pixel circuit layer 200 includes a fourth metal layer, a fourth insulating layer, an active layer, a fifth insulating layer, a second metal layer, a sixth insulating layer and a first metal layer stacked in sequence, the fourth metal layer includes a first gate (bottom gate) of the first transistor, the second metal layer includes a second gate (top gate) of the first transistor, and the first metal layer includes a source and a drain of the first transistor. The fourth metal layer can be called a bottom gate layer, the fourth insulating layer can be called a buffer layer, the active layer can be called a polysilicon (Poly) layer, the fifth insulating layer can be called a gate insulating (GI) layer, the second metal layer can be called a top gate layer, the sixth insulating layer can be called an interlayer insulating (ILD) layer, and the first metal layer can be called a source and drain (SD) layer.

[0055] Specifically, Figure 7 As shown, the first insulating layer may be referred to as a planar (PLN) layer, and the auxiliary layer may be referred to as an indium tin oxide (ITO) layer.

[0056] Specifically, Figure 7 As shown, the display substrate further includes: a second insulating layer and a third metal layer. The second insulating layer can be called a first passivation (PVX1) layer, and the third metal layer can be called a pad layer. Since the material of the pad is usually Cu, it can be called a Cu layer. The PVX1 layer is located on the side of the ITO layer away from the SD layer. The Cu layer includes a first metal trace and a second metal trace. The first metal trace is connected to a first power source, and the second metal trace is connected to a driving current output terminal of the first transistor. Figure 4 As shown, the first power supply is the VSS terminal, the driving current output terminal of the first transistor is the output terminal of the driving transistor T3, and in the light emitting stage, the output terminal of the driving transistor T3 is connected to the VDD terminal.

[0057] Specifically, Figure 7 As shown, the display substrate also includes: a third insulating layer, which can be called a second passivation (PVX2) layer, the PVX2 layer is located on the side of the Cu layer away from the SD layer, the PVX2 layer is provided with a third via and a fourth via, the third via and the first metal trace have an overlapping area, the fourth via and the second metal trace have an overlapping area, the portion of the first metal trace exposed through the third via and the portion of the second metal trace exposed through the fourth via are used to connect to the light emitting element (EL).

[0058] Specifically, Figure 7As shown, the display substrate further includes: a black matrix (BM) layer, which is located on the side of the PVX2 layer away from the SD layer; the portion exposed by the third via hole and the portion exposed by the fourth via hole are exposed through the opening area of ​​the BM layer. In practical applications, the display substrate stack can be provided with or without a BM layer, but adding a BM layer can improve the reflectivity of the metal and increase the visual integrated black effect.

[0059] Specifically, Figure 7 As shown, the display substrate further includes: a seventh insulating layer, located on a side of the BM layer away from the SD layer; the opening area of ​​the seventh insulating layer overlaps with the opening area of ​​the black matrix layer. Specifically, the seventh insulating layer can be called an organic resin (OC) layer, which protects the layers below.

[0060] In summary, Bottom Gate→Buffer→Poly→GI→Top Gate are mainly used to produce TFT tubes of pixel circuits and gate drive circuits (GOA); ILD is the via layer of Source, Drain and Poly, SD is used to make Source and Drain poles and connecting lines; PLN and PVX1 protect the TFT circuit and connect with the Cu pad vias. The subsequent PVX2 and OC processes produce the pad openings required for LED die bonding and protect the routing in the non-pad area.

[0061] It can be seen that the present application adds an ITO process after the PLN process to produce an auxiliary capacitor plate film layer, and connects it to the gate of the driving transistor through the PLN via, and connects it to the SD film layer through the PLN via to achieve the conduction of the charging signal. The original capacitance remains unchanged or can be reduced. The original capacitance is supplemented by the added auxiliary capacitor plate to maintain the continuous stability of the gate signal of the driving transistor. It can also save the routing space of the driving circuit and improve the pixel density.

[0062] Furthermore, the gate of the driving transistor can be controlled only by the auxiliary capacitor plate, and the original capacitor is removed, which can further save the wiring space of the pixel circuit and realize the design of high pixel density products.

[0063] In actual applications, the impact of the auxiliary capacitor plate added to the display substrate on the circuit signal below can be improved by increasing the charging time of the Data; in the original display substrate structure, the Cu pad overlaps with the TFT circuit below in a positive direction, which may have a certain impact on the TFT signal. The added auxiliary capacitor plate helps to reduce the impact of the Cu pad on the TFT signal.

[0064] like Figure 8 As shown, the embodiment of the present application also provides a method for manufacturing a display substrate, for manufacturing Figure 6The display substrate shown in the figure comprises the following steps:

[0065] S101, providing a substrate;

[0066] S102, sequentially forming a fourth metal layer, a fourth insulating layer, an active layer, a fifth insulating layer, a second metal layer, a sixth insulating layer and a first metal layer on the base substrate to form a pixel circuit layer, wherein the pixel circuit layer includes a first transistor and a second transistor;

[0067] S103, forming a first insulating layer on the pixel circuit layer, and forming a first via hole and a second via hole in the first insulating layer;

[0068] S104. Form an auxiliary layer on the first insulating layer, the auxiliary layer comprising an auxiliary capacitor plate, the auxiliary capacitor plate being connected to the gate of the first transistor through a first via hole penetrating the first insulating layer, the auxiliary capacitor plate being further connected to the charging output terminal of the second transistor through a second via hole penetrating the first insulating layer, and an orthographic projection of the auxiliary capacitor plate on the substrate and an orthographic projection of the first metal layer and / or the second metal layer in the pixel circuit layer on the substrate having an overlapping area.

[0069] The present application also provides a display device, including the display substrate described in the above embodiments, and a display function layer disposed on the display substrate. The display device can be any product or component with a display function, such as electronic paper, a mobile phone, a tablet computer, a television, a monitor, a laptop computer, a digital photo frame, a navigator, a wearable display device, etc.

[0070] In some embodiments, the display function layer may include Micro-LEDs, and the Micro-LEDs are disposed on the pads.

[0071] The embodiment of the present application provides a display substrate and a preparation method thereof, and a display device, wherein the display substrate includes a substrate, a pixel circuit layer, a first insulating layer and an auxiliary layer, wherein the auxiliary layer includes an auxiliary capacitor plate, wherein the auxiliary capacitor plate is connected to the gate of the first transistor in the pixel circuit layer through a first via hole penetrating the first insulating layer, and the auxiliary capacitor plate is also connected to the charging output terminal of the second transistor through a second via hole penetrating the first insulating layer, and the positive projection of the auxiliary capacitor plate on the substrate and the positive projection of the conductive film layer in the pixel circuit layer on the substrate have an overlapping area. It can be seen that the auxiliary capacitor plate added in the present application serves as one plate of the auxiliary capacitor, and the conductive film layer in the pixel circuit layer serves as another plate of the auxiliary capacitor. The increase of the auxiliary capacitor can, on the one hand, supplement the original capacitor while keeping the original capacitor of the pixel circuit unchanged, and maintain the continuous stability of the gate signal of the driving transistor; on the other hand, according to the size of the auxiliary capacitor, the area occupied by the original capacitor of the pixel circuit on the display substrate can be reduced or even removed, so as to achieve partial or complete replacement of the original capacitor, thereby saving the wiring space of the pixel driving circuit on the display substrate, and thus achieving an increase in the pixel density of the display screen.

[0072] It should be noted that:

[0073] In the description provided herein, a large number of specific details are described. However, it is understood that the embodiments of the present application can be practiced without these specific details. In some instances, well-known methods, structures and techniques are not shown in detail so as not to obscure the understanding of this description.

[0074] Similarly, it should be understood that in order to streamline the present application and help understand one or more of the various inventive aspects, in the above description of the exemplary embodiments of the present application, the various features of the present application are sometimes grouped together into a single embodiment, figure, or description thereof. However, the disclosed method should not be interpreted as reflecting the following intention: the claimed application requires more features than the features clearly stated in each claim. More specifically, as reflected in the claims below, the inventive aspects are less than all the features of the single embodiment disclosed above. Therefore, the claims following the specific embodiment are hereby expressly incorporated into the specific embodiment, wherein each claim itself serves as a separate embodiment of the present application.

[0075] Those skilled in the art will appreciate that the modules in the devices in the embodiments may be adaptively changed and arranged in one or more devices different from the embodiments. The modules or units or components in the embodiments may be combined into one module or unit or component, and in addition they may be divided into a plurality of submodules or subunits or subcomponents. Except that at least some of such features and / or processes or units are mutually exclusive, all features disclosed in this specification (including the accompanying claims, abstracts and drawings) and all processes or units of any method or device disclosed in this manner may be combined in any combination. Unless otherwise expressly stated, each feature disclosed in this specification (including the accompanying claims, abstracts and drawings) may be replaced by an alternative feature providing the same, equivalent or similar purpose.

[0076] In addition, those skilled in the art will appreciate that, although some embodiments described herein include certain features included in other embodiments but not other features, the combination of features of different embodiments is meant to be within the scope of the present application and form different embodiments. For example, in the claims below, any one of the claimed embodiments may be used in any combination.

[0077] The various component embodiments of the present application can be implemented in hardware, or in software modules running on one or more processors, or in a combination thereof. It should be understood by those skilled in the art that a microprocessor or digital signal processor (DSP) can be used in practice to implement some or all functions of some or all components in the creation device of the virtual machine according to the embodiment of the present application. The application can also be implemented as a device or device program (e.g., computer program and computer program product) for executing part or all of the methods described herein. Such a program implementing the present application can be stored on a computer-readable medium, or can have the form of one or more signals. Such a signal can be downloaded from an Internet website, or provided on a carrier signal, or provided in any other form.

[0078] It should be noted that the above embodiments illustrate the present application rather than limit the present application, and that those skilled in the art may design alternative embodiments without departing from the scope of the appended claims. In the claims, any reference symbol between brackets should not be constructed as a limitation to the claims. The word "comprising" does not exclude the presence of elements or steps not listed in the claims. The word "one" or "an" preceding an element does not exclude the presence of multiple such elements. The present application may be implemented by means of hardware including several different elements and by means of a suitably programmed computer. In a unit claim that lists several devices, several of these devices may be embodied by the same hardware item. The use of the words first, second, and third, etc. does not indicate any order. These words may be interpreted as names.

[0079] The above description is only a preferred embodiment of the present application, and does not limit the patent scope of the present application. All equivalent structural changes made based on the concept of the present application and the contents of the present application description and drawings, or direct / indirect application in other related technical fields are included in the patent protection scope of the present application.

Claims

1. A display substrate, characterized in that: include: substrate; A pixel circuit layer, located on one side of the substrate, comprising a first transistor and a second transistor; A first insulating layer, located on a side of the pixel circuit layer facing away from the substrate; An auxiliary layer is located on a side of the first insulating layer away from the pixel circuit layer, and includes an auxiliary capacitor plate. The auxiliary capacitor plate is connected to the gate of the first transistor through a first via hole penetrating the first insulating layer. The auxiliary capacitor plate is also connected to the charging output terminal of the second transistor through a second via hole penetrating the first insulating layer. The orthographic projection of the auxiliary capacitor plate on the substrate and the orthographic projection of the conductive film layer in the pixel circuit layer on the substrate have an overlapping area.

2. The display substrate according to claim 1, characterized in that: The pixel circuit layer includes a first metal layer, the first metal layer includes a source and a drain of the first transistor, and the conductive film layer includes the first metal layer.

3. The display substrate according to claim 1 or 2, characterized in that: The pixel circuit layer includes a second metal layer, the second metal layer includes a gate of the first transistor, and the conductive film layer includes the second metal layer.

4. The display substrate according to claim 1, characterized in that: The material of the auxiliary capacitor plate includes metal or transparent conductive material.

5. The display substrate according to claim 1, characterized in that: The display substrate also includes: a second insulating layer and a third metal layer, the second insulating layer is located on the side of the auxiliary layer away from the pixel circuit layer, the third metal layer includes a first metal routing and a second metal routing, the first metal routing is connected to the first power supply, and the second metal routing is connected to the driving current output terminal of the first transistor.

6. The display substrate according to claim 5, characterized in that: The display substrate also includes: a third insulating layer, the third insulating layer is located on a side of the third metal layer away from the pixel circuit layer, the third insulating layer is provided with a third via and a fourth via, the third via and the first metal routing have an overlapping area, the fourth via and the second metal routing have an overlapping area, and the portion of the first metal routing exposed through the third via and the portion of the second metal routing exposed through the fourth via are used to be connected to the light-emitting element.

7. The display substrate according to claim 1, characterized in that: The pixel circuit layer includes a fourth metal layer, a fourth insulating layer, an active layer, a fifth insulating layer, a second metal layer, a sixth insulating layer and a first metal layer stacked in sequence, the fourth metal layer includes a first gate of the first transistor, and the second metal layer includes a second gate of the first transistor.

8. The display substrate according to claim 6, characterized in that: The display substrate further comprises: A black matrix layer, located on a side of the third insulating layer away from the pixel circuit layer; The portion exposed by the third via hole and the portion exposed by the fourth via hole are exposed through the opening area of ​​the black matrix layer.

9. The display substrate according to claim 8, characterized in that: The display substrate further comprises: a seventh insulating layer, located on a side of the black matrix layer away from the pixel circuit layer; The opening area of ​​the seventh insulating layer overlaps with the opening area of ​​the black matrix layer.

10. A display device, characterized in that: include: The display substrate according to any one of claims 1 to 9; as well as, A display function layer is arranged on the display substrate.

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