Delay turn-off control circuit
By designing a delay shutdown control circuit including a voltage divider circuit and a switch tube, the problem of the short shutdown time of the existing control circuit is solved, and the shutdown time is extended and the stability of system data storage is ensured.
Patent Information
- Application Number
- CN202421766951.5
- Authority / Receiving Office
- CN · China
- Patent Type
- Utility models(China)
- Current Assignee / Owner
- Filing Date
- 2024-07-25
- Publication Date
- 2025-05-16
- Estimated Expiration
- 2034-07-25
AI Technical Summary
The existing control circuit has too short the time to change from low to high to CONTROL signal, which cannot give the system enough time to store data, resulting in the risk of data loss.
A delayed shutdown control circuit is designed, and the PS_ON to CONTROL shutdown time is extended through the combination of the first voltage divider circuit, the second voltage divider circuit, the switch tube and the shunt resistor, ensuring that the system has sufficient time to store data.
It achieves extended shutdown time, provides the system with sufficient time to store data, avoids the risk of data loss, and makes the circuit simple and stable operation.
Smart Images
Figure CN222884658U_ABST
Abstract
Description
Technical Field
[0001] The utility model relates to the technical field of control circuits, in particular to a control circuit for delayed shutdown. Background Art
[0002] In existing server systems, power supply PS_ON refers to the power start signal, which is generally sent by the motherboard and connected to the PS_ON pin on the power supply through the power connection line. When the motherboard sends this signal, the power supply will start, thereby providing power supply to the entire system, which is one of the necessary conditions for computer startup. Traditional control circuits, such as Figure 1 As shown, Q1 and Q2 are transistors, the output terminal of the first voltage divider circuit is connected to the base of the transistor Q1, and the output terminal of the second voltage divider circuit is connected to the base of the transistor Q2. When the PS_ON signal is high, Q1 is turned on, Q2 is turned off, the CONTROL signal is in a high impedance state, and the voltage is turned off. Output; when the PS_ON signal is low, Q1 is turned off, Q2 is turned on, the CONTROL signal is in a low impedance state, and the power supply starts normally.
[0003] However, when the PS_ON signal level changes from low to high, the BE level of Q1 changes from low to high, Q1 is turned on, the voltage at the output of the second voltage divider circuit is pulled down, the BE level of Q2 changes to low level, Q2 is quickly cut off, and the CONTROL signal changes from low impedance to high impedance, so the time from PS_ON signal changing from low to high to CONTROL signal is very short, within 1ms. After receiving the PS_ON signal change, the system needs enough time to store data, and may need to delay the PS_ON signal from low to high for tens of milliseconds before turning off the power output, so it is necessary to extend the PS_ON to CONTROL shutdown time.
[0004] Therefore, it is necessary to provide a control circuit for delayed shutdown to increase the shutdown delay time and give the system enough time to store data. Utility Model Content
[0005] The utility model discloses a control circuit for delayed shutdown, which relates to a switching power supply, and in particular to a shutdown control circuit requiring a long holding time, and can effectively solve the technical problems involved in the background technology.
[0006] To achieve the above purpose, the technical solution of the utility model is:
[0007] A control circuit for delayed shutdown includes a resistor R2, one end of the resistor R2 is connected to a port DC+ and one end of a resistor R3, the other end of the resistor R2 is connected to one end of a resistor R6, one end of a resistor R1 and a gate of a switch tube Q1, the other end of the resistor R6 is connected to a port PS_ON, the other end of the resistor R3 is connected to one end of a resistor R4 and a drain of the switch tube Q1, the other end of the resistor R4 is connected to one end of a resistor R5, one end of a capacitor C1 and a gate of the switch tube Q2, the drain of the switch tube Q2 is connected to a port CONTROL, and the other end of the resistor R1, a source of the switch tube Q1, the other end of the resistor R5, the other end of the capacitor C1 and a source of the switch tube Q2 are connected to a port AGND.
[0008] Specifically, a delayed shutdown control circuit is disclosed, including a first voltage divider circuit, a second voltage divider circuit, two switching tubes and a shunt resistor, wherein a first end of the first voltage divider circuit (R1 and R2) is connected to a DC power supply DC+, a second end is grounded, and a voltage signal output end of the first voltage divider circuit is connected to a gate of the switching tube Q1; a first end of the shunt resistor is connected to a voltage signal output end of the first voltage divider circuit, and a second end of the shunt resistor is connected to a control signal PS_ON; a gate of the switching tube Q1 is connected to a voltage signal output end of the first voltage divider circuit, a source is grounded, and a drain is connected to a second end of a second voltage divider resistor; a first end of the second voltage divider circuit (R3, R4 and R5) is connected to a DC power supply DC+, a third end is grounded, and an output end of the second voltage divider resistor is connected to the gate of the switching tube Q2; a source of the switching tube Q2 is grounded, and a drain is connected to a control signal end, so that delayed shutdown can be achieved to meet the requirements of a long holding time control circuit.
[0009] As a preferred improvement of the present invention: the switch tube Q1 and the switch tube Q2 are MOS tubes.
[0010] As a preferred improvement of the present invention: the port DC+ is connected to a direct current power supply.
[0011] As a preferred improvement of the present invention: the port PS_ON is connected to the control mainboard.
[0012] As a preferred improvement of the present invention: the port AGND is grounded.
[0013] As a preferred improvement of the present invention: the port CONTROL is connected to a power supply component of the server system.
[0014] The beneficial effects of the utility model are as follows:
[0015] The circuit is simple and runs stably. It can delay the shutdown of the signal. When the PS_ON signal changes from low to high, it gives the system enough time to store data to meet the application of the system. BRIEF DESCRIPTION OF THE DRAWINGS
[0016] In order to more clearly illustrate the technical solutions in the embodiments of the present utility model, the following briefly introduces the drawings required for use in the description of the embodiments. Obviously, the drawings described below are only some embodiments of the present utility model. For those skilled in the art, other drawings can be obtained based on these drawings without creative work, among which:
[0017] Figure 1 is a schematic diagram of a control circuit;
[0018] Figure 2 The utility model is a schematic diagram of a control circuit for delayed shutdown. DETAILED DESCRIPTION
[0019] The technical solutions in the embodiments of the present invention will be described clearly and completely below in combination with the embodiments of the present invention. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present invention.
[0020] It should be noted that all directional indications in the embodiments of the present invention (such as up, down, left, right, front, back, etc.) are only used to explain the relative position relationship, movement status, etc. between the components under a certain specific posture (as shown in the accompanying drawings). If the specific posture changes, the directional indication will also change accordingly.
[0021] In addition, in the present invention, descriptions such as "first", "second", etc. are only used for descriptive purposes and cannot be understood as indicating or implying their relative importance or implicitly indicating the number of the indicated technical features. Therefore, the features defined as "first" or "second" may explicitly or implicitly include at least one of the features. In the description of the present invention, the meaning of "plurality" is at least two, such as two, three, etc., unless otherwise clearly and specifically defined.
[0022] In the present invention, unless otherwise clearly specified and limited, the terms "connection", "fixation", etc. should be understood in a broad sense. For example, "fixation" can be a fixed connection, a detachable connection, or an integral connection; it can be a mechanical connection or an electrical connection; it can be a direct connection or an indirect connection through an intermediate medium, it can be the internal connection of two elements or the interaction relationship between two elements, unless otherwise clearly defined. For ordinary technicians in this field, the specific meanings of the above terms in the present invention can be understood according to specific circumstances.
[0023] In addition, the technical solutions between the various embodiments of the present invention can be combined with each other, but it must be based on the fact that ordinary technicians in the field can implement it. When the combination of technical solutions is contradictory or cannot be implemented, it should be deemed that such combination of technical solutions does not exist and is not within the scope of protection required by the present invention.
[0024] See also Figure 2 As shown, the utility model provides a delayed shutdown control circuit, including a resistor R2, one end of the resistor R2 is connected to a port DC+ and one end of a resistor R3, the other end of the resistor R2 is connected to one end of a resistor R6, one end of a resistor R1 and a gate of a switch tube Q1, the other end of the resistor R6 is connected to a port PS_ON (control input), the other end of the resistor R3 is connected to one end of a resistor R4 and a drain of the switch tube Q1, the other end of the resistor R4 is connected to one end of a resistor R5, one end of a capacitor C1 and a gate of a switch tube Q2, the drain of the switch tube Q2 is connected to a port CONTROL (control output), and the other end of the resistor R1, the source of the switch tube Q1, the other end of the resistor R5, the other end of the capacitor C1 and the source of the switch tube Q2 are connected to a port AGND.
[0025] Specifically, resistors R1 and R2 form a first voltage divider circuit, a first end of the first voltage divider circuit is connected to a DC power supply DC+, a second end is grounded, and a voltage signal output end of the first voltage divider circuit is connected to the gate of the switch tube Q1. Resistors R3, R4, and R5 form a second voltage divider circuit, a first end of the second voltage divider circuit is connected to a DC power supply DC+, a second end is grounded, and a voltage signal output end of the second voltage divider circuit is connected to the gate of the second switch tube. Preferably, the switch tube is a MOS tube, a gate of the MOS tube Q1 is connected to the voltage signal output end of the first voltage divider circuit, and at the same time connected to the control signal PS_ON through a shunt resistor, a source of the MOS tube is grounded, and a drain of the MOS tube is connected to the second end of the second voltage divider circuit. The gate of the MOS tube Q2 is connected to the output end of the second voltage divider circuit, a drain is connected to the control signal, and a source is grounded. A filter capacitor is also included, the filter capacitor is connected between the voltage signal output end of the second voltage divider circuit and the ground, and the circuit can increase the shutdown delay time, giving the system enough time to store data.
[0026] As an implementation manner, the switch tube Q1 and the switch tube Q2 are MOS tubes, the port DC+ is connected to a DC power supply, the port PS_ON is connected to a control mainboard, the port AGND is grounded, and the port CONTROL is connected to a power supply component of a server system.
[0027] Embodiment 1
[0028] The control circuit for delayed shutdown includes a first voltage divider circuit, a second voltage divider circuit, a shunt resistor R6, a MOS tube Q1, a MOS tube Q2 and a first filter capacitor C1. The first voltage divider circuit is composed of a resistor R1 and a resistor R2 connected in series, one end of the resistor R2 of the first voltage divider circuit is connected to a DC power supply DC+, and the other end of the resistor R1 is grounded. The first voltage divider circuit uses the connection point of the resistor R1 and the resistor R2 as the voltage signal output end of the first voltage divider circuit, which is connected to the gate of the MOS tube Q1. The second voltage divider circuit is composed of a resistor R3, a resistor R4 and a resistor R5 connected in series in sequence, one end of the resistor R3 of the second voltage divider circuit is connected to a DC power supply DC+, the connection point of the resistor R3 and the resistor R4 is connected to the source of the MOS tube Q1, and the connection point of the resistor R4 and the resistor R5 is used as the voltage signal output end of the second voltage divider circuit, which is connected to the gate of the MOS tube Q2. The drain of the MOS tube Q1 is connected to the connection point of the resistor R3 and the resistor R4 of the second voltage divider circuit, the source of the MOS tube Q1 is grounded, and the gate of the MOS tube Q1 is connected to the voltage signal output end of the first voltage divider circuit (the connection point of the resistor R1 and the resistor R2). The drain of the MOS tube Q2 is connected to the CONTROL signal, the source of the MOS tube Q2 is grounded, and the gate of the MOS tube Q2 is connected to the voltage signal output end of the second voltage divider circuit (the connection point of the resistor R4 and the resistor R5), and the filter capacitor C1 is connected between the voltage signal output end of the second voltage divider circuit and the ground.
[0029] By replacing Q1 and Q2 from triodes to MOS tubes, adding resistor R4, appropriately increasing the resistance of resistors R4 and R5, and increasing the capacitance of C1, the turn-off delay time of the control circuit can be increased. When the PS_ON signal is low, the gate voltage of MOS tube Q1 is zero, and MOS tube Q1 is cut off. The DC power supply DC+ divides the voltage through resistors R3, R4, and R5 to provide a driving voltage to the gate of MOS tube Q2. When the gate voltage of MOS tube Q2 reaches the turn-on threshold, Q2 is turned on and the CONTROL signal is pulled low. When the PS_ON signal changes from low to high, the DC voltage DC+ is divided by resistors R1 and R2 to provide a driving voltage to the gate of the MOS tube Q1. When the gate voltage of the MOS tube Q1 reaches the turn-on threshold, Q1 is turned on, and the voltage at the connection point between the resistor R3 and the resistor R4 of the second voltage divider circuit is pulled down, and the voltage stored in the filter capacitor C1 can continue to provide a driving voltage to the MOS tube Q2 until the C1 voltage is discharged to a voltage lower than the turn-on threshold voltage of the MOS tube Q2, so that the MOS tube Q2 can be kept turned on. By taking appropriate values of C1, R4 and R5, the delay can be more than tens of milliseconds. The control circuit of the above embodiment can delay the turn-off of the signal. When the PS_ON signal changes from low to high, it gives the system enough time to store data to meet the application of the system.
[0030] Although the implementation scheme of the utility model has been disclosed as above, it is not limited to the applications listed in the specification and the implementation scheme. It can be fully applied to various fields suitable for the utility model. For those familiar with the art, additional modifications can be easily implemented. Therefore, without departing from the general concept defined by the claims and the scope of equivalents, the utility model is not limited to the specific details and the illustrations shown and described herein.
Claims
1. A control circuit for delayed shutdown, characterized in that: It includes a resistor R2, one end of which is connected to the port DC+ and one end of the resistor R3, the other end of the resistor R2 is connected to one end of the resistor R6, one end of the resistor R1 and the gate of the switch tube Q1, the other end of the resistor R6 is connected to the port PS_ON, the other end of the resistor R3 is connected to one end of the resistor R4 and the drain of the switch tube Q1, the other end of the resistor R4 is connected to one end of the resistor R5, one end of the capacitor C1 and the gate of the switch tube Q2, the drain of the switch tube Q2 is connected to the port CONTROL, and the other end of the resistor R1, the source of the switch tube Q1, the other end of the resistor R5, the other end of the capacitor C1 and the source of the switch tube Q2 are connected to the port AGND.
2. A control circuit for delayed shutdown according to claim 1, characterized in that: The switch tube Q1 and the switch tube Q2 are MOS tubes.
3. A control circuit for delayed shutdown according to claim 1, characterized in that: The port DC+ is connected to a direct current power source.
4. A control circuit for delayed shutdown according to claim 1, characterized in that: The port PS_ON is connected to the control main board.
5. The control circuit for delayed shutdown according to claim 1, characterized in that: The port AGND is grounded.
6. The control circuit for delayed shutdown according to claim 1, characterized in that: The CONTROL port is connected to a power supply component of the server system.