Power supply time sequence device and power supply output system

Abstract

The utility model discloses a power supply time sequence device and a power supply output system, and the device comprises a power-on circuit, the input end of which is connected with a power supply voltage and outputs a first power-on control voltage; the control circuit comprises a first input end and a second input end, the first input end is connected to the power-on circuit, and reference voltage is connected to the second input end; the control circuit analyzes the voltage of the power-on circuit and the reference voltage, and when the voltage of the power-on circuit is larger than the reference voltage, a second power-on control voltage is output; the switching circuit comprises a first control end and a second control end, and the first control end is connected to the power-on circuit and outputs a first voltage after receiving a first power-on control voltage; the second control end is connected to the control circuit and outputs a second voltage after receiving the second power-on control voltage; the first voltage is less than the second voltage. According to the utility model, the impact of large current generated instantly in the power-on process can be avoided, and the problem that the output first voltage is slightly lower than the power supply voltage in the slow power-on process is solved.

Description

Technical Field

[0001] The present application relates to the technical field of power-on control, and in particular to a power timing device and a power output system. Background Art

[0002] In actual circuit applications, many circuit boards contain large-capacity capacitors or capacitive loads, which will generate very large currents when plugged into the power supply. This will not only cause a momentary overload on the power supply, but also interfere with other products. When an arc is generated during the power-on process, the plug that provides the power supply will be severely damaged.

[0003] When multiple electrical devices are hot-plugged into a power supply, the power supply charges the capacitors in the electrical devices. The instantaneous high current provided by the power supply will have a great impact on the electrical devices. Therefore, a slow power-on device is used to slowly increase the voltage provided by the power supply to avoid instantaneous high current and cause power supply overload. Summary of the invention

[0004] In order to solve the problem that the capacitive load generates a large current during the power-on process, the utility model provides a power timing device and a power output system. The specific technical solution is as follows:

[0005] The utility model provides a power timing device, comprising:

[0006] A power-on circuit, wherein the input terminal of the power-on circuit is used to access the power supply voltage and output a first power-on control voltage.

[0007] The control circuit includes a first input terminal and a second input terminal, wherein the first input terminal is connected to the power-on circuit and the second input terminal is connected to a reference voltage; the control circuit compares and analyzes the voltage of the power-on circuit and the reference voltage, and outputs a second power-on control voltage when the voltage of the power-on circuit is greater than the reference voltage.

[0008] The switch circuit includes a first control terminal and a second control terminal. The input terminal of the switch circuit is used to access the power supply voltage. The first control terminal is connected to the power-on circuit. After receiving the first power-on control voltage, the first voltage is output; the second control terminal is connected to the control circuit. After receiving the second power-on control voltage, the second voltage is output; the first voltage is less than the second voltage.

[0009] The power timing device provided by the utility model slowly powers on the connected power supply voltage through a power-on circuit, thereby avoiding instantaneous large current shock, reducing the shock to the power supply and circuit, and extending the service life of the equipment; during the slow power-on process, a second voltage close to the power supply voltage can be output through the control circuit and the switch circuit, solving the problem that the output first voltage is slightly lower than the power supply voltage during the slow power-on process.

[0010] In one embodiment, the power sequence device further includes:

[0011] The voltage divider circuit has an input end for receiving a power supply voltage, and an output end of the voltage divider circuit is connected to a second input end for inputting a reference voltage to the control circuit.

[0012] The voltage divider circuit provided by the utility model provides a stable reference voltage, and uses the stable reference voltage generated by the voltage divider circuit as a reference for comparison with the voltage of the power-on circuit, thereby outputting a second voltage.

[0013] In one embodiment, the voltage divider circuit includes:

[0014] A second resistor and a third resistor; one end of the second resistor forms the input end of the voltage divider circuit, and the other end of the second resistor is connected to one end of the third resistor; one end of the third resistor also forms the output end of the voltage divider circuit, and the other end of the third resistor is grounded.

[0015] The voltage divider circuit provided by the utility model can flexibly design a required reference voltage by connecting two resistors in series and selecting resistors with different resistance values.

[0016] In one embodiment, the power-up circuit comprises:

[0017] A first resistor and a capacitor; one end of the first resistor is used to access the power supply voltage, and the other end of the first resistor is connected to one end of the capacitor; the other end of the capacitor is grounded; when the capacitor is charged, a first power-on control voltage is slowly output from one end of the capacitor to the first control end.

[0018] The power-on circuit provided by the utility model is connected in series with a first resistor and a capacitor, so that when the power supply is powered on, the capacitor in the power-on circuit starts to charge, which can reduce the current impact during startup and smoothly increase the voltage of the load.

[0019] In one embodiment, the switching circuit comprises:

[0020] N-MOS tube, the drain of the N-MOS tube is used to access the power supply voltage; the gate of the N-MOS tube is connected to the power-on circuit, and after receiving the first power-on control voltage, the N-MOS tube is turned on; the first voltage is output at the source of the N-MOS tube.

[0021] The N-MOS tube in the switch circuit provided by the utility model is connected to the power-on circuit, so that after the N-MOS tube is turned on, a smooth output first voltage is achieved.

[0022] In one embodiment, the switch circuit further comprises:

[0023] A P-MOS tube, the source of which is used to access the power supply voltage; the gate of which is connected to the control circuit, and which turns on the P-MOS tube after receiving the second power-on control voltage; and the drain of the P-MOS tube outputs the second voltage.

[0024] The P-MOS tube in the switch circuit provided by the utility model is connected to the control circuit so that after the P-MOS tube is turned on, the second voltage is output, thereby solving the problem that the output first voltage cannot reach the connected power supply voltage.

[0025] In one embodiment, the control circuit comprises:

[0026] A comparator, wherein the inverting input terminal of the comparator is connected to the power-on circuit, and the positive input terminal of the comparator is connected to the reference voltage. When the voltage of the power-on circuit is greater than the reference voltage, the output terminal of the comparator outputs a low level.

[0027] A fourth resistor and a fifth resistor; one end of the fourth resistor is connected to the output end of the comparator, and the other end of the fourth resistor is connected to one end of the fifth resistor; the other end of the fifth resistor is connected to the power supply voltage; when the output of the comparator is at a low level, one end of the fifth resistor outputs a second power-on control voltage to the second control end.

[0028] The control circuit provided by the utility model compares the output voltage of the power-on circuit and the reference voltage through a comparator. When the output voltage of the power-on circuit is greater than the reference voltage, the output end of the comparator outputs a low level, and the fifth resistor outputs a second power-on control voltage to the second control end, thereby turning on the P-MOS tube.

[0029] The utility model also provides a power output system, comprising any one of the power timing devices described above; the system also comprises a power socket, through which the power voltage is connected; and a power timing device, which is connected to the power socket and is used to output a first voltage or a second voltage to one or more capacitive load circuits.

[0030] The power timing device and power output system provided by the utility model can smoothly increase the voltage provided by the power supply when the power supply is started, thereby avoiding the problem of power supply overload caused by instantaneous generation of large current and solving the problem that the N-MOS tube cannot output a voltage close to the connected power supply. BRIEF DESCRIPTION OF THE DRAWINGS

[0031] In order to more clearly illustrate the technical solutions in the embodiments of the present invention, the drawings required for use in the description of the embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without creative work.

[0032] Figure 1 It is a structural schematic diagram of a power output system of an embodiment of the utility model;

[0033] Figure 2 This is an application block diagram of a power timing device according to an embodiment of the utility model;

[0034] Figure 3 It is a structural schematic diagram of a power timing device according to an embodiment of the utility model;

[0035] Figure 4 It is a circuit diagram of a power timing device of an embodiment of the utility model;

[0036] Figure 5 This is a power-on timing diagram of a power timing device of an embodiment of the utility model;

[0037] Reference numerals: power socket-100, power timing device-200, power-on circuit-210, control circuit-220, switch circuit-230 and voltage divider circuit-240. DETAILED DESCRIPTION

[0038] In the following description, specific details such as specific system structures, technologies, etc. are provided for the purpose of illustration rather than limitation, so as to provide a thorough understanding of the embodiments of the present application. However, it should be clear to those skilled in the art that the present application may also be implemented in other embodiments without these specific details. In other cases, detailed descriptions of well-known systems, devices, circuits, and methods are omitted to prevent unnecessary details from obstructing the description of the present application.

[0039] It should be understood that when used in this specification and the appended claims, the term "comprising" indicates the presence of the described features, integers, steps, operations, elements and / or components, but does not exclude the presence or addition of one or more other features, integers, steps, operations, elements, components and / or collections.

[0040] It should be further understood that the term “and / or” used in the specification and appended claims refers to any combination and all possible combinations of one or more of the associated listed items, and includes these combinations.

[0041] In addition, in the description of the present application, the terms "first", "second", etc. are only used to distinguish the description and cannot be understood as indicating or implying relative importance.

[0042] In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the specific implementation methods of the present invention will be described below with reference to the accompanying drawings. Obviously, the accompanying drawings described below are only some embodiments of the present invention. For ordinary technicians in this field, other drawings and other implementation methods can be obtained based on these drawings without creative work.

[0043] Circuit boards may encounter many problems when powered on, which may be related to design, manufacturing, component quality, environmental factors or improper operation. Some common problems during the circuit power-up process are: current surge, capacitor explosion, power supply overload, etc.

[0044] Among them, excessive current shock may make the components on the circuit board unable to withstand it, resulting in component damage or shortened life; capacitor explosion is because the capacitor is connected to overcurrent or overvoltage when powered on; if the load on the circuit board exceeds the rated output capacity of the power supply, it may cause the power supply to overload, thus affecting the stability and life of the circuit.

[0045] When dealing with the overcurrent problem during power-on, the usual solution is: connect a fixed resistor in series with a thyristor to limit the current through the fixed resistor during power-on. When certain conditions are met, the thyristor is turned on and the fixed resistor is short-circuited, thereby reducing power consumption and surge current; use a negative temperature coefficient thermistor, connect an NTC resistor in series at the power input end, and use its high resistance at room temperature and its resistance value decreases as the temperature rises to limit the surge current during power-on.

[0046] However, when using fixed resistors, greater power consumption may be generated during normal operation, reducing system efficiency; the current limiting effect of a series NTC thermistor or fixed resistor will be greatly affected by temperature, but may result in greater power loss after startup.

[0047] Therefore, the utility model proposes a power output system, including a power socket and a power sequence device. The power socket is connected to the power supply voltage, and the power sequence device smoothly processes the connected power supply voltage and outputs it to the capacitive load circuit of the subsequent stage.

[0048] Among them, the utility model proposes a power timing device, which gradually increases the load voltage through the power-on circuit, thereby avoiding the instantaneous large current impact on the subsequently connected capacitive load when powering on, and can also gradually reduce resistance, reduce power loss, and improve system efficiency.

[0049] An embodiment of the utility model, as Figure 1 As shown, the utility model provides a power output system, including a power socket 100 and a power timing device 200.

[0050] The power socket 100 is connected to the power voltage through the power socket 100; the power timing device 200 is connected to the power socket 100 and is used to output the first voltage or the second voltage to one or more capacitive load circuits.

[0051] Specifically, the power socket 100 is connected to the power voltage, the power sequence device 200 is inserted into the power socket 100, and the capacitive load is then inserted into the power sequence device 200. When multiple capacitive load circuits are involved, the multiple capacitive load circuits need to be connected in parallel before being inserted into the power sequence device 200. When the power is started, the power sequence device 200 is powered on slowly, and the voltage output to the capacitive load circuit also rises slowly, thereby avoiding the instantaneous generation of a large current when the power is started, and reducing the current shock.

[0052] The power output system provided by the utility model can smoothly increase the voltage provided by the power supply when the power supply is started, thereby avoiding the problem of power supply overload caused by instantaneous generation of large current.

[0053] An embodiment of the utility model, as Figure 2 As shown, the utility model provides a power sequence device 200 , including a power-on circuit 210 , a control circuit 220 and a switch circuit 230 .

[0054] The power-on circuit 210 has an input terminal for receiving a power supply voltage and outputting a first power-on control voltage.

[0055] The control circuit 220 includes a first input terminal and a second input terminal, the first input terminal is connected to the power-on circuit 210, and the second input terminal is connected to the reference voltage; the control circuit 220 compares and analyzes the voltage of the power-on circuit 210 and the reference voltage, and when the voltage of the power-on circuit 210 is greater than the reference voltage, the control circuit 220 outputs a second power-on control voltage.

[0056] The switch circuit 230 includes a first control terminal and a second control terminal. The input terminal of the switch circuit 230 is used to access the power supply voltage. The first control terminal is connected to the power-on circuit 210, and outputs a first voltage after receiving a first power-on control voltage; the second control terminal is connected to the control circuit 220, and outputs a second voltage after receiving a second power-on control voltage; the first voltage is less than the second voltage.

[0057] Specifically, after the power timing device 200 is inserted into the power socket 100, the power socket 100 provides a power voltage to the input end of the power-on circuit 210. After power-on, the power-on circuit 210 gradually charges and outputs a first power-on control voltage to the first input end of the control circuit 220 and the first control end of the switch circuit 230.

[0058] When the output voltage of the power-on circuit 210 reaches the first power-on control voltage, the first control terminal of the switch circuit 230 is turned on to output a first voltage, but the output first voltage is lower than the power voltage connected to the power socket 100 .

[0059] The first input terminal of the control circuit 220 receives the output voltage of the power-on circuit 210, and the second input terminal thereof is connected to a reference voltage. The two voltage values ​​are compared in the control circuit 220, and when the output voltage of the power-on circuit 210 is greater than the reference voltage, the control circuit 220 outputs a second power-on control voltage to the switch circuit.

[0060] After receiving the second power-on control voltage provided by the control circuit 220, the switch circuit 230 turns on the second control terminal of the switch circuit 230 and outputs the second voltage. The output second voltage is close to the power supply voltage connected to the power socket 100. Figure 5 As shown, the power supply voltage connected to the power supply timing device 200 is a constant value, the output first voltage is a slowly rising voltage curve, and the output second voltage is closer to the power supply voltage.

[0061] The power timing device 200 provided by the utility model slowly powers on the connected power supply voltage through the power-on circuit 210, thereby avoiding instantaneous large current shock, reducing the impact on the power supply and circuit, and extending the service life of the equipment; during the slow power-on process, the control circuit 220 and the switch circuit 230 can output a second voltage close to the power supply voltage, solving the problem that the output first voltage is slightly lower than the power supply voltage during the slow power-on process.

[0062] In one embodiment of a power timing device of the utility model, based on the above embodiment, the reference voltage can be provided by a voltage divider circuit, and the number of resistors in the voltage divider circuit can be multiple. The utility model does not limit the type and number of resistors. Figure 3 and Figure 4 As shown, a power timing device 200 provided by the utility model further includes a voltage divider circuit 240 .

[0063] The voltage divider circuit 240 has an input terminal for receiving a power supply voltage, and an output terminal of the voltage divider circuit 240 is connected to a second input terminal for inputting a reference voltage to the control circuit.

[0064] Among them, the voltage divider circuit 240 includes a second resistor R2 and a third resistor R3; one end of the second resistor R2 forms the input end of the voltage divider circuit, and the other end of the second resistor R2 is connected to one end of the third resistor R3; one end of the third resistor also forms the output end of the voltage divider circuit, and the other end of the third resistor R3 is grounded.

[0065] Specifically, after the voltage divider circuit 240 is connected to the power supply voltage, a stable reference voltage can be formed to the second input terminal of the control circuit 220 .

[0066] In the voltage divider circuit 240, the first end of the second resistor R2 is connected to the power supply voltage, the second end of the second resistor R2 is connected to the first end of the third resistor R3, and the second end of the third resistor R3 is grounded. By adjusting the values ​​of R2 and R3, the magnitude of the required reference voltage is changed, and the reference voltage value can be flexibly output, thereby achieving the range and accuracy of controlling the reference voltage.

[0067] Through the voltage divider circuit 240 provided by the present invention, the required reference voltage can be flexibly designed based on the selection of resistors with different resistance values, so as to provide a stable reference voltage to the control circuit 220.

[0068] The utility model provides an embodiment of a power sequence device. Based on any of the above embodiments, the power-on circuit 210 may be an RC circuit. The number of resistors and capacitors in the power-on circuit may be multiple. The utility model does not limit the type and number of resistors and capacitors. Figure 3 and Figure 4 As shown, a power-on circuit 210 of a power sequence device 200 provided by the present invention includes:

[0069] A first resistor R1 and a capacitor C1; one end of the first resistor R1 is used to access the power supply voltage, and the other end of the first resistor R1 is connected to one end of the capacitor C1; the other end of the capacitor C1 is grounded;

[0070] When the capacitor C1 is charged, a first power-on control voltage is slowly outputted from one end of the capacitor C1 to the first control end.

[0071] Specifically, in the power-on circuit 210 , a first end of the first resistor R1 is connected to a power supply voltage, a second end of the first resistor R1 is connected to a first end of the capacitor C1 , and a second end of the capacitor C1 is grounded.

[0072] The first resistor R1 can limit the current in the power-on circuit 210, thereby protecting other components in the power-on circuit 210 from being damaged by excessive current. When the power-on circuit 210 is connected to the power supply voltage, the capacitor C1 will be gradually charged.

[0073] According to the present invention, a capacitor C1 is connected across the switch circuit 230, and the capacitor C1 is slowly charged through the first resistor R1, so as to control the current impact during the power-on process.

[0074] An embodiment of a power timing device of the utility model is based on any one of the above embodiments. Figure 3 and Figure 4As shown, the control circuit 220 of a power sequence device 200 provided by the present invention includes a comparator U1.2, a fourth resistor R4 and a fifth resistor R5.

[0075] Comparator U1.2, the inverting input terminal of comparator U1.2 is connected to the power-on circuit 210, and the positive input terminal of comparator U1.2 is connected to the reference voltage. When the voltage of the power-on circuit 210 is greater than the reference voltage, the output terminal of comparator U1.2 outputs a low level.

[0076] A fourth resistor R4 and a fifth resistor R5; one end of the fourth resistor R4 is connected to the output end of the comparator U1.2, and the other end of the fourth resistor R4 is connected to one end of the fifth resistor R5; the other end of the fifth resistor R5 is connected to the power supply voltage; when the output of the comparator U1.2 is at a low level, one end of the fifth resistor R5 outputs a second power-on control voltage to the second control end.

[0077] Specifically, the reverse input terminal of the comparator U1.2 is connected to the first end of the capacitor C1, the forward input terminal of the comparator U1.2 is connected to the first end of the third resistor R3, and the output terminal of the comparator U1.2 is connected to the first end of the fourth resistor R4. The voltage input to the reverse input terminal of the comparator U1.2 is the voltage of the capacitor C1, and the voltage input to the forward input terminal of the comparator U1.2 is the voltage of the third resistor R3 (i.e., the reference voltage).

[0078] The second end of the fourth resistor R4 is connected to the first end of the fifth resistor R5, and the second end of the fifth resistor R5 is connected to the power supply voltage. The voltage of the fifth resistor R5 is used as the second power-on control voltage.

[0079] When powered on, the capacitor C1 of the power-on circuit 210 is slowly charged, and the voltage input to the reverse input terminal of the comparator U1.2 is gradually rising. When the voltage of the power-on circuit 210 is greater than the reference voltage, the fifth resistor R5 can provide a second power-on control voltage to the second control terminal of the switch circuit 230.

[0080] By providing the comparator U1.2, the fourth resistor R4 and the fifth resistor R5 in the control circuit 220 of the utility model, the second power-on control voltage is output to the second control terminal, thereby turning on the second control terminal and outputting the second voltage.

[0081] An embodiment of a power timing device of the utility model is based on any one of the above embodiments. Figure 3 and Figure 4 As shown, a switch circuit 230 of a power sequence device 200 provided by the present invention includes an N-MOS tube and a P-MOS tube.

[0082] N-MOS tube Q1, the drain of N-MOS tube Q1 is used to access the power supply voltage; the gate of N-MOS tube Q1 is connected to the power-on circuit 210, and after receiving the first power-on control voltage, the N-MOS tube Q1 is turned on; the first voltage is output at the source of N-MOS tube Q1.

[0083] The P-MOS tube Q2 has a source electrode connected to the power supply voltage; the gate electrode of the P-MOS tube Q2 is connected to the control circuit 220, and after receiving the second power-on control voltage, the P-MOS tube Q2 is turned on; and the drain electrode of the P-MOS tube Q2 outputs the second voltage.

[0084] Specifically, the drain of the N-MOS transistor Q1 is connected to the power supply voltage, the gate of the N-MOS transistor Q1 is connected to the first end of the capacitor C1, and the source of the N-MOS transistor Q1 outputs the first voltage.

[0085] By connecting a capacitor C1 between the gate and source of the N-MOS tube Q1, during the slow charging process of the capacitor C1, after the gate of the N-MOS tube Q1 receives the first power-on control voltage, the N-MOS tube Q1 is turned on, and a slow change of Vgs is achieved, thereby smoothly increasing the conduction degree of the N-MOS tube Q1. However, the first voltage output by the source of the N-MOS tube Q1 is lower than the connected power supply voltage.

[0086] The source of the P-MOS tube Q2 is connected to the power supply voltage, the gate of the P-MOS tube Q2 is connected to the first end of the fifth resistor R5, and the drain of the P-MOS tube Q2 outputs the second voltage.

[0087] Since the conduction of the P-MOS tube Q2 requires Vgs to be less than a certain negative voltage value, when using the P-MOS tube Q2, it is necessary to select a comparator and control the conduction of the P-MOS tube Q2 at a low level. When the comparator outputs a low level, the second power-on control voltage is input to the gate of the P-MOS tube Q2 to turn on the P-MOS tube Q2, and the drain of the P-MOS tube Q2 outputs a second voltage. The second voltage is close to the connected power supply voltage.

[0088] The switch circuit 230 proposed in the present invention not only realizes a smooth output of the first voltage, but also solves the problem that the output first voltage cannot be close to the connected power supply voltage.

[0089] In the above embodiments, the description of each embodiment has its own emphasis. For parts that are not described or recorded in detail in a certain embodiment, reference can be made to the relevant descriptions of other embodiments.

[0090] Those of ordinary skill in the art will appreciate that the units and algorithm steps of each example described in conjunction with the embodiments disclosed herein can be implemented with electronic hardware, or a combination of computer software and electronic hardware. Whether these functions are performed with hardware or software depends on the specific application and design constraints of the technical solution. Professional and technical personnel can use different methods to implement the described functions for each specific application, but such implementation should not be considered to be beyond the scope of this application.

[0091] The units described as separate components may or may not be physically separated, and the components shown as units may or may not be physical units, that is, they may be located in one place or distributed on multiple network units. Some or all of the units may be selected according to actual needs to achieve the purpose of the solution of this embodiment.

[0092] In addition, each functional unit in each embodiment of the present application may be integrated into one processing unit, or each unit may exist physically separately, or two or more units may be integrated into one unit. The above integrated unit may be implemented in the form of hardware or in the form of software functional units.

[0093] It should be noted that the above embodiments can be freely combined as needed. The above are only preferred embodiments of the present invention. It should be pointed out that for ordinary technicians in this technical field, several improvements and modifications can be made without departing from the principle of the present invention, and these improvements and modifications should also be regarded as the protection scope of the present invention.

Claims

1. A power timing device, characterized in that: include: A power-on circuit, wherein an input terminal of the power-on circuit is used to access a power supply voltage and output a first power-on control voltage; A control circuit, comprising a first input terminal and a second input terminal, wherein the first input terminal is connected to the power-on circuit, and the second input terminal is connected to a reference voltage; The control circuit compares and analyzes the voltage of the power-on circuit and the reference voltage, and outputs a second power-on control voltage when the voltage of the power-on circuit is greater than the reference voltage; A switch circuit, comprising a first control terminal and a second control terminal, wherein the input terminal of the switch circuit is used to access the power supply voltage, the first control terminal is connected to the power-on circuit, and outputs a first voltage after receiving the first power-on control voltage; The second control end is connected to the control circuit, and outputs a second voltage after receiving the second power-on control voltage; the first voltage is less than the second voltage.

2. The power timing device according to claim 1, characterized in that: Also includes: A voltage divider circuit, wherein the input end of the voltage divider circuit is used to access the power supply voltage, and the output end of the voltage divider circuit is connected to the second input end, and is used to input the reference voltage to the control circuit.

3. The power timing device according to claim 2, characterized in that: The voltage divider circuit comprises: a second resistor and a third resistor; one end of the second resistor forms an input end of the voltage divider circuit, and the other end of the second resistor is connected to one end of the third resistor; one end of the third resistor also forms an output end of the voltage divider circuit, and the other end of the third resistor is grounded.

4. The power timing device according to claim 1, characterized in that: The power-on circuit comprises: A first resistor and a capacitor; one end of the first resistor is used to access the power supply voltage, and the other end of the first resistor is connected to one end of the capacitor; the other end of the capacitor is grounded; When the capacitor is charged, the first power-on control voltage is slowly outputted from one end of the capacitor to the first control end.

5. The power timing device according to claim 1, characterized in that: The switch circuit comprises: An N-MOS tube, wherein the drain of the N-MOS tube is used to access the power supply voltage; the gate of the N-MOS tube is connected to the power-on circuit, and after receiving the first power-on control voltage, the N-MOS tube is turned on; and the first voltage is output at the source of the N-MOS tube.

6. The power timing device according to claim 5, characterized in that: The switch circuit further includes: A P-MOS tube, wherein the source of the P-MOS tube is used to access the power supply voltage; the gate of the P-MOS tube is connected to the control circuit, and after receiving the second power-on control voltage, the P-MOS tube is turned on; and the second voltage is output at the drain of the P-MOS tube.

7. The power timing device according to claim 1, characterized in that: The control circuit comprises: A comparator, wherein the inverting input terminal of the comparator is connected to the power-on circuit, the positive input terminal of the comparator is connected to the reference voltage, and when the voltage of the power-on circuit is greater than the reference voltage, the output terminal of the comparator outputs a low level; a fourth resistor and a fifth resistor; one end of the fourth resistor is connected to the output end of the comparator, and the other end of the fourth resistor is connected to one end of the fifth resistor; the other end of the fifth resistor is connected to the power supply voltage; when the comparator outputs a low level, one end of the fifth resistor outputs the second power-on control voltage to the second control end.

8. A power output system, characterized in that: The system comprises a power timing device as claimed in any one of claims 1 to 7; the system further comprises a power socket through which a power voltage is connected; The power timing device is connected to the power socket and is used to output the first voltage or the second voltage to one or more capacitive load circuits.

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