Electronic package
By directly forming a shielding layer and a rewiring layer on the surface of the electronic component of the electronic package, the problem of the inability to shrink the package substrate in the prior art is solved, and effective shielding of electromagnetic interference and reduction of the package volume is achieved.
Patent Information
- Application Number
- CN202421863269.8
- Authority / Receiving Office
- CN · China
- Patent Type
- Utility models(China)
- Current Assignee / Owner
- Priority Date
- 2024-07-08
- Filing Date
- 2024-08-02
- Publication Date
- 2025-05-27
- Estimated Expiration
- 2034-08-02
AI Technical Summary
When the existing semiconductor packages reduce the surface area of the package substrate, the occupation of the shielding wall causes the package substrate to be unable to be further reduced, and limit the wiring area, affecting the improvement of product functions.
An electronic package is designed, including an electronic component, a shielding layer and a rewiring layer. The shielding layer directly contacts and completely covers the non-acting surface and side surface of the electronic component. The rewiring layer is formed on the working surface of the electronic component and electrically connects the shielding layer.
By directly forming a shielding layer on the surface of the electronic component, it effectively prevents electromagnetic interference, reduces the volume of the package, and reduces production costs, and avoids the limitation of the use of the shielding wall on the packaging substrate.
Smart Images
Figure CN222914812U_ABST
Abstract
Description
Technical Field
[0001] The present application relates to a packaging structure, and in particular to an electronic packaging component. Background Art
[0002] With the evolution of semiconductor technology, in order to improve electrical quality, many semiconductor products have shielding functions to prevent electromagnetic interference (EMI), especially system in package (SiP) products.
[0003] like Figure 1 As shown, the existing semiconductor package 1 arranges multiple semiconductor chips 11 on a packaging substrate 10, and then covers each of the semiconductor chips 11 with a packaging colloid 13, and forms a shielding layer 14 of metal material on the upper surface of the packaging colloid 13 and the side surface of the packaging substrate 10, so as to protect each of the semiconductor chips 11 from external electromagnetic interference through the shielding layer 14, and a shielding wall 12 of metal material can be arranged around the multiple semiconductor chips 11 to prevent electromagnetic waves or signal interference between the multiple semiconductor chips 11 through the shielding wall 12.
[0004] As electronic products are designed towards miniaturization, especially system-in-package (SiP) products, the area of the surface 10a of the package substrate 10 also needs to be reduced. However, the surface 10a of the package substrate 10 needs to be configured with a shielding wall 12. Therefore, the shielding wall 12 not only occupies a part of the surface 10a of the package substrate 10, which makes it impossible to further reduce the size of the package substrate 10, but also occupies the wiring area of the surface 10a of the package substrate 10, which limits the wiring of the package substrate 10 and makes it impossible to further improve the product function.
[0005] Therefore, the above-mentioned prior art problems have become a topic that needs to be solved urgently. Utility Model Content
[0006] To solve the above problems, the present application provides an electronic package, including an electronic component, a shielding layer and a redistribution layer. The electronic component has an active surface and an inactive surface opposite to each other, and has a side surface connecting the active surface and the inactive surface. The shielding layer is disposed on the electronic component, and directly contacts and completely covers the inactive surface and the side surface. The redistribution layer is formed on the active surface of the electronic component, and electrically connects the electronic component and the shielding layer.
[0007] The present application also provides a method for manufacturing an electronic package, comprising: forming a redistribution layer on a semiconductor structure; cutting separate electronic components from the semiconductor structure, wherein the electronic components have an active surface and an inactive surface relative to each other, and have a side surface connecting the active surface and the inactive surface, and the redistribution layer is disposed on the active surface of the electronic component and electrically connected to the electronic component; and forming a shielding layer on the electronic component so that the shielding layer directly contacts and completely covers the inactive surface and the side surface, and is electrically connected to the redistribution layer.
[0008] The shielding layer of the present application is directly formed on the surface of the electronic component, so it can prevent electromagnetic interference, reduce the volume of the electronic package, and reduce the production cost. BRIEF DESCRIPTION OF THE DRAWINGS
[0009] Figure 1 It is a cross-sectional schematic diagram of a conventional semiconductor package.
[0010] FIG. 2A to FIG. 2E It is a side cross-sectional schematic diagram of a method for manufacturing an electronic package according to the first embodiment of the present application.
[0011] Figure 2F It is a top cross-sectional schematic diagram of a method for manufacturing an electronic package according to the first embodiment of the present application.
[0012] FIG. 3A to FIG. 3D It is a side cross-sectional schematic diagram of a method for manufacturing an electronic package according to a second embodiment of the present application.
[0013] FIG. 4A to FIG. 4E It is a side cross-sectional schematic diagram of a method for manufacturing an electronic package according to a third embodiment of the present application.
[0014] Main component symbols
[0015] 1 Semiconductor Package
[0016] 10 Package substrate
[0017] 10a Surface
[0018] 11. Semiconductor Chip
[0019] 12 Shielding Wall
[0020] 13 Encapsulation colloid
[0021] 14 Shielding layer
[0022] 2,3,4 Electronic packaging
[0023] 21,31,41 Rewiring Layer
[0024] 211,311,411 Insulation layer
[0025] 212,312,412 circuit layers
[0026] 21a, 31a, 41a First surface
[0027] 21b, 31b, 41b Second surface
[0028] 21c,31c,41c side surface
[0029] 22,32,42 Metal Layers
[0030] 23,33,43 Conductors
[0031] 44 Encapsulation layer
[0032] 251 First Groove
[0033] 252 Second Groove
[0034] 35,45 Grooves
[0035] 26,36,46 Electronic components
[0036] 261 First side
[0037] 262 Second side
[0038] 263 Transition surface
[0039] 26a,36a,46a Action surface
[0040] 26b,36b,46b Non-active surface
[0041] 26c,36c,46c side surface
[0042] 27,37,47 shielding layer. DETAILED DESCRIPTION
[0043] The following describes the implementation methods of the present application through specific embodiments. Those skilled in the art can easily understand other advantages and effects of the present application from the contents disclosed in this specification.
[0044] FIG. 2A to FIG. 2E It is a side cross-sectional schematic diagram of a method for manufacturing an electronic package 2 according to the first embodiment of the present application. Figure 2F It is a top cross-sectional schematic diagram of a method for manufacturing the electronic package 2 according to the first embodiment of the present application.
[0045] First, if Figure 2A As shown, a redistribution layer 21 is formed on the semiconductor structure 20 , and then a metal layer 22 is formed on the redistribution layer 21 .
[0046] The semiconductor structure 20 may be a wafer or other structure for arranging electronic components. The electronic components may be integrated circuits or transistors, resistors, capacitors or inductors therein.
[0047] The redistribution layer 21 includes at least one insulating layer 211 and at least one wiring layer 212 combined with the at least one insulating layer 211. For example, the wiring layer 212 is made of copper or other conductive materials, and the insulating layer 211 is made of polybenzoxazole (PBO), polyimide (PI), prepreg (PP) or other dielectric materials.
[0048] The metal layer 22 may be an under bump metallurgy (UBM), and its material is a conductive metal.
[0049] like Figure 2B As shown, a plurality of conductors 23 are formed on the metal layer 22. Each of the conductors 23 is, for example, a conductive column, a conductive bump, a solder ball or other conductive structures.
[0050] like Figure 2C As shown, the semiconductor structure 20 is cut, wherein the cutting cuts through the redistribution layer 21 to form a first trench 251 on the semiconductor structure 20 (but does not penetrate the semiconductor structure 20). In addition, the cutting removes a portion of the redistribution layer 21 to expose the circuit layer 212 in the redistribution layer 21.
[0051] Then, if Figure 2D As shown, a second trench 252 is cut in the first trench 251 to cut through the semiconductor structure 20, and the semiconductor structure 20 is cut into a plurality of separated electronic components 26, wherein the width of the second trench 252 is smaller than the width of the first trench 251. Each of the electronic components 26 can be a semiconductor chip, an integrated circuit, a transistor, a resistor, a capacitor or an inductor.
[0052] like Figure 2E As shown, a shielding layer 27 is formed on each of the electronic components 26 to complete the electronic package 2. For example, the shielding layer 27 can be formed by sputtering. The shielding layer 27 can be a copper layer or other conductive metal layer to provide electromagnetic shielding for the electronic components 26.
[0053] Figure 2E Only one electronic package 2 is shown as an example. Figure 2D Each of the electronic components 26 obtained by cutting and the redistribution layer 21, metal layer 22, conductor 23 and other structures thereon will form a Figure 2E The electronic package 2 is shown.
[0054] In the electronic package 2 , the conductor 23 is electrically connected to the electronic component 26 through the metal layer 22 and the circuit layer 212 in the redistribution layer 21 .
[0055] The electronic component 26 has an active surface 26a and an inactive surface 26b opposite to each other, and has a side surface 26c connecting the active surface 26a and the inactive surface 26b. The redistribution layer 21 is formed on the active surface 26a of the electronic component 26. The shielding layer 27 directly contacts and completely covers the inactive surface 26b and the side surface 26c of the electronic component 26.
[0056] In addition, the side surface 26c of the electronic component 26 includes a first side surface 261, a second side surface 262, and a transition surface 263 connecting the first side surface 261 and the second side surface 262. The first side surface 261 is parallel to the second side surface 262, and the transition surface 263 is not parallel to any of the first side surface 261 and the second side surface 262. The second side surface 262 is retracted relative to the first side surface 261, and the retraction is caused by the width difference between the first groove 251 and the second groove 252 during cutting. Therefore, the retraction distance of the second side surface 262 is equal to half of the width difference between the first groove 251 and the second groove 252.
[0057] The redistribution layer 21 has a first surface 21a, a second surface 21b, and a side surface 21c connecting the first surface 21a and the second surface 21b. The second surface 21b of the redistribution layer 21 directly contacts the active surface 26a of the electronic component 26. The metal layer 22 is formed on the first surface 21a of the redistribution layer 21. In addition, the side surface 21c of the redistribution layer 21 is aligned with the second side surface 262 of the electronic component 26.
[0058] Furthermore, if Figure 2E As shown, the shielding layer 27 extends downward beyond the second side surface 262 of the electronic component 26 to directly contact and completely cover the side surface 21 c of the redistribution layer 21 . Therefore, the exposed circuit layer 212 of the redistribution layer 21 is electrically connected to the shielding layer 27 .
[0059] Figure 2E The shielding layer 27 shown covers the side surfaces 26c and 21c of the electronic component 26 and the redistribution layer 21 on the left and right sides. However, in this embodiment, the electronic component 26 is a quadrilateral such as a square or a rectangle. If viewed from a top view, the shielding layer 27 is Figure 2F The upper, lower, left and right sides (in the figure) completely cover the side surface 26c of the electronic component 26.
[0060] Similarly, the redistribution layer 21 is also a quadrilateral such as a square or a rectangle, and the shielding layer 27 also completely covers the side surface 21 c of the redistribution layer 21 on four sides.
[0061] FIG. 3A to FIG. 3D The side cross-sectional schematic diagram of the manufacturing method of the electronic package 3 of the second embodiment of the present application. The second embodiment is identical or similar to the first embodiment in many aspects. Therefore, the following description focuses on the differences between the two embodiments, and the remaining identical or similar parts are not described in detail, or are only briefly described.
[0062] First, if Figure 3A As shown, a redistribution layer 31 is formed on the semiconductor structure 30 , and then a metal layer 32 is formed on the redistribution layer 31 .
[0063] The redistribution layer 31 includes at least one insulating layer 311 and at least one wiring layer 312 combined with the at least one insulating layer 311. The metal layer 32 may be an under bump metal layer (UBM) or a copper layer.
[0064] like Figure 3B As shown, a plurality of conductors 33 are formed on the metal layer 32 .
[0065] like Figure 3C As shown, the semiconductor structure 30 is cut, wherein the cutting cuts through the redistribution layer 31 to form a trench 35 in the semiconductor structure 30. The trench 35 cuts through the semiconductor structure 30, and cuts the semiconductor structure 30 into a plurality of separate electronic components 36.
[0066] like Figure 3D As shown, a shielding layer 37 is formed on each of the electronic components 36 to complete the electronic package 3 .
[0067] In the electronic package 3 , the conductor 33 is electrically connected to the electronic component 36 through the metal layer 32 and the circuit layer 312 in the redistribution layer 31 .
[0068] The electronic component 36 has an active surface 36a and an inactive surface 36b opposite to each other, and has a side surface 36c connecting the active surface 36a and the inactive surface 36b. The redistribution layer 31 is formed on the active surface 36a of the electronic component 36. The shielding layer 37 directly contacts and completely covers the inactive surface 36b and the side surface 36c of the electronic component 36.
[0069] The redistribution layer 31 has a first surface 31a, a second surface 31b, and a side surface 31c connecting the first surface 31a and the second surface 31b. The second surface 31b of the redistribution layer 31 directly contacts the active surface 36a of the electronic component 36. The metal layer 32 is formed on the first surface 31a of the redistribution layer 31.
[0070] like Figure 3DAs shown, the shielding layer 37 extends downward to exceed the side surface 36c of the electronic component 36 to directly contact and completely cover the side surface 31c of the redistribution layer 31. In addition, the shielding layer 37 can directly contact and partially cover the first surface 31a of the redistribution layer 31. In this embodiment, the circuit layer 312 of the redistribution layer 31 is not exposed, so the shielding layer 37 is not directly electrically connected to the circuit layer 312 of the redistribution layer 31, but is directly electrically connected to the metal layer 32. In detail, a portion of the metal layer 32 is electrically connected to the shielding layer 37, and another portion of the metal layer 32 is electrically connected to the conductor 33.
[0071] FIG. 4A to FIG. 4E The third embodiment of the present invention is a side cross-sectional schematic diagram of a method for manufacturing an electronic package 4. The third embodiment is identical or similar to the first and second embodiments described above in many aspects. Therefore, the following description focuses on the differences, and the remaining identical or similar parts are not described in detail, or are only briefly described.
[0072] First, if Figure 4A As shown, a redistribution layer 41 is formed on the semiconductor structure 40 , and then a metal layer 42 is formed on the redistribution layer 41 .
[0073] The redistribution layer 41 includes at least one insulating layer 411 and at least one wiring layer 412 combined with the at least one insulating layer 411. The metal layer 42 may be an under bump metallization layer (UBM).
[0074] like Figure 4B As shown, a plurality of conductors 43 are formed on the metal layer 42 .
[0075] like Figure 4C As shown, a packaging layer 44 is formed on the redistribution layer 41, wherein the packaging layer 44 partially covers the conductor 43. The material forming the packaging layer 44 is an insulating material, such as a packaging colloid or packaging material of polyimide (PI) or epoxy resin. In addition, the packaging layer 44 can be formed by molding, lamination or coating.
[0076] like Figure 4D As shown, the semiconductor structure 40 and the redistribution layer 41 and the packaging layer 44 thereon are cut, wherein the grooves 45 formed by the cutting cut through the packaging layer 44, the redistribution layer 41 and the semiconductor structure 40, thereby exposing the circuit layer 412 of the redistribution layer 41 and separating a plurality of electronic components 46.
[0077] like Figure 4E As shown, a shielding layer 47 is formed on each of the electronic components 46 to complete the electronic package 4 .
[0078] In the electronic package 4 , the conductor 43 is electrically connected to the electronic component 46 through the metal layer 42 and the circuit layer 412 in the redistribution layer 41 .
[0079] The electronic component 46 has an active surface 46a and an inactive surface 46b opposite to each other, and has a side surface 46c connecting the active surface 46a and the inactive surface 46b. The redistribution layer 41 is formed on the active surface 46a of the electronic component 46. The shielding layer 47 directly contacts and completely covers the inactive surface 46b and the side surface 46c of the electronic component 46.
[0080] The redistribution layer 41 has a first surface 41a, a second surface 41b, and a side surface 41c connecting the first surface 41a and the second surface 41b. The second surface 41b of the redistribution layer 41 directly contacts the active surface 46a of the electronic component 46. The metal layer 42 and the packaging layer 44 are both formed on the first surface 41a of the redistribution layer 41.
[0081] like Figure 4E As shown, the shielding layer 47 extends downward beyond the side surface 46c of the electronic component 46 to directly contact and completely cover the side surface 41c of the redistribution layer 41, and continues to extend downward to directly contact and partially cover the packaging layer 44. In addition, the shielding layer 47 is electrically connected to the circuit layer 412 of the redistribution layer 41.
[0082] as Figure 2F In the first embodiment shown, the electronic component 46 of this embodiment is a quadrilateral such as a square or a rectangle, and the shielding layer 47 completely covers the side surface 46c of the electronic component 46 on four sides. The redistribution layer 41 and the packaging layer 44 are also the same quadrilateral, and the shielding layer 47 also completely covers the redistribution layer 41 and the packaging layer 44 on four sides. In addition, the shielding layer 47 completely covers the non-active surface 46b of the electronic component 46, and the packaging layer 44 completely covers the remaining area of the first surface 41a of the redistribution layer 41 except the area where the metal layer 42 and the conductor 43 are located. Therefore, the shielding layer 47 and the packaging layer 44 form six-sided protection for the electronic package 4.
[0083] The technical solution of the present application directly forms a shielding layer capable of shielding electromagnetic interference (EMI) on the surface of the electronic component to prevent electromagnetic interference between the external environment and the electronic component. There is no intermediate structure such as packaging colloid between the shielding layer and the electronic component, and the shielding layer is miniaturized to adapt to the electronic component, so the problems of the existing semiconductor package can be avoided and the volume of the package can be reduced. In addition, the electronic package of the present application can be manufactured by the existing semiconductor packaging process without the need to develop a special process or purchase special equipment, so the production cost can be reduced.
[0084] The above embodiments are only illustrative of the principles and effects of the present application, and are not intended to limit the present application. Any person skilled in the art may modify and change the above embodiments without violating the spirit and scope of the present application. Therefore, the scope of protection of the present application shall be as set forth in the claims.
Claims
1. An electronic package, characterized in that: include: An electronic component having an active surface and an inactive surface opposite to each other, and having a side surface connecting the active surface and the inactive surface; A shielding layer is disposed on the electronic component, directly contacting and completely covering the inactive surface and the side surface; as well as The redistribution layer is formed on the active surface of the electronic element and electrically connects the electronic element and the shielding layer.
2. The electronic package according to claim 1, wherein: The side surface includes a first side surface, a second side surface and a transition surface connecting the first side surface and the second side surface. The first side surface is parallel to the second side surface, and the transition surface is not parallel to any one of the first side surface and the second side surface.
3. The electronic package as claimed in claim 2, characterized in that The second side surface is retracted relative to the first side surface.
4. The electronic package as claimed in claim 2, characterized in that: The side surface of the redistribution layer is aligned with the second side surface of the electronic component.
5. The electronic package as claimed in claim 4, characterized in that The redistribution layer includes an insulating layer and a circuit layer combined with the insulating layer, and the circuit layer is electrically connected to the electronic element and the shielding layer.
6. The electronic package according to claim 1, wherein: The redistribution layer has an opposite first surface, a second surface and a side surface connecting the first surface and the second surface.
7. The electronic package according to claim 6, wherein: The shielding layer directly contacts and completely covers the side surface of the redistribution layer.
8. The electronic package according to claim 7, wherein: The shielding layer directly contacts and partially covers the first surface of the redistribution layer.
9. The electronic package according to claim 6, wherein: The electronic package also includes: A metal layer disposed on the first surface of the redistribution layer; and The conductor is disposed on the metal layer and electrically connects the electronic element with the redistribution layer through the metal layer.
10. The electronic package according to claim 9, wherein: A portion of the metal layer is electrically connected to the shielding layer, and another portion of the metal layer is electrically connected to the conductor.
11. The electronic package according to claim 9, wherein: The electronic package also includes: The packaging layer is disposed on the first surface of the redistribution layer and partially covers the conductor.
12. The electronic package according to claim 11, wherein: The shielding layer partially covers the packaging layer.