Power supply device and power supply switching circuit thereof

By designing a power switching circuit, which prioritizes the use of low voltage power supply and switches to high voltage in case of failure, the heating loss problem caused by high voltage power supply in the prior art is solved, and the reliability of power supply is ensured.

CN222915713UActive Publication Date: 2025-05-27SHENZHEN COMEN MEDICAL INSTR
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Patent Information

Application Number
CN202421429780.7
Authority / Receiving Office
CN · China
Patent Type
Utility models(China)
Current Assignee / Owner
Filing Date
2024-06-21
Publication Date
2025-05-27
Estimated Expiration
2034-06-21

AI Technical Summary

Technical Problem

The existing dual power supply circuits preferentially use high voltages when supplying power, resulting in high heat generation and large losses during the LDO buck processing, and cannot switch to high voltage power supply in the event of low voltage failure.

Method used

A power switching circuit is designed, including a first power supply terminal, a second power supply terminal, a first switching module, a second switching module and a voltage output module. By controlling the on and off of the switching module, low voltage power is preferred, and switch to high voltage power supply when the low voltage fails.

Benefits of technology

It realizes the default priority low voltage power supply, avoids LDO heating loss, and can switch to high voltage power supply in case of low voltage failure, ensuring reliable power supply.

✦ Generated by Eureka AI based on patent content.

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Patent Text Reader

Abstract

The utility model discloses a power supply device and a power supply switching circuit thereof, the power supply switching circuit comprises a first power supply end, a second power supply end, a first switch module, a second switch module and a voltage output module, the voltage output by the first power supply end is lower than that of the second power supply end, the first power supply end outputs voltage, and when the voltage of the second power supply end is zero, the second switch module outputs voltage. The first power supply end supplies power; when the voltage of the first power supply end is 0 and the second power supply end outputs voltage, the second power supply end supplies power; when both the first power supply end and the second power supply end have voltage output, power is supplied by the first power supply end preferentially, and when the first power supply end fails, the second switch module is switched on, the first switch module is switched off, and power is supplied to the second power supply end, so that low voltage is used as a main power supply, and high voltage is used as a backup power supply. Therefore, the low voltage is preferentially supplied to the later-stage LDO circuit by default, the LDO heating loss is avoided, the low voltage can be switched to the high voltage when the low voltage fails, and the reliable power supply is ensured.
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Description

Technical Field

[0001] The utility model relates to the technical field of power supply circuit design, and particularly relates to a power supply device and a power supply switching circuit thereof. Background Art

[0002] In the current market, for the dual power supply circuit, the simplest one is to use two diodes. As Figure 1 shown, two voltage sources, VDD7V and VD12V, each supply power to the LDO circuit through a diode, and after being stepped down by the LDO circuit, 3.3V is output to supply power to the CPU. There are also some dual power supply circuits such as Figure 2 、 Figure 3 shown, which adopt the parallel connection of MOS transistors and diodes, and the charging voltage VBUS or the battery VBAT outputs to supply power to the LDO circuit. However, in these dual power supply circuits, VBAT must be less than VBUS, and during power supply, the high voltage is preferentially supplied. When the high voltage is disconnected or fails, the power supply switches from the high voltage to the low voltage. But in actual use, when the high voltage is preferentially supplied, the heat generated during the step-down process of the LDO is high and the loss is greater. Summary of the Utility Model

[0003] In view of the deficiencies of the above-mentioned prior art, the purpose of the present utility model is to provide a power supply device and a power supply switching circuit thereof, which can preferentially supply power from the low voltage, and when there is no low voltage or the low voltage fails, switch to supply power from the high voltage.

[0004] To solve the above technical problems, the present utility model adopts the following technical solutions:

[0005] A power supply switching circuit includes a first power supply terminal, a second power supply terminal, a first switch module, a second switch module, and a voltage output module. One end of the first switch module is connected to the first power supply terminal, the other end of the first switch module and the first end of the second switch module are connected to the voltage output module, the second end of the second switch module is connected to the second power supply terminal, the third end of the second switch module is connected to the first power supply terminal, and the power supply voltage of the first power supply terminal is lower than that of the second power supply terminal; when there is a voltage output at the first power supply terminal and no voltage output at the second power supply terminal, the first switch module is turned on and the second switch module is turned off, and the power is supplied by the first power supply terminal; when there is no voltage output at the first power supply terminal and there is a voltage output at the second power supply terminal, the second switch module is turned on and the first switch module is turned off, and the power is supplied by the second power supply terminal; when there are voltage outputs at both the first power supply terminal and the second power supply terminal, the first switch module is turned on and the second switch module is turned off, and the power is supplied by the first power supply terminal. When the first power supply terminal fails, the second switch module is turned on and the first switch module is turned off, and the power supply is switched to the second power supply terminal.

[0006] In the described power supply switching circuit, the first switching module includes a diode. The positive electrode of the diode is connected to the first power supply terminal, and the negative electrode of the diode is connected to the first end of the second switching module and the voltage output module.

[0007] In the described power supply switching circuit, the first switching module includes a first MOS transistor, a second MOS transistor, a first resistor, a second resistor, and a third resistor. The gate of the first MOS transistor is connected to the first power supply terminal through the first resistor and is also grounded through the second resistor. The drain of the first MOS transistor is connected to the gate of the second MOS transistor and is also connected to the first end of the second switching module and the voltage output module through the third resistor. The source of the first MOS transistor is grounded, and the drain of the second MOS transistor is connected to the first power supply terminal.

[0008] In the described power supply switching circuit, the second switching module includes a third MOS transistor, a fourth MOS transistor, a fifth MOS transistor, a sixth MOS transistor, a fourth resistor, a fifth resistor, a sixth resistor, a seventh resistor, an eighth resistor, and a ninth resistor. The drain of the third MOS transistor is connected to the second power supply terminal through the fourth resistor and is also connected to the second power supply terminal through the fifth resistor. The gate of the third MOS transistor is connected to the gate of the fourth MOS transistor and the drain of the sixth MOS transistor. The source of the third MOS transistor is connected to the source of the fourth MOS transistor and is also connected to the drain of the fifth MOS transistor, the gate of the sixth MOS transistor, and one end of the ninth resistor through the sixth resistor. The drain of the fourth MOS transistor is connected to the other end of the first switching module and the voltage output module. The gate of the fifth MOS transistor is connected to the first power supply terminal through the seventh resistor and is also grounded through the eighth resistor. The source of the fifth MOS transistor, the source of the sixth MOS transistor, and the other end of the ninth resistor are grounded.

[0009] In the described power supply switching circuit, the second switching module includes a third MOS transistor, a fourth MOS transistor, a fifth MOS transistor, a sixth MOS transistor, a fourth resistor, a fifth resistor, a sixth resistor, a seventh resistor, an eighth resistor, and a ninth resistor. The drain of the third MOS transistor is connected to the second power supply terminal through the fourth resistor and also through the fifth resistor. The gate of the third MOS transistor is connected to the gate of the fourth MOS transistor and the drain of the sixth MOS transistor. The source of the third MOS transistor is connected to the source of the fourth MOS transistor. The drain of the fourth MOS transistor is connected to the other end of the first switching module and the voltage output module. The gate of the sixth MOS transistor is connected to the drain of the fifth MOS transistor, also connected to the second power supply terminal through the sixth resistor, and further grounded through the ninth resistor. The gate of the fifth MOS transistor is connected to the first power supply terminal through the seventh resistor and also grounded through the eighth resistor. The sources of the fifth MOS transistor and the sixth MOS transistor are grounded.

[0010] In the described power supply switching circuit, the first switching module includes a seventh MOS transistor, an eighth MOS transistor, a tenth resistor, and an eleventh resistor. The gate of the seventh MOS transistor is grounded through the tenth resistor. The drain of the seventh MOS transistor is connected to the gate of the eighth MOS transistor and also to the source of the eighth MOS transistor and the voltage output module through the eleventh resistor. The source of the seventh MOS transistor is grounded. The drain of the eighth MOS transistor is connected to the first power supply terminal.

[0011] In the described power supply switching circuit, the second switching module includes a ninth MOS transistor, a tenth MOS transistor, an eleventh MOS transistor, a twelfth MOS transistor, a twelfth resistor, a thirteenth resistor, a fourteenth resistor, a fifteenth resistor, a sixteenth resistor, a seventeenth resistor, and an eighteenth resistor. The drain of the ninth MOS transistor is connected to the second power supply terminal through the twelfth resistor, also connected to the second power supply terminal and one end of the fifteenth resistor through the thirteenth resistor, and further connected to the gate of the ninth MOS transistor and the drain of the twelfth MOS transistor through the fourteenth resistor. The source of the ninth MOS transistor is connected to the source of the tenth MOS transistor. The gate of the tenth MOS transistor is connected to the gate of the seventh MOS transistor. The drain of the tenth MOS transistor is connected to the voltage output module. The drain of the eleventh MOS transistor is connected to the other end of the fifteenth resistor and the gate of the twelfth MOS transistor and also grounded through the eighteenth resistor. The gate of the eleventh MOS transistor is connected to the first power supply terminal through the sixteenth resistor and also grounded through the seventeenth resistor. The sources of the eleventh MOS transistor and the twelfth MOS transistor are grounded.

[0012] In the power supply switching circuit described above, the voltage output module includes a first capacitor and a voltage output terminal. One end of the first capacitor is connected to the other end of the first switching module, the first end of the second switching module, and the voltage output terminal, and the other end of the first capacitor is grounded.

[0013] In the power supply switching circuit described above, the voltage output module further includes a second capacitor, and the second capacitor is connected in parallel with the first capacitor.

[0014] A power supply device includes a step-down voltage regulation module and the power supply switching circuit described above, and the power supply switching circuit is connected to the step-down voltage regulation module.

[0015] Compared with the prior art, the power supply device and its power supply switching circuit provided by the present utility model include a first power supply terminal, a second power supply terminal, a first switching module, a second switching module, and a voltage output module. One end of the first switching module is connected to the first power supply terminal, and the voltage output by the first power supply terminal is lower than that of the second power supply terminal. When the first power supply terminal outputs voltage and the second power supply terminal has no voltage output, power is supplied by the first power supply terminal; when the first power supply terminal has no voltage output and the second power supply terminal outputs voltage, power is supplied by the second power supply terminal; when both the first power supply terminal and the second power supply terminal output voltage, the first switching module conducts and the second switching module disconnects, and power is supplied by the first power supply terminal. When the first power supply terminal fails, the second switching module conducts and makes the first switching module disconnect, and switches to the second power supply terminal for power supply, realizing using the low voltage as the main power supply and the high voltage as the backup power supply, so as to default to preferentially supply power to the subsequent LDO circuit with the low voltage, avoid heat loss of the LDO, and moreover, it can switch from the low voltage to the high voltage when the low voltage fails to ensure reliable power supply. Description of the Drawings

[0016] Figure 1 It is a circuit schematic diagram of a dual-power supply circuit provided by the prior art.

[0017] Figure 2 It is a circuit schematic diagram of another dual-power supply circuit provided by the prior art.

[0018] Figure 3 It is a circuit schematic diagram of yet another dual-power supply circuit provided by the prior art.

[0019] Figure 4 It is a structural block diagram of the power supply switching circuit provided by the present utility model.

[0020] Figure 5 It is a circuit schematic diagram of the power supply switching circuit provided by the first embodiment of the present utility model.

[0021] Figure 6The circuit schematic diagram of the power supply switching circuit provided by the second embodiment of the present utility model.

[0022] Figure 7 The circuit schematic diagram of the power supply switching circuit provided by the third embodiment of the present utility model.

[0023] Figure 8 The circuit schematic diagram of the power supply switching circuit provided by the fourth embodiment of the present utility model.

[0024] Figure 9 The circuit schematic diagram of the step-down and voltage stabilization module in the power supply device provided by the present utility model.

[0025] Description of reference numerals

[0026] The first power supply terminal 1, the second power supply terminal 2, the first switch module 3, the second switch module 4, the voltage output module 5, the first MOS transistor Q1, the second MOS transistor Q2, the first resistor R1, the second resistor R2, the third resistor R3, the third MOS transistor Q3, the fourth MOS transistor Q4, the fifth MOS transistor Q5, the sixth MOS transistor Q6, the fourth resistor R4, the fifth resistor R5, the sixth resistor R6, the seventh resistor R7, the eighth resistor R8, the ninth resistor R9, the diode D1, the seventh MOS transistor Q7, the eighth MOS transistor Q8, the tenth resistor R10, the eleventh resistor R11, the ninth MOS transistor Q9, the tenth MOS transistor Q10, the eleventh MOS transistor Q11, the twelfth MOS transistor Q12, the twelfth resistor R12, the thirteenth resistor R13, the fourteenth resistor R14, the fifteenth resistor R15, the sixteenth resistor R16, the seventeenth resistor R17, the eighteenth resistor R18, the first capacitor C1, the voltage output terminal 6, the second capacitor C2 Detailed implementation manners

[0027] In order to make the objectives, technical solutions and advantages of the present utility model clearer, the present utility model will be further described in detail below with reference to the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are only used to explain the present utility model and are not used to limit the present utility model.

[0028] Please refer to Figure 4 , the power supply switching circuit provided by the present utility model includes: the first power supply terminal 1, the second power supply terminal 2, the first switch module 3, the second switch module 4 and the voltage output module 5. The supply voltage of the first power supply terminal 1 is lower than that of the second power supply terminal 2. In this embodiment, the voltage of the first power supply terminal 1 is 7V, which is referred to as the low voltage in the present utility model, and the voltage of the second power supply terminal 2 is 12V, which is referred to as the high voltage in the present utility model. VDD7V_12V is the output voltage of 7V or 12V, which is specifically determined by the power supply method of the power supply terminal.

[0029] One end of the first switch module 3 is connected to the first power supply terminal 1, the other end of the first switch module 3, the first end of the second switch module 4, and the voltage output module 5. The second end of the second switch module 4 is connected to the second power supply terminal 2, and the third end of the second switch module 4 is connected to the first power supply terminal 1.

[0030] This embodiment includes four cases during power supply:

[0031] 1. When the first power supply terminal 1 outputs voltage and the second power supply terminal 2 does not output voltage, the first switch module 3 is turned on and the second switch module 4 is turned off. The first power supply terminal 1 supplies power, enabling the voltage output module 5 to output 7V voltage to the subsequent step-down and voltage regulation module.

[0032] 2. When the first power supply terminal 1 does not output voltage and the second power supply terminal 2 outputs voltage, the second switch module 4 is turned on and the first switch module 3 is turned off. The second power supply terminal 2 supplies power. That is, when the voltage of the first power supply terminal 1 is 0, the second power supply terminal 2 supplies high-voltage power, enabling the voltage output module 5 to output 12V voltage to the subsequent step-down and voltage regulation module.

[0033] 3. When both the first power supply terminal 1 and the second power supply terminal 2 output voltage, the first switch module 3 is turned on and the second switch module 4 is turned off. The first power supply terminal 1 supplies power. Thus, when both the low-voltage power supply and the high-voltage power supply are working, the low-voltage power supply is used as the main power supply to avoid the heat loss of the LDO in the subsequent step-down and voltage regulation module.

[0034] 4. When the first power supply terminal 1 fails, the second switch module 4 is turned on and the first switch module 3 is turned off, switching to the second power supply terminal 2 for power supply, achieving the function of switching from low voltage to high voltage in case of low-voltage failure and ensuring reliable power supply.

[0035] Please refer to Figure 5 , in the first preferred embodiment of this new type, the first switch module 3 includes a first MOS transistor Q1, a second MOS transistor Q2, a first resistor R1, a second resistor R2, and a third resistor R3. The first MOS transistor Q1 is an N-channel MOS transistor, which conducts when its gate is at a high level. The second MOS transistor Q2 is a P-channel MOS transistor, which conducts when its gate is at a low level.

[0036] The gate of the first MOS transistor Q1 is connected to the first power supply terminal 1 through the first resistor R1 and is also grounded through the second resistor R2. The drain of the first MOS transistor Q1 is connected to the gate of the second MOS transistor Q2, is also connected to the source of the second MOS transistor Q2 through the third resistor R3, the first terminal of the second switch module 4, and the voltage output module 5. The source of the first MOS transistor Q1 is grounded. The drain of the second MOS transistor Q2 is connected to the first power supply terminal 1. When the first power supply terminal 1 outputs a voltage of 7V, the gate of the first MOS transistor Q1 is at a high level and conducts. At this time, the gate level of the second MOS transistor Q2 is pulled low, and the second MOS transistor Q2 also conducts, outputting a 7V voltage to the voltage output module 5. When the output of the first power supply terminal 1 is 0, both the first MOS transistor Q1 and the second MOS transistor Q2 are cut off, and no power is supplied to the voltage output module 5. In this embodiment, the first MOS transistor Q1 and the second MOS transistor Q2 are used to allow a large current to pass through the first power supply terminal 1, and the circuit is stable and reliable.

[0037] Optionally, the second switch module 4 includes a third MOS transistor Q3, a fourth MOS transistor Q4, a fifth MOS transistor Q5, a sixth MOS transistor Q6, a fourth resistor R4, a fifth resistor R5, a sixth resistor R6, a seventh resistor R7, an eighth resistor R8, and a ninth resistor R9. The third MOS transistor Q3 and the fourth MOS transistor Q4 are P-channel MOS transistors, and when their gates are at a low level, the third and fourth MOS transistors conduct. The fifth MOS transistor Q5 and the sixth MOS transistor Q6 are N-channel MOS transistors, and when their gates are at a high level, the fifth and sixth MOS transistors conduct.

[0038] The drain of the third MOS transistor Q3 is connected to the second power supply terminal 2 through the fourth resistor R4 and is also connected to the second power supply terminal 2 through the fifth resistor R5. The gate of the third MOS transistor Q3 is connected to the gate of the fourth MOS transistor Q4 and the drain of the sixth MOS transistor Q6. The source of the third MOS transistor Q3 is connected to the source of the fourth MOS transistor Q4 and is also connected to the drain of the fifth MOS transistor Q5, the gate of the sixth MOS transistor Q6, and one end of the ninth resistor R9 through the sixth resistor R6. The drain of the fourth MOS transistor Q4 is connected to the other end of the first switch module 3 and the voltage output module 5. The gate of the fifth MOS transistor Q5 is connected to the first power supply terminal 1 through the seventh resistor R7 and is also grounded through the eighth resistor R8. The source of the fifth MOS transistor Q5, the source of the sixth MOS transistor Q6, and the other end of the ninth resistor R9 are grounded.

[0039] The fourth resistor R4 and the fifth resistor R5 are current-limiting protection resistors to prevent the first and second power supply terminals from being short-circuited due to possible short circuits of the third MOS transistor Q3 and the fourth MOS transistor Q4, resulting in damage to the power supply by a large current.

[0040] When the first power supply terminal 1 outputs a 7V voltage and the second power supply terminal 2 outputs no voltage, the VDD7V is divided by the first resistor R1 and the second resistor R2, so that the gate voltage of the first MOS transistor Q1 is greater than the turn-on voltage VGS(th), and the first MOS transistor Q1 is turned on. At this time, the gate of the second MOS transistor Q2 is at a low level and is also turned on. At the same time, after the VDD7V is divided by the seventh resistor R7 and the eighth resistor R8, the fifth MOS transistor is turned on to make the gate of the sixth MOS transistor at a low level and cut off. At this time, the gate voltages of the third and fourth MOSs are close to "VDD12V - the voltage drop of the parasitic diode in the third MOS transistor Q3 - the voltage drops of the fourth and fifth resistors". At this time, the third and fourth MOS transistors are cut off, and the 12V voltage cannot supply power to the voltage output module 5. And the third MOS transistor Q3, as the back-to-back PMOS of the fourth MOS transistor Q4, prevents the reverse input of the subsequent VDD7V_12V to the second power supply terminal 2.

[0041] When the output of the first power supply terminal 1 is 0 and the output of the second power supply terminal 2 is 12V, the voltage of the first power supply terminal 1 at the gate of the fifth MOS transistor Q5 is 0V, and the fifth MOS transistor Q5 is cut off. The VDD12V output by the second power supply terminal 2 passes through the fourth resistor R4, the fifth resistor R5 and the parasitic diode of the third MOS transistor Q3, and then generates a voltage division at the sixth resistor R6 and the ninth resistor R9, and is greater than the turn-on voltage VGS(th) of the sixth MOS transistor Q6. The sixth MOS transistor Q6 is turned on, so that the gate voltages of the third and fourth MOS transistors are 0V and are turned on. The second power supply terminal 2 outputs VDD12V to supply power to the subsequent stage. The first and second MOS transistors can prevent the reverse input of the subsequent VDD7V_12V to the first power supply terminal 1.

[0042] When the first power supply terminal 1 outputs a 7V voltage and the second power supply terminal 2 outputs a 12V voltage at the same time, the 7V voltage turns on the first and second MOS transistors to supply power to the subsequent stage, and the fifth MOS transistor Q5 is turned on and the sixth MOS transistor Q6 is cut off. The third and fourth MOS transistors are also cut off. The subsequent VDD7V_12V and the voltage 7V cannot be reversely connected to the input VDD12V through the parasitic diode of the fourth MOS transistor Q4.

[0043] When the first power supply terminal 1 fails and the voltage of the first power supply terminal 1 drops to a certain level, the gate voltage of the fifth MOS transistor Q5 becomes less than the threshold voltage VGS(th) and turns off. In addition, after the 12V VDD passes through the fourth resistor R4, the fifth resistor R5 and the parasitic diode of the third MOS transistor Q3, the voltage division generated by the sixth resistor R6 and the ninth resistor R9 is greater than the threshold voltage VGS(th) of the sixth MOS transistor Q6, causing the sixth MOS transistor Q6 to conduct. The gate voltages of the third and fourth MOS transistors are 0V and they conduct. The 12V VDD is output from the second power supply terminal 2 to supply power to the backend. The first and second MOS transistors prevent the 7V_12V VDD from being reverse-connected to the 7V VDD. The threshold voltage for the 7V VDD to switch to the 12V VDD is VGS(th) of the fifth MOS transistor Q5 * (R7 + R8) / R8, which is required to be greater than the 3.3V LDO in the backend step-down voltage regulation module to ensure that the output of the backend LDO is always normal when switching the power supply.

[0044] Please refer to Figure 6 In the second preferred embodiment of the present invention, the first switch module 3 includes a diode D1. The positive electrode of the diode D1 is connected to the first power supply terminal 1, and the negative electrode of the diode D1 is connected to the first end of the second switch module 4 and the voltage output module 5.

[0045] The second switch module 4 includes a third MOS transistor Q3, a fourth MOS transistor Q4, a fifth MOS transistor Q5, a sixth MOS transistor Q6, a fourth resistor R4, a fifth resistor R5, a sixth resistor R6, a seventh resistor R7, an eighth resistor R8, and a ninth resistor R9. The drain of the third MOS transistor Q3 is connected to the second power supply terminal 2 through the fourth resistor R4 and also connected to the second power supply terminal 2 through the fifth resistor R5. The gate of the third MOS transistor Q3 is connected to the gate of the fourth MOS transistor Q4 and the drain of the sixth MOS transistor Q6. The source of the third MOS transistor Q3 is connected to the source of the fourth MOS transistor Q4 and also connected to the drain of the fifth MOS transistor Q5, the gate of the sixth MOS transistor Q6, and one end of the ninth resistor R9 through the sixth resistor R6. The drain of the fourth MOS transistor Q4 is connected to the other end of the first switch module 3 and the voltage output module 5. The gate of the fifth MOS transistor Q5 is connected to the first power supply terminal 1 through the seventh resistor R7 and also grounded through the eighth resistor R8. The source of the fifth MOS transistor Q5, the source of the sixth MOS transistor Q6, and the other end of the ninth resistor R9 are grounded.

[0046] The difference between this embodiment and the above first preferred embodiment is only that a diode D1 is used to replace the first MOS transistor Q1, the second MOS transistor Q2, the first resistor R1, the second resistor R2, and the third resistor R3. When there is a voltage output at the first power supply terminal 1, it has a fast conduction speed and a small voltage drop. Moreover, when powered by the second power supply terminal 2, the forward conduction function of the diode D1 can also prevent VDD7V_12V from being reversely connected to the first power supply terminal 1. In addition, the cost of the diode D1 is lower, and the circuit wiring is also simpler. Since its working mode is the same as that of the first preferred embodiment, it will not be elaborated here.

[0047] In the third preferred embodiment of the present invention, the first switch module 3 can be the same as the above first and second preferred embodiments, and there are a few changes in the connection method of the second switch module 4. Please refer to Figure 7 , the second switch module 4 includes a third MOS transistor Q3, a fourth MOS transistor Q4, a fifth MOS transistor Q5, a sixth MOS transistor Q6, a fourth resistor R4, a fifth resistor R5, a sixth resistor R6, a seventh resistor R7, an eighth resistor R8, and a ninth resistor R9. The drain of the third MOS transistor Q3 is connected to the second power supply terminal 2 through the fourth resistor R4 and also through the fifth resistor R5. The gate of the third MOS transistor Q3 is connected to the gate of the fourth MOS transistor Q4 and the drain of the sixth MOS transistor Q6. The source of the third MOS transistor Q3 is connected to the source of the fourth MOS transistor Q4. The drain of the fourth MOS transistor Q4 is connected to the other end of the first switch module 3 and the voltage output module 5. The gate of the sixth MOS transistor Q6 is connected to the drain of the fifth MOS transistor Q5, also connected to the second power supply terminal 2 through the sixth resistor R6, and also grounded through the ninth resistor R9. The gate of the fifth MOS transistor Q5 is connected to the first power supply terminal 1 through the seventh resistor R7 and also grounded through the eighth resistor R8. The source of the fifth MOS transistor Q5 and the source of the sixth MOS transistor Q6 are grounded.

[0048] The difference between this embodiment and the second switch module 4 in the above first and second preferred embodiments is only the connection method of the sixth resistor R6, but the working principle is the same, so it will not be elaborated here.

[0049] Please refer to Figure 8, in the fourth embodiment of the present utility model, the first switch module 3 includes a seventh MOS transistor Q7, an eighth MOS transistor Q8, a tenth resistor R10, and an eleventh resistor R11. The gate of the seventh MOS transistor Q7 is grounded through the tenth resistor R10. The drain of the seventh MOS transistor Q7 is connected to the gate of the eighth MOS transistor Q8, and also connected to the source of the eighth MOS transistor Q8 and the voltage output module 5 through the eleventh resistor R11. The source of the seventh MOS transistor Q7 is grounded, and the drain of the eighth MOS transistor Q8 is connected to the first power supply terminal 1.

[0050] The second switch module 4 includes a ninth MOS transistor Q9, a tenth MOS transistor Q10, an eleventh MOS transistor Q11, a twelfth MOS transistor Q12, a twelfth resistor R12, a thirteenth resistor R13, a fourteenth resistor R14, a fifteenth resistor R15, a sixteenth resistor R16, a seventeenth resistor R17, and an eighteenth resistor R18. The drain of the ninth MOS transistor Q9 is connected to the second power supply terminal 2 through the twelfth resistor R12, also connected to the second power supply terminal 2 and one end of the fifteenth resistor R15 through the thirteenth resistor R13, and further connected to the gate of the ninth MOS transistor Q9 and the drain of the twelfth MOS transistor Q12 through the fourteenth resistor R14. The source of the ninth MOS transistor Q9 is connected to the source of the tenth MOS transistor Q10. The gate of the tenth MOS transistor Q10 is connected to the gate of the seventh MOS transistor Q7. The drain of the tenth MOS transistor Q10 is connected to the voltage output module 5. The drain of the eleventh MOS transistor Q11 is connected to the other end of the fifteenth resistor R15 and the gate of the twelfth MOS transistor Q12, and also grounded through the eighteenth resistor R18. The gate of the eleventh MOS transistor Q11 is connected to the first power supply terminal 1 through the sixteenth resistor R16 and grounded through the seventeenth resistor R17. The source of the eleventh MOS transistor Q11 and the source of the twelfth MOS transistor Q12 are grounded.

[0051] Among them, the seventh, eleventh, and twelfth MOS transistors are N-channel MOS transistors, which are turned on when their gates are at high level. The eighth, ninth, and tenth MOS transistors are P-channel MOS transistors, which are turned on when their gates are at low level.

[0052] When the first power supply terminal 1 outputs a 7V voltage and the second power supply terminal 2 has no voltage output, VDD7V is output to the gate of the seventh MOS transistor Q7, making the gate voltage of the seventh MOS transistor Q7 greater than the turn-on voltage VGS(th), and causing the seventh MOS transistor Q7 to conduct. At this time, the gate of the eighth MOS transistor Q8 is at low level and conducts. At the same time, VDD7V divides the voltage through the sixteenth resistor R16 to the gate of the eleventh MOS transistor Q11, making the eleventh MOS transistor Q11 conduct, and causing the ninth, tenth, and twelfth MOS transistors to turn off.

[0053] When the output of the first power supply terminal 1 is 0 and the output of the second power supply terminal 2 is 12V, the voltage at the gates of the seventh, tenth, and eleventh MOS transistors of the first power supply terminal 1 is 0V. The seventh and eleventh MOS transistors are turned off, and the tenth MOS transistor Q10 is turned on. After the 12V of VDD is divided by the fifteenth resistor R15, the voltage at the gate of the twelfth MOS transistor Q12 becomes high. The twelfth MOS transistor Q12 is turned on and the ninth MOS transistor Q9 is turned on, enabling the 12V of VDD to supply power to the voltage output module 5.

[0054] When the first power supply terminal 1 outputs a 7V voltage and at the same time the second power supply terminal 2 outputs a 12V voltage, the gate voltage of the tenth MOS transistor Q10 is 7V. At this time, the tenth MOS transistor Q10 is turned off, and the 12V voltage output by the second power supply terminal 2 cannot be output to the voltage output module 5. When the first power supply terminal 1 fails and the voltage of the first power supply terminal 1 drops to a certain extent, the gate voltage of the tenth MOS transistor Q10 becomes less than the turn-on voltage VGS(th) and turns on, while the eleventh MOS transistor is turned off. At this time, the ninth, tenth, and twelfth MOS transistors are turned on, and the second power supply terminal 2 supplies power to the subsequent circuit.

[0055] Please refer to Figures 5 - 8 As shown, the voltage output module 5 includes a first capacitor C1 and a voltage output terminal 6. One end of the first capacitor C1 is connected to the other end of the first switch module 3, the first end of the second switch module 4, and the voltage output terminal 6, and the other end of the first capacitor C1 is grounded.

[0056] The capacitance value of the first capacitor C1 is 100uF. It serves as a buffer capacitor when the first power supply terminal 1 fails to switch the power supply, and is used to supply power to the voltage output module 5 during the switching process.

[0057] The voltage output module 5 further includes a second capacitor C2, and the second capacitor C2 is connected in parallel with the first capacitor C1. The second capacitor C2 mainly functions as a filter. When switching the power supply, it filters out the spike voltage to ensure stable power supply and prevent damage to the subsequent circuit.

[0058] The present invention also provides a power supply device, which includes a step-down voltage regulation module and a power supply switching circuit, and the power supply switching circuit is connected to the step-down voltage regulation module.

[0059] Please also refer to Figure 9 As shown, the step-down voltage regulation module includes an LDO chip U1, a storage inductor L1, several resistors or several capacitors. The LDO chip U1 can step down and regulate the 7V or 12V voltage output by the power supply switching circuit to 3.3V voltage to supply power to the chips of the electrical equipment (such as the main control chip, etc.).

[0060] It should be noted that the low voltage and high level mentioned in the present utility model are not limited to 7V and 12V. Other voltages can also be applied to the power supply switching circuit of the present utility model. The electronic components and circuit structures of the first switch module, the second switch module, and the voltage output module can also be changed in other ways, as long as the priority low-voltage power supply and high voltage as a backup power supply can be implemented, and when the first power supply terminal fails, it can be switched to the second power supply terminal for power supply.

[0061] The power supply switching circuit of the present utility model has two power supplies with different voltages. The low voltage uses a diode (or MOS transistor), and the high voltage uses back-to-back PMOS transistors to supply power to the backend. If only one of them has voltage, the one with voltage supplies power to the backend. If both voltages are present at the same time, the low voltage is used as the main power supply for priority power supply, and when the low voltage fails, it is switched to the high voltage for power supply. For example, for low voltage VDD7V and high voltage VDD12V, an "OR gate" power supply input is used to supply power to the LDO, and then the LDO outputs 3.3V to supply power to the CPU. Usually, by default, VDD7V is used to supply 3.3V to the LDO first. When VDD7V fails, it can be switched to VDD12V to ensure that the LDO always outputs 3.3V normally.

[0062] The present utility model defaults to priority low-voltage power supply, avoiding the problem that when the high voltage is used to supply power to the LDO by default, the voltage drop and heat loss between the input and output of the LDO are greater. The low voltage and high voltage are supplied with power in an "OR gate" manner, and when the low voltage fails, it can be switched from the low voltage to the high voltage, which can avoid the harm that the electrical equipment cannot work properly due to a single power supply failure.

[0063] In addition, the present utility model uses conventional electronic components such as resistors, capacitors, diodes, and MOS transistors, and solves the problem of power supply reliability on the premise of relatively low cost.

[0064] It can be understood that for those of ordinary skill in the art, equivalent substitutions or changes can be made according to the technical solution and the inventive concept of the present utility model, and all such changes or substitutions should fall within the protection scope of the claims appended to the present utility model.

Claims

1. A power switching circuit, characterized in that: The invention comprises a first power supply end, a second power supply end, a first switch module, a second switch module and a voltage output module, wherein one end of the first switch module is connected to the first power supply end, the other end of the first switch module and the first end of the second switch module are connected to the voltage output module, the second end of the second switch module is connected to the second power supply end, and the third end of the second switch module is connected to the first power supply end, and the supply voltage of the first power supply end is lower than that of the second power supply end; when the first power supply end has voltage output and the second power supply end has no voltage output, the first switch module is turned on and the second switch module is turned off, and the first power supply end supplies power; when the first power supply end has no voltage output and the second power supply end has voltage output, the second switch module is turned on and the first switch module is turned off, and the second power supply end supplies power; when both the first power supply end and the second power supply end have voltage output, the first switch module is turned on and the second switch module is turned off, and the first power supply end supplies power; when the first power supply end and the second power supply end both have voltage output, the first switch module is turned on and the second switch module is turned off, and the first power supply end supplies power; when the first power supply end fails, the second switch module is turned on and the first switch module is turned off, and the second power supply end supplies power.

2. The power switching circuit according to claim 1, characterized in that: The first switch module includes a diode, an anode of the diode is connected to the first power supply end, and a cathode of the diode is connected to a first end of the second switch module and the voltage output module.

3. The power switching circuit according to claim 1, characterized in that: The first switch module includes a first MOS tube, a second MOS tube, a first resistor, a second resistor and a third resistor. The gate of the first MOS tube is connected to the first power supply end through the first resistor and is also grounded through the second resistor. The drain of the first MOS tube is connected to the gate of the second MOS tube and is also connected to the source of the second MOS tube, the first end of the second switch module and the voltage output module through the third resistor. The source of the first MOS tube is grounded, and the drain of the second MOS tube is connected to the first power supply end.

4. The power switching circuit according to claim 2 or 3, characterized in that: The second switch module includes a third MOS tube, a fourth MOS tube, a fifth MOS tube, a sixth MOS tube, a fourth resistor, a fifth resistor, a sixth resistor, a seventh resistor, an eighth resistor and a ninth resistor. The drain of the third MOS tube is connected to the second power supply end through the fourth resistor and is also connected to the second power supply end through the fifth resistor. The gate of the third MOS tube is connected to the gate of the fourth MOS tube and the drain of the sixth MOS tube. The source of the third MOS tube is connected to the source of the fourth MOS tube and is also connected to the drain of the fifth MOS tube, the gate of the sixth MOS tube and one end of the ninth resistor through the sixth resistor. The drain of the fourth MOS tube is connected to the other end of the first switch module and the voltage output module. The gate of the fifth MOS tube is connected to the first power supply end through the seventh resistor and is also grounded through the eighth resistor. The source of the fifth MOS tube, the source of the sixth MOS tube and the other end of the ninth resistor are grounded.

5. The power switching circuit according to claim 2 or 3, characterized in that: The second switch module includes a third MOS tube, a fourth MOS tube, a fifth MOS tube, a sixth MOS tube, a fourth resistor, a fifth resistor, a sixth resistor, a seventh resistor, an eighth resistor and a ninth resistor. The drain of the third MOS tube is connected to the second power supply end through the fourth resistor and is also connected to the second power supply end through the fifth resistor. The gate of the third MOS tube is connected to the gate of the fourth MOS tube and the drain of the sixth MOS tube. The source of the third MOS tube is connected to the source of the fourth MOS tube. The drain of the fourth MOS tube is connected to the other end of the first switch module and the voltage output module. The gate of the sixth MOS tube is connected to the drain of the fifth MOS tube, is also connected to the second power supply end through the sixth resistor, and is also grounded through the ninth resistor. The gate of the fifth MOS tube is connected to the first power supply end through the seventh resistor and is also grounded through the eighth resistor. The source of the fifth MOS tube and the source of the sixth MOS tube are grounded.

6. The power switching circuit according to claim 1, characterized in that: The first switch module includes a seventh MOS tube, an eighth MOS tube, a tenth resistor and an eleventh resistor. The gate of the seventh MOS tube is grounded through the tenth resistor, the drain of the seventh MOS tube is connected to the gate of the eighth MOS tube and is also connected to the source of the eighth MOS tube and the voltage output module through the eleventh resistor. The source of the seventh MOS tube is grounded, and the drain of the eighth MOS tube is connected to the first power supply end.

7. The power switching circuit according to claim 6, characterized in that: The second switch module includes a ninth MOS tube, a tenth MOS tube, an eleventh MOS tube, a twelfth MOS tube, a twelfth resistor, a thirteenth resistor, a fourteenth resistor, a fifteenth resistor, a sixteenth resistor, a seventeenth resistor and an eighteenth resistor. The drain of the ninth MOS tube is connected to the second power supply end through the twelfth resistor, is also connected to the second power supply end and one end of the fifteenth resistor through the thirteenth resistor, is also connected to the gate of the ninth MOS tube and the drain of the twelfth MOS tube through the fourteenth resistor, the source of the ninth MOS tube is connected to the source of the tenth MOS tube, the gate of the tenth MOS tube is connected to the gate of the seventh MOS tube, the drain of the tenth MOS tube is connected to the voltage output module, the drain of the eleventh MOS tube is connected to the other end of the fifteenth resistor and the gate of the twelfth MOS tube, and is also grounded through the eighteenth resistor, the gate of the eleventh MOS tube is connected to the first power supply end through the sixteenth resistor, and is also grounded through the seventeenth resistor, and the source of the eleventh MOS tube and the source of the twelfth MOS tube are grounded.

8. The power switching circuit according to claim 1, characterized in that: The voltage output module includes a first capacitor and a voltage output terminal, one end of the first capacitor is connected to the other end of the first switch module, the first end of the second switch module and the voltage output terminal, and the other end of the first capacitor is grounded.

9. The power switching circuit according to claim 8, characterized in that: The voltage output module further includes a second capacitor, which is connected in parallel with the first capacitor.

10. A power supply device, comprising a step-down voltage regulator module, characterized in that: It also includes a power switching circuit as described in any one of claims 1 to 9, and the power switching circuit is connected to the buck stabilization module.