Motor control circuit
By designing a motor control circuit containing multiple sub-circuits, the problem of high cost and poor compatibility when replacing brushed motors with brushed motors is solved, and the direct replacement of brushed motors is realized by reducing replacement costs and system compatibility.
Patent Information
- Application Number
- CN202421623646.0
- Authority / Receiving Office
- CN · China
- Patent Type
- Utility models(China)
- Current Assignee / Owner
- Filing Date
- 2024-07-09
- Publication Date
- 2025-05-27
- Estimated Expiration
- 2034-07-09
AI Technical Summary
When replacing brushless motors, existing brushless motor control devices need to replace the entire control system, resulting in high costs and poor system compatibility.
A motor control circuit is designed, including a signal input sub-circuit, a positive and reverse conversion phase logic sub-circuit, a dead-band regulation sub-circuit, a gate driver sub-circuit, a three-phase bridge amplifier sub-circuit, an overcurrent protection sub-circuit and a power sub-circuit, which can realize the direct replacement of a brushless motor to a brushed motor.
The motor control circuit can greatly reduce replacement costs and system compatibility. The discrete connection design between circuit modules makes component replacement and upgrade more flexible, and includes power sub-circuit for self-reduction, reducing the demand for external isolated power supplies, and reducing the cost and space occupation of the control system.
Smart Images

Figure CN222915908U_ABST
Abstract
Description
Technical Field
[0001] The present application relates to the field of forward and reverse speed regulation control of brushless motors, and in particular to a motor control circuit. Background Art
[0002] With the continuous development of society, various types of motors have become indispensable in production and life. Among them, brushless motors are increasingly widely used in servo systems due to their high reliability and long life, and there are more and more occasions where brushless motor control devices are needed.
[0003] At present, most of the brushless motor control devices available on the market are controlled by dedicated motor driver chips or embedded central processing units (CPUs). Some highly integrated driver modules can adjust the speed of the motor in forward and reverse directions, and the control signal usually consists of PWM (speed) and DIR (direction). Some applications require brushless motors to replace brushed motors. The speed control of brushed motors only has one PWM (speed + direction) signal, and the entire control system must be replaced when replacing it.
[0004] Therefore, there is an urgent need to develop a motor control circuit to solve one or more of the above problems. Utility Model Content
[0005] In view of this, in order to solve the above technical problems or part of the technical problems, an embodiment of the utility model provides a motor control circuit.
[0006] In a first aspect, the present application provides a motor control circuit, the circuit comprising a signal input subcircuit, a forward and reverse conversion phase logic subcircuit, a dead zone adjustment subcircuit, a gate drive subcircuit, a three-phase bridge amplifier subcircuit, an overcurrent protection subcircuit and a power supply subcircuit;
[0007] The output end of the power supply subcircuit is connected to the signal input subcircuit, the forward and reverse conversion phase logic subcircuit, the dead zone adjustment subcircuit, and the gate drive subcircuit;
[0008] The output end of the signal input subcircuit is connected to the forward and reverse conversion phase logic subcircuit;
[0009] The output end of the forward and reverse conversion phase logic subcircuit is connected to the dead zone adjustment subcircuit;
[0010] The output end of the dead zone adjustment subcircuit is connected to the gate driving subcircuit;
[0011] The output end of the gate driving subcircuit is connected to the three-phase bridge power amplifier subcircuit;
[0012] The output end of the three-phase bridge power amplifier subcircuit is connected to the overcurrent protection subcircuit and the brushless motor;
[0013] The output end of the overcurrent protection subcircuit is connected to the forward and reverse conversion phase logic subcircuit.
[0014] In a possible implementation manner, the signal input subcircuit includes a Hall acquisition subcircuit and a single PWM speed regulation subcircuit;
[0015] The input end of the Hall acquisition subcircuit receives the Hall position electrical signal of the motor, and the output end of the Hall acquisition subcircuit is connected to the forward and reverse conversion phase logic subcircuit;
[0016] The output end of the Hall acquisition subcircuit outputs HA1, HB1, HC1, HA2, HB2 and HC2 signals to the forward and reverse conversion phase logic subcircuit.
[0017] In a possible implementation, the Hall acquisition subcircuit includes three Hall simulation subcircuits and three Hall processing subcircuits, which respectively output HA1, HB1, HC1 and HA2, HB2, HC2 signals;
[0018] The input end of any of the Hall processing sub-circuits receives the first output Hall signal output by the Hall simulation sub-circuit, and the output end outputs the corresponding second output Hall signal.
[0019] In a possible implementation, the single PWM speed regulation subcircuit includes a single PWM simulation subcircuit and a single PWM processing subcircuit, which output PWMX signal, PWM2 signal, and PWM3 signal respectively;
[0020] The input end of the single PWM analog sub-circuit receives the motor speed control signal PWM1, and the output end of the single PWM analog sub-circuit outputs the PWMX signal to the single PWM processing sub-circuit to the forward and reverse conversion phase logic sub-circuit;
[0021] The input end of the single PWM processing sub-circuit receives a PWMX signal, and the output end of the single PWM processing sub-circuit outputs a PWM2 signal and a PWM3 signal.
[0022] In a possible implementation manner, the single PWM analog sub-circuit includes a first analog resistor, an analog integrated sub-circuit, a first analog capacitor, a second analog capacitor, and a second analog resistor;
[0023] One end of the first analog resistor receives the speed control signal PWM1 of the motor, and the other end of the first analog resistor is connected to the inverting signal input pin of the analog integrated sub-circuit;
[0024] One end of the first analog capacitor is connected to the VCC power input pin of the analog integrated sub-circuit and a 15V power supply, and the other end of the first analog capacitor is grounded;
[0025] One end of the second analog capacitor is connected to the GND ground pin of the analog integrated sub-circuit;
[0026] The other end of the second analog capacitor is connected to one end of the second analog resistor and then connected to the OUT signal output pin of the analog integrated sub-circuit;
[0027] The other end of the second analog resistor is connected to the VCC power input pin of the analog integrated sub-circuit;
[0028] The OUT signal output pin of the analog integrated sub-circuit is also connected to the single PWM processing sub-circuit.
[0029] In a possible implementation, the input end of the forward and reverse conversion phase logic sub-circuit receives the HA1, HB1, HC1, HA2, HB2 and HC2 signals output by the Hall acquisition sub-circuit, and the PWM2 signal and PWM3 signal output by the single PWM speed regulation sub-circuit, and the output end of the forward and reverse conversion phase logic sub-circuit outputs a first WH signal, a first VH signal, a first UH signal, a first WL signal, a first VL signal and a first UL signal to the dead zone adjustment sub-circuit.
[0030] In a possible implementation manner, the dead zone adjustment subcircuit includes six adjustment processing subcircuits, and the input end of the adjustment processing subcircuit respectively receives the first WH signal, the first VH signal, the first UH signal, the first WL signal, the first VL signal and the first UL signal output by the positive and negative conversion phase logic subcircuit; the output end of the adjustment processing subcircuit respectively outputs the corresponding second WH signal, the second VH signal, the second UH signal, the second WL signal, the second VL signal and the second UL signal to the gate driving subcircuit;
[0031] Any of the adjustment processing sub-circuits comprises a first integrated sub-circuit, an adjustment resistor, an adjustment diode, an adjustment capacitor and a second integrated sub-circuit;
[0032] The input end of the first integrated sub-circuit receives the first WH signal, or the first VH signal, or the first UH signal, or the first WL signal, or the first VL signal, or the first UL signal output by the forward and reverse conversion phase logic sub-circuit;
[0033] The output end of the first integrated sub-circuit is connected to one end of the regulating resistor and the anode of the regulating diode;
[0034] The other end of the regulating resistor is connected to the cathode of the regulating diode;
[0035] The cathode of the regulating diode is also connected to one end of the regulating capacitor, and the other end of the regulating capacitor is connected to a 15V power supply;
[0036] The other end of the regulating resistor is also connected to the input end of the second integrated sub-circuit;
[0037] The output end of the second integrated sub-circuit outputs a corresponding second WH signal, or a second VH signal, or a second UH signal, or a second WL signal, or a second VL signal, or a second UL signal.
[0038] In one possible implementation, the gate drive subcircuit includes three drive subcircuits, the input end of the drive subcircuit receives the second UL signal and the second UH signal, or the second VL signal and the second VH signal, or the second WL signal and the second WH signal output by the dead zone adjustment subcircuit, and the output end of the drive subcircuit outputs the corresponding LU signal and the HU signal, or the LV signal and the HV signal, or the LW signal and the HW signal to the three-phase bridge power amplifier subcircuit.
[0039] In a possible implementation manner, the input end of the three-phase bridge power amplifier sub-circuit receives the LU signal and the HU signal, or the LV signal and the HV signal, or the LW signal and the HW signal output by the driving sub-circuit, and the output end of the three-phase bridge power amplifier sub-circuit outputs the UVW control signal to the motor;
[0040] Wherein, the three-phase bridge power amplifier sub-circuit includes a first MOS tube, a second MOS tube, a third MOS tube, a fourth MOS tube, a fifth MOS tube, a sixth MOS tube and a power amplifier resistor;
[0041] The gates of the first MOS tube, the second MOS tube, the third MOS tube, the fourth MOS tube, the fifth MOS tube and the sixth MOS tube respectively receive the HU signal, the HV signal, the HW signal, the LU signal, the LV signal and the LW signal output by the gate driving sub-circuit;
[0042] The drains of the first MOS tube, the second MOS tube, and the third MOS tube are connected and then connected to a 48V power supply;
[0043] The sources of the drains of the first MOS tube, the second MOS tube, and the third MOS tube are connected to the drains of the fourth MOS tube, the fifth MOS tube, and the sixth MOS tube in sequence;
[0044] The sources of the fourth MOS tube, the fifth MOS tube, and the sixth MOS tube are connected to one end of the power amplifier resistor;
[0045] The other end of the power amplifier resistor is grounded.
[0046] In a possible implementation manner, the output end of the three-phase bridge power amplifier sub-circuit further outputs an OCP signal to the overcurrent protection sub-circuit, and the overcurrent protection sub-circuit outputs a PTC signal to the forward and reverse conversion phase logic sub-circuit.
[0047] The above technical solution provided by the embodiment of the present application has the following advantages over the prior art: the embodiment of the present application provides a motor control circuit, which can realize the direct replacement of brushless motors for brushed motors, greatly reducing replacement costs and system compatibility. The connections between different modules of the circuit are discrete. When part of the circuit is damaged or upgraded, it is easier to replace parts or components, and it has high flexibility. The circuit also includes a power sub-circuit that can self-step down the external power supply to provide the power required by the control circuit itself. There is no need for a separate isolated power supply to be provided externally, effectively reducing the cost of the control system and saving the space volume of the control system. BRIEF DESCRIPTION OF THE DRAWINGS
[0048] The accompanying drawings herein are incorporated in and constitute a part of the specification, illustrate embodiments consistent with the present utility model, and together with the description, are used to explain the principles of the present utility model.
[0049] In order to more clearly illustrate the technical solutions in the embodiments of the utility model or the prior art, the drawings required for use in the embodiments or the description of the prior art will be briefly introduced below. Obviously, for ordinary technicians in this field, other drawings can be obtained based on these drawings without paying any creative labor.
[0050] One or more embodiments are exemplarily described by pictures in the corresponding drawings, and these exemplified descriptions do not constitute limitations on the embodiments. Elements with the same reference numerals in the drawings represent similar elements, and unless otherwise stated, the figures in the drawings do not constitute proportional limitations.
[0051] Figure 1 A schematic diagram of the structure of a motor control circuit provided in an embodiment of the present application;
[0052] Figure 2 A schematic diagram of the structure of another motor control circuit provided in an embodiment of the present application;
[0053] Figure 3 This is a schematic diagram of the structure of the Hall acquisition subcircuit provided in an embodiment of the present application;
[0054] Figure 4 This is a schematic diagram of the structure of a single PWM speed regulation sub-circuit provided in an embodiment of the present application;
[0055] Figure 5A schematic diagram of the structure of the forward and reverse conversion phase logic sub-circuit provided in an embodiment of the present application;
[0056] Figure 6 A schematic diagram of the structure of a dead zone adjustment subcircuit provided in an embodiment of the present application;
[0057] Figure 7 A schematic diagram of the structure of a gate drive subcircuit provided in an embodiment of the present application;
[0058] Figure 8 A schematic diagram of the structure of a three-phase bridge power amplifier sub-circuit provided in an embodiment of the present application;
[0059] Fig. 9 A schematic diagram of the structure of an overcurrent protection subcircuit provided in an embodiment of the present application;
[0060] Fig.10 A schematic diagram of the structure of a power subcircuit provided in an embodiment of the present application;
[0061] Fig.11 A schematic diagram of the working principle of the existing example 1 provided in the embodiments of the present application;
[0062] Fig.12 A schematic diagram of the working principle of the existing example 2 provided in the embodiments of the present application;
[0063] Fig.13 Schematic diagram of the working principle of the motor control circuit provided in the embodiment of the present application. DETAILED DESCRIPTION
[0064] In order to make the purpose, technical solution and advantages of the embodiments of the present application clearer, the technical solution in the embodiments of the present application will be clearly and completely described below in conjunction with the drawings in the embodiments of the present application. Obviously, the described embodiments are part of the embodiments of the present application, not all of the embodiments. Based on the embodiments in the present application, all other embodiments obtained by ordinary technicians in this field without making creative work are within the scope of protection of this application.
[0065] The disclosure below provides many different embodiments or examples for realizing different structures of the present invention. In order to simplify the disclosure of the present invention, the components and settings of specific examples are described below. Of course, they are only examples, and the purpose is not to limit the present invention. In addition, the present invention may repeat reference numbers and / or letters in different examples. This repetition is for the purpose of simplification and clarity, and does not itself indicate the relationship between the various embodiments and / or settings discussed.
[0066] In order to solve the technical problem that the brushless motor speed control in the prior art has only one PWM (speed + direction) signal, and the replacement must replace the entire control system, this application is built with hardware components to achieve the control of the motor speed. The motor can be a brushless motor or other types of motors that can use the motor control circuit. The scope of protection of this application is not limited to the type of motor that the motor control circuit acts on.
[0067] Figure 1 Schematic diagram of the structure of the motor control circuit provided in the embodiment of the present application, such as Figure 1 As shown, the motor control circuit includes a signal input subcircuit 102, a forward and reverse conversion phase logic subcircuit 103, a dead zone adjustment subcircuit 104, a gate drive subcircuit 105, a three-phase bridge power amplifier subcircuit 106, an overcurrent protection subcircuit 107 and a power supply subcircuit 108;
[0068] The output end of the power supply sub-circuit 108 is connected to the signal input sub-circuit 102, the forward and reverse conversion phase logic sub-circuit 103, the dead zone adjustment sub-circuit 104, and the gate drive sub-circuit 105;
[0069] The output end of the signal input subcircuit 102 is connected to the forward and reverse conversion phase logic subcircuit 103;
[0070] The output end of the forward and reverse conversion phase logic subcircuit 103 is connected to the dead zone adjustment subcircuit 104;
[0071] The output end of the dead zone adjustment sub-circuit 104 is connected to the gate driving sub-circuit 105;
[0072] The output end of the gate driving sub-circuit 105 is connected to the three-phase bridge power amplifier sub-circuit 106;
[0073] The output end of the three-phase bridge power amplifier sub-circuit 106 is connected to the overcurrent protection sub-circuit 107 and the brushless motor 101;
[0074] The output end of the overcurrent protection sub-circuit 107 is connected to the forward and reverse conversion phase logic sub-circuit 103 .
[0075] In this embodiment, the motor control circuit includes a signal input subcircuit 102, a forward and reverse conversion phase logic subcircuit 103, a dead zone adjustment subcircuit 104, a gate drive subcircuit 105, a three-phase bridge amplifier subcircuit 106, an overcurrent protection subcircuit 107, and a power supply subcircuit 108, wherein the input end of the signal input subcircuit 102 receives the Hall position electrical signal (Hall input signal) of the motor and the PWM signal for controlling the brushless motor 101, and the output end of the signal input subcircuit 102 is connected to the input end of the forward and reverse conversion phase logic subcircuit 103; the output end of the forward and reverse conversion phase logic subcircuit 103 is connected to the input end of the dead zone adjustment subcircuit 104; the dead zone adjustment The output end of the node subcircuit 104 is connected to the input end of the gate driving subcircuit 105; the output end of the gate driving subcircuit 105 and the external power supply are connected to the input end of the three-phase bridge power amplifier subcircuit 106; the output end of the three-phase bridge power amplifier subcircuit 106 is connected to the brushless motor 101 and the input end of the overcurrent protection subcircuit 107; the output end of the overcurrent protection subcircuit 107 is connected to the input end of the positive and negative conversion phase logic subcircuit 103; the input end of the power supply subcircuit 108 is connected to the external power supply, and the output end of the power supply subcircuit 108 is respectively connected to the signal input subcircuit 102, the positive and negative conversion phase logic subcircuit 103, the dead zone adjustment subcircuit 104 and the gate driving subcircuit 105.
[0076] In the motor control circuit provided by the embodiment of the present application, after the forward and reverse phase conversion logic subcircuit 103 receives the Hall output signal and the PWM signal, it generates a three-phase bridge signal and transmits it to the dead zone adjustment subcircuit 104. The dead zone adjustment subcircuit transmits the three-phase bridge signal with a dead zone (so that the PWM signal appears to be at a low level in the same period, ensuring that the upper bridge and the lower bridge of the three-phase bridge power amplifier subcircuit will not be turned on at the same time due to the delay of the MOS tube switching action) to the gate drive subcircuit 105, generates a drive signal, and transmits it to the three-phase bridge power amplifier subcircuit 106, drives the three-phase bridge power amplifier subcircuit 106 to perform a switching action, and completes the control of the brushless motor 101. The overcurrent protection subcircuit 107 samples the external power supply connected to the three-phase bridge power amplifier subcircuit 106. When the brushless motor 101 has an instantaneous overcurrent, it can work according to the maximum operating current preset by the overcurrent protection subcircuit, and will not cause the brushless motor 101 to shut down, thereby realizing the overcurrent protection function and further improving the stability of the brushless motor 101 and the control circuit.
[0077] The control circuit of the brushless motor 101 is built by hardware components. Compared with program control, the hardware circuit is not easily interfered by strong electromagnetic factors. The connection between different modules of the circuit is discrete. When the circuit is partially damaged or upgraded, it is easier to replace parts or components, which has high flexibility. The circuit includes a power subcircuit 104, which can self-step down the external power supply to provide the power required by the control circuit itself. There is no need to provide a separate isolated power supply externally, which effectively reduces the cost of the control system and saves the space volume of the control system.
[0078] In an optional solution of the embodiment of the utility model, the signal input subcircuit 102 includes a Hall acquisition subcircuit 1021 and a single PWM speed regulation subcircuit 1022;
[0079] The input end of the Hall acquisition subcircuit 1021 receives the Hall position electrical signal of the motor, and the output end of the Hall acquisition subcircuit 1021 is connected to the forward and reverse conversion phase logic subcircuit 103;
[0080] The output end of the Hall acquisition sub-circuit 1021 outputs HA1, HB1, HC1, HA2, HB2 and HC2 signals to the forward and reverse conversion phase logic sub-circuit 103.
[0081] like Figure 2 As shown, in this embodiment, the signal input subcircuit 102 includes a Hall acquisition subcircuit 1021 and a single PWM speed regulation subcircuit 1022, wherein the input end of the Hall acquisition subcircuit 1021 receives the Hall position electrical signal of the motor, and the output end of the Hall acquisition subcircuit 1021 is connected to the input end of the forward and reverse conversion phase logic subcircuit 103; the input end of the single PWM speed regulation subcircuit 1022 receives the PWM signal for controlling the brushless motor 101, and the output end of the single PWM speed regulation subcircuit 1022 is connected to the input end of the forward and reverse conversion phase logic subcircuit 103.
[0082] The Hall acquisition subcircuit 1021 receives the Hall position electrical signal of the motor. The single PWM speed regulation subcircuit 1022 receives the PWM signal for controlling the motor and generates a pulse width modulation (PWM) signal. The forward and reverse conversion phase logic subcircuit 103 receives the output Hall signal for controlling the brushless motor 101 generated by the Hall acquisition subcircuit 1021 and the pulse width modulation (PWM) signal generated by the single PWM speed regulation subcircuit 1022, and transmits them to the forward and reverse conversion phase logic subcircuit 103.
[0083] In an optional solution of the embodiment of the utility model, the Hall acquisition subcircuit 1021 includes three Hall simulation subcircuits and three Hall processing subcircuits, which respectively output HA1, HB1, HC1 and HA2, HB2, HC2 signals;
[0084] The input end of any of the Hall processing sub-circuits receives the first output Hall signal output by the Hall simulation sub-circuit, and the output end outputs the corresponding second output Hall signal.
[0085] Figure 3 Schematic diagram of the structure of the Hall acquisition sub-circuit provided in the embodiment of the present application, such as Figure 3 As shown, the Hall acquisition subcircuit 1021 includes three Hall simulation subcircuits and three Hall processing subcircuits. The Hall acquisition subcircuit 1021 is Figure 2 The components and connection methods in the embodiment realize the related functions, wherein HA, HB, HC represent the Hall position signals received from the motor, R6, R7, R8 represent different resistors, C1, C2, C3 represent different capacitors, D1, D2, D3 represent different diodes, HA1, HB1, HC1, HA2, HB2, HC2 are the terminal numbers. U4D, U4E, U4F represent the Hall signal processing integrated sub-circuit, and the HA1, HB1, HC1, HA2, HB2, HC2 terminals are respectively connected to the terminals with the same numbers inside the forward and reverse conversion phase logic sub-circuit 103.
[0086] In an optional solution of the embodiment of the utility model, the single PWM speed regulation subcircuit 1022 includes a single PWM simulation subcircuit and a single PWM processing subcircuit, which output PWMX signal, PWM2 signal and PWM3 signal respectively;
[0087] The input end of the single PWM analog sub-circuit receives the motor speed control signal PWM1, and the output end of the single PWM analog sub-circuit outputs the PWMX signal to the single PWM processing sub-circuit to the forward and reverse conversion phase logic sub-circuit 103;
[0088] The input end of the single PWM processing sub-circuit receives a PWMX signal, and the output end of the single PWM processing sub-circuit outputs a PWM2 signal and a PWM3 signal.
[0089] It should be noted that in this embodiment, the PWM signal received by the single PWM speed regulation subcircuit 1022 for controlling the brushless motor 101 may be an electrical signal generated by an automatic device or an electrical signal generated after manual adjustment. The scope of protection of this application is not limited to the generation method of the PWM signal for controlling the brushless motor 101.
[0090] In an optional solution of the embodiment of the utility model, the single PWM analog sub-circuit includes a first analog resistor, an analog integrated sub-circuit, a first analog capacitor, a second analog capacitor, and a second analog resistor;
[0091] One end of the first analog resistor receives the speed control signal PWM1 of the motor, and the other end of the first analog resistor is connected to the inverting signal input pin of the analog integrated sub-circuit;
[0092] One end of the first analog capacitor is connected to the VCC power input pin of the analog integrated sub-circuit and a 15V power supply, and the other end of the first analog capacitor is grounded;
[0093] One end of the second analog capacitor is connected to the GND ground pin of the analog integrated sub-circuit;
[0094] The other end of the second analog capacitor is connected to one end of the second analog resistor and then connected to the OUT signal output pin of the analog integrated sub-circuit;
[0095] The other end of the second analog resistor is connected to the VCC power input pin of the analog integrated sub-circuit;
[0096] The OUT signal output pin of the analog integrated sub-circuit is also connected to the single PWM processing sub-circuit.
[0097] Specifically, one end of the first analog resistor receives the speed control signal PWM1 of the motor, and the other end of the first analog resistor is connected to the inverting signal input pin of the analog integrated sub-circuit; one end of the first analog capacitor is connected to the VCC power input pin of the analog integrated sub-circuit and the 15V power supply, and the other end of the first analog capacitor is grounded; one end of the second analog capacitor is connected to the GND ground pin of the analog integrated sub-circuit; the other end of the second analog capacitor is connected to one end of the second analog resistor and then connected to the OUT signal output pin of the analog integrated sub-circuit; the other end of the second analog resistor is connected to the VCC power input pin of the analog integrated sub-circuit; the OUT signal output pin of the analog integrated sub-circuit is also connected to the single PWM processing sub-circuit.
[0098] Figure 4 Schematic diagram of the structure of a single PWM speed regulation sub-circuit provided in an embodiment of the present application, such as Figure 4As shown, the single PWM analog sub-circuit includes a first analog resistor R5, an analog integrated sub-circuit U1, a first analog capacitor C4, a second analog capacitor C5, and a second analog resistor R9; one end of the first analog resistor R5 receives the speed control signal PWM1 of the motor, and the other end of the first analog resistor R5 is connected to the inverting signal input pin of the analog integrated sub-circuit U1; one end of the first analog capacitor C4 is connected to the VCC power input pin of the analog integrated sub-circuit U1 and the 15V power supply, and the other end of the first analog capacitor C4 is grounded; one end of the second analog capacitor C5 is connected to the GND ground pin of the analog integrated sub-circuit U1; the other end of the second analog capacitor C5 is connected to one end of the second analog resistor R9 and then connected to the OUT signal output pin of the analog integrated sub-circuit U1; the other end of the second analog resistor R9 is connected to the VCC power input pin of the analog integrated sub-circuit U1; the OUT signal output pin of the analog integrated sub-circuit U1 is also connected to the single PWM processing sub-circuit.
[0099] Single PWM speed regulation subcircuit 1022 through Figure 4 The components and connection methods in the embodiment realize related functions, wherein U1 represents an analog integrated sub-circuit, U4A, U4B, and U4C represent processing integrated sub-circuits, R5 and R9 represent different resistors, C4 and C5 represent different capacitors, PWM1 represents an input PWM signal for controlling the brushless motor 101, and PWM, The terminal numbers correspond to the PWM2 signal and the PWM3 signal respectively, and the terminals corresponding to the PWM2 signal and the PWM3 signal are respectively connected to the terminals with the same numbers inside the forward and reverse conversion phase logic sub-circuit 103.
[0100] In an optional scheme of an embodiment of the utility model, the input end of the forward and reverse conversion phase logic sub-circuit 103 receives the HA1, HB1, HC1, HA2, HB2 and HC2 signals output by the Hall acquisition sub-circuit 1021, and the PWM2 signal and PWM3 signal output by the single PWM speed regulation sub-circuit 1022, and the output end of the forward and reverse conversion phase logic sub-circuit 103 outputs a first WH signal, a first VH signal, a first UH signal, a first WL signal, a first VL signal and a first UL signal to the dead zone adjustment sub-circuit 104.
[0101] Figure 5 Schematic diagram of the structure of the forward and reverse conversion phase logic sub-circuit provided in the embodiment of the present application, such as Figure 5 As shown, the positive and negative conversion phase logic sub-circuit 103 is Figure 5 The components and connection methods in the figure realize related functions, among which U3, U5, U6, and U7 represent the phase-changing logic processing integrated circuit, PTC, PWM, HA, HB, HC, WH, VH, UH, WL, VL, and WL are different terminal numbers, which correspond to PTC, PWM2, PWM3, HA1, HB1, HC1, HA2, HB2, HC2, first WH, first VH, first UH, first WL, first VL, and first WL signals respectively. The PTC terminal is connected to the terminal with the same number inside the overcurrent protection subcircuit 107, the terminals corresponding to the PWM2 and PWM3 signals are connected to the terminals with the same number inside the single PWM speed regulation circuit 102, the terminals corresponding to the HA1, HB1, HC1, HA2, HB2, and HC2 signals are connected to the terminals with the same number inside the Hall acquisition subcircuit 1021, and the terminals corresponding to the first WH, first VH, first UH, first WL, first VL, and first WL signals are connected to the terminals with the same number inside the dead zone adjustment subcircuit 104.
[0102] In an optional solution of the embodiment of the utility model, the dead zone adjustment subcircuit 104 includes six adjustment processing subcircuits, and the input end of the adjustment processing subcircuit receives the first WH signal, the first VH signal, the first UH signal, the first WL signal, the first VL signal and the first UL signal output by the positive and negative conversion phase logic subcircuit 103 respectively; the output end of the adjustment processing subcircuit outputs the corresponding second WH signal, the second VH signal, the second UH signal, the second WL signal, the second VL signal and the second UL signal to the gate driving subcircuit 105 respectively;
[0103] Any of the adjustment processing sub-circuits comprises a first integrated sub-circuit, an adjustment resistor, an adjustment diode, an adjustment capacitor and a second integrated sub-circuit;
[0104] The input end of the first integrated sub-circuit receives the first WH signal, or the first VH signal, or the first UH signal, or the first WL signal, or the first VL signal, or the first UL signal output by the forward and reverse conversion phase logic sub-circuit 103;
[0105] The output end of the first integrated sub-circuit is connected to one end of the regulating resistor and the anode of the regulating diode;
[0106] The other end of the regulating resistor is connected to the cathode of the regulating diode;
[0107] The cathode of the regulating diode is also connected to one end of the regulating capacitor, and the other end of the regulating capacitor is connected to a 15V power supply;
[0108] The other end of the regulating resistor is also connected to the input end of the second integrated sub-circuit;
[0109] The output end of the second integrated sub-circuit outputs a corresponding second WH signal, or a second VH signal, or a second UH signal, or a second WL signal, or a second VL signal, or a second UL signal.
[0110] Figure 6 Schematic diagram of the structure of the dead zone adjustment subcircuit 104 provided in the embodiment of the present application, as shown in FIG. Figure 6 As shown, the dead zone adjustment subcircuit 104 is Figure 6 The components and connection methods in the figure realize the relevant functions, wherein U11 and U12 represent the dead zone adjustment processing integrated circuit, WH, VH, UH, WL, VL, WL, WH_D, VH_D, UH_D, WL_D, VL_D, and WL_D are the labels of different terminals, corresponding to the first WH, the first VH, the first UH, the first WL, the first VL, and the first WL signals and the second WH, the second VH, the second UH, the second WL, the second VL, and the second WL signals, respectively. The VL and WL terminals are connected to the terminals with the same numbers inside the forward and reverse conversion phase logic sub-circuit 103, R4, R10, R14, R15, R16, and R19 represent different resistors respectively, C6, C25, C26, C27, C28, and C29 represent different capacitors respectively, V4, V5, V6, V7, V8, and V9 represent different diodes respectively, and WH_D, VH_D, UH_D, WL_D, VL_D, and WL_D are connected to the terminals with the same numbers inside the gate drive sub-circuit 105 respectively.
[0111] In this embodiment, the dead zone adjustment subcircuit 104 includes six adjustment processing subcircuits, U11 and U12 are respectively the first integrated subcircuit and the second integrated subcircuit, R4, R10, R14, R15, R16, and R19 respectively represent adjustment resistors of different adjustment processing subcircuits, V4, V5, V6, V7, V8, and V9 respectively represent adjustment diodes of different adjustment processing subcircuits, C6, C25, C26, C27, C28, and C29 respectively represent adjustment capacitors of different adjustment processing subcircuits, and the terminal labels WH, VH, UH, WL, VL, WL, WH_D, VH_D, UH_D, WL_D, VL_D, and WL_D correspond to the first WH signal, the first VH signal, the first UH signal, the first WL signal, the first VL signal, the first UL signal, the second WH signal, the second VH signal, the second UH signal, the second WL signal, the second VL signal, and the second UL signal respectively.
[0112] In an optional scheme of an embodiment of the utility model, the gate driving sub-circuit 105 includes three driving sub-circuits, the input end of the driving sub-circuit receives the second UL signal and the second UH signal, or the second VL signal and the second VH signal, or the second WL signal and the second WH signal output by the dead zone adjustment sub-circuit 104, and the output end of the driving sub-circuit outputs the corresponding LU signal and the HU signal, or the LV signal and the HV signal, or the LW signal and the HW signal to the three-phase bridge power amplifier sub-circuit 106.
[0113] Figure 7 Schematic diagram of the structure of the gate driving sub-circuit 105 provided in the embodiment of the present application, as shown in Figure 7 As shown, the gate driving sub-circuit 105 includes three driving sub-circuits, each driving sub-circuit respectively inputs the second UL signal and the second UH signal, or the second VL signal and the second VH signal, or the second WL signal and the second WH signal output by the dead zone adjustment sub-circuit 104, and correspondingly outputs the LU signal and the HU signal, or the LV signal and the HV signal, or the LW signal and the HW signal to the three-phase bridge power amplifier sub-circuit 106.
[0114] Specifically, the gate drive sub-circuit 105 is Figure 7 The components and connection methods in the embodiment realize related functions, wherein U8 represents a first gate drive processing integrated circuit, U9 represents a second gate drive processing integrated circuit, and U10 represents a third gate drive processing integrated circuit. WH_D, VH_D, UH_D, WL_D, VL_D, WL_D, HU, HV, HW, LU, LV, and LW are respectively the labels of different terminals, which input or output LU signal, HU signal, LV signal, HV signal, LW signal, HW signal, second HU signal, second HV signal, second HW signal, second LU signal, second LV signal, and second LW signal in turn. C7, C8, C9, C14, C15, and C16 respectively represent different capacitors. V1, V2, V3, D4, D5, and D6 respectively represent different diodes, which are respectively connected to the HU, HV, HW, LU, LV, and LW terminals with the same labels inside the three-phase bridge power amplifier sub-circuit 106.
[0115] In an optional solution of the embodiment of the utility model, the input end of the three-phase bridge power amplifier subcircuit 106 receives the LU signal and the HU signal, or the LV signal and the HV signal, or the LW signal and the HW signal output by the driving subcircuit, and the output end of the three-phase bridge power amplifier subcircuit 106 outputs the UVW control signal to the motor;
[0116] The three-phase bridge power amplifier sub-circuit 106 includes a first MOS transistor, a second MOS transistor, a third MOS transistor, a fourth MOS transistor, a fifth MOS transistor, a sixth MOS transistor and a power amplifier resistor;
[0117] The gates of the first MOS tube, the second MOS tube, the third MOS tube, the fourth MOS tube, the fifth MOS tube and the sixth MOS tube respectively receive the HU signal, the HV signal, the HW signal, the LU signal, the LV signal and the LW signal output by the gate driving sub-circuit;
[0118] The drains of the first MOS tube, the second MOS tube, and the third MOS tube are connected and then connected to a 48V power supply;
[0119] The sources of the first MOS tube, the second MOS tube and the third MOS tube are connected to the drains of the fourth MOS tube, the fifth MOS tube and the sixth MOS tube in sequence;
[0120] The sources of the fourth MOS tube, the fifth MOS tube, and the sixth MOS tube are connected to one end of the power amplifier resistor;
[0121] The other end of the power amplifier resistor is grounded.
[0122] Figure 8 Schematic diagram of the structure of the three-phase bridge power amplifier sub-circuit 106 provided in the embodiment of the present application, as shown in Figure 8 As shown, the three-phase bridge power amplifier sub-circuit 106 is Figure 8 The components and connection forms in the figure realize related functions, wherein Q1, Q2, Q3, Q4, Q5, and Q6 represent different MOS tubes respectively, U, V, and W represent three-phase terminals, which are respectively connected to the three-phase terminals of the motor 101, and H1, H2, H3, L1, L2, L3, and OCP1 are labels of different terminals respectively, wherein H1, H2, H3, L1, L2, and L3 receive HU signals, HV signals, HW signals, LU signals, LV signals, and LW signals output from the gate drive subcircuit, and the OCP1 port outputs the OCP1 signal to the overcurrent protection subcircuit, R36 represents a power amplifier resistor, H1, H2, H3, L1, L2, and L3 are respectively connected to the terminals with the same labels inside the gate drive subcircuit 105, and OCP1 is connected to the terminals with the same labels inside the overcurrent protection subcircuit 106.
[0123] In an optional solution of the embodiment of the utility model, the output end of the three-phase bridge power amplifier subcircuit 106 also outputs an OCP signal to the overcurrent protection subcircuit 107 , and the overcurrent protection subcircuit 107 outputs a PTC signal to the forward and reverse conversion phase logic subcircuit 103 .
[0124] In this embodiment, the terminals of the three-phase bridge power amplifier sub-circuit 106 also output an OCP signal to the overcurrent protection sub-circuit 107 , and the overcurrent protection sub-circuit 107 correspondingly outputs a PTC signal to the forward and reverse conversion phase logic sub-circuit 103 .
[0125] Fig. 9 Schematic diagram of the structure of the overcurrent protection sub-circuit 107 provided in the embodiment of the present application, as shown in Fig. 9 As shown, the overcurrent protection subcircuit 107 is Fig. 9 The components and connection forms in the circuit realize related functions. Among them, U3 represents an overcurrent protection processing integrated circuit, R12, R13, R17, and R18 represent different resistors, C11, C12, and C13 represent different capacitors, and OCP1 and PTC are terminal numbers. The OCP1 terminal is connected to the terminal with the same number inside the three-phase bridge power amplifier subcircuit 106, and the PTC terminal is connected to the terminal with the same number inside the positive and negative conversion phase logic subcircuit 103.
[0126] Fig.10 Schematic diagram of the structure of the power sub-circuit 107 provided in the embodiment of the present application, as shown in FIG. Fig.10 As shown, the power subcircuit 108 is Fig.10 The components and connection forms in it realize related functions. Among them, RR1, R25, R27, and R29 represent different resistors, C15 and C17 represent different capacitors, GND represents grounding, and U4 represents a power processing integrated circuit. The positive pole of C17 is connected to an external power supply, that is, the terminal marked with "+48V" takes positive 48V, that is, a +48V external power supply as an example, and connects the external power supply. The positive pole of C15 serves as the first output terminal to output the required voltage, that is, the terminal marked with "+15V" takes a +15V output power supply as an example, and outputs a +15V internal power supply to power other components. The power sub-circuit 108 can be used to step down the external power supply. For example, the +48V external power supply is input to the Fig.10 The power subcircuit 108 in the circuit can obtain a processed +15V voltage.
[0127] In the motor control circuit provided in the embodiment of the present application, after the input end of the power supply subcircuit 108 is connected to the external power supply, the voltage of the external power supply is reduced to the voltage required by the motor control circuit itself, and the Hall acquisition subcircuit 1021, the positive and negative conversion phase logic subcircuit 103, the dead zone adjustment subcircuit 104 and the gate drive subcircuit 105 inside the motor control circuit are provided with the power required for normal operation. The power supply subcircuit 108 realizes the function of voltage reduction and voltage stabilization isolation, isolates the external power supply from the power supply terminals of other components inside the motor control circuit, and improves the stability of the entire motor control circuit. For example, the voltage outputted by the output end of the power supply subcircuit 108 is positive 15V, i.e. +15V. It should be noted that the specific voltage level of the voltage outputted by the output end of the power supply subcircuit 108 is predetermined according to actual conditions and needs, and is realized through circuit results. The protection scope of the present application is not limited to the specific value of the voltage level.
[0128] In this embodiment Figures 1 to 10 In FIG. 1 , all terminals marked with “+15V” are connected to the first output terminal of the power sub-circuit 108. The numbers marked next to the pins of the integrated circuits U1, U2, U3, U4, U5, U6, U7, U8, U9, U10, etc. are the pin numbers of the integrated circuits. For example, the number “1” in the upper left corner of U1 represents pin 1 of U1, and so on.
[0129] like Figures 11 to 13 As shown, compared to Fig.10 The traditional brushless motor drive circuit and Fig.11 Brushed motor drive circuit. Compared with the motor drive circuit in the prior art, the motor drive circuit of the present application proposes a circuit that controls the speed and direction of a brushless motor by a single PWM, which can realize the direct replacement of the brushless motor for the brushed motor, greatly reducing the replacement cost and system compatibility.
[0130] Through the description of the above implementation methods, those skilled in the art can clearly understand that each implementation method can be implemented by means of software plus a general hardware platform, and of course, by hardware. Based on this understanding, the above technical solution is essentially or the part that contributes to the relevant technology can be embodied in the form of a software product, and the computer software product can be stored in a computer-readable storage medium, such as ROM / RAM, a disk, an optical disk, etc., including a number of instructions for a computer device (which can be a personal computer, a server, or a network device, etc.) to execute the methods described in each embodiment or some parts of the embodiments.
[0131] It should be understood that the terms used herein are only for the purpose of describing specific example embodiments and are not intended to be limiting. Unless the context clearly indicates otherwise, the singular forms "one", "an" and "said" as used herein may also be meant to include plural forms. The terms "include", "comprise", "contain", and "have" are inclusive, and therefore specify the existence of stated features, steps, operations, elements and / or parts, but do not exclude the existence or addition of one or more other features, steps, operations, elements, parts, and / or combinations thereof. The method steps, processes, and operations described herein are not interpreted as necessarily requiring them to be performed in the specific order described or illustrated, unless the execution order is clearly indicated. It should also be understood that additional or alternative steps may be used.
[0132] The above description is only a specific embodiment of the present invention, so that those skilled in the art can understand or implement the present invention. Various modifications to these embodiments will be obvious to those skilled in the art, and the general principles defined herein can be implemented in other embodiments without departing from the spirit or scope of the present invention. Therefore, the present invention will not be limited to the embodiments shown herein, but should conform to the widest scope consistent with the principles and novel features applied herein.
Claims
1. A motor control circuit, characterized in that: It includes a signal input subcircuit, a forward and reverse conversion phase logic subcircuit, a dead zone adjustment subcircuit, a gate drive subcircuit, a three-phase bridge amplifier subcircuit, an overcurrent protection subcircuit and a power supply subcircuit; The output end of the power supply subcircuit is connected to the signal input subcircuit, the forward and reverse conversion phase logic subcircuit, the dead zone adjustment subcircuit, and the gate drive subcircuit; The output end of the signal input subcircuit is connected to the forward and reverse conversion phase logic subcircuit; The output end of the forward and reverse conversion phase logic subcircuit is connected to the dead zone adjustment subcircuit; The output end of the dead zone adjustment sub-circuit is connected to the gate driving sub-circuit; The output end of the gate driving subcircuit is connected to the three-phase bridge power amplifier subcircuit; The output end of the three-phase bridge power amplifier subcircuit is connected to the overcurrent protection subcircuit and the brushless motor; The output end of the overcurrent protection subcircuit is connected to the forward and reverse conversion phase logic subcircuit.
2. The motor control circuit according to claim 1, characterized in that: The signal input subcircuit includes a Hall acquisition subcircuit and a single PWM speed regulation subcircuit; The input end of the Hall acquisition subcircuit receives the Hall position electrical signal of the motor, and the output end of the Hall acquisition subcircuit is connected to the forward and reverse conversion phase logic subcircuit; The output end of the Hall acquisition sub-circuit outputs HA1, HB1, HC1, HA2, HB2 and HC2 signals to the forward and reverse conversion phase logic sub-circuit.
3. The motor control circuit according to claim 2, characterized in that: The Hall acquisition subcircuit includes three Hall simulation subcircuits and three Hall processing subcircuits, which respectively output HA1, HB1, HC1 and HA2, HB2, HC2 signals; The input end of any of the Hall processing sub-circuits receives the first output Hall signal output by the Hall simulation sub-circuit, and the output end outputs the corresponding second output Hall signal.
4. The motor control circuit according to claim 2, characterized in that: The single PWM speed regulation subcircuit includes a single PWM simulation subcircuit and a single PWM processing subcircuit, which output PWMX signal, PWM2 signal and PWM3 signal respectively; The input end of the single PWM analog sub-circuit receives the motor speed control signal PWM1, and the output end of the single PWM analog sub-circuit outputs the PWMX signal to the single PWM processing sub-circuit to the forward and reverse conversion phase logic sub-circuit; The input end of the single PWM processing sub-circuit receives a PWMX signal, and the output end of the single PWM processing sub-circuit outputs a PWM2 signal and a PWM3 signal.
5. The motor control circuit according to claim 4, characterized in that: The single PWM analog subcircuit includes a first analog resistor, an analog integrated subcircuit, a first analog capacitor, a second analog capacitor, and a second analog resistor; One end of the first analog resistor receives the speed control signal PWM1 of the motor, and the other end of the first analog resistor is connected to the inverting signal input pin of the analog integrated sub-circuit; One end of the first analog capacitor is connected to the VCC power input pin of the analog integrated sub-circuit and a 15V power supply, and the other end of the first analog capacitor is grounded; One end of the second analog capacitor is connected to the GND ground pin of the analog integrated sub-circuit; The other end of the second analog capacitor is connected to one end of the second analog resistor and then connected to the OUT signal output pin of the analog integrated sub-circuit; The other end of the second analog resistor is connected to the VCC power input pin of the analog integrated sub-circuit; The OUT signal output pin of the analog integrated sub-circuit is also connected to the single PWM processing sub-circuit.
6. The motor control circuit according to claim 5, characterized in that: The input end of the forward and reverse conversion phase logic sub-circuit receives the HA1, HB1, HC1, HA2, HB2 and HC2 signals output by the Hall acquisition sub-circuit, and the PWM2 signal and PWM3 signal output by the single PWM speed regulation sub-circuit, and the output end of the forward and reverse conversion phase logic sub-circuit outputs a first WH signal, a first VH signal, a first UH signal, a first WL signal, a first VL signal and a first UL signal to the dead zone adjustment sub-circuit.
7. The motor control circuit according to claim 6, characterized in that: The dead zone adjustment subcircuit comprises six adjustment processing subcircuits, wherein the input end of the adjustment processing subcircuit receives the first WH signal, the first VH signal, the first UH signal, the first WL signal, the first VL signal and the first UL signal output by the positive and negative conversion phase logic subcircuit respectively; the output end of the adjustment processing subcircuit outputs the corresponding second WH signal, the second VH signal, the second UH signal, the second WL signal, the second VL signal and the second UL signal to the gate driving subcircuit respectively; Any of the adjustment processing sub-circuits comprises a first integrated sub-circuit, an adjustment resistor, an adjustment diode, an adjustment capacitor and a second integrated sub-circuit; The input end of the first integrated sub-circuit receives the first WH signal, or the first VH signal, or the first UH signal, or the first WL signal, or the first VL signal, or the first UL signal output by the forward and reverse conversion phase logic sub-circuit; The output end of the first integrated sub-circuit is connected to one end of the regulating resistor and the anode of the regulating diode; The other end of the regulating resistor is connected to the cathode of the regulating diode; The cathode of the regulating diode is also connected to one end of the regulating capacitor, and the other end of the regulating capacitor is connected to a 15V power supply; The other end of the regulating resistor is also connected to the input end of the second integrated sub-circuit; The output end of the second integrated sub-circuit outputs a corresponding second WH signal, or a second VH signal, or a second UH signal, or a second WL signal, or a second VL signal, or a second UL signal.
8. The motor control circuit according to claim 7, characterized in that: The gate driving subcircuit includes three driving subcircuits, the input end of the driving subcircuit receives the second UL signal and the second UH signal, or the second VL signal and the second VH signal, or the second WL signal and the second WH signal output by the dead zone adjustment subcircuit, and the output end of the driving subcircuit outputs the corresponding LU signal and the HU signal, or the LV signal and the HV signal, or the LW signal and the HW signal to the three-phase bridge power amplifier subcircuit.
9. The motor control circuit according to claim 8, characterized in that: The input end of the three-phase bridge power amplifier subcircuit receives the LU signal and the HU signal, or the LV signal and the HV signal, or the LW signal and the HW signal output by the driving subcircuit, and the output end of the three-phase bridge power amplifier subcircuit outputs the UVW control signal to the motor; Wherein, the three-phase bridge power amplifier sub-circuit includes a first MOS tube, a second MOS tube, a third MOS tube, a fourth MOS tube, a fifth MOS tube, a sixth MOS tube and a power amplifier resistor; The gates of the first MOS tube, the second MOS tube, the third MOS tube, the fourth MOS tube, the fifth MOS tube and the sixth MOS tube respectively receive the HU signal, the HV signal, the HW signal, the LU signal, the LV signal and the LW signal output by the gate driving sub-circuit; The drains of the first MOS tube, the second MOS tube, and the third MOS tube are connected and then connected to a 48V power supply; The sources of the first MOS tube, the second MOS tube and the third MOS tube are connected to the drains of the fourth MOS tube, the fifth MOS tube and the sixth MOS tube in sequence; The sources of the fourth MOS tube, the fifth MOS tube, and the sixth MOS tube are connected to one end of the power amplifier resistor; The other end of the power amplifier resistor is grounded.
10. The motor control circuit according to claim 1, characterized in that: The output end of the three-phase bridge power amplifier subcircuit also outputs an OCP signal to the overcurrent protection subcircuit, and the overcurrent protection subcircuit outputs a PTC signal to the forward and reverse conversion phase logic subcircuit.