On-off circuit and medical equipment

Abstract

The utility model discloses a switch-on and switch-off circuit and medical equipment, on the basis of a common switch-on and switch-off circuit, an incoming call switch-on circuit module, a farad capacitor circuit module, a multivibrator circuit module, a buzzer control circuit module, an alarm circuit module, a self-locking silencing circuit module and a mute key circuit module are added. According to the power-on and power-off circuit, the functions of power-off alarm, key mute and power-on automatic power-on are achieved, a low-power-consumption LDO and a low-power-consumption CPU are not needed, and the technical problems that an existing common power-on and power-off circuit cannot meet the requirements of low cost, low power consumption, key power-on, software power-off, power-off alarm, key mute, power-on automatic power-on and other functions needed by medical instruments are solved.

Description

Technical Field

[0001] The present application relates to the technical field of medical devices, and particularly to a power-on / off circuit and a medical device. Background Art

[0002] Common power-on / off circuits include MOS and diode discrete device type circuits, D flip-flop type circuits, and low-power CPU type circuits. However, they cannot meet the functions required by medical devices, such as low cost, low power consumption, button power-on, software power-off, power-down alarm and button muting, and automatic power-on when powered on, to ensure that after the machine is completely out of power, the mute button can still be operated to mute the buzzer. Even after all power is removed, in any situation, such as quickly or slowly unplugging and plugging the battery, automatic power-on can be achieved. Summary of the Invention

[0003] The present application provides a power-on / off circuit and a medical device, which solve the technical problem that the existing common power-on / off circuits cannot meet the functions required by medical devices, such as low cost, low power consumption, button power-on, software power-off, power-down alarm and button muting, and automatic power-on when powered on.

[0004] In view of this, in the first aspect of the present application, a power-on / off circuit is provided, and the circuit includes:

[0005] A power-on / off button circuit module, a call power-on circuit module, a farad capacitor circuit module, a multivibrator circuit module, a buzzer control circuit module, an alarm circuit module, a self-locking silencing circuit module, and a mute button circuit module;

[0006] The power-on / off button circuit module is electrically connected to the call power-on circuit module;

[0007] The call power-on circuit module is electrically connected to the farad capacitor circuit module;

[0008] The farad capacitor circuit module is respectively electrically connected to the mute button circuit module and the multivibrator circuit module;

[0009] The multivibrator circuit module is sequentially connected to the buzzer control circuit module, the alarm circuit module, and the self-locking silencing circuit module.

[0010] Optionally, the power-on / off button circuit module specifically includes:

[0011] A power supply VDC_VBAT, and the power supply VDC_VBAT is respectively connected to the cathode of the first diode D1, one end of the first resistor R1, one end of the first capacitor C1, and the S pole of the first PMOS transistor Q1;

[0012] The D pole of the first PMOS transistor Q1 is connected to the first power supply VPWR, and the G pole of the first PMOS transistor Q1 is connected to the anode of the first diode D1, the first resistor R1, and the other end of the first capacitor C1 respectively;

[0013] The G pole of the first PMOS transistor Q1 is connected to the first key K1 through the second resistor R3, and the G pole of the first PMOS transistor Q1 is connected to the single-chip microcomputer;

[0014] The first key K1 is connected to the G pole of the first NMOS transistor Q2, the third resistor R4, and one end of the second capacitor C2 respectively;

[0015] The S pole of the first NMOS transistor Q2 is connected to the third resistor R4 and the other end of the second capacitor C2 respectively;

[0016] The D pole of the first NMOS transistor Q2 is connected to the single-chip microcomputer and connected to the power supply through the fourth resistor R2;

[0017] The G pole of the first PMOS transistor Q1 is connected to the D pole of the second NMOS transistor Q3 through the second resistor R3 and the fifth resistor R5;

[0018] The S pole of the second NMOS transistor Q3 is grounded, the G pole of the second NMOS transistor Q3 is grounded through the third capacitor C3 and the sixth resistor R9 respectively, and the G pole of the second NMOS transistor Q3 is connected to the single-chip microcomputer through the third NMOS transistor Q5 and the seventh resistor R10.

[0019] Optionally, the incoming call power-on circuit module specifically includes:

[0020] The eighth resistor R12 connected to the seventh resistor R10;

[0021] The eighth resistor R12 is connected to the D pole of the fourth NMOS transistor Q7 and the ninth resistor R15 respectively;

[0022] The G pole of the fourth NMOS transistor Q7 is grounded through the fourth capacitor C5 and the tenth resistor R19 respectively;

[0023] The ninth resistor R15 is connected to the cathode of the second diode D9.

[0024] Optionally, the supercapacitor circuit module specifically includes:

[0025] The G pole of the second PMOS transistor Q8 is connected to the eleventh resistor R18 and the anode of the second diode D9 respectively, and the G pole of the second PMOS transistor Q8 is grounded through the twelfth resistor R21, and the eleventh resistor R18 is connected to the power supply VDC_VBAT;

[0026] The S pole of the second PMOS transistor Q8 is grounded through a Faraday capacitor C4, and the S pole of the second PMOS transistor Q8 is connected to a DC power supply through a thirteenth resistor R14 and a third diode D7, connected to a VCC power supply through a fourth diode D8, and connected to a DC power supply through a fourth diode D8 and a fifth diode D6.

[0027] Optionally, the multivibrator circuit module specifically includes:

[0028] One ends of a fourteenth resistor R23, a fifteenth resistor R24, a sixteenth resistor R25, and a seventeenth resistor R27 connected to the D pole of the second PMOS transistor Q8;

[0029] The other ends of the fourteenth resistor R23 and the fifteenth resistor R24 are connected through a fifth capacitor C6;

[0030] The other ends of the sixteenth resistor R25 and the seventeenth resistor R27 are connected through a sixth capacitor C7;

[0031] The other end of the sixteenth resistor R25 is connected to the B pole of the first NPN transistor Q10, and the other end of the fourteenth resistor R23 is connected to the C pole of the first NPN transistor Q10;

[0032] The other end of the fifteenth resistor R24 is connected to the B pole of the second NPN transistor Q11, and the other end of the seventeenth resistor R27 is connected to the C pole of the second NPN transistor Q11;

[0033] The E pole of the second NPN transistor Q11 is connected to the E pole of the first NPN transistor Q10. Optionally, the buzzer control circuit module specifically includes:

[0034] Both ends of an eighteenth resistor R26 are respectively connected to the C pole of the second NPN transistor Q11 and the cathode of a diode D10;

[0035] The anode of the seventh diode D10 is connected to a microcontroller;

[0036] The cathode of the seventh diode D10 and the eighteenth resistor R26 are grounded and connected to the G pole of the sixth NMOS transistor Q9;

[0037] The S pole of the sixth NMOS transistor Q9 is grounded, and the D pole of the sixth NMOS transistor Q9 is connected to one end of a buzzer LS1;

[0038] The other end of the buzzer LS1 is connected to a second power supply VCC.

[0039] Optionally, the alarm circuit module and the self-locking silencing circuit module specifically include:

[0040] The anode of the eighth diode D3 is connected to the single-chip microcomputer, and the cathode of the eighth diode D3 is connected to the S pole of the third PMOS transistor Q4 through the twentieth resistor R6;

[0041] The G pole of the third PMOS transistor Q4 is connected to the cathode of the eighth diode D3, and the D pole of the third PMOS transistor Q4 is connected to the G pole of the seventh NMOS transistor Q6 and the cathode of the twelfth diode D4 through the anode of the ninth diode D5;

[0042] The S pole of the seventh NMOS transistor Q6 is grounded, and the D pole of the seventh NMOS transistor Q6 is connected to the G pole of the third PMOS transistor Q4;

[0043] The anode of the twelfth diode D4 is connected to the single-chip microcomputer.

[0044] Optionally, the mute button circuit module specifically includes:

[0045] One end of the twenty-first resistor R13 is respectively connected to the cathodes of the fifth diode D6 and the fourth diode D8, and the other end is respectively connected to the single-chip microcomputer and the second button K2;

[0046] The second button K2 is respectively connected to the single-chip microcomputer and the twenty-second resistor R20;

[0047] The twenty-second resistor R20 is grounded through the twenty-third resistor R22, and the twenty-second resistor R20 is connected to the single-chip microcomputer through the twenty-fourth resistor R17.

[0048] The second aspect of the present application provides a medical device, and the device includes the power-on and power-off circuit according to any one of the first aspects of the present application.

[0049] It can be seen from the above technical solutions that the embodiments of the present application have the following advantages:

[0050] In the present application, a power-on and power-off circuit and a medical device are provided. On the basis of the common power-on and power-off circuit, by adding a call power-on circuit module, a farad capacitor circuit module, a multivibrator circuit module, a buzzer control circuit module, an alarm circuit module, a self-locking mute circuit module, and a mute button circuit module, the functions of power-off alarm and button mute, and automatic power-on when powered on are realized. There is no need for a low-power LDO and a low-power CPU, which solves the technical problems that the existing common power-on and power-off circuits cannot meet the functions required by medical devices, such as low cost, low power consumption, button power-on, software power-off, power-off alarm and button mute, and automatic power-on when powered on. Description of the Drawings

[0051] Figure 1 It is a circuit framework diagram of a power-on and power-off circuit in an embodiment of the present application;

[0052] Figure 2This is the circuit structure diagram of the power-on / off button circuit module in the embodiment of the present application;

[0053] Figure 3 This is the circuit structure diagram of the incoming call power-on circuit module in the embodiment of the present application;

[0054] Figure 4 This is the circuit structure diagram of the supercapacitor circuit module in the embodiment of the present application;

[0055] Figure 5 This is the circuit structure diagram of the multivibrator circuit module in the embodiment of the present application;

[0056] Figure 6 This is the circuit structure diagram of the buzzer control circuit module in the embodiment of the present application;

[0057] Figure 7 This is the circuit structure diagram of the alarm circuit module and the self-locking silencing circuit module in the embodiment of the present application;

[0058] Figure 8 This is the circuit structure diagram of the mute button circuit module in the embodiment of the present application;

[0059] Among them, the reference numerals are:

[0060] 101. Power-on / off button circuit module; 102. Incoming call power-on circuit module; 103. Supercapacitor circuit module; 104. Multivibrator circuit module; 105. Buzzer control circuit module; 106. Alarm circuit module; 107. Self-locking silencing circuit module; 108. Mute button circuit module;

[0061] VDC_VBAT, Power supply; VPWR, First power supply; VCC, Second power supply;

[0062] D1, First diode; D9, Second diode; D7, Third diode; D8, Fourth diode; D6, Fifth diode; D10, Seventh diode; D3, Eighth diode; D5, Ninth diode; D4, Twelfth diode;

[0063] Q1, First PMOS transistor; Q8, Second PMOS transistor; Q4, Third PMOS transistor;

[0064] Q2, First NMOS transistor; Q3, Second NMOS transistor; Q5, Third NMOS transistor; Q7, Fourth NMOS transistor; Q9, Sixth NMOS transistor; Q6, Seventh NMOS transistor;

[0065] Q10, First NPN transistor; Q11, Second NPN transistor;

[0066] K1, First button; K2, Second button; LS1, Buzzer;

[0067] R1, the first resistor; R3, the second resistor; R4, the third resistor; R2, the fourth resistor; R5, the fifth resistor; R9, the sixth resistor; R10, the seventh resistor; R12, the eighth resistor; R15, the ninth resistor; R19, the tenth resistor; R18, the eleventh resistor; R21, the twelfth resistor; R14, the thirteenth resistor; R23, the fourteenth resistor; R24, the fifteenth resistor; R25, the sixteenth resistor; R27, the seventeenth resistor; R26, the eighteenth resistor; R28, the nineteenth resistor; R6, the twentieth resistor; R13, the twenty - first resistor; R20, the twenty - second resistor; R22, the twenty - third resistor; R17, the twenty - fourth resistor;

[0068] C1, the first capacitor; C2, the second capacitor; C3, the third capacitor; C5, the fourth capacitor; C4, the supercapacitor. Detailed implementation manners

[0069] In order to enable those skilled in the art to better understand the solution of this application, the technical solutions in the embodiments of this application will be clearly and completely described below in conjunction with the accompanying drawings in the embodiments of this application. Obviously, the described embodiments are only a part of the embodiments of this application, rather than all the embodiments. Based on the embodiments in this application, all other embodiments obtained by those of ordinary skill in the art without creative efforts shall fall within the protection scope of this application.

[0070] This application designs a power - on / off circuit and a medical device, which solves the technical problem that the existing common power - on / off circuits cannot meet the functions required for medical devices, such as low cost, low power consumption, button - powered on, software - powered off, power - off alarm and button - muted, power - on automatically when powered on, etc.

[0071] For ease of understanding, please refer to Figure 1 , Figure 1 which is the circuit framework diagram of a power - on / off circuit in an embodiment of this application. As shown in Figure 1 , specifically:

[0072] The power - on / off button circuit module 101, the incoming - call power - on circuit module 102, the supercapacitor circuit module 103, the multivibrator circuit module 104, the buzzer control circuit module 105, the alarm circuit module 106, the self - locking mute circuit module 107, and the mute button circuit module 108;

[0073] The power - on / off button circuit module 101 is electrically connected to the incoming - call power - on circuit module 102;

[0074] The incoming - call power - on circuit module 102 is electrically connected to the supercapacitor circuit module 103;

[0075] The farad capacitor circuit module 103 is electrically connected to the mute button circuit module 108 and the multivibrator circuit module 104 respectively;

[0076] The multivibrator circuit module 104 is successively connected to the buzzer control circuit module 105, the alarm circuit module 106 and the self-locking mute circuit module 107.

[0077] Furthermore, as Figure 2 shown, the power-on / off button circuit module 101 specifically includes:

[0078] The power supply VDC_VBAT is connected to the cathode of the first diode D1, one end of the first resistor R1, one end of the first capacitor C1 and the S pole of the first PMOS transistor Q1 respectively;

[0079] The D pole of the first PMOS transistor Q1 is connected to the first power supply VPWR, and the G pole of the first PMOS transistor Q1 is connected to the anode of the first diode D1, the first resistor R1 and the other end of the first capacitor C1 respectively;

[0080] The G pole of the first PMOS transistor Q1 is connected to the first button K1 through the second resistor R3, and the G pole of the first PMOS transistor Q1 is connected to the single-chip microcomputer;

[0081] The first button K1 is connected to the G pole of the first NMOS transistor Q2, the third resistor R4 and one end of the second capacitor C2 respectively;

[0082] The S pole of the first NMOS transistor Q2 is connected to the third resistor R4 and the other end of the second capacitor C2 respectively;

[0083] The D pole of the first NMOS transistor Q2 is connected to the single-chip microcomputer and connected to the power supply through the fourth resistor R2;

[0084] The G pole of the first PMOS transistor Q1 is connected to the D pole of the second NMOS transistor Q3 through the second resistor R3 and the fifth resistor R5;

[0085] The S pole of the second NMOS transistor Q3 is grounded, the G pole of the second NMOS transistor Q3 is grounded through the third capacitor C3 and the sixth resistor R9 respectively, and the G pole of the second NMOS transistor Q3 is connected to the single-chip microcomputer through the third NMOS transistor Q5 and the seventh resistor R10.

[0086] It should be noted that VDC_VBAT is the power supply for the OR gate of the machine's switching power supply and the battery, with a voltage of 12 - 24V. Q1 is the PMOS transistor for the machine's main power switch. In the power-on state, Q1 is conducting; in the power-off state, Q1 is cutoff. VPWR is the machine's bus power supply that powers various DC-DC and LDO circuits. K1 is the self-resetting power-on / off switch button. KEY_POWER_VCC and KEY_POWER_SW are the networks on both sides of the power-on / off switch button K1. +5VK powers the MCU, which is supplied by the DC-DC power supply +5VC and the LDO power supply +4V8 from VPWR through an OR gate. MCU_FB_PWRKEY is the input I / O pin of the MCU, which detects whether the power-on / off switch button K1 is pressed. 1. When powering on by pressing the button, initially PWR_EN is at a low level, Q3 is cutoff, K1 is not pressed, the gate of Q1 is equal to VDC_VBAT, Q1 is cutoff, and the machine is in the power-off state. After pressing K1, VDC_VBAT passes through R1, R3, K1, and R4 to ground, Q1 conducts. Immediately after the machine powers on, the enable pin PWR_EN of Q3 is given a high level of +5VK at 5V, and MCU_CTRL_PWROFF is given 0V. Then Q3 forms a self-locking to maintain conduction, causing VDC_VBAT to pass through R1, R3, R5, and Q3 to ground. Even if K1 is released, Q1, the main power switch, still remains conducting.

[0087] 2. Button detection: When Q3 remains conducting after powering on, pressing the power-on / off switch button K1 has no effect. R4, Q2, and R2 form a button voltage conversion circuit. When K1 is not pressed, Q2 is cutoff and MCU_FB_PWRKEY is at a high level of 5V. When K1 is pressed, Q2 conducts and MCU_FB_PWRKEY is at a low level of 0V.

[0088] When K1 is pressed, R1, R3, and R4 divide the voltage. When Q3 conducts, R1, R3, and R5 divide the voltage. When K1 is pressed and Q3 conducts, R1, R3, then R5 and R4 divide the voltage. In all cases, it is necessary to ensure that the Vgs of Q1, Q2, and Q3 does not exceed the specified parameter requirements, with an expected absolute value of Vgs between 4.5V and 12V.

[0089] 3. Button power-off: When detecting power-off, MCU_CTRL_PWROFF is given a high level, Q5 conducts, GB becomes 0V, Q3 is cutoff, Q1 is cutoff, VPWR is powered off, and +5VK drops to a little over 2V. To ensure power-off, GBB should become smaller at the moment of power-off, less than the VGSth of Q3. One way is to add a discharge resistor to +5VK, and the other is to make the conduction time of Q5 longer than that of Q3 during power-off. Q5 is changed to use an NMOS with a lower VGSth, such as SI2302CDS, and Q3 uses an NMOS with a higher VGSth, such as 2N7002.

[0090] Pressing and holding the power button continuously cannot force a power-off. When forced power-off is required, after the timing reaches, the buzzer will sound continuously and then change to a beeping sound to indicate that it can be released to power off.

[0091] 4. It is required that the absolute value of VGS of all MOSs shall not exceed 20V. After power-on,

[0092] Q1 conducts. Whether the power button is pressed or not, GA-VDC_VBAT is required to be 4.5V - 12V, not exceeding 20V, and it is necessary to ensure that VGS can make Q1 conduct completely.

[0093] Q3 conducts. GB is required to be 2.5 - 12V, not exceeding 20V, VGS can make Q3 conduct completely, and the voltage of pin 3 of Q3 is 0V.

[0094] Q2 conducts when the power button is pressed. When the button is pressed, GC is required to be 2.5 - 12V, not exceeding 20V, VGS can make Q2 conduct completely, and the voltage of MCU_FB_PWRKEY is 0V.

[0095] Q2 turns off when the power button is released. When the power button is released, then MCU_FB_PWRKEY = +5Vk.

[0096] Q7 conducts. It is required to be 2.5V - 12V, not exceeding 20V, and it is necessary to ensure that VGS can make Q7 conduct completely, and the voltage of pin 3 of Q7 is 0V.

[0097] Q8 turns off. GEE is required to be 5 - 12V, not less than VF and not exceeding 20V.

[0098] Use appropriate voltage-dividing resistors to share and reduce the VGS voltage of the MOS transistor

[0099] The VGS of Q1 PMOS and Q2 NMOS at the moment of pressing

[0100] Input of 12V, 12V * 300K / (300K + 200K + 300K) = 4.5

[0101] Input of 24V, 24V * 300K / (300K + 200K + 300K) = 9

[0102] The VGS of PMOS and NMOS after continuously pressing and keeping open

[0103] Input of 12V, 12V * 300K / (300K + 200K + 300K / / 300K) = 5.54

[0104] Input of 24V, 24V * 300K / (300K + 200K + 300K / / 300K) = 11.07

[0105] The VGS of PMOS and NMOS after pressing and then releasing

[0106] 12V input, 12V * 300K / (300K + 200K + 300K) = 4.5

[0107] 24V input, 24V * 300K / (300K + 200K + 300K) = 9

[0108] Further, as Figure 3 shown, the incoming call power-on circuit module 102 specifically includes:

[0109] The eighth resistor R12 connected to the seventh resistor R10;

[0110] The eighth resistor R12 is respectively connected to the D pole of the fourth NMOS transistor Q7 and the ninth resistor R15;

[0111] The G pole of the fourth NMOS transistor Q7 is grounded through the fourth capacitor C5 and the tenth resistor R19 respectively;

[0112] The ninth resistor R15 is connected to the cathode of the second diode D9.

[0113] It should be noted that when the total power supply VDC_VBAT changes from no power to power, Q7 conducts with a time delay. VDC_VBAT passes through the diode D9 to GBB. Before the NMOS transistor Q7 conducts, a rising edge is generated at GBB first, enabling Q3 to conduct, so that the total power supply automatically powers on when there is an incoming call, and +5VK gives a high level to PWR_EN to form a self-lock. When Q7 is cut off, VDC_VBAT passes through R16, D9, R15, R12, R8, R9 to ground, and the voltage division at GBB is greater than the VGSth of Q3. When Q7 conducts, the D pole of Q7 is always 0V, which does not affect the PWR_EN voltage.

[0114] The RC at the gate of Q7 adjusts "the time for automatic power-on after power-off and then incoming call". The unplugging time is 100 - 300 ms. It is required that in any case of rapid unplugging, after unplugging all power supplies, GBB discharges quickly and can become small in time, less than the VGSth of Q3, in order to ensure automatic power-on for the next incoming call.

[0115] If the VDC_VBAT at one end of R16 is changed to the VCC after using a farad capacitor, it is power-on when there is an incoming call after shutdown for a period of time.

[0116] In the shutdown state, it must be ensured that MCU_CTRL_PWROFF is at a low level of 0V.

[0117] The large resistor R15 avoids affecting the gate voltage division GEE of Q8 after Q7 conducts.

[0118] If VDC_VBAT has power all the time, the NMOS transistor Q7 conducts all the time, and the D pole of Q7 is always 0V, which does not affect the PWR_EN voltage and does not affect button power-on.

[0119] The voltage division requirement of VDC_VBAT at the gate of Q8 > VF, and <VGS limit parameter, and the expected absolute value is 4.5 - 12V.

[0120] Further, as Figure 4 shown, the farad capacitor circuit module 103 specifically includes:

[0121] The G pole of the second PMOS transistor Q8 is respectively connected to the eleventh resistor R18 and the anode of the second diode D9, and the G pole of the second PMOS transistor Q8 is grounded through the twelfth resistor R21, and the eleventh resistor R18 is connected to the power supply VDC_VBAT;

[0122] The S pole of the second PMOS transistor Q8 is grounded through the farad capacitor C4, and the S pole of the second PMOS transistor Q8 is connected to the DC power supply through the thirteenth resistor R14 and the third diode D7, connected to the VCC power supply through the fourth diode D8, and connected to the DC power supply through the fourth diode D8 and the fifth diode D6.

[0123] It should be noted that +5VC is the DC-DC power supply from WPWR, VF is the farad capacitor voltage, VCC is the power supply for the OR gate of DC-DC +5VC and the farad capacitor VF, VCC powers the buzzer and the mute button. When the machine is completely powered off, VCC mainly comes from the farad capacitor VF. When starting up, VCC mainly comes from the DC-DC power supply +5VC to ensure that the voltage of the buzzer and the button is sufficient when starting up, and MCU_CTRL_BEEP can continuously give a high level to make the buzzer sound continuously when starting up.

[0124] Further, as Figure 5 shown, the multivibrator circuit module 104 specifically includes:

[0125] One ends of the fourteenth resistor R23, fifteenth resistor R24, sixteenth resistor R25, and seventeenth resistor R27 connected to the D pole of the second PMOS transistor Q8;

[0126] The other ends of the fourteenth resistor R23 and the fifteenth resistor R24 are connected through the fifth capacitor C6;

[0127] The other ends of the sixteenth resistor R25 and the seventeenth resistor R27 are connected through the sixth capacitor C7;

[0128] The other end of the sixteenth resistor R25 is connected to the B pole of the first NPN transistor Q10, and the other end of the fourteenth resistor R23 is connected to the C pole of the first NPN transistor Q10;

[0129] The other end of the fifteenth resistor R24 is connected to the B pole of the second NPN transistor Q11, and the other end of the seventeenth resistor R27 is connected to the C pole of the second NPN transistor Q11;

[0130] The E - pole of the second NPN transistor Q11 is connected to the E - pole of the first NPN transistor Q10. Further, as Figure 6 shown, the buzzer control circuit module 105 specifically includes:

[0131] Both ends of the eighteenth resistor R26 are respectively connected to the C - pole of the second NPN transistor Q11 and the cathode of the seventh diode D10;

[0132] The anode of the seventh diode D10 is connected to the single - chip microcomputer;

[0133] The cathode of the seventh diode D10 and the eighteenth resistor R26 are grounded through the nineteenth resistor R28 and are connected to the G - pole of the sixth NMOS transistor Q9;

[0134] The S - pole of the sixth NMOS transistor Q9 is grounded, and the D - pole of the sixth NMOS transistor Q9 is connected to one end of the buzzer LS1;

[0135] The other end of the buzzer LS1 is connected to the second power supply VCC.

[0136] It should be noted that after the VDC_VBAT voltage drops, the gate voltage of the PMOS transistor Q8 is less than VF, and Q8 starts to conduct. VF supplies power to VB, and the multivibrator circuit composed of Q10, Q11, resistors, capacitors, etc. starts to work. PWM_BEEP generates PWM to control the switch of Q9 and the buzzer beeps. The multivibrator built with transistors has a lower working voltage, and the buzzer rings for a longer time than using the NE555 circuit.

[0137] Further, as Figure 7 shown, the alarm circuit module 106 and the self - locking silencing circuit module 107 specifically include:

[0138] The anode of the eighth diode D3 is connected to the single - chip microcomputer, and the cathode of the eighth diode D3 is connected to the S - pole of the third PMOS transistor Q4 through the twentieth resistor R6;

[0139] The G - pole of the third PMOS transistor Q4 is connected to the cathode of the eighth diode D3, and the D - pole of the third PMOS transistor Q4 is connected to the G - pole of the seventh NMOS transistor Q6 and the cathode of the twelfth diode D4 through the anode of the ninth diode D5;

[0140] The S - pole of the seventh NMOS transistor Q6 is grounded, and the D - pole of the seventh NMOS transistor Q6 is connected to the G - pole of the third PMOS transistor Q4;

[0141] The anode of the twelfth diode D4 is connected to the single - chip microcomputer.

[0142] It should be noted that when the VDC_VBAT voltage drops, VF supplies power to VCC and then to the mute button circuit, and VF supplies power to VB and then to the self-locking silencing circuit. When the mute button K2 is pressed, KEY_MUTE_SW becomes high level, then Q6 conducts, MUTE_BEEP becomes 0V, and the diode D3 pulls down PWM_BEEP to 0.7V, so the buzzer does not sound. At the same time, MUTE_BEEP becoming 0V causes Q4 to conduct, and the VB voltage passes through Q4, D5 to the gate of Q6, forming a feedback and self-locking, so that Q6 remains conducting even if K2 is released again, and the buzzer does not sound. When the VDC_VBAT voltage is normal, the PMOS transistor Q8 is cut off, the VB voltage is 0V, when the mute button K2 is pressed, KEY_MUTE_SW becomes high level, and the self-locking silencing circuit has no VB voltage and will not form self-locking, having no impact.

[0143] Furthermore, as Figure 8 shown, the mute button circuit module 108 specifically includes:

[0144] One end of the twenty-first resistor R13 is respectively connected to the cathodes of the fifth diode D6 and the fourth diode D8, and the other end is respectively connected to the single-chip microcomputer and the second button K2;

[0145] The second button K2 is respectively connected to the single-chip microcomputer and the twenty-second resistor R20;

[0146] The twenty-second resistor R20 is grounded through the twenty-third resistor R22, and the twenty-second resistor R20 is connected to the single-chip microcomputer through the twenty-fourth resistor R17.

[0147] It should be noted that KEY_MUTE_VCC and KEY_MUTE_SW are the networks at both ends of the mute button K2, and MCU_FB_MUTEKEY is connected to the input I / O pin of the MCU to detect whether the mute button K2 is pressed. When K2 is not pressed, MCU_FB_MUTEKEY is at a low level of 0V, and when K2 is pressed, MCU_FB_MUTEKEY is at a high level of 5V.

[0148] The embodiment of the present application also provides a medical device, including the power-on and power-off circuit described in any one of the embodiments of the present application.

[0149] In the embodiments of the present application, a power-on / off circuit and a medical device are provided. On the basis of the common power-on / off circuit, by adding a call power-on circuit module, a supercapacitor circuit module, a multivibrator circuit module, a buzzer control circuit module, an alarm circuit module, a self-locking mute circuit module, and a mute button circuit module, the functions of power-off alarm, mute by button, and automatic power-on when powered on are realized. There is no need for a low-power LDO and a low-power CPU, which solves the technical problems that the existing common power-on / off circuits cannot meet the functions required for medical devices, such as low cost, low power consumption, power-on by button, software power-off, power-off alarm, mute by button, and automatic power-on when powered on.

[0150] As described above, the above embodiments are only used to illustrate the technical solutions of the present application, rather than to limit them; although the present application has been described in detail with reference to the foregoing embodiments, those of ordinary skill in the art should understand that they can still modify the technical solutions described in the foregoing embodiments, or perform equivalent replacements for some of the technical features; and these modifications or replacements do not make the essence of the corresponding technical solutions deviate from the spirit and scope of the technical solutions of the embodiments of the present application.

Claims

1. A power on / off circuit, characterized in that: include: Power on / off button circuit module, incoming call power on circuit module, Farad capacitor circuit module, multivibrator circuit module, buzzer control circuit module, alarm circuit module, self-locking mute circuit module and mute button circuit module; The power on / off button circuit module is electrically connected to the incoming call power on circuit module; The incoming call power-on circuit module is electrically connected to the farad capacitor circuit module; The farad capacitor circuit module is electrically connected to the mute button circuit module and the multivibrator circuit module respectively; The multivibrator circuit module is sequentially connected to the buzzer control circuit module, the alarm circuit module and the self-locking mute circuit module.

2. The switch circuit according to claim 1, characterized in that: The power on / off key circuit module specifically includes: A power supply (VDC_VBAT), the power supply (VDC_VBAT) is respectively connected to the cathode of the first diode (D1), one end of the first resistor (R1), one end of the first capacitor (C1) and the S pole of the first PMOS tube (Q1); The D pole of the first PMOS tube (Q1) is connected to the first power supply (VPWR), and the G pole of the first PMOS tube (Q1) is respectively connected to the anode of the first diode (D1), the first resistor (R1) and the other end of the first capacitor (C1); The G pole of the first PMOS tube (Q1) is connected to the first button (K1) via the second resistor (R3), and the G pole of the first PMOS tube (Q1) is connected to the single chip computer; The first button (K1) is respectively connected to the G pole of the first NMOS tube (Q2), the third resistor (R4) and one end of the second capacitor (C2); The S pole of the first NMOS tube (Q2) is respectively connected to the third resistor (R4) and the other end of the second capacitor (C2); The D pole of the first NMOS tube (Q2) is connected to the single chip computer and connected to the power supply through the fourth resistor (R2); The G pole of the first PMOS tube (Q1) is connected to the D pole of the second NMOS tube (Q3) through the second resistor (R3) and the fifth resistor (R5); The S pole of the second NMOS tube (Q3) is grounded, the G pole of the second NMOS tube (Q3) is grounded via a third capacitor (C3) and a sixth resistor (R9), and the G pole of the second NMOS tube (Q3) is connected to a single chip computer via a third NMOS tube (Q5) and a seventh resistor (R10).

3. The switch circuit according to claim 2, characterized in that: The incoming call power-on circuit module specifically includes: an eighth resistor (R12) connected to the seventh resistor (R10); The eighth resistor (R12) is connected to the D pole of the fourth NMOS tube (Q7) and the ninth resistor (R15) respectively; The G pole of the fourth NMOS tube (Q7) is grounded through the fourth capacitor (C5) and the tenth resistor (R19); The ninth resistor (R15) is connected to the cathode of the second diode (D9).

4. The switch circuit according to claim 3, characterized in that: The farad capacitor circuit module specifically includes: The G pole of the second PMOS tube (Q8) is respectively connected to the eleventh resistor (R18) and the anode of the second diode (D9), and the G pole of the second PMOS tube (Q8) is grounded through the twelfth resistor (R21), and the eleventh resistor (R18) is connected to the power supply (VDC_VBAT); The S pole of the second PMOS tube (Q8) is grounded through a farad capacitor (C4), and the S pole of the second PMOS tube (Q8) is connected to a DC power supply through a thirteenth resistor (R14) and a third diode (D7), connected to a VCC power supply through a fourth diode (D8), and connected to a DC power supply through the fourth diode (D8) and a fifth diode (D6).

5. The switch circuit according to claim 4, characterized in that: The multivibrator circuit module specifically includes: a fourteenth resistor (R23), a fifteenth resistor (R24), a sixteenth resistor (R25) and one end of a seventeenth resistor (R27) connected to the D electrode of the second PMOS tube (Q8); The other ends of the fourteenth resistor (R23) and the fifteenth resistor (R24) are connected via a fifth capacitor (C6); The other ends of the sixteenth resistor (R25) and the seventeenth resistor (R27) are connected via a sixth capacitor (C7); The other end of the sixteenth resistor (R25) is connected to the B pole of the first NPN transistor (Q10), and the other end of the fourteenth resistor (R23) is connected to the C pole of the first NPN transistor (Q10); The other end of the fifteenth resistor (R24) is connected to the B pole of the second NPN transistor (Q11), and the other end of the seventeenth resistor (R27) is connected to the C pole of the second NPN transistor (Q11); The E pole of the second NPN transistor (Q11) is connected to the E pole of the first NPN transistor (Q10).

6. The switch circuit according to claim 5, characterized in that: The buzzer control circuit module specifically includes: Two ends of the eighteenth resistor (R26) are respectively connected to the C pole of the second NPN transistor (Q11) and the cathode of the seventh diode (D10); The anode of the seventh diode (D10) is connected to the single chip microcomputer; The cathode of the seventh diode (D10) and the eighteenth resistor (R26) are grounded via a nineteenth resistor (R28) and connected to the G electrode of the sixth NMOS tube (Q9); The S pole of the sixth NMOS tube (Q9) is grounded, and the D pole of the sixth NMOS tube (Q9) is connected to one end of the buzzer (LS1); The other end of the buzzer (LS1) is connected to a second power supply (VCC).

7. The switch circuit according to claim 6, characterized in that: The alarm circuit module and the self-locking silencing circuit module specifically include: The anode of the eighth diode (D3) is connected to the single chip computer, and the cathode of the eighth diode (D3) is connected to the S pole of the third PMOS tube (Q4) through the twentieth resistor (R6); The G pole of the third PMOS tube (Q4) is connected to the cathode of the eighth diode (D3), and the D pole of the third PMOS tube (Q4) is connected to the G pole of the seventh NMOS tube (Q6) and the cathode of the tenth diode (D4) through the anode of the ninth diode (D5); The S pole of the seventh NMOS tube (Q6) is grounded, and the D pole of the seventh NMOS tube (Q6) is connected to the G pole of the third PMOS tube (Q4); The anode of the tenth diode (D4) is connected to the microcontroller.

8. The switch circuit according to claim 7, characterized in that: The mute button circuit module specifically includes: One end of the twenty-first resistor (R13) is respectively connected to the cathodes of the fifth diode (D6) and the fourth diode (D8), and the other end is respectively connected to the single chip computer and the second button (K2); The second button (K2) is respectively connected to the single chip microcomputer and the twenty-second resistor (R20); The twenty-second resistor (R20) is grounded via the twenty-third resistor (R22), and the twenty-second resistor (R20) is connected to the single chip microcomputer via the twenty-fourth resistor (R17).

9. A medical device, characterized in that: A switch circuit comprising any one of claims 1 to 8.

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