Image sensor and electronic device

Abstract

The utility model provides an image sensor and electronic equipment, the image sensor comprises a pixel unit and a signal reading circuit, the signal reading circuit comprises a comparator, a threshold signal output circuit and a timer; the positive input end of the comparator is connected with the output end of the pixel unit, the negative input end of the comparator is connected with the first output end of the threshold signal output circuit, and the output end of the comparator is connected with the first input end of the threshold signal output circuit and the first input end of the timer. The first input end of the threshold signal output circuit is connected with the output end of the comparator, the second input end is connected with an external processing circuit, the first output end is connected with the negative input end of the comparator, and the second output end is used for outputting exposure mode identification information; the first input end of the timer is connected with the output end of the comparator, and the output end is used for outputting a timing result. According to the invention, the dynamic range of the image sensor is enlarged without increasing the hardware cost.

Description

Technical Field

[0001] The present disclosure relates to image sensing technology and signal processing technology, and in particular to an image sensor and an electronic device. Background Art

[0002] The optoelectronic image sensor is a new type of neuromorphic vision sensor. By imitating the imaging method of the retina in primates, it records the continuous light intensity information in the scene with a high-density single-bit pulse sequence, can achieve high-precision capture and recording of high-speed light processes, and can also reconstruct the texture details in the scene. Therefore, it has great application value in the directions of machine vision and dynamic scene capture, etc.

[0003] The dynamic range of an image sensor refers to the light intensity range between the maximum light intensity and the minimum light intensity that the image sensor can distinguish. The dynamic range is an important evaluation index of the optoelectronic image sensor. Summary of the Utility Model

[0004] Embodiments of the present disclosure provide an image sensor and an electronic device to improve the dynamic range of the optoelectronic image sensor.

[0005] Another aspect of the embodiments of the present disclosure provides an image sensor, including a pixel unit and a signal readout circuit. The signal readout circuit includes a comparator, a threshold signal output circuit, and a timer;

[0006] The positive input terminal of the comparator is connected to the output terminal of the pixel unit, the negative input terminal of the comparator is connected to the first output terminal of the threshold signal output circuit, and the output terminal of the comparator is respectively connected to the first input terminal of the threshold signal output circuit and the first input terminal of the timer;

[0007] The first input terminal of the threshold signal output circuit is connected to the output terminal of the comparator, the second input terminal of the threshold signal output circuit is connected to an external processing circuit, the first output terminal of the threshold signal output circuit is connected to the negative input terminal of the comparator, and the second output terminal of the threshold signal output circuit outputs exposure mode identification information;

[0008] The first input terminal of the timer is connected to the output terminal of the comparator, and the output terminal of the timer outputs a timing result.

[0009] Optionally, in any embodiment of the image sensor of the present disclosure, the second input terminal of the timer is connected to an external clock circuit.

[0010] Optionally, in any embodiment of the image sensor of the present disclosure, the threshold signal output circuit includes: an operational amplifier, a constant current source, a capacitor, a trigger, a first switch, a second switch, a third switch, and a fourth switch;

[0011] The positive input terminal of the operational amplifier is connected to the reference electrical signal source of the minimum value through the third switch and to the reference electrical signal source of the maximum value through the fourth switch; the negative input terminal of the operational amplifier is connected to the constant current power supply through the second switch, connected to the output terminal of the operational amplifier through the first switch, and connected to the positive electrode of the capacitor; the output terminal of the operational amplifier is respectively connected to the negative input terminal of the comparator and the negative electrode of the capacitor;

[0012] The first input terminal of the flip-flop is connected to the power signal; the second input terminal of the flip-flop is connected to the output terminal of the comparator; the output terminal of the flip-flop outputs a data flag bit as the exposure mode identification information.

[0013] Optionally, in any image sensor embodiment of the present disclosure, the threshold signal output circuit further includes: a first inverter, a second inverter group, an OR logic circuit, a third inverter, and a fifth switch; wherein, the second inverter group includes 2k + 1 second inverters connected in sequence, and the value of k is an integer not less than 0;

[0014] The input terminal of the first inverter serves as the second input terminal of the threshold signal output circuit and is connected to the processing circuit; the output terminal of the first inverter is connected to the input terminal of the first second inverter in the second inverter group;

[0015] The output terminal of any second inverter in the second inverter group is connected to the input terminal of the adjacent next second inverter, and the output terminal of the last second inverter in the second inverter group is connected to the first input terminal of the OR logic circuit;

[0016] The second input terminal of the OR logic circuit is grounded through the fifth switch, and the output terminal of the OR logic circuit is connected to the input terminal of the third inverter;

[0017] The output terminal of the third inverter is connected to the second switch.

[0018] Optionally, in any image sensor embodiment of the present disclosure, the processing circuit is further included and is connected to the input terminal of the first inverter.

[0019] Optionally, in any image sensor embodiment of the present disclosure, the image sensor specifically includes a pixel array formed by arranging m rows and n columns of the pixel units, and m signal readout circuits, each signal readout circuit is connected to a row of pixel units in the pixel array, and each signal readout circuit is connected to the processing circuit corresponding to the row;

[0020] Or,

[0021] The image sensor specifically includes a pixel array formed by arranging m rows and n columns of the pixel units, and n signal readout circuits. Each signal readout circuit is connected to a column of pixel units in the pixel array, and each signal readout circuit is connected to the processing circuit corresponding to the column.

[0022] Wherein, the values of m and n are respectively integers greater than 1.

[0023] Optionally, in any embodiment of the image sensor of the present disclosure, the pixel unit includes: a photodiode, a transfer transistor, a floating diffusion region, a reset transistor, a source follower transistor, and a selection transistor.

[0024] One end of the photodiode is grounded; the other end of the photodiode is respectively connected to one end of the floating diffusion region and the gate terminal of the source follower transistor through the transfer transistor.

[0025] The source terminal of the transfer transistor is connected to the other end of the photodiode; the drain terminal of the transfer transistor is respectively connected to one end of the floating diffusion region and the gate terminal of the source follower transistor; the gate terminal of the transfer transistor is connected to the processing circuit.

[0026] One end of the floating diffusion region is respectively connected to the source terminal of the reset transistor, the gate terminal of the source follower transistor, and is connected to the other end of the photodiode through the transfer transistor; the other end of the floating diffusion region is grounded.

[0027] The source terminal of the reset transistor is connected to one end of the floating diffusion region; the drain terminal of the reset transistor is connected to a power signal; the gate terminal of the reset transistor is connected to the processing circuit.

[0028] The source terminal of the source follower transistor is connected to the drain terminal of the selection transistor; the drain terminal of the source follower transistor is connected to a power signal; the gate terminal of the source follower transistor is respectively connected to one end of the floating diffusion region and the drain terminal of the transfer transistor.

[0029] The source terminal of the selection transistor is connected to the input end of the signal readout circuit as the output end of the pixel unit; the drain terminal of the selection transistor is connected to the source terminal of the source follower transistor; the gate terminal of the selection transistor is connected to the processing circuit.

[0030] Optionally, in any embodiment of the image sensor of the present disclosure, the processing circuit is further respectively connected to the gate terminals of the transfer transistor, the reset transistor, and the selection transistor in the pixel units corresponding to the same row or column.

[0031] Another aspect of the embodiments of the present disclosure provides an electronic device, including: a processor, a memory communicatively connected to the processor, and an image sensor according to any one of the embodiments of the present disclosure;

[0032] The memory is configured to store computer-executable instructions;

[0033] The processor is configured to execute the computer instructions stored in the memory to control the image sensor.

[0034] Optionally, in any device embodiment of the present disclosure, the electronic device includes any one of the following: a pulsed camera, a high-speed camera, a vision camera, an audio player, a video player, a navigation device, a fixed-position terminal, an entertainment unit, a smart phone, a communication device, a mobile device, a device in a motor vehicle, an in-vehicle camera, a mobile phone camera, a sports or wearable camera, a traffic camera, an industrial inspection camera, a camera mounted on a flyable object, a medical camera, a security camera, or a home appliance camera.

[0035] Based on the embodiments of the present disclosure, a circuit structure with reusable hardware resources of an image sensor is provided, including a pixel unit and a signal readout circuit. The signal readout circuit includes a comparator, a threshold signal output circuit, and a timer. The positive input terminal of the comparator is connected to the output terminal of the pixel unit, the negative input terminal of the comparator is connected to the first output terminal of the threshold signal output circuit, and the output terminal of the comparator is respectively connected to the first input terminal of the threshold signal output circuit and the first input terminal of the timer; the first input terminal of the threshold signal output circuit is connected to the output terminal of the comparator, the second input terminal of the threshold signal output circuit is connected to a processing circuit, the first output terminal of the threshold signal output circuit is connected to the negative input terminal of the comparator, and the second output terminal of the threshold signal output circuit is configured to output exposure mode identification information; the first input terminal of the timer is connected to the output terminal of the comparator, and the output terminal of the timer is configured to output a timing result. This circuit structure can implement two photosensitive modes: timed exposure and quantitative exposure. The timed exposure mode is used for photosensitive imaging of weak light signals, and the quantitative exposure mode is used for photosensitive imaging of strong light signals. It can not only take advantage of the low noise and high sensitivity of the timed exposure mode but also the high speed of the quantitative exposure mode, and can increase the maximum detectable light intensity on the basis of photosensitive imaging of weak light signals, thereby increasing the dynamic range of the image sensor without increasing the hardware cost and effectively avoiding limiting the dynamic range of the image sensor due to hardware limitations such as hardware area.

[0036] Next, through the drawings and embodiments, the technical solutions of the present disclosure will be further described in detail. Description of the Drawings

[0037] The accompanying drawings, which form a part of the specification, illustrate embodiments of the present disclosure and, together with the description, serve to explain the principles of the present disclosure.

[0038] Figure 1 It is a schematic structural diagram of an embodiment of an image sensor of the present disclosure.

[0039] Figure 2 It is a schematic structural diagram of an embodiment of a threshold signal output circuit in an embodiment of the present disclosure.

[0040] Figure 3 It is a schematic structural diagram of another embodiment of a threshold signal output circuit in an embodiment of the present disclosure.

[0041] Figure 4 It is a schematic structural diagram of another embodiment of an image sensor of the present disclosure.

[0042] Figure 5 It is a schematic structural diagram of yet another embodiment of an image sensor of the present disclosure.

[0043] Figure 6 It is a schematic structural diagram of an embodiment of a pixel unit in an embodiment of the present disclosure.

[0044] Figure 7 It is a schematic structural diagram of an embodiment of an electronic device of the present disclosure.

[0045] Figure 8 It is a schematic structural diagram of an application embodiment of an electronic device of the present disclosure. Detailed Description of the Embodiments

[0046] Various exemplary embodiments of the present disclosure will now be described in detail with reference to the accompanying drawings. It should be noted that: unless otherwise specifically stated, the relative arrangements of components and steps, numerical expressions, and values set forth in these embodiments do not limit the scope of the present disclosure.

[0047] Those skilled in the art can understand that terms such as "first" and "second" in the embodiments of the present disclosure are only used to distinguish different steps, devices, or modules, etc., and neither represent any specific technical meaning nor indicate an inevitable logical order between them.

[0048] It should also be understood that in the embodiments of the present disclosure, "a plurality of" may refer to two or more, and "at least one" may refer to one, two, or more.

[0049] It should also be understood that for any component, data, or structure mentioned in the embodiments of the present disclosure, in the absence of a clear definition or contrary indication in the context, it is generally understood to be one or more.

[0050] In addition, the term "and / or" in the present disclosure is merely a relational description of associated objects, indicating that three relationships may exist. For example, A and / or B may represent three cases: A exists alone, A and B exist simultaneously, and B exists alone. In addition, the character " / " in the present disclosure generally represents an "or" relationship between the associated objects before and after.

[0051] It should also be understood that the description of each embodiment in the present disclosure emphasizes the differences between the embodiments, and the same or similar parts can be referred to each other. For the sake of brevity, they will not be elaborated one by one.

[0052] At the same time, it should be understood that for the convenience of description, the dimensions of the various parts shown in the drawings are not drawn according to the actual proportional relationship.

[0053] The following description of at least one exemplary embodiment is actually only illustrative and in no way limits the present disclosure and its application or use.

[0054] Techniques, methods, and devices known to those of ordinary skill in the relevant art may not be discussed in detail, but where appropriate, the techniques, methods, and devices should be regarded as part of the specification.

[0055] It should be noted that like reference numerals and letters denote like items in the following figures, and thus, once an item is defined in one figure, it need not be further discussed in subsequent figures.

[0056] In the process of implementing the present disclosure, the inventors found through research that in the related art, for an optoelectronic image sensor, the light intensity is reflected by recording the cumulative value of the optoelectronic signal within a fixed time. There are mainly two ways to broaden the dynamic range of the optoelectronic image sensor: one is to increase the number of photodiodes in the optoelectronic image sensor to achieve separate photosensing of strong and weak light; the other is to increase multiple signal conversion and readout channels to achieve different gains for strong and weak light signals, etc. These methods all require increasing the hardware area and the complexity of the process preparation, increasing the hardware cost, and the improvement effect of the dynamic range is directly related to the hardware cost. Moreover, due to hardware limiting factors such as the hardware area cannot be increased infinitely, the dynamic range of the optoelectronic image sensor is limited.

[0057] Figure 1 It is a schematic structural diagram of an embodiment of the image sensor of the present disclosure. As Figure 1 shown, the image sensor of the embodiment of the present disclosure includes a pixel unit 102 and a signal readout circuit 104. Among them, the signal readout circuit 104 includes: a comparator 1042, a threshold signal output circuit 1044, and a timer 1046. Among them:

[0058] The pixel unit 102 is used to be exposed after reset, receive an optical signal during the exposure to generate photo-generated charges, and output an electrical signal based on the photo-generated charges.

[0059] The positive input terminal of the comparator 1042 is connected to the output terminal of the pixel unit 102 to receive the electrical signal Vpixel output by the pixel unit 102; the negative input terminal of the comparator 1042 is connected to the first output terminal of the threshold signal output circuit 1044 to receive the reference electrical signal output by the threshold signal output circuit 1044; the output terminal of the comparator 1042 is respectively connected to the first input terminal of the threshold signal output circuit 1044 and the first input terminal of the timer 1046, and outputs a comparison result signal to the threshold signal output circuit 1044 and the timer 1046.

[0060] Specifically, when the signal input to the positive input terminal of the comparator 1042 is greater than the signal input to the negative input terminal, that is, when the electrical signal output by the pixel unit 102 is greater than the reference electrical signal output by the threshold signal output circuit 1044, the comparator 1042 outputs a high level (1) as the comparison result signal, otherwise it outputs a low level (0) as the comparison result signal. Thus, according to the comparison result signal output by the comparator, it can be determined whether the electrical signal output by the pixel unit 102 is greater than the reference electrical signal output by the threshold signal output circuit 1044.

[0061] The first input terminal of the threshold signal output circuit 1044 is connected to the output terminal of the comparator 1042 to receive the comparison result signal output by the comparator 1042; the second input terminal of the threshold signal output circuit 1044 is connected to an external processing circuit to receive the first external control signal sent by the processing circuit, so as to output a reference electrical signal within a preset threshold range according to the control of the first external control signal; the first output terminal of the threshold signal output circuit 1044 is connected to the negative input terminal of the comparator 1042 to output a reference electrical signal within a preset threshold range to the negative input terminal of the comparator 1042; the second output terminal of the threshold signal output circuit 1044 outputs exposure mode identification (ID) information, and the exposure mode identification information is used to identify that the current exposure mode of the pixel unit is a timed exposure mode or a quantitative exposure mode, and the exposure mode identification information is determined according to the comparison result signal.

[0062] The first input terminal of the timer 1046 is connected to the output terminal of the comparator 1042 to receive the comparison result signal sent by the comparator 1042; the output terminal of the timer 1046 outputs a timing result when the comparison result signal changes.

[0063] Based on the circuit structure of this embodiment, the pixel unit 102 can receive an optical signal within a preset exposure duration to generate photo-generated charges, and output an electrical signal (hereinafter referred to as the first electrical signal for easy distinction) that can reflect the intensity of the collected optical signal based on the photo-generated charges generated within the preset exposure duration. Since the preset exposure duration is a fixed duration, the exposure mode in which the pixel unit obtains an electrical signal based on the photo-generated charges generated by the optical signal received within the preset exposure duration is called the timed exposure mode. And after being reset according to the control of the processing circuit, the exposure starts again. During the exposure process, the pixel unit receives an optical signal to generate photo-generated charges, obtains an electrical signal (hereinafter referred to as the second electrical signal) based on the photo-generated charges, and continuously outputs the second electrical signal. During this exposure process, the pixel unit no longer obtains an electrical signal based on the photo-generated charges generated by the optical signal received within the preset exposure duration and then outputs it. Instead, it obtains the second electrical signal and continuously outputs it during the exposure process. This exposure mode is called the quantitative exposure mode. The electrical signal in the embodiments of the present disclosure includes the first electrical signal or the second electrical signal, which is an electrical signal obtained by the pixel unit based on the photo-generated charges generated by the optical signal received within the preset exposure duration. This electrical signal can be a voltage signal or a current signal, and the embodiments of the present disclosure do not limit this. Unless otherwise stated, the embodiments of the present disclosure will be described by taking the electrical signal as a voltage signal as an example, and the same applies to the case where the electrical signal is a current signal.

[0064] The signal readout circuit 104 can compare whether the first electrical signal output by the pixel unit 102 is greater than the reference electrical signal, which is the maximum value within a preset threshold range and output by the threshold signal output circuit 1044, through the comparator 1042. If the first electrical signal is greater than the reference electrical signal of the maximum value, the timer 1046 is used to obtain the time required for the second electrical signal output by the pixel unit 102 to reach the reference electrical signal, which is the minimum value within the threshold range and output by the threshold signal output circuit 1044, as the first time and output the first time. And the threshold signal output circuit 1044 outputs the first exposure mode identification information indicating the quantitative exposure mode, so as to know that the first time is the time information in the quantitative exposure mode based on the first exposure mode identification information, that is, the first time is the time required for the electrical signal to reach the reference electrical signal of the minimum value within the threshold range, thereby determining the exposure intensity. If the first electrical signal is not greater than the reference electrical signal of the maximum value, the threshold signal output circuit 1044 sequentially outputs a reference electrical signal in the reference signal sequence as the current reference signal. The reference signal sequence includes a plurality of reference electrical signals sorted with gradually increasing signal values within the threshold range, and obtains the time required for the current reference signal to reach the first electrical signal, as the second time and output the second time. And the threshold signal output circuit 1044 outputs the second exposure mode identification information for identifying the timed exposure mode, so as to know that the second time is the time information in the timed exposure mode based on the second exposure mode identification information, and the second time is the time required for the current reference signal to reach the first electrical signal, thereby determining the exposure intensity. In the embodiments of the present disclosure, the reference electrical signals within the threshold range are determined based on the light intensity detection range of the image sensor, and can correspond to the entire light intensity detection range of the image sensor, or can correspond to a section within the light intensity detection range of the image sensor. The embodiments of the present disclosure do not limit this. In the timed exposure mode, taking the reference electrical signal of the maximum value within the preset threshold range as the comparison standard, comparing whether the first electrical signal output by the pixel unit is greater than the reference electrical signal of the maximum value within the preset threshold range can determine whether the first electrical signal exceeds the photosensitive upper limit. When the first electrical signal exceeds the photosensitive upper limit, the pixel unit is controlled to perform quantitative exposure. In the quantitative exposure mode, taking the reference electrical signal of the minimum value within the preset threshold range as the comparison standard is more sensitive to the detected light intensity of the pixel unit, which helps to achieve a larger dynamic range, and enables the detectable light intensities of the timed exposure mode and the quantitative exposure mode to effectively correspond to the entire range corresponding to the preset threshold range, effectively connecting the light intensity detection ranges of the two exposure modes.

[0065] Based on the embodiments of the present disclosure, a circuit structure with reusable hardware resources for an image sensor is provided, including a pixel unit and a signal readout circuit. The signal readout circuit includes a comparator, a threshold signal output circuit, and a timer. The positive input terminal of the comparator is connected to the output terminal of the pixel unit, the negative input terminal of the comparator is connected to the first output terminal of the threshold signal output circuit, and the output terminal of the comparator is respectively connected to the first input terminal of the threshold signal output circuit and the first input terminal of the timer; the first input terminal of the threshold signal output circuit is connected to the output terminal of the comparator, the second input terminal of the threshold signal output circuit is connected to the processing circuit, the first output terminal of the threshold signal output circuit is connected to the negative input terminal of the comparator, and the second output terminal of the threshold signal output circuit is used to output exposure mode identification information; the first input terminal of the timer is connected to the output terminal of the comparator, and the output terminal of the timer is used to output a timing result. This circuit structure can implement two photosensitive modes: timed exposure and quantitative exposure. The timed exposure mode is used for photosensitive imaging of weak light signals, and the quantitative exposure mode is used for photosensitive imaging of strong light signals. It can not only utilize the advantages of low noise and high sensitivity of the timed exposure mode but also the high-speed advantage of the quantitative exposure mode, and can increase the maximum detectable light intensity based on photosensitive imaging of weak light signals, thereby increasing the dynamic range of the image sensor without increasing the hardware cost and effectively avoiding the limitation of the dynamic range of the image sensor due to hardware limitations such as hardware area.

[0066] In specific applications, the reference electrical signal Vth output by the threshold signal output circuit 1044 under default conditions is the reference electrical signal of the maximum value within the preset threshold range, and the output exposure mode identification is 0. Correspondingly, the threshold signal output circuit 1044 also has corresponding operating modes, a timed exposure mode consistent with the timed exposure mode of the pixel unit, and enters a quantitative exposure mode consistent with the quantitative exposure mode of the pixel unit according to the comparison result signal output by the comparator when the electrical signal output by the pixel unit 102 is greater than the reference electrical signal output by the threshold signal output circuit 1044; when the electrical signal output by the pixel unit 102 is not greater than the reference electrical signal output by the threshold signal output circuit 1044, it enters a scanning mode to output a reference signal sequence with gradually increasing signal values within the threshold range.

[0067] Optionally, in some implementation manners, the above threshold range can be expressed as [Vmin, Vmax], which can be preset. The minimum value in the reference signal sequence output by the threshold signal output circuit 1044 can be the minimum value Vmin within the threshold range [Vmin, Vmax]; or, it can also be the intermediate value or a value near the intermediate value within the threshold range [Vmin, Vmax], or, it can also be any value between Vmin and the intermediate value. The embodiments of the present disclosure do not limit this.

[0068] In the reference signal sequence, the difference between any two adjacent reference electrical signals can be a preset interval value, that is, multiple reference electrical signals in the reference signal sequence increase in sequence according to the preset interval value △V. Alternatively, in the reference signal sequence, the ratio between any two adjacent reference electrical signals is a preset ratio c, that is, multiple reference electrical signals in the reference signal sequence increase linearly in sequence according to the preset ratio c. The embodiments of the present disclosure do not limit this.

[0069] Optionally, in some implementation manners, the timer can start timing when receiving the comparison result signal output by the comparator 1042, and stop timing and output the timing result when the comparison result signal changes (i.e., flips), for example, when the comparison result signal changes from 1 to 0 and from 0 to 1.

[0070] The timer 1046 can also be provided with a second input terminal, connected to an external clock circuit, to receive a clock signal with a preset frequency input by the external clock circuit for timing. That is, the timer 1046 can perform timing by internally setting a clock signal (1, 0) with a preset frequency, or can perform timing by receiving a clock signal with a preset frequency input by the external clock circuit. The embodiments of the present disclosure do not limit this. The timing result of the timer 1046 can specifically be represented by a counting result. After the timer 1046 starts timing, the counting result can be incremented by 1 every time the clock signal flips twice (that is, the clock signal flips from 1 to 0, then from 0 to 1, or vice versa). Through the clock signal with a preset frequency, the timing function can be achieved, and the counting result is output as the timing result. Since the clock signal changes at a fixed frequency (i.e., a fixed period), the counting result multiplied by the clock period can represent time.

[0071] Figure 2 It is a schematic structural diagram of an embodiment of the threshold signal output circuit in the embodiments of the present disclosure. As Figure 2 shown, on the basis of the embodiment shown in Figure 1 the threshold signal output circuit 1044 includes: an operational amplifier 202, a constant current source 204, a capacitor 206, a flip-flop 208, a first switch (S1) 210, a second switch (S2) 212, a third switch (S3) 214, and a fourth switch (S4) 216. Among them:

[0072] The positive input terminal of the operational amplifier 202 is connected to the reference electrical signal source of the minimum value through the third switch 214. The reference electrical signal source of the minimum value can provide the reference electrical signal Vmin within the threshold range, and is connected to the reference electrical signal source of the maximum value through the fourth switch 216. The reference electrical signal source of the maximum value can provide the reference electrical signal Vmax within the threshold range; the negative input terminal of the operational amplifier 202 is connected to the constant current power supply 204 through the second switch 212, is connected to the output terminal of the operational amplifier 202 through the first switch 210, and is connected to the positive electrode of the capacitor 206; the output terminal of the operational amplifier 202 is respectively connected to the negative input terminal of the comparator 1042 and the negative electrode of the capacitor 202.

[0073] The first input terminal of the flip-flop 208 is connected to the power supply signal VDD; the second input terminal of the flip-flop 208 is connected to the output terminal of the comparator 1042 to receive the comparison result signal input by the comparator 1042; the output terminal of the flip-flop 208 outputs a data flag bit for indicating the exposure mode identification information.

[0074] Based on this embodiment, a specific implementation circuit structure of the threshold signal output circuit is provided. When it is necessary to output the reference electrical signal Vmin of the minimum value within the preset threshold range, S1 and S3 are closed, and S2 and S4 are disconnected. The positive terminal of the operational amplifier is connected to Vmin, and the negative terminal and the output terminal are short-circuited. The operational amplifier can output Vmin. When it is necessary to output the reference electrical signal Vmax of the maximum value within the preset threshold range, S1 and S4 are closed, and S2 and S3 are disconnected. The positive terminal of the operational amplifier is connected to Vmax, and the negative terminal and the output terminal are short-circuited. The operational amplifier can output Vmax. When it is necessary to output a reference signal sequence with a gradually increasing signal value within the threshold range, first close S1 and S3, and disconnect S2 and S4 to reset the reference electrical signal to Vmin. Then close S2 and S3, and disconnect S1 and S4. The constant current power supply charges the capacitor with a fixed current, and the voltage across the capacitor gradually increases, so that the reference signal sequence (multiple voltage signals) output by the operational amplifier rises at a fixed ratio. Thus, it is realized that the threshold signal output circuit can output the reference electrical signal of any value within the threshold range.

[0075] Figure 3 It is a schematic structural diagram of another embodiment of the threshold signal output circuit in the embodiments of the present disclosure. As Figure 3 shown, in Figure 2Based on the illustrated embodiment, the threshold signal output circuit 1044 of this embodiment may further include: a first inverter 302, a second inverter group 304, an OR logic circuit 306, a third inverter 308, and a fifth switch 310. Among them, the second inverter group 304 includes 2k + 1 second inverters connected in sequence, where k is an integer not less than 0, and the specific value of k can be set according to actual requirements, and the embodiments of the present disclosure do not limit this. Among them:

[0076] The input terminal of the first inverter 302 serves as the second input terminal of the threshold signal output circuit 1044, is connected to the processing circuit, and receives a first external control signal Vs4 sent by the processing circuit. The first external control signal Vs4 is used to control the fourth switch 216 and the fifth switch (S5) 310 to conduct or disconnect; the output terminal of the first inverter 302 is connected to the input terminal of the first second inverter in the second inverter group 304, and outputs a third control signal Vs3. The third control signal Vs3 is used to control the third switch 214 to conduct or disconnect.

[0077] The output terminal of any second inverter in the second inverter group 304 is connected to the input terminal of the next adjacent second inverter, and the output terminal of the last second inverter in the second inverter group 304 is connected to the first input terminal of the OR logic circuit 306.

[0078] The second input terminal of the OR logic circuit 306 is grounded to VSS through the fifth switch 310, and the output terminal of the OR logic circuit 306 is connected to the input terminal of the third inverter 308, and outputs a first control signal Vs1. The first control signal Vs1 is used to control the third switch 214 to conduct or disconnect.

[0079] The output terminal of the third inverter 308 is connected to the second switch 212, and outputs a second control signal Vs2. The second control signal Vs2 is used to control the second switch 212 to conduct or disconnect.

[0080] In this embodiment, when the comparison result signal flips from a low level to a high level (i.e., 1), the flip-flop will output a high level (i.e., 1), that is, the data flag bit is at a high level (i.e., 1), until S5 conducts, and the data flag bit will be reset to a low level (i.e., 0).

[0081] Based on the threshold signal output circuit of this embodiment, during the timed exposure of the pixel unit, the processing circuit continuously inputs a high-level first external control signal Vs4 (i.e., 1) to the first inverter 302. At this time, the high-level Vs4 controls S4 and S5 to close and conduct the circuit where they are located; Vs4 passes through an inverter to obtain a low-level third control signal Vs3 (i.e., 0), thereby controlling S3 to disconnect and the circuit where it is located to be disconnected; the low-level Vs3 passes through 2n + 1 inverters for a certain period of delay and is inverted to a high level and then input to one input terminal of the OR logic circuit, and a low-level signal VSS (i.e., 0) is input to the other input terminal of the OR logic circuit, and a high-level first control signal Vs1 (i.e., 1) is output, thereby controlling S1 to close and the circuit where it is located to be conducted; the high-level Vs1 passes through an inverter to obtain a low-level second control signal Vs2 (i.e., 0), thereby controlling S2 to disconnect and the circuit where it is located to be disconnected. Thus, during the timed exposure, s1, s4, and s5 are closed and the circuits where they are located are conducted, s2 and s3 are disconnected and the circuits where they are located are disconnected, and the data flag bit output by the flip-flop is reset to a low level (i.e., 0), so that the threshold signal output circuit outputs a reference electrical signal Vmax that is the maximum value within the preset threshold range.

[0082] After the comparator completes the comparison of the first electrical signal output by the pixel unit with the reference electrical signal Vmax and outputs a comparison result signal, Vs4 changes from a high level to a low level, controlling S4 and S5 to disconnect and the circuits where they are located to be disconnected; Vs3 changes from a low level to a high level, controlling S3 to close and the circuit where it is located to be conducting. If the comparison result signal is at a high level, that is, the first electrical signal is greater than the reference electrical signal Vmax, the data flag bit will become a high level. At this time, it enters the quantitative exposure mode, and Vs1 is also at a high level, thereby controlling S1 to close and the circuit where it is located to be conducting; Vs2 is at a low level, thereby controlling S2 to disconnect and the circuit where it is located to be disconnected. At this time, S1 and S3 are conducting, and S2 and S4 are disconnected, so that the threshold signal output circuit outputs the reference electrical signal Vmin which is the minimum value within the preset threshold range. If the comparison result signal is at a low level, that is, the first electrical signal is not greater than the reference electrical signal Vmax, the data flag bit will also be at a low level. Vs4 changes from a high level to a low level, controlling S4 and S5 to disconnect and the circuits where they are located to be disconnected; Vs3 changes from a low level to a high level, controlling S3 to close and the circuit where it is located to be conducting. Since Vs4 needs to pass through 2k + 1 second inverters to be transmitted to the OR logic circuit, there is a certain transmission delay. After Vs4 changes to a low level, within a short period of time corresponding to this transmission delay, Vs1 is at a high level and Vs2 is at a low level. Therefore, within this short period of time, S1 and S3 are closed, and S2 and S4 are disconnected, so that the threshold signal output circuit outputs the reference electrical signal Vmin which is the minimum value within the preset threshold range. After this short period of time has passed, Vs1 changes to a low level and Vs2 changes to a high level, and the constant current source starts to charge the capacitor, so that the reference electrical signal output by the threshold signal output circuit starts to rise at a fixed rate from the reference electrical signal Vmin which is the minimum value, realizing the scanning mode.

[0083] Figure 4 It is a schematic structural diagram of another embodiment of the image sensor of the present disclosure. As Figure 4 shown, on the basis of any of the above embodiments, in this embodiment, the image sensor further includes a processing circuit 106, which is connected to the input end of the first inverter 302 and outputs a first external control signal Vs4 to the input end of the first inverter 302. Specifically, during the process of the pixel unit performing timed exposure, a high-level first external control signal Vs4 can be continuously input to the first inverter 302 to control the threshold signal output circuit 1044 to implement the corresponding functions in the above signal reading stage.

[0084] Figure 5 It is a schematic structural diagram of yet another embodiment of the image sensor of the present disclosure. As Figure 5As shown, in some implementations, the image sensor specifically includes a pixel array 40 formed by arranging pixel units 102 in m rows and n columns, and m signal readout circuits 104. Each signal readout circuit 104 is correspondingly connected to a row of pixel units in the pixel array 40, and each signal readout circuit 104 is connected to the processing circuit 106 of the corresponding row. Wherein, the values of m and n are respectively integers greater than 1.

[0085] Optionally, referring again to Figure 5 , the image sensor may further include m processing circuits 106. Each processing circuit 106 is correspondingly connected to a row of pixel units in the pixel array 40 and the signal readout circuit 104 of the corresponding row. Each processing circuit 106 may, according to a preset logic, respectively control each pixel unit in the corresponding row of pixel units to be reset and then exposed, and output an electrical signal to the signal readout circuit 104 of the corresponding row after the exposure ends, and control the signal readout circuit 104 of the corresponding row to process the electrical signal output by the pixel unit. Alternatively, in some other implementations, the image sensor may specifically also include a pixel array 40 formed by arranging pixel units 102 in m rows and n columns, and n signal readout circuits 104 (not shown in the figure). Each signal readout circuit 104 is correspondingly connected to a column of pixel units in the pixel array, and each signal readout circuit 104 is connected to the processing circuit 106 of the corresponding column.

[0086] Optionally, the image sensor may further include n processing circuits 106. Each processing circuit 106 is correspondingly connected to a column of pixel units in the pixel array 40 and the signal readout circuit 104 of the corresponding column. Each processing circuit 106 may, according to a preset logic, respectively control each pixel unit in the corresponding column of pixel units to be reset and then exposed, and output an electrical signal to the signal readout circuit 104 of the corresponding column after the exposure ends, and control the signal readout circuit 104 of the corresponding row to process the electrical signal output by the pixel unit.

[0087] Figure 6 This is a schematic structural diagram of an embodiment of the pixel unit in the embodiments of the present disclosure. As Figure 6 shown, based on any embodiment of the present disclosure, the pixel unit 102 may include: a photodiode (PD) 1022, a transfer transistor (TX) 1024, a floating diffusion region (FD) 1026, a reset transistor (RST) 1028, a source follower transistor (SF) 1030, and a selection transistor (SEL) 1032. Among them:

[0088] One end of the photodiode 1022 is grounded; the other end of the photodiode 1022 is connected to one end of the floating diffusion region 1026 and the gate terminal of the source follower transistor 1030 respectively through the transfer transistor 1024. Optionally, the photodiode can also be other photoelectric conversion components that can achieve photoelectric conversion, to convert the optical signal into photoelectric charges. Under the illumination condition, the photodiode receives the optical signal and generates photo-generated charges. Before the transfer transistor is closed, the photo-generated charges are confined in the depletion region of the photodiode by the energy potential well, and the photoelectric charges in the photodiode will gradually accumulate.

[0089] The source terminal of the transfer transistor 1024 is connected to the other end of the photodiode 1022; the drain terminal of the transfer transistor 1024 is connected to one end of the floating diffusion region 1026 and the gate terminal of the source follower transistor 1030 respectively; the gate terminal of the transfer transistor 1024 is used to receive the second external control signal to control the conduction or disconnection of the transfer transistor 1024 according to the second external control signal. After the transfer transistor 1024 is turned on, the photo-generated charges generated by the photodiode 1022 can be transferred from the photodiode 1022 to the floating diffusion region 1026.

[0090] One end of the floating diffusion region 1026 is connected to the source terminal of the reset transistor 1028, the gate terminal of the source follower transistor 1030, and is connected to the other end of the photodiode 1022 through the transfer transistor 1024; the other end of the floating diffusion region 1026 is grounded. The floating diffusion region performs reset when the reset transistor is turned on; when the reset transistor is turned off and the transfer transistor is turned on, the floating diffusion region receives the photo-generated charges generated by the photodiode.

[0091] The source terminal of the reset transistor 1028 is connected to one end of the floating diffusion region 1026; the drain terminal of the reset transistor 1028 is connected to the power supply signal VDD; the gate terminal of the reset transistor 1028 is used to receive the third external control signal to control the conduction or disconnection of the reset transistor 1028 according to the third external control signal. After the reset transistor 1028 is turned on, the voltage signal of the floating diffusion region 1026 can be reset to reset the floating diffusion region 1026. When the reset transistor is turned on, the floating diffusion region is connected to the power supply signal VDD to realize the reset of the floating diffusion region, and the voltage on the floating diffusion region is charged to a high level. Usually, the floating diffusion region performs reset before generating photo-generated charges. Under the illumination condition, photo-generated charges are generated in both the photodiode and the floating diffusion region, and the voltage on the floating diffusion region will gradually decrease under the action of the photo-generated charges.

[0092] The source terminal of the source follower transistor 1030 is connected to the drain terminal of the selection transistor 1032; the drain terminal of the source follower transistor 1030 is connected to the power supply signal VDD; the gate terminal of the source follower transistor 1030 is connected to one end of the floating diffusion region 1026 and the drain terminal of the transfer transistor 1024 respectively. The gate terminal of the source follower transistor is connected to the floating diffusion region, follows the potential change of the floating diffusion region, and obtains a potential signal. This process does not affect the photoelectric conversion of the photodiode. On the premise that the transfer transistor is turned off, the source follower transistor reads the potential change of the floating diffusion region, while the photodiode can continue to collect optical signals and perform photoelectric conversion to generate photo-generated charges.

[0093] The source terminal of the selection transistor 1032 is connected to the input terminal of the signal readout circuit 104 and serves as the output terminal of the pixel unit 102; the drain terminal of the selection transistor 1032 is connected to the source terminal of the source follower transistor 1030; the gate terminal of the selection transistor 1032 is used to receive a fourth external control signal to control the conduction or disconnection of the selection transistor 1032 according to the fourth external control signal. After the selection transistor 1032 is turned on, an electrical signal Vpixel, including a first electrical signal or a second electrical signal, is input to the input terminal of the signal readout circuit 104 (specifically, the positive input terminal of the comparator 1042).

[0094] Optionally, in some implementations, the processing circuit 1026 is further connected to the gate terminals of the transfer transistors 1024, the reset transistors 1028, and the selection transistors 1032 in the pixel units of the corresponding rows or columns respectively, and is used to output a second external control signal, a third external control signal, and a fourth external control signal to the gate terminals of the transfer transistors 1024, the reset transistors 1028, and the selection transistors 1032 in the pixel units of the corresponding rows or columns respectively, so as to control the conduction or disconnection of the transfer transistors 1024, the reset transistors 1028, and the selection transistors 1032.

[0095] In addition, the pixel unit in the embodiment of the present disclosure can also be implemented by other circuit structures, as long as the pixel unit can be reset, exposed, generate an electrical signal representing the exposure intensity, and output it externally according to the control of the processing circuit. The embodiment of the present disclosure does not limit the specific structure of the pixel unit.

[0096] The following takes an image sensor including a pixel array formed by arranging m*n pixel units, n signal readout circuits, and n processing circuits as an example, where each signal readout circuit and each processing circuit correspond to a column of pixel units in the pixel array, and the working process of the image sensor according to the embodiments of the present disclosure is exemplarily described. Each processing circuit sequentially sends a second external control signal, a third external control signal, and a fourth external control signal to the pixel units in the corresponding column according to a preset logic, so as to control the corresponding pixel units to be reset and then perform timed exposure, and send a first external control signal to the signal readout circuit in the corresponding column during the timed exposure process of the corresponding pixel units, and send a second external control signal and a fourth external control signal to the pixel unit after the timed exposure of the corresponding pixel unit ends, so as to control the corresponding pixel unit to conduct with the signal readout circuit in the corresponding column to output a first electrical signal to the signal readout circuit. Taking a pixel unit as an example, specifically:

[0097] In the initial reset stage, the pixel unit is controlled to be reset. By sending a second external control signal, a third external control signal, and a fourth external control signal to the pixel unit, the transfer transistor, the reset transistor, and the selection transistor are controlled to close, and the charges on the photodiode and the floating diffusion region of the pixel unit are emptied;

[0098] Timed exposure stage: The pixel unit is controlled to perform timed exposure, that is, to expose for a fixed time (i.e., the preset exposure time). By sending a second external control signal, a third external control signal, and a fourth external control signal to the pixel unit, the transfer transistor, the reset transistor, and the selection transistor are controlled to disconnect, and the photodiode receives a light signal during the preset exposure time to generate photo-generated charges and store the photo-generated charges; meanwhile, during the timed exposure process of the pixel unit, a high-level first external control signal is sent to the corresponding signal readout circuit;

[0099] Signal reading stage: After the preset exposure time, the pixel unit is controlled to output a first electrical signal externally. By sending a second external control signal and a fourth external control signal to the pixel unit, the transfer transistor and the selection transistor are controlled to close, and the photo-generated charges on the photodiode are transmitted to the floating diffusion region. The high-level voltage on the floating diffusion region causes the source follower diode to close, and the source follower transistor generates a signal voltage Vpixel representing the intensity of this exposure (as the above-mentioned first electrical signal). Since the selection transistor is conducting, the signal voltage Vpixel is transmitted to the positive input terminal of the comparator in the corresponding signal readout circuit through the selection transistor;

[0100] The reference signal Vth input to the negative input terminal of the comparator is defaulted to the maximum threshold voltage Vmax (as the reference electrical signal for the maximum value within the above preset threshold range). At this time, the comparator determines whether the signal voltage Vpixel is greater than the maximum threshold voltage Vmax. If the signal voltage Vpixel is greater than the maximum threshold voltage Vmax, the comparator outputs a comparison result signal 1, indicating that the signal voltage Vpixel exceeds the photosensitive upper limit of the pixel unit, which means that the pixel unit has been saturated during this timed exposure. Otherwise, the comparator outputs a comparison result signal 0, indicating that the pixel unit is not saturated during this timed exposure. Only when it is not saturated can the signal voltage Vpixel accurately reflect the exposure intensity of the pixel unit. Therefore, if the pixel unit has been saturated, the signal voltage Vpixel at this time cannot correctly reflect the exposure intensity of this time, and a quantitative exposure needs to be performed again.

[0101] If the pixel unit has been saturated, before the quantitative exposure, first control the pixel unit to be reset in the above manner, empty the charge in the pixel unit, and then control the pixel unit to start exposure. At the same time, the threshold signal output circuit outputs the minimum threshold voltage Vmin (as the reference electrical signal for the minimum value within the above preset threshold range), the timer starts timing, and the pixel unit continuously outputs the signal voltage Vpixel (as the above second electrical signal) during the exposure until the signal voltage Vpixel reaches the minimum threshold voltage Vmin. At this time, the comparison result signal output by the comparator is 0, and the comparison result signal has flipped (i.e., from 1 to 0). The timer stops timing and outputs the timing result (as the first time), and the threshold signal output circuit outputs a data flag bit 1 (as the above first exposure mode identifier), indicating that the timing result at this time is the data result of the quantitative exposure mode. According to the timing result when the signal voltage Vpixel reaches the minimum threshold voltage Vmin, the exposure intensity can be reflected, and thus the light intensity of the detection space of the pixel unit can be known. Among them, the shorter the first time, the greater the light intensity of the detection space of the pixel unit within the first time, and accurate recording of stronger light signals can be achieved.

[0102] If the pixel unit is not saturated, the threshold signal output circuit starts to scan the output reference signal Vth from the minimum value to the maximum value at a fixed slope. Meanwhile, the timer starts timing until the reference signal Vth reaches the signal voltage Vpixel. At this time, the comparator outputs a comparison result signal 1, and the comparison result signal flips (i.e., from 0 to 1). The timer stops timing. The timing result at this time can represent the magnitude of the signal voltage Vpixel, thus realizing the analog-to-digital conversion of the signal voltage Vpixel and outputting the timing result (as the second time). The threshold signal output circuit outputs a data flag bit 0 (as the above-mentioned second exposure mode identifier), indicating that the timing result at this time is the data result of the fixed-time exposure mode. Among them, the longer the second time, the greater the light intensity of the detection space of the pixel unit within the second time.

[0103] For example, if the reference electrical signal at the maximum value within the preset threshold range is 1V, the reference electrical signal at the minimum value is 1mV, the preset exposure duration of the fixed-time exposure is 10ms, and the period of the clock signal input to the timer is 10ns. If the exposure intensity can make the first electrical signal reach 1V within the 10ms exposure time, it is equivalent to making the electrical signal reach 1mV within the 10μs exposure time. Thus, the maximum exposure time of the quantitative exposure mode can be set to 10us, and the minimum time resolution of the quantitative exposure is the period of the clock signal, 10ns. The maximum light intensity it can detect can make the electrical signal reach 1mV within the 10ns exposure time, which is 1000 times the maximum detection light intensity of the fixed-time exposure. Therefore, the maximum detection light intensity is increased relative to the fixed-time exposure mode, and the dynamic range of the image sensor is increased without increasing the hardware cost.

[0104] The image sensor of the embodiments of the present disclosure can adopt various exposure incident methods. For example, it can adopt a front-illumination exposure method or a back-illumination exposure method. In addition, different shutter modes can also be adopted. For example, a global exposure shutter and a rolling shutter can be adopted. The embodiments of the present disclosure do not limit this.

[0105] The image sensor and the signal processing method of the embodiments of the present disclosure correspond to each other in specific implementation and beneficial technical effects. The relevant content can be referred to each other and will not be elaborated here.

[0106] Figure 7 It is a schematic structural diagram of an embodiment of an electronic device of the present disclosure. As Figure 7 shown, the electronic device includes: a processor 50, a memory 60 communicatively connected to the processor 50, and an image sensor 70 provided in any embodiment of the present disclosure. Among them:

[0107] The memory 60 is used to store computer execution instructions.

[0108] The processor 50 is configured to execute computer-executable instructions stored in the memory 50 to control the image sensor 70 to implement the signal processing method according to any embodiment of the present disclosure.

[0109] Optionally, in some implementations, the electronic device according to the embodiments of the present disclosure may include, for example, but not limited to any one of the following: pulse camera, high-speed camera, vision camera, audio player, video player, navigation device, fixed-position terminal, entertainment unit, smart phone, communication device, mobile device, device in a motor vehicle, in-vehicle camera, mobile phone camera, sports or wearable camera, traffic camera, industrial inspection camera, camera mounted on a flyable object, medical camera, security camera, or household appliance camera, etc. That is, the image sensor 70 according to the embodiments of the present disclosure can be applied to any of the above-mentioned electronic devices.

[0110] Figure 8 FIG. is a schematic structural diagram of an application embodiment of the electronic device according to the present disclosure. Next, reference will be made to Figure 8 to describe the electronic device according to the embodiments of the present disclosure. The electronic device can be either the first device or the second device, or both, or a stand-alone device independent of them, and the stand-alone device can communicate with the first device and the second device to receive the input signals collected by them.

[0111] As Figure 8 shown, the electronic device includes one or more processors, a memory, and an image sensor. The processor can be a central processing unit (CPU) or other forms of processing units with data processing capabilities and / or instruction execution capabilities, and can control other components in the electronic device, such as the image sensor, to perform desired functions.

[0112] The memory can store one or more computer program products. The memory can include various forms of computer-readable storage media, such as volatile memory and / or non-volatile memory. The volatile memory can include, for example, random access memory (RAM) and / or cache memory, etc. The non-volatile memory can include, for example, read-only memory (ROM), hard disk, flash memory, etc. One or more computer program products can be stored on the computer-readable storage media, and the processor can run the computer instructions to implement the signal processing methods according to the various embodiments of the present disclosure described above and / or other desired functions.

[0113] In one example, the electronic device may further include: an input device and an output device, and these components are interconnected through a bus system and / or other forms of connection mechanisms (not shown). In addition, the input device may include, for example, a keyboard, a mouse, and so on. The output device can output various information to the outside, including the determined distance information, direction information, etc. The output device may include, for example, a display, a speaker, a printer, and a communication network and its connected remote output devices, and so on.

[0114] Of course, for simplicity, Figure 8 only some of the components related to the present disclosure in the electronic device are shown, and components such as a bus, an input / output interface, and so on are omitted. In addition, according to specific application scenarios, the electronic device may further include any other appropriate components.

[0115] The basic principles of the present disclosure have been described above in conjunction with specific embodiments. However, it should be noted that the advantages, benefits, effects, etc. mentioned in the present disclosure are only examples and not limitations, and it cannot be considered that these advantages, benefits, effects, etc. are essential for each embodiment of the present disclosure. In addition, the above-disclosed specific details are only for the purpose of illustration and easy understanding, rather than limitations, and the above details do not limit the present disclosure to necessarily adopt the above specific details to implement.

[0116] Each embodiment in this specification is described in a progressive manner, and the key point of each embodiment is to illustrate the differences from other embodiments. The same or similar parts among the embodiments can be referred to each other.

[0117] The block diagrams of the devices, apparatuses, equipment, and systems involved in the present disclosure are only illustrative examples and do not intend to require or imply that they must be connected, arranged, and configured in the manner shown in the block diagrams. As those skilled in the art will recognize, these devices, apparatuses, equipment, and systems can be connected, arranged, and configured in any manner. Words such as "including", "comprising", "having", etc. are open-ended words, meaning "including but not limited to", and can be used interchangeably with each other. The word "or" and "and" used here refer to the word "and / or", and can be used interchangeably with each other, unless the context clearly indicates otherwise. The word "such as" used here refers to the phrase "such as but not limited to", and can be used interchangeably with each other.

[0118] The device of the present disclosure can be implemented in many ways. For example, the device of the present disclosure can be implemented through software, hardware, firmware, or any combination of software, hardware, and firmware.

[0119] It should also be noted that in the device of the present disclosure, each component can be decomposed and / or recombined. These decompositions and / or recombinations should be regarded as equivalent solutions of the present disclosure.

[0120] The foregoing description of the disclosed aspects is provided to enable any person skilled in the art to make or use the present disclosure. Various modifications to these aspects will be readily apparent to those skilled in the art, and the general principles defined herein may be applied to other aspects without departing from the scope of the present disclosure. Thus, the present disclosure is not intended to be limited to the aspects shown herein, but is to be accorded the widest scope consistent with the principles and novel features disclosed herein.

[0121] The foregoing description has been presented for purposes of illustration and description. Furthermore, this description is not intended to limit the embodiments of the present disclosure to the form disclosed herein. Although several example aspects and embodiments have been discussed above, those skilled in the art will recognize some of their variations, modifications, alterations, additions, and subcombinations.

Claims

1. An image sensor, characterized in that: It includes a pixel unit and a signal readout circuit, wherein the signal readout circuit includes a comparator, a threshold signal output circuit and a timer; The positive input terminal of the comparator is connected to the output terminal of the pixel unit, the negative input terminal of the comparator is connected to the first output terminal of the threshold signal output circuit, and the output terminal of the comparator is respectively connected to the first input terminal of the threshold signal output circuit and the first input terminal of the timer; The first input terminal of the threshold signal output circuit is connected to the output terminal of the comparator, the second input terminal of the threshold signal output circuit is connected to the external processing circuit, the first output terminal of the threshold signal output circuit is connected to the negative input terminal of the comparator, and the second output terminal of the threshold signal output circuit outputs the exposure mode identification information; The first input terminal of the timer is connected to the output terminal of the comparator, and the output terminal of the timer outputs the timing result.

2. The image sensor according to claim 1, characterized in that The second input terminal of the timer is connected to an external clock circuit.

3. The image sensor according to any one of claims 1 to 2, characterized in that: The threshold signal output circuit comprises: an operational amplifier, a constant current power supply, a capacitor, a trigger, a first switch, a second switch, a third switch and a fourth switch; The positive input terminal of the operational amplifier is connected to the reference electrical signal source of the minimum value through the third switch, and is connected to the reference electrical signal source of the maximum value through the fourth switch; the negative input terminal of the operational amplifier is connected to the constant current power supply through the second switch, and is connected to the output terminal of the operational amplifier through the first switch, and is connected to the positive electrode of the capacitor; the output terminal of the operational amplifier is respectively connected to the negative input terminal of the comparator and the negative electrode of the capacitor; The first input terminal of the trigger is connected to a power signal; the second input terminal of the trigger is connected to the output terminal of the comparator; and the output terminal of the trigger outputs a data flag as the exposure mode identification information.

4. The image sensor according to claim 3, characterized in that: The threshold signal output circuit further includes: a first inverter, a second inverter group, an OR logic circuit, a third inverter and a fifth switch; wherein the second inverter group includes 2k+1 second inverters connected in sequence, and the value of k is an integer not less than 0; The input end of the first inverter is used as the second input end of the threshold signal output circuit and is connected to the processing circuit; the output end of the first inverter is connected to the input end of the first second inverter in the second inverter group; The output end of any second inverter in the second inverter group is connected to the input end of the next adjacent second inverter, and the output end of the last second inverter in the second inverter group is connected to the first input end of the OR logic circuit; The second input end of the OR logic circuit is connected to the ground end of the fifth switch, and the output end of the OR logic circuit is connected to the input end of the third inverter; An output terminal of the third inverter is connected to the second switch.

5. The image sensor according to claim 4, characterized in that: The image sensor specifically includes a pixel array formed by arranging the pixel units in m rows and n columns, and m signal readout circuits, each of the signal readout circuits is connected to a row of pixel units in the pixel array, and each of the signal readout circuits is connected to the processing circuit of the corresponding row; or, The image sensor specifically includes a pixel array formed by arranging the pixel units in m rows and n columns, and n signal readout circuits, each of the signal readout circuits is connected to a column of pixel units in the pixel array, and each of the signal readout circuits is connected to the processing circuit of the corresponding column; Wherein, the values ​​of m and n are integers greater than 1 respectively.

6. The image sensor according to claim 5, characterized in that The pixel unit includes: a photodiode, a transfer transistor, a floating diffusion region, a reset transistor, a source follower transistor and a selection transistor; One end of the photodiode is grounded; the other end of the photodiode is connected to one end of the floating diffusion region and the gate end of the source follower transistor respectively through the transfer transistor; The source terminal of the transfer transistor is connected to the other end of the photodiode; the drain terminal of the transfer transistor is respectively connected to one end of the floating diffusion region and the gate terminal of the source follower transistor; the gate terminal of the transfer transistor is connected to the processing circuit; One end of the floating diffusion region is respectively connected to the source end of the reset transistor and the gate end of the source follower transistor, and is connected to the other end of the photodiode through the transfer transistor; the other end of the floating diffusion region is grounded; The source terminal of the reset transistor is connected to one end of the floating diffusion region; the drain terminal of the reset transistor is connected to a power signal; the gate terminal of the reset transistor is connected to the processing circuit; The source terminal of the source follower transistor is connected to the drain terminal of the selection transistor; the drain terminal of the source follower transistor is connected to a power signal; the gate terminal of the source follower transistor is respectively connected to one end of the floating diffusion region and the drain terminal of the transfer transistor; The source terminal of the selection transistor is connected to the input terminal of the signal readout circuit as the output terminal of the pixel unit; the drain terminal of the selection transistor is connected to the source terminal of the source follower transistor; and the gate terminal of the selection transistor is connected to the processing circuit.

7. An electronic device, characterized in that: include: A processor, a memory communicatively connected to the processor, and an image sensor according to any one of claims 1 to 6; The memory is used to store computer instructions; The processor is configured to execute computer instructions stored in the memory to control the image sensor.

8. The device according to claim 7, characterized in that The electronic device includes any one of the following: a pulse camera, a high-speed camera, a visual camera, an audio player, a video player, a navigation device, a fixed-position terminal, an entertainment unit, a smart phone, a communication device, a mobile device, a device in a motor vehicle, a vehicle-mounted camera, a mobile phone camera, a sports or wearable camera, a traffic camera, an industrial inspection camera, a camera mounted on a flying object, a medical camera, a security camera, or a home appliance camera.

Images