Phase-locked zero-cross detection circuit

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By designing a phase-locked zero-crossing detection circuit and using isolated sampling and coupling circuit modules, the problems of high requirements and complexity of traditional circuits for dual power supply are solved, and simplified circuit structure and efficient zero-crossing detection are achieved.

CN222926784UActive Publication Date: 2025-05-30GUANGZHOU NORTHERN LIGHTS NEW ENERGY TECH CO LTD

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Patent Information

Application Number: CN202421333204.2
Authority / Receiving Office: CN · China
Patent Type: Utility models(China)
Current Assignee / Owner
Filing Date: 2024-06-12
Publication Date: 2025-05-30
Estimated Expiration: 2034-06-12

AI Technical Summary

Technical Problem

Traditional zero-crossing detection circuits have high requirements for dual power supplies, high circuit complexity, and require voltage increase.

Method used

A phase-locked zero-crossing detection circuit is designed, including an isolated sampling circuit module, a coupling circuit module and a zero-crossing detection circuit module. The phase difference and voltage adjustment of the signal are realized through voltage transformers and adjustable resistors, reducing the requirements for dual power supplies.

Benefits of technology

The zero-crossing detection of sinusoidal signals is realized, the requirements for dual power supply are reduced, the circuit structure is simplified, and the detection is completed with only one NE555DR chip, and the phase of the zero-crossing pulse can be adjusted.

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Abstract

The utility model discloses and provides a phase-locked zero-cross detection circuit, including: isolation sampling circuit module, coupling circuit module and zero-cross detection circuit module, isolation sampling circuit module one end accesses AC voltage for adjusting access AC voltage, coupling circuit module is connected with the other end of isolation sampling circuit module, and zero-cross detection circuit module is connected with the other end of isolation sampling circuit module for adjusting access AC voltage. The coupling circuit module generates a phase difference between a sinusoidal signal output by the isolation sampling circuit module and a sinusoidal signal of an actual power grid, and the zero-cross detection circuit module is connected with the coupling circuit module and is used for zero-cross detection of the sinusoidal signal. According to the utility model, through cooperation of the isolation sampling circuit module, the coupling circuit module and the zero-cross detection circuit module, requirements on dual power supplies can be reduced, voltage does not need to be raised, zero-cross detection of sinusoidal signals can be realized only through one NE555DR chip, 7-pin can be pulled up, IO level conversion can be realized, and circuit complexity is reduced.

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Description

Technical Field

[0001] The present disclosure relates to the technical field of zero-crossing detection circuits, and in particular, to a phase-locked zero-crossing detection circuit. Background Art

[0002] A hardware zero-crossing detection circuit is a common circuit in an electronic system, which is used to detect the moment when an alternating current signal passes through zero during the conversion from the positive half-cycle to the negative half-cycle. In the sampling circuit part of the traditional zero-crossing detection circuit, a differential attenuation circuit or a voltage transformer is used. The sine wave output by it needs to be processed by an operational amplifier with positive and negative power supplies, or a reference voltage is used to boost the signal voltage so that the sine wave is within the range of VCC - GND. Then, zero-crossing detection is performed, and usually a triode circuit is used at the output of the operational amplifier to improve the integrity of the zero-crossing signal.

[0003] The traditional zero-crossing detection circuit has relatively high requirements for dual power supplies, and it is necessary to boost the voltage, resulting in a relatively high circuit complexity. Utility Model Content

[0004] The present disclosure provides a phase-locked zero-crossing detection circuit to solve one of the technical problems recognized by the inventors.

[0005] The present disclosure provides a phase-locked zero-crossing detection circuit, including: an isolation sampling circuit module, a coupling circuit module, and a zero-crossing detection circuit module. One end of the isolation sampling circuit module is connected to an AC voltage for adjusting the input AC voltage. The coupling circuit module is connected to the other end of the isolation sampling circuit. The coupling circuit module generates a phase difference between the sine signal output by the isolation sampling circuit module and the sine signal of the actual power grid. The zero-crossing detection circuit module is connected to the coupling circuit module for detecting the zero-crossing of the sine signal.

[0006] Preferably, the isolation sampling circuit module includes a voltage transformer L1, a current-limiting resistor R1, a buffer capacitor C1, and a load resistor R2. One end of the voltage transformer is connected to an AC voltage through the current-limiting resistor R1, and the other end is connected in parallel with the capacitor C1 and the load resistor R2.

[0007] Preferably, the coupling circuit module includes a variable resistor PR1 and a capacitor C2. One end of the variable resistor PR1 is connected to one end of the buffer capacitor C1 and the load resistor R2. The other end of the variable resistor PR1 is connected to one end of the capacitor C2. The other end of the capacitor C2 is connected to one end of the variable resistor PR1 and the capacitor C2 respectively.

[0008] Preferably, a capacitor C3 is provided between the variable resistor PR1 and the zero-crossing detection circuit module.

[0009] Preferably, the zero-crossing detection circuit module includes a chip U1. The second pin of the chip U1 is connected to one end of the capacitor C3. The second pin of the chip U1 is connected with resistors R3, R4, R5, R6, R7, and R8. Among them, the resistors R3, R4, R8, and R7 are connected in series in turn. The resistors R5 and R6 are connected in series. One end of the resistor R6 is connected to the sixth pin of the chip U1. The end of the resistor R6 close to the sixth pin of the chip U1 is connected between the resistor R8 and the resistor R7. The seventh pin of the chip U1 is connected with a resistor R9. The third pin of the chip U1 is connected with a resistor R11. One end of the resistor R11 is connected with resistors R10 and R12. One end of the resistor R10 is connected to the seventh pin of the chip. One end of the resistor R12 is connected with a capacitor C6. The eighth pin and the fourth pin of the chip U1 are connected, and the eighth pin and the fourth pin of the chip U1 are connected with a capacitor C4.

[0010] Preferably, the model of the chip U1 is NE555DR.

[0011] Preferably, the resistance value of the resistor R3 is 75KΩ, the resistance value of the resistor R4 is 200KΩ, the resistance value of the resistor R5 is 300KΩ, the resistance value of the resistor R6 is 4.7KΩ, the resistance value of the resistor R7 is 120KΩ, and the resistance value of the resistor R8 is 560KΩ.

[0012] Preferably, the resistance value of the current-limiting resistor R1 is 200KΩ, and the resistance value of the load resistor R2 is 1KΩ.

[0013] The beneficial effects of the present disclosure mainly lie in that: through the cooperation of the isolation sampling circuit module, the coupling circuit module, and the zero-crossing detection circuit module, the present utility model can reduce the requirements for a dual power supply, and there is no need to boost the voltage. Only one NE555DR chip can be used to realize the zero-crossing detection of a sine signal, and the 7-pin can be pulled up to realize the conversion of the IO level, reducing the circuit complexity.

[0014] The present utility model can realize the phase lead or lag of the zero-crossing pulse by adjusting the resistance value of the adjustable resistor PR1 in the coupling circuit module.

[0015] It should be understood that both the foregoing general description and the following detailed description are for the purpose of illustration and example and are not necessarily restrictive of the present disclosure. The accompanying drawings incorporated in and constituting a part of the specification illustrate the subject matter of the present disclosure. At the same time, the specification and the drawings are used to explain the principles of the present disclosure. BRIEF DESCRIPTION OF THE DRAWINGS

[0016] To more clearly illustrate the specific embodiments of the present disclosure or the technical solutions in the prior art, the following will briefly introduce the accompanying drawings required for the description of the specific embodiments or the prior art. Obviously, the accompanying drawings in the following description are some embodiments of the present disclosure. For those of ordinary skill in the art, without creative efforts, other accompanying drawings can also be obtained based on these drawings.

[0017] Figure 1 It is the phase-locked zero-crossing detection circuit diagram of the embodiment of the present disclosure;

[0018] Figure 2 It is the circuit schematic diagram of chip U1 of the embodiment of the present disclosure;

[0019] Icon: 1 - Isolation sampling circuit module; 2 - Coupling circuit module; 3 - Zero-crossing detection circuit module. Specific embodiments

[0020] The following will clearly and completely describe the technical solutions of the present disclosure in conjunction with the accompanying drawings. Obviously, the described embodiments are some embodiments of the present disclosure, rather than all embodiments.

[0021] Based on the embodiments in the present disclosure, all other embodiments obtained by those of ordinary skill in the art without creative efforts belong to the scope of protection of the present disclosure.

[0022] In the description of the present disclosure, it should be noted that the orientation or positional relationship indicated by the terms "center", "upper", "lower", "left", "right", "vertical", "horizontal", "inner", "outer", etc. is based on the orientation or positional relationship shown in the accompanying drawings. It is only for the convenience of describing the present disclosure and simplifying the description, rather than indicating or implying that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation, and therefore cannot be understood as a limitation of the present disclosure. In addition, the terms "first", "second", "third" are only used for descriptive purposes and cannot be understood as indicating or implying relative importance.

[0023] In the description of the present disclosure, it should be noted that unless otherwise clearly specified and limited, the terms "installation", "connection", "connection" should be understood in a broad sense. For example, it can be a fixed connection, a detachable connection, or an integral connection; it can be a mechanical connection or an electrical connection; it can be directly connected or indirectly connected through an intermediate medium, and it can be the internal connection of two components. For those of ordinary skill in the art, the specific meanings of the above terms in the present disclosure can be understood according to specific situations.

[0024] Embodiment

[0025] Such as Figure 1-2As shown in the figure, this embodiment provides a phase-locked zero-crossing detection circuit, including: an isolation sampling circuit module 1, a coupling circuit module 2, and a zero-crossing detection circuit module 3. One end of the isolation sampling circuit module 1 is connected to an AC voltage and is used to adjust the input AC voltage. The coupling circuit module 2 is connected to the other end of the isolation sampling circuit. The coupling circuit module 2 generates a phase difference between the sine signal output by the isolation sampling circuit module 1 and the sine signal of the actual power grid. The zero-crossing detection circuit module 3 is connected to the coupling circuit module 2 and is used for zero-crossing detection of the sine signal.

[0026] Specifically, the isolation sampling circuit module 1 includes a voltage transformer L1, a current-limiting resistor R1, a buffer capacitor C1, and a load resistor R2. One end of the voltage transformer is connected to an AC voltage through the current-limiting resistor R1, and the other end is connected in parallel with the capacitor C1 and the load resistor R2. With the voltage transformer L1 as the core, since the turns ratio of the voltage transformer is fixed, the output voltage across the load resistor R2 can be adjusted by adjusting the current-limiting resistor R1. In this embodiment, the turns ratio of the current transformer is 1:1, the resistance value of the current-limiting resistor R1 is 200 KΩ, and the resistance value of the load resistor R2 is 1 KΩ. When 220 V AC power is connected, the peak current flowing through the primary side (the end connected to the current-limiting resistor R1) of the voltage transformer L1 is approximately 1.56 mA, and the peak voltage coupled by the secondary side of the current transformer L1 is approximately 1.56 V.

[0027] Specifically, the coupling circuit module 2 includes a variable resistor PR1 and a capacitor C2. One end of the variable resistor PR1 is connected to one end of the buffer capacitor C1 and the load resistor R2. The other end of the variable resistor PR1 is connected to one end of the capacitor C2. The other end of the capacitor C2 is connected to one end of the variable resistor PR1 and the capacitor C2 respectively. By adjusting the resistance value of the variable resistor PR1, the charge and discharge time of the capacitor C2 is changed, so that a phase difference is generated between the sine signal output by the voltage transformer L1 and the sine signal of the actual AC power grid. The phase-shifted sine signal is coupled to the zero-crossing detection circuit module 3 through the capacitor C3 for processing.

[0028] Further, a capacitor C3 is provided between the variable resistor PR1 and the zero-crossing detection circuit module 3. The capacitor C3 can isolate the influence of DC signals on the chip U1.

[0029] Specifically, the zero-crossing detection circuit module 3 includes a chip U1. The second pin of the chip U1 is connected to one end of the capacitor C3. Resistors R3, R4, R5, R6, R7, and R8 are connected to the second pin of the chip U1. Among them, the resistors R3, R4, R8, and R7 are connected in series in sequence, the resistors R5 and R6 are connected in series, one end of the resistor R6 is connected to the sixth pin of the chip U1, and the end of the resistor R6 close to the sixth pin of the chip U1 is connected between the resistor R8 and the resistor R7. A resistor R9 is connected to the seventh pin of the chip U1, a resistor R11 is connected to the third pin of the chip U1, one end of the resistor R11 is connected to resistors R10 and R12, one end of the resistor R10 is connected to the seventh pin of the chip, one end of the resistor R12 is connected to a capacitor C6, the eighth pin and the fourth pin of the chip U1 are connected, and a capacitor C4 is connected to the eighth pin and the fourth pin of the chip U1.

[0030] In this embodiment, the model of the chip U1 is NE555DR. This circuit module is set around the second pin input Trigger and the sixth pin input Threshold of the chip U1.

[0031] Among them, the resistance value of the resistor R3 is 75 KΩ, the resistance value of the resistor R4 is 200 KΩ, the resistance value of the resistor R5 is 300 KΩ, the resistance value of the resistor R6 is 4.7 KΩ, the resistance value of the resistor R7 is 120 KΩ, and the resistance value of the resistor R8 is 560 KΩ.

[0032] When no sinusoidal signal is coupled to the capacitor C3, the voltage on the second pin Trigger is about 1.66 V, and the voltage on the sixth pin Threshold is about 3.51 V. At this time, the third pin ZCP outputs a high level, and the chip U1 is in a stable state.

[0033] When the capacitor C3 couples a sinusoidal signal, the sine peak voltage on the second pin Trigger is 3.22 V, the effective value is 1.66 V, and the sine peak voltage on the sixth pin Threshold is 3.8 V, and the effective value is 3.5 V.

[0034] As Figure 2 shown, Figure 2 is the internal circuit structure of the chip U1. The NE555DR chip is a prior art, and its specific structure and working principle will not be elaborated in detail here. When the voltage of the sixth pin Threshold is greater than the internal reference voltage 2 / 3VCC, the comparator A outputs a high level. When the second pin Trigger is greater than the internal reference voltage 1 / 3VCC, the comparator B outputs a low level. At this time, the third pin ZCP outputs a low level for use by the subsequent circuit.

[0035] When the threshold voltage of the sixth pin is less than 2 / 3VCC of the internal reference voltage, the comparator A outputs a low level. When the trigger of the second pin is less than 1 / 3VCC of the internal reference voltage, the comparator B outputs a high level. At this time, the third pin ZCP outputs a high level for use by the subsequent circuit.

[0036] The utility model can adapt to the AC frequency, and can adjust the zero-crossing pulse position of the output by adjusting the adjustable resistor PR1 to realize the phase lead or lag of the output pulse. This circuit is used in a grid-connected inverter to detect the frequency and zero-crossing point of the AC input.

[0037] Finally, it should be noted that: the above embodiments are only used to illustrate the technical solutions of the present disclosure, rather than to limit them; although the present disclosure has been described in detail with reference to the foregoing embodiments, those of ordinary skill in the art should understand that: they can still modify the technical solutions recorded in the foregoing embodiments, or perform equivalent replacements on some or all of the technical features; and these modifications or replacements do not cause the essence of the corresponding technical solutions to deviate from the scope of the technical solutions of the embodiments of the present disclosure.

Claims

1. A phase-locked zero-crossing detection circuit, characterized in that: include: An isolation sampling circuit module, a coupling circuit module and a zero-crossing detection circuit module, wherein one end of the isolation sampling circuit module is connected to an AC voltage for adjusting the connected AC voltage, the coupling circuit module is connected to the other end of the isolation sampling circuit, the coupling circuit module generates a phase difference between the sinusoidal signal output by the isolation sampling circuit module and the sinusoidal signal of the actual power grid, and the zero-crossing detection circuit module is connected to the coupling circuit module for zero-crossing detection of the sinusoidal signal.

2. A phase-locked zero-crossing detection circuit according to claim 1, characterized in that: The isolated sampling circuit module includes a voltage transformer L1, a current limiting resistor R1, a buffer capacitor C1 and a load resistor R2. One end of the voltage transformer is connected to an AC voltage through the current limiting resistor R1, and the other end is connected in parallel with the capacitor C1 and the load resistor R2.

3. A phase-locked zero-crossing detection circuit according to claim 2, characterized in that: The coupling circuit module includes an adjustable resistor PR1 and a capacitor C2, one end of the adjustable resistor PR1 is connected to the buffer capacitor C1 and one end of the load resistor R2, the other end of the adjustable resistor PR1 is connected to one end of the capacitor C2, and the other end of the capacitor C2 is respectively connected to one end of the adjustable resistor PR1 and one end of the capacitor C2.

4. A phase-locked zero-crossing detection circuit according to claim 3, characterized in that: A capacitor C3 is provided between the adjustable resistor PR1 and the zero-crossing detection circuit module.

5. A phase-locked zero-crossing detection circuit according to claim 4, characterized in that: The zero-crossing detection circuit module includes a chip U1, a second pin of the chip U1 is connected to one end of the capacitor C3, the second pin of the chip U1 is connected to resistors R3, R4, R5, R6, R7, and R8, wherein the resistors R3, R4, R8, and R7 are connected in series in sequence, the resistors R5 and R6 are connected in series, one end of the resistor R6 is connected to the sixth pin of the chip U1, one end of the resistor R6 close to the sixth pin of the chip U1 is connected between the resistor R8 and the resistor R7, the seventh pin of the chip U1 is connected to a resistor R9, the third pin of the chip U1 is connected to a resistor R11, one end of the resistor R11 is connected to resistors R10 and R12, one end of the resistor R10 is connected to the seventh pin of the chip, one end of the resistor R12 is connected to a capacitor C6, the eighth pin of the chip U1 is connected to the fourth pin, and the eighth pin of the chip U1 is connected to the fourth pin. Capacitor C4 is connected.

6. A phase-locked zero-crossing detection circuit according to claim 5, characterized in that: The model of the chip U1 is NE555DR.

7. A phase-locked zero-crossing detection circuit according to claim 5, characterized in that: The resistance value of the resistor R3 is 75KΩ, the resistance value of the resistor R4 is 200KΩ, the resistance value of the resistor R5 is 300KΩ, the resistance value of the resistor R6 is 4.7KΩ, the resistance value of the resistor R7 is 120KΩ, and the resistance value of the resistor R8 is 560KΩ.

8. A phase-locked zero-crossing detection circuit according to claim 2, characterized in that: The resistance value of the current limiting resistor R1 is 200KΩ, and the resistance value of the load resistor R2 is 1KΩ.