Signal processing circuit and induction type high-voltage live display locking device

Abstract

The utility model relates to the technical field of inductive high-voltage live display, in particular to a signal processing circuit and an inductive high-voltage live display locking device, which comprise an amplifier U3A, a blocking capacitor C3, a resistor R10, a blocking capacitor C4, a resistor R1, a useful signal identification module, a low-frequency interference signal identification module and a high-frequency interference signal identification module. Useful signals, low-frequency interference signals and high-frequency interference signals can be correctly and quickly identified, so that when the useful signals, the low-frequency interference signals and the high-frequency interference signals are sent to the main control chip for AD sampling analysis and signal size judgment, the program judgment amount of the main control chip can be reduced, and the service life of the main control chip is prolonged.

Description

Technical Field

[0001] The utility model relates to the technical field of inductive high-voltage live display, and particularly relates to a signal processing circuit and an inductive high-voltage live display and locking device. Background Art

[0002] On indoor and outdoor electrical equipment or networks of 10kV - 35KV, at places such as line earthing switches, bus earthing switches, and bus voltage transformer earthing switches, it is usually necessary to install high-voltage live display devices to prevent the misclosing of earthing switches when the equipment is live. High-voltage live display devices are generally installed on incoming busbars, circuit breakers, main transformers, switch cabinets, GIS combined electrical appliances, and other places where it is necessary to display whether the equipment is live, to prevent electrical misoperations. High-voltage live display devices must comply with the standard of the Electric Power Industry Standard DL / T538 - 2006 "High-voltage Live Display Devices" of the People's Republic of China. The existing high-voltage live display devices on the market basically do not have the ability to process and process multiple frequency signals, and cannot correctly identify useful signals and interference signals, which brings difficulties in troubleshooting and maintenance to operation and maintenance personnel. Content of the Utility Model

[0003] The technical problem to be solved by the utility model is to provide a signal processing circuit and an inductive high-voltage live display and locking device that can correctly and quickly identify useful signals, low-frequency interference signals, and high-frequency interference signals.

[0004] To solve the above technical problem, a technical solution adopted by the utility model is as follows:

[0005] A signal processing circuit includes an amplifier U3A, a DC-blocking capacitor C3, a resistor R10, a DC-blocking capacitor C4, a resistor R1, a useful signal identification module, a low-frequency interference signal identification module, and a high-frequency interference signal identification module. The inverting input terminal of the amplifier U3A is electrically connected to one end of the DC-blocking capacitor C4 and one end of the resistor R1 respectively. The other end of the capacitor C4 is electrically connected to one end of the resistor R10. The other end of the resistor R10 is electrically connected to one end of the capacitor C3. The other end of the capacitor C3 is electrically connected to an external inductive sensor. The output terminal of the amplifier U3A is electrically connected to the other end of the resistor R1, the useful signal identification module, the low-frequency interference signal identification module, and the high-frequency interference signal identification module respectively.

[0006] Further, the useful signal recognition module includes a DC-blocking capacitor C5, a filter follower U3B, and a DC-blocking capacitor C6. One end of the capacitor C5 is electrically connected to the other end of the resistor R1, the output end of the amplifier U3A, the low-frequency interference signal recognition module, and the high-frequency interference signal recognition module respectively. The other end of the capacitor C5 is electrically connected to the inverting input end of the filter follower U3B. The non-inverting input end of the filter follower U3B is electrically connected to the output end of the filter follower U3B and one end of the capacitor C6 respectively.

[0007] Further, the useful signal recognition module further includes a resistor R11. One end of the resistor R11 is electrically connected to the other end of the capacitor C6, and the other end of the resistor R11 is grounded.

[0008] Further, the low-frequency interference signal recognition module includes a first low-pass filtering unit, a filter follower U3C, and a DC-blocking capacitor C13. The first low-pass filtering unit is electrically connected to the useful signal recognition module, the high-frequency interference signal recognition module, the output end of the amplifier U3A, the inverting input end of the filter follower U3C, and the other end of the resistor R1 respectively. The non-inverting input end of the filter follower U3C is electrically connected to one end of the capacitor C13 and the output end of the filter follower U3C respectively.

[0009] Further, the low-frequency interference signal recognition module further includes a resistor R15. One end of the resistor R15 is electrically connected to the other end of the capacitor C13, and the other end of the resistor R15 is grounded.

[0010] Further, the high-frequency interference signal recognition module includes a second low-pass filtering unit, a filter follower U3B, and a DC-blocking capacitor C16. The second low-pass filtering unit is electrically connected to the inverting input end of the filter follower U3D, the low-frequency interference signal recognition module, the useful signal recognition module, the output end of the amplifier U3D, and the other end of the resistor R1 respectively. The non-inverting input end of the filter follower U3D is electrically connected to one end of the capacitor C16 and the output end of the filter follower U3D respectively.

[0011] Further, the high-frequency interference signal recognition module further includes a resistor R17. One end of the resistor R17 is electrically connected to the other end of the capacitor C16, and the other end of the resistor R17 is grounded.

[0012] Further, a diode D1 and a diode D2 are further included. The cathode of the diode D1 is electrically connected to one end of the resistor R10, the anode of the diode D2, and the other end of the capacitor C4 respectively. The anode of the diode D1 and the cathode of the diode D2 are both grounded.

[0013] Further, it further includes a resistor R13 and a resistor R14. One end of the resistor R13 is connected to a power supply, the other end of the resistor R13 is electrically connected to the positive input terminal of an amplifier U3A and one end of the resistor R14 respectively, and the other end of the resistor R14 is connected to the power supply.

[0014] Another technical solution adopted by the present utility model is as follows:

[0015] An inductive high-voltage live display and locking device includes a high-voltage signal live state indication circuit, a main control circuit, a drive and amplification circuit, and the above-mentioned signal processing circuit. The main control circuit is electrically connected to the output terminal of a useful signal recognition module, the output terminal of a low-frequency interference signal recognition module, the output terminal of a high-frequency interference signal recognition module, and the input terminal of the drive and amplification circuit respectively. The output terminal of the drive and amplification circuit is electrically connected to the input terminal of the high-voltage signal live state indication circuit.

[0016] The beneficial effects of the present utility model are as follows:

[0017] The signal processing circuit of this solution includes an amplifier U3A, a DC-blocking capacitor C3, a resistor R10, a DC-blocking capacitor C4, a resistor R1, a useful signal recognition module, a low-frequency interference signal recognition module, and a high-frequency interference signal recognition module. The DC-blocking capacitor C3 is a first-stage DC-blocking capacitor, which can filter out the signal containing a DC component in the input signal; the DC-blocking capacitor C4 is a second-stage DC-blocking capacitor, which can filter out more thoroughly the signal of the DC component that cannot be filtered out by the capacitor C3 in the input signal; the amplifier U3A can amplify the signal, and the resistors R10 and R1 form the magnification of the amplification circuit; when the input signal is the signal voltage sensed by a normal sensor, the useful signal is recognized through the useful signal recognition module; when the input signal is a low-frequency interference signal, the low-frequency interference signal is recognized through the low-frequency interference signal recognition module; when the input signal is a high-frequency interference signal, the high-frequency interference signal is recognized through the high-frequency interference signal recognition module, so that the useful signal, the low-frequency interference signal, and the high-frequency interference signal can be correctly and quickly recognized. In this way, when the useful signal, the low-frequency interference signal, and the high-frequency interference signal are sent to the main control chip for AD sampling and analysis to determine the signal magnitude, the program judgment amount of the main control chip can be reduced, and its service life can be extended. Description of the Drawings

[0018] Figure 1 It is the circuit schematic diagram of the signal processing circuit of phase A of the present utility model;

[0019] Figure 2 It is the circuit schematic diagram of the signal processing circuit of phase B of the present utility model;

[0020] Figure 3 It is the circuit schematic diagram of the signal processing circuit of phase C of the present utility model;

[0021] Figure 4 It is the connection block diagram of the inductive high-voltage live display and locking device of the present utility model;

[0022] Figure 5 It is the circuit schematic diagram of the main control circuit and the drive and amplification circuit of the inductive high-voltage live display and locking device of the present utility model;

[0023] Figure 6 It is the circuit schematic diagram of the high-voltage signal live state indication circuit of the inductive high-voltage live display and locking device of the present utility model;

[0024] Label description:

[0025] 1. Signal processing circuit; 101. Useful signal recognition module; 102. Low-frequency interference signal recognition module; 103. High-frequency interference signal recognition module; 2. High-voltage signal live state indication circuit; 3. Main control circuit; 4. Drive and amplification circuit. Specific implementation mode

[0026] To describe in detail the technical content, achieved purpose and effect of the present utility model, the following is described in conjunction with the implementation mode and with reference to the drawings.

[0027] Please refer to Figure 1 , the first technical solution adopted by the present utility model is:

[0028] A signal processing circuit, including an amplifier U3A, a DC blocking capacitor C3, a resistor R10, a DC blocking capacitor C4, a resistor R1, a useful signal recognition module, a low-frequency interference signal recognition module and a high-frequency interference signal recognition module. The inverting input terminal of the amplifier U3A is electrically connected to one end of the DC blocking capacitor C4 and one end of the resistor R1 respectively. The other end of the capacitor C4 is electrically connected to one end of the resistor R10. The other end of the resistor R10 is electrically connected to one end of the capacitor C3. The other end of the capacitor C3 is electrically connected to an external inductive sensor. The output terminal of the amplifier U3A is electrically connected to the other end of the resistor R1, the useful signal recognition module, the low-frequency interference signal recognition module and the high-frequency interference signal recognition module respectively.

[0029] From the above description, it can be seen that the beneficial effect of the present utility model is:

[0030] The signal processing circuit of this solution includes amplifier U3A, DC-blocking capacitor C3, resistor R10, DC-blocking capacitor C4, resistor R1, a useful signal recognition module, a low-frequency interference signal recognition module, and a high-frequency interference signal recognition module. The DC-blocking capacitor C3 is a primary DC-blocking capacitor, which can filter out the signal containing DC components in the input signal; the DC-blocking capacitor C4 is a secondary DC-blocking capacitor, which can more thoroughly filter out the signal of the DC component that the capacitor C3 cannot filter out in the input signal; the amplifier U3A can amplify the signal, and the resistors R10 and R1 form the amplification circuit multiple; when the input signal is the signal voltage from a normal sensor, the useful signal recognition module is used to recognize the useful signal; when the input signal is a low-frequency interference signal, the low-frequency interference signal recognition module is used to recognize the low-frequency interference signal; when the input signal is a high-frequency interference signal, the high-frequency interference signal recognition module is used to recognize the high-frequency interference signal, so that the useful signal, low-frequency interference signal, and high-frequency interference signal can be correctly and quickly recognized. In this way, when the useful signal, low-frequency interference signal, and high-frequency interference signal are sent to the main control chip for AD sampling and analysis to determine the signal size, the program judgment amount of the main control chip can be reduced, and its service life can be extended.

[0031] Further, the useful signal recognition module includes a DC-blocking capacitor C5, a filter follower U3B, and a DC-blocking capacitor C6. One end of the capacitor C5 is electrically connected to the other end of the resistor R1, the output end of the amplifier U3A, the low-frequency interference signal recognition module, and the high-frequency interference signal recognition module respectively. The other end of the capacitor C5 is electrically connected to the inverting input end of the filter follower U3B. The non-inverting input end of the filter follower U3B is electrically connected to the output end of the filter follower U3B and one end of the capacitor C6 respectively.

[0032] From the above description, when the A-phase signal voltage is the signal voltage from a normal sensor, the signal voltage frequency is 50Hz - 60Hz at this time. The DC-blocking capacitor C5 is a primary DC-blocking capacitor after signal amplification, which can filter out the signal of the DC component in the amplified signal; the filter follower U3B can output the signal completely, preventing distortion and being unable to drive the impedance of the subsequent circuit; the DC-blocking capacitor C6 is a secondary DC-blocking capacitor after signal amplification, which can more thoroughly filter out the signal of the DC component that the first-stage DC-blocking capacitor after signal amplification cannot filter out; V1CG is the amplified waveform signal transmitted from a normal sensor, which is sent to the main control chip for AD sampling and analysis to determine the signal size.

[0033] Further, the useful signal recognition module also includes a resistor R11. One end of the resistor R11 is electrically connected to the other end of the capacitor C6, and the other end of the resistor R11 is grounded.

[0034] From the above description, the resistor R11 is a ground matching resistor, which can improve the voltage waveform and transmit it more smoothly.

[0035] Further, the low-frequency interference signal identification module includes a first low-pass filtering unit, a filtering follower U3C, and a DC-blocking capacitor C13. The first low-pass filtering unit is electrically connected to the useful signal identification module, the high-frequency interference signal identification module, the output end of the amplifier U3A, the inverting input end of the filtering follower U3C, and the other end of the resistor R1 respectively. One end of the positive input end of the filtering follower U3C is electrically connected to one end of the capacitor C13 and the output end of the filtering follower U3C respectively.

[0036] As can be seen from the above description, when the A-phase signal voltage is a low-frequency interference signal, the interference signal frequency is lower than 50 Hz at this time. The interference signal with a frequency lower than 50 Hz can be selected by the first low-pass filtering unit, and through the filtering follower U3C, the signal can be output completely to prevent distortion and inability to drive the impedance of the subsequent circuit. The DC-blocking capacitor C13 is a DC-blocking capacitor for outputting the low-frequency interference signal, which can filter out the signal of the DC component that cannot be filtered by the first-stage DC-blocking capacitor more thoroughly. DITONG_A is the amplified waveform signal transmitted by the low-frequency interference signal, which is sent to the main control chip for AD sampling analysis to determine the signal magnitude and identify the low-frequency interference signal.

[0037] Further, the low-frequency interference signal identification module further includes a resistor R15. One end of the resistor R15 is electrically connected to the other end of the capacitor C13, and the other end of the resistor R15 is grounded.

[0038] As can be seen from the above description, the resistor R15 is a ground matching resistor, which can improve the voltage waveform and transmit it more smoothly.

[0039] Further, the high-frequency interference signal identification module includes a second low-pass filtering unit, a filtering follower U3B, and a DC-blocking capacitor C16. The second low-pass filtering unit is electrically connected to the inverting input end of the filtering follower U3D, the low-frequency interference signal identification module, the useful signal identification module, the output end of the amplifier U3D, and the other end of the resistor R1 respectively. One end of the positive input end of the filtering follower U3D is electrically connected to one end of the capacitor C16 and the output end of the filtering follower U3D respectively.

[0040] As can be seen from the above description, when the A-phase signal voltage is a high-frequency interference signal, the interference signal frequency is higher than 60 Hz at this time. The second low-pass filtering unit selects the interference signal with a frequency higher than 60 Hz, and through the filtering follower U3D, the signal is output completely to prevent distortion and inability to drive the impedance of the subsequent circuit. The DC-blocking capacitor C16 is a DC-blocking capacitor for outputting the high-frequency interference signal, which can filter out the signal of the DC component that cannot be filtered by the first-stage DC-blocking capacitor more thoroughly. GAOTONG_A is the amplified waveform signal transmitted by the high-frequency interference signal, which is sent to the main control chip for AD sampling analysis to determine the signal magnitude and identify the high-frequency interference signal.

[0041] Further, the high-frequency interference signal recognition module further includes a resistor R17. One end of the resistor R17 is electrically connected to the other end of a capacitor C16, and the other end of the resistor R17 is grounded.

[0042] As can be seen from the above description, the resistor R17 is a ground matching resistor, which can improve the voltage waveform and enable more stable transmission.

[0043] Further, it further includes a diode D1 and a diode D2. The cathode of the diode D1 is electrically connected to one end of a resistor R10, the anode of the diode D2, and the other end of a capacitor C4 respectively, and the anodes of the diode D1 and the diode D2 are both grounded.

[0044] As can be seen from the above description, the diode D1 and the diode D2 constitute a positive and negative voltage regulator, which can prevent the subsequent circuit from being broken down by excessive external signals.

[0045] Further, it further includes a resistor R13 and a resistor R14. One end of the resistor R13 is connected to the power supply. The other end of the resistor R13 is electrically connected to the non-inverting input terminal of an amplifier U3A and one end of the resistor R14 respectively, and the other end of the resistor R14 is connected to the power supply.

[0046] As can be seen from the above description, the resistor R13 and the resistor R14 constitute a voltage dividing unit, where the voltage of Vref_A = R13 / (R13 + R14) * VCC = 2.5V, where VCC is the system voltage of 5V; the DC offset of the signal can be set to 2.5V through the voltage of Vref_A, ensuring that the A-phase signal output can display all waveform signals within the range of 0 - 5V.

[0047] Please refer to Figure 4 , the second technical solution adopted by the present invention is:

[0048] An inductive high-voltage live display and locking device includes a high-voltage signal live state indication circuit, a main control circuit, a drive and amplification circuit, and the above-mentioned signal processing circuit. The main control circuit is electrically connected to the output terminal of the useful signal recognition module, the output terminal of the low-frequency interference signal recognition module, the output terminal of the high-frequency interference signal recognition module, and the input terminal of the drive and amplification circuit respectively, and the output terminal of the drive and amplification circuit is electrically connected to the input terminal of the high-voltage signal live state indication circuit.

[0049] As can be seen from the above description, the beneficial effects of the present invention are:

[0050] In this solution, a high-voltage signal live state indication circuit, a main control circuit, a drive amplification circuit, and the above-mentioned signal processing circuit are set up. The main control circuit is electrically connected to the output terminals of the useful signal recognition module, the low-frequency interference signal recognition module, the high-frequency interference signal recognition module, and the input terminal of the drive amplification circuit respectively. The output terminal of the drive amplification circuit is electrically connected to the input terminal of the high-voltage signal live state indication circuit. The high-voltage signal live state indication circuit is used to indicate the three-phase high-voltage state and the device power supply live state. The main control circuit is used for signal processing and recognition. The drive amplification circuit is used to drive a larger current to ensure that the indicator light can be displayed normally. The signal processing circuit is used for useful signal recognition and amplification processing, and is responsible for the recognition and signal processing of non-power frequency interference signals.

[0051] Please refer to Figure 1 As shown in the figure, Embodiment 1 of the present utility model is as follows:

[0052] Please refer to Figure 1 A signal processing circuit includes an amplifier U3A, a DC blocking capacitor C3, a resistor R10, a DC blocking capacitor C4, a resistor R1, a useful signal recognition module 101, a low-frequency interference signal recognition module 102, and a high-frequency interference signal recognition module 103. The inverting input terminal of the amplifier U3A is electrically connected to one end of the DC blocking capacitor C4 and one end of the resistor R1 respectively. The other end of the capacitor C4 is electrically connected to one end of the resistor R10. The other end of the resistor R10 is electrically connected to one end of the capacitor C3. The other end of the capacitor C3 is electrically connected to an external inductive sensor. The output terminal of the amplifier U3A is electrically connected to the other end of the resistor R1, the useful signal recognition module 101, the low-frequency interference signal recognition module 102, and the high-frequency interference signal recognition module 103 respectively.

[0053] Please refer to Figure 1 The useful signal recognition module 101 includes a DC blocking capacitor C5, a filter follower U3B, and a DC blocking capacitor C6. One end of the capacitor C5 is electrically connected to the other end of the resistor R1, the output terminal of the amplifier U3A, the low-frequency interference signal recognition module 102, and the high-frequency interference signal recognition module 103 respectively. The other end of the capacitor C5 is electrically connected to the inverting input terminal of the filter follower U3B. The non-inverting input terminal of the filter follower U3B is electrically connected to the output terminal of the filter follower U3B and one end of the capacitor C6 respectively.

[0054] Please refer to Figure 1 The useful signal recognition module 101 further includes a resistor R11. One end of the resistor R11 is electrically connected to the other end of the capacitor C6, and the other end of the resistor R11 is grounded.

[0055] Please refer to Figure 1, the low-frequency interference signal recognition module 102 includes a first low-pass filter unit, a filter follower U3C, and a blocking capacitor C13. The first low-pass filter unit is electrically connected to the useful signal recognition module 101, the high-frequency interference signal recognition module 103, the output terminal of the amplifier U3A, the inverting input terminal of the filter follower U3C, and the other end of the resistor R1. The non-inverting input terminal of the filter follower U3C is electrically connected to one end of the capacitor C13 and the output terminal of the filter follower U3C.

[0056] The first low-pass filter unit includes a resistor R12 and a capacitor C12. For the specific connection relationship between each component, please refer to Figure 1 .

[0057] Please refer to Figure 1 , the low-frequency interference signal recognition module 102 further includes a resistor R15. One end of the resistor R15 is electrically connected to the other end of the capacitor C13, and the other end of the resistor R15 is grounded.

[0058] Please refer to Figure 1 , the high-frequency interference signal recognition module 103 includes a second low-pass filter unit, a filter follower U3B, and a blocking capacitor C16. The second low-pass filter unit is electrically connected to the inverting input terminal of the filter follower U3D, the low-frequency interference signal recognition module 102, the useful signal recognition module 101, the output terminal of the amplifier U3D, and the other end of the resistor R1. The non-inverting input terminal of the filter follower U3D is electrically connected to one end of the capacitor C16 and the output terminal of the filter follower U3D.

[0059] The second low-pass filter unit includes a capacitor C15 and a resistor R16. For the specific connection relationship between each component, please refer to Figure 1 .

[0060] Please refer to Figure 1 , the high-frequency interference signal recognition module 103 further includes a resistor R17. One end of the resistor R17 is electrically connected to the other end of the capacitor C16, and the other end of the resistor R17 is grounded.

[0061] Please refer to Figure 1 , the above signal processing circuit further includes a diode D1 and a diode D2. The cathode of the diode D1 is electrically connected to one end of the resistor R10, the anode of the diode D2, and the other end of the capacitor C4. The anode of the diode D1 and the cathode of the diode D2 are both grounded.

[0062] Please refer to Figure 1, the above-mentioned signal processing circuit further includes a resistor R13 and a resistor R14. One end of the resistor R13 is connected to the power supply, and the other end of the resistor R13 is electrically connected to the positive input terminal of the amplifier U3A and one end of the resistor R14 respectively. The other end of the resistor R14 is connected to the power supply.

[0063] The above-mentioned signal processing circuit further includes a capacitor C7, a capacitor C8, a capacitor C1, a capacitor C11 and a capacitor C14. For the specific connection relationship between each component, please refer to Figure 1 .

[0064] The working principle of the above-mentioned signal processing circuit is as follows:

[0065] In this embodiment, it is stipulated that VA_IN is the input of the A-phase signal, which is coupled from the A-phase inductive sensor and includes the signal sensed by the sensor itself, as well as other high-frequency and low-frequency interference signals caused by running wires together with the A-phase sensor line.

[0066] The capacitors C7 and C8 are filtering capacitors to the ground, so that the input signal voltage of the A-phase can output a smoother AC sine wave signal; the DC-blocking capacitor C3 is a first-stage DC-blocking capacitor, which can filter out the signal containing the DC component in the A-phase input signal; the diodes D1 and D2 form a positive and negative voltage regulator, which can prevent the subsequent circuit from being broken down by excessive external signals; the DC-blocking capacitor C4 is a second-stage DC-blocking capacitor, which can filter out the signal of the DC component in the A-phase input signal that cannot be filtered by the capacitor C3 more thoroughly; the resistors R13 and R14 form a voltage dividing unit, where the Vref_A voltage = R13 / (R13 + R14)*VCC = 2.5V, where VCC is the system voltage of 5V; through the Vref_A voltage, the DC offset of the signal can be set to 2.5V to ensure that the A-phase signal output can display all waveform signals in the range of 0 - 5V; the amplifier U3A can amplify the signal, and the resistors R10 and R1 form the amplification circuit multiple, and its signal amplification multiple = (R1 + 1) / R10 = 101 times. The capacitor C1 is a filtering capacitor, so that the amplified waveform is more complete and distortion-free.

[0067] When the A-phase signal voltage is the signal voltage sensed by the normal sensor, the signal voltage frequency is 50Hz - 60Hz at this time. The DC-blocking capacitor C5 is the first-stage DC-blocking capacitor after signal amplification, which can filter out the signal of the DC component in the amplified signal; the filtering follower U3B can output the signal completely to prevent distortion and inability to drive the impedance of the subsequent circuit; the DC-blocking capacitor C6 is the second-stage DC-blocking capacitor after signal amplification, which can filter out the signal of the DC component in the amplified signal that cannot be filtered by the capacitor C5 more thoroughly; the resistor R11 is a matching resistor to the ground, which can improve the voltage waveform and transmit it more smoothly; V1CG is the amplified waveform signal transmitted by the normal sensor and is sent to the main control chip for AD sampling and analysis to determine the signal magnitude.

[0068] When the signal voltage of Phase A is a low-frequency interference signal, at this time the frequency of the interference signal is lower than 50 Hz. The low-pass filter unit composed of resistor R12 and capacitor C12 can select the interference signal with a frequency lower than 50 Hz, and through the filter follower U3C, the signal can be output completely to prevent distortion and inability to drive the impedance of the subsequent circuit; the DC-blocking capacitor C13 is the DC-blocking capacitor for outputting the low-frequency interference signal, which can more thoroughly filter out the signal of the DC component that cannot be filtered by capacitor C4; the resistor R15 is the ground matching resistor, which can improve the voltage waveform and transmit it more smoothly; DITONG_A is the amplified waveform signal transmitted by the low-frequency interference signal, which is sent to the main control chip for AD sampling analysis to determine the signal magnitude and identify the low-frequency interference signal.

[0069] When the signal voltage of Phase A is a high-frequency interference signal, at this time the frequency of the interference signal is higher than 60 Hz. The low-pass filter unit composed of R16 and C15 can select the interference signal with a frequency higher than 60 Hz, and through the filter follower U3D, the signal can be output completely to prevent distortion and inability to drive the impedance of the subsequent circuit; the DC-blocking capacitor C16 is the DC-blocking capacitor for outputting the high-frequency interference signal, which can more thoroughly filter out the signal of the DC component that cannot be filtered by capacitor C4; the resistor R17 is the ground matching resistor, which can improve the voltage waveform and transmit it more smoothly; GAOTONG_A is the amplified waveform signal transmitted by the high-frequency interference signal, which is sent to the main control chip for AD sampling analysis to determine the signal magnitude and identify the high-frequency interference signal.

[0070] Through this signal processing circuit, useful signals, low-frequency interference signals and high-frequency interference signals can be correctly identified, quickly distinguished and recognized, reducing the program judgment volume of the main control chip and delaying its service life.

[0071] Please refer to Figures 1 to 6 As shown in the following, Embodiment 2 of the present utility model is:

[0072] Please refer to Figure 4 , an inductive high-voltage live display and locking device, including a high-voltage signal live state indication circuit 2, a main control circuit 3, a drive amplification circuit 4 and the above-mentioned signal processing circuit 1. The main control circuit 3 is respectively electrically connected to the output end of the useful signal recognition module 101, the output end of the low-frequency interference signal recognition module 102, the output end of the high-frequency interference signal recognition module 103 and the input end of the drive amplification circuit 4. The output end of the drive amplification circuit 4 is electrically connected to the input end of the high-voltage signal live state indication circuit 2.

[0073] In this embodiment, there are three signal processing circuits 1 in total, namely the high-voltage three-phase signals A, B and C. For the signal processing circuit 1 of Phase A, please refer to Figure 1 For the signal processing circuit 1 of Phase B, please refer to Figure 2, please refer to the signal processing circuit 1 of phase C Figure 3 In this embodiment, phase A is taken as an example for explanation (please refer to the working principle of the signal processing circuit 1 in Embodiment 1), and the other two phases are similar.

[0074] Please refer to Figure 6 , the high-voltage signal live state indication circuit 2 includes resistor R19, light-emitting diode DA1, resistor R20, light-emitting diode DB1, resistor R21, light-emitting diode DC1, resistor R22 and light-emitting diode D7. The specific connection relationship between its components is as follows. Please refer to Figure 3 ; Light-emitting diodes DA1, DB1 and DC1 are respectively the live state indicators of the three-phase high-voltage signals. When the A-phase signal carries a useful signal, V1_LED = 0, VCC forms a loop through resistor R19 and then through light-emitting diode DA1, driving light-emitting diode DA1 to light up, indicating that the A-phase busbar is under high voltage at this time; the principles of the other light-emitting diodes DB1 and DC1 are the same as that of light-emitting diode DA1.

[0075] Light-emitting diode D7 is the system power indicator. When the system is powered on, VCC = 5V, VCC forms a loop through resistor R22 and then through light-emitting diode D7, driving light-emitting diode D7 to light up, indicating that the power is on at this time.

[0076] The main control circuit 3 includes chip U2, capacitor C2, resistor R2, capacitor C9, capacitor C10 and crystal oscillator DZ1. The specific connection relationship between its components is as follows. Please refer to Figure 5 ; Chip U2 is the main control chip, which is used to receive the three-phase high-voltage useful signals (amplified waveform data), three-phase high-voltage low-frequency interference signals (amplified waveform data) and three-phase high-voltage high-frequency interference signals (amplified waveform data), and perform AD sampling and data processing. At the same time, it outputs a level signal to control the lighting and extinguishing of each indicator.

[0077] Crystal oscillator DZ1, capacitor C9 and capacitor C10 form the crystal oscillator unit of chip U2, which is used for the start-up oscillation requirement of the program of chip U2.

[0078] Capacitor C2 and resistor R2 form the reset unit of chip U2, which is a fixed connection method.

[0079] The drive and amplification circuit 4 includes chip U1, resistor R3, resistor R4 and resistor R5. The specific connection relationship between chip U1 and other components is as follows. Please refer to Figure 5 ; Chip U1 is a drive chip, which can drive an increase circuit and is used to drive the current of the backend circuit; since chip U2 is a common type of main control chip and the drive current of a single pin is small and cannot directly drive the indicator to display the normal brightness, it is necessary to add chip U1 to drive the current chip.

[0080] Resistors R3, R4, and R5 are the pull-up resistors for the output pins of V1LED, V2LED, and V3LED respectively, which can increase the driving ability of the corresponding pins of the main control chip. Through this driving chip U1, multiple devices with larger currents at the back end can be driven to meet the actual use.

[0081] In summary, a signal processing circuit and an inductive high-voltage live display and locking device provided by the present utility model include an amplifier U3A, a DC-blocking capacitor C3, a resistor R10, a DC-blocking capacitor C4, a resistor R1, a useful signal recognition module, a low-frequency interference signal recognition module, and a high-frequency interference signal recognition module. The DC-blocking capacitor C3 is a first-stage DC-blocking capacitor, which can filter out the signal containing DC components in the input signal; the DC-blocking capacitor C4 is a second-stage DC-blocking capacitor, which can more thoroughly filter out the signal of the DC component that cannot be filtered by the capacitor C3 in the input signal; the amplifier U3A can amplify the signal, and the resistors R10 and R1 form the magnification of the amplification circuit; when the input signal is the signal voltage sensed by a normal sensor, the useful signal is recognized through the useful signal recognition module; when the input signal is a low-frequency interference signal, the low-frequency interference signal is recognized through the low-frequency interference signal recognition module; when the input signal is a high-frequency interference signal, the high-frequency interference signal is recognized through the high-frequency interference signal recognition module, so that the useful signal, the low-frequency interference signal, and the high-frequency interference signal can be correctly and quickly recognized. In this way, when the useful signal, the low-frequency interference signal, and the high-frequency interference signal are sent to the main control chip for AD sampling and analysis to determine the signal magnitude, the program judgment amount of the main control chip can be reduced, and its service life can be extended.

[0082] The above are only the embodiments of the present utility model, and do not limit the patent scope of the present utility model accordingly. Any equivalent transformation made by using the content of the specification and drawings of the present utility model, or directly or indirectly applied in the related technical fields, shall be included in the patent protection scope of the present utility model by the same token.

Claims

1. A signal processing circuit, characterized in that: It includes an amplifier U3A, a DC-isolating capacitor C3, a resistor R10, a DC-isolating capacitor C4, a resistor R1, a useful signal identification module, a low-frequency interference signal identification module and a high-frequency interference signal identification module. The inverting input end of the amplifier U3A is electrically connected to one end of the DC-isolating capacitor C4 and one end of the resistor R1, respectively, the other end of the capacitor C4 is electrically connected to one end of the resistor R10, the other end of the resistor R10 is electrically connected to one end of the capacitor C3, the other end of the capacitor C3 is electrically connected to an external inductive sensor, and the output end of the amplifier U3A is electrically connected to the other end of the resistor R1, the useful signal identification module, the low-frequency interference signal identification module and the high-frequency interference signal identification module, respectively.

2. The signal processing circuit according to claim 1, characterized in that: The useful signal identification module includes a DC blocking capacitor C5, a filter follower U3B and a DC blocking capacitor C6, one end of the capacitor C5 is electrically connected to the other end of the resistor R1, the output end of the amplifier U3A, the low-frequency interference signal identification module and the high-frequency interference signal identification module, the other end of the capacitor C5 is electrically connected to the inverting input end of the filter follower U3B, and the non-phase input end of the filter follower U3B is electrically connected to the output end of the filter follower U3B and one end of the capacitor C6.

3. The signal processing circuit according to claim 2, characterized in that: The useful signal identification module further includes a resistor R11 , one end of the resistor R11 is electrically connected to the other end of the capacitor C6 , and the other end of the resistor R11 is grounded.

4. The signal processing circuit according to claim 1, characterized in that: The low-frequency interference signal identification module includes a first low-pass filtering unit, a filter follower U3C and a DC blocking capacitor C13. The first low-pass filtering unit is electrically connected to the useful signal identification module, the high-frequency interference signal identification module, the output end of the amplifier U3A, the inverting input end of the filter follower U3C and the other end of the resistor R1, respectively. The non-phase input end of the filter follower U3C is electrically connected to one end of the capacitor C13 and the output end of the filter follower U3C, respectively.

5. The signal processing circuit according to claim 4, characterized in that: The low-frequency interference signal identification module further includes a resistor R15, one end of the resistor R15 is electrically connected to the other end of the capacitor C13, and the other end of the resistor R15 is grounded.

6. The signal processing circuit according to claim 1, characterized in that: The high-frequency interference signal identification module includes a second low-pass filtering unit, a filter follower U3B and a DC blocking capacitor C16. The second low-pass filtering unit is electrically connected to the inverting input terminal of the filter follower U3D, the low-frequency interference signal identification module, the useful signal identification module, the output terminal of the amplifier U3D and the other end of the resistor R1, respectively. The non-phase input terminal of the filter follower U3D is electrically connected to one end of the capacitor C16 and the output terminal of the filter follower U3D, respectively.

7. The signal processing circuit according to claim 6, characterized in that: The high-frequency interference signal identification module further includes a resistor R17, one end of the resistor R17 is electrically connected to the other end of the capacitor C16, and the other end of the resistor R17 is grounded.

8. The signal processing circuit according to claim 1, characterized in that: It also includes a diode D1 and a diode D2, wherein the cathode of the diode D1 is electrically connected to one end of the resistor R10, the anode of the diode D2 and the other end of the capacitor C4 respectively, and the anode of the diode D1 and the cathode of the diode D2 are both grounded.

9. The signal processing circuit according to claim 1, characterized in that: It also includes a resistor R13 and a resistor R14, one end of the resistor R13 is connected to the power supply, the other end of the resistor R13 is electrically connected to the non-inverting input end of the amplifier U3A and one end of the resistor R14 respectively, and the other end of the resistor R14 is connected to the power supply.

10. An inductive high-voltage live display locking device, characterized in that: It includes a high-voltage signal live state indication circuit, a main control circuit, a driving amplifier circuit and a signal processing circuit according to any one of claims 1 to 9, wherein the main control circuit is electrically connected to the output end of a useful signal identification module, the output end of a low-frequency interference signal identification module, the output end of a high-frequency interference signal identification module and the input end of the driving amplifier circuit, respectively, and the output end of the driving amplifier circuit is electrically connected to the input end of the high-voltage signal live state indication circuit.

Images