Narrow-body packaged integrated circuit double-layer mother-son high-temperature burn-in board

Abstract

The utility model belongs to the technical field of integrated circuit detection, and particularly relates to a narrow-body packaged integrated circuit double-layer mother-son high-temperature burn-in board, which comprises a mother board, golden fingers and a plurality of son boards, a plurality of first stations are arranged on the mother board, the son boards are respectively arranged on the first stations, the golden fingers are arranged on the mother board, and the golden fingers are arranged on the mother board. The mother board and the daughter board are connected through a pin header and a golden finger. The daughter board is provided with a plurality of second stations, and the second stations are respectively used for installing aging bases of aging devices. According to the utility model, the daughter board and the mother board are mutually combined, so that the wiring space of the PCB is increased, multiple persons can conveniently and cooperatively weld the daughter board and the aging seat, the number of devices aged by the aging board at a time can be increased, the aging efficiency is further improved, and the problem that the welding period of the aging board is too long can be effectively solved.

Description

Technical Field

[0001] The utility model belongs to the technical field of integrated circuit detection, and particularly relates to a double-layer mother-son high-temperature aging board for integrated circuits with narrow-body packaging. Background Art

[0002] With the rapid development of integrated circuit manufacturing technology, during the long-term use of integrated circuits, due to the instability of environmental factors such as temperature, humidity, and voltage, internal electronic devices are prone to aging, resulting in performance degradation or even failure. This aging phenomenon not only affects the service life of integrated circuits but also may have a significant impact on system stability.

[0003] In the prior art, in order to simulate the aging process of integrated circuits in the actual working environment, a special aging board needs to be designed. The aging board usually includes a plurality of aging sockets for placing integrated circuit chips to be aged, that is, the so-called aging devices.

[0004] However, due to the large number of 24-pin circuit pins, the limitations of the PCB board size and the aging table space, the number of aging sockets that can be placed on the aging board is limited, thus restricting the efficiency of single aging. Summary of the Utility Model

[0005] The utility model provides a double-layer mother-son high-temperature aging board for integrated circuits with narrow-body packaging, which can not only increase the number of devices aged at one time on the aging board, thereby improving the aging efficiency, but also effectively solve the problem of too long welding cycle of the aging board.

[0006] To achieve the above purpose, the technical solution of the utility model is as follows:

[0007] A double-layer mother-son high-temperature aging board for integrated circuits with narrow-body packaging includes a mother board, a gold finger, and a plurality of sub-boards;

[0008] A plurality of first workstations are arranged on the mother board, and the sub-boards are respectively arranged on the first workstations;

[0009] The gold finger is arranged on the mother board, and the mother board is connected to the sub-boards through pin headers and the gold finger;

[0010] A plurality of second workstations are arranged on the sub-boards, and the second workstations are respectively used for installing aging sockets for aging devices.

[0011] Preferably, the voltage terminals and the ground terminals of the mother board and the gold finger are provided with copper plating.

[0012] Preferably, the pin headers at the connection points of the mother board, the sub-boards, and the gold finger are all subjected to immersion gold treatment.

[0013] Preferably, the surface of the sub-board is provided with a whole-board copper plating.

[0014] Preferably, an identifier is provided on the daughter board.

[0015] Preferably, a signal detection line is provided on the back of the gold finger.

[0016] Technical effects and advantages of the present utility model:

[0017] 1. By combining the daughter board and the mother board with each other, the wiring space of the PCB board is increased, which is convenient for multiple people to cooperate in soldering the daughter board and the aging socket. It can not only increase the number of devices aged on the aging board each time, thereby improving the aging efficiency, but also effectively solve the problem of too long soldering cycle of the aging board.

[0018] 2. By providing a signal detection line on the back of the gold finger, and connecting the signal detection line to the aging table, during the aging process, the staff can perform positioning detection on the required pins through the aging table, and the working state of the aging device can be seen in real time through an oscilloscope. Description of the Drawings

[0019] Figure 1 is a schematic diagram of a narrow-body packaged integrated circuit double-layer mother-daughter high-temperature aging board provided by an embodiment of the present application;

[0020] Figure 2 is a schematic diagram of the daughter board provided by an embodiment of the present application.

[0021] Reference numerals in the figure: 1, mother board; 11, first station; 2, gold finger; 3, daughter board; 31, second station; 32, identifier. Detailed Embodiments

[0022] The following embodiments given in conjunction with the drawings further describe the present utility model in detail.

[0023] As Figure 1 and Figure 2 shown, a narrow-body packaged integrated circuit double-layer mother-daughter high-temperature aging board includes a mother board 1, a gold finger 2, and a plurality of daughter boards 3.

[0024] A plurality of first stations 11 are provided on the mother board 1, and the plurality of first stations 11 are arranged in sequence. In the embodiment of the present application, there are ten first stations 11, arranged in two rows, with five first stations 11 in each row.

[0025] The gold finger 2 can be provided on the left side, right side, top or bottom of the mother board 1. In this embodiment, the position of the gold finger 2 is not limited and will not be elaborated here.

[0026] The daughter board 3 is respectively arranged on the first station 11. The daughter board 3 is connected to the mother board 1 through pin headers and a gold finger 2, enabling signal transmission between the mother board 1 and the daughter board 3. And the gold finger 2 is connected to an aging station to establish a signal connection. Corresponding parameter signals can be set through the aging station and then sent to the aging socket. In the embodiments of the present application, the pin headers, the aging station, the aging socket, and the aging devices are not shown.

[0027] Multiple second stations 31 can be arranged on the daughter board 3. In the embodiments of the present application, six second stations 31 are provided. One aging socket can be installed on each second station 31, so that one aging device can be installed on each aging socket. When designing the aging sockets, the distance and space between them are considered to ensure the convenience of operation for the operator. In the embodiments of the present application, the aging socket can be set as a CSOP24-0.65 aging socket. The daughter board 3 is used for wiring the components and the aging sockets, leading the signals to the pin header ports, and placing as many aging sockets as possible on the daughter board 3. The pin headers carry the daughter board 3 and the mother board 1, and transfer the information of the daughter board 3 to the mother board 1. The mother board 1 then establishes a signal connection between the aging station and the aging devices on the aging board through the gold finger 2 to achieve signal transmission.

[0028] In the embodiments of the present application, by combining the mother board 1 and the daughter board 3, arranging the first station 11 on the mother board 1 and the second station 31 on the daughter board 3 respectively, not only can the installation quantity of the daughter board 3 on the mother board 1 be increased, but also the installation quantity of the aging sockets on the daughter board 3 can be increased, increasing the wiring space of the PCB board, improving the installation quantity of the aging devices on the aging board, improving the aging efficiency, and through multi-person cooperation, the aging devices can be soldered, shortening the overall process cycle of the aging board.

[0029] In a possible embodiment, the voltage terminals and the ground terminals of the mother board 1 and the gold finger 2 are provided with copper plating.

[0030] When the voltage terminals and the ground terminals of the mother board 1 and the gold finger 2 are respectively provided with copper plating, not only can the stability of the overall power supply be improved, but also the return path can be reduced.

[0031] In a possible embodiment, the pin headers at the connection positions of the mother board 1, the daughter board 3, and the gold finger 2 are all subjected to immersion gold treatment.

[0032] When the pin headers at the connection positions of the mother board 1, the daughter board 3, and the gold finger 2 are subjected to immersion gold treatment, it can ensure that the pin headers at the connection positions are in a stable state during soldering in the tin furnace, reducing the occurrence of false soldering. And via holes are processed at the corresponding positions to reduce the warping of the mother board 1, the daughter board 3, and the gold finger 2 under high-temperature conditions.

[0033] In a possible embodiment, the surface of the daughter board 3 is provided with a whole-board copper plating.

[0034] The surface of the daughter board 3 is fully covered with copper, and the signal is also ground - enclosed, which improves the signal stability and reduces signal interference during transmission.

[0035] In a possible embodiment, an identifier 32 is also provided on the daughter board 3.

[0036] By providing the identifier 32 on the daughter board 3, it is convenient for the operator to place the aging devices according to the identifier 32 when using the soldered aging board, reducing the situation of circuit damage caused by reverse installation during the installation of aging devices.

[0037] In a possible embodiment, a signal detection line is provided on the back of the gold finger 2.

[0038] By providing the signal detection line on the back of the gold finger 2, and connecting the signal detection line to the aging platform, during the aging process, the staff can perform positioning detection on the required pins through the aging platform, and can see the working state of the aging devices in real - time through an oscilloscope. The signal detection line is not marked in the embodiments of this application.

[0039] To facilitate the understanding of the above - mentioned technical solutions of the present utility model, the working principle or operation method of the present utility model in the actual process will be described in detail below.

[0040] Working principle of the present utility model:

[0041] During installation, the daughter board 3 is installed on the first station 11 of the mother board 1 by multiple people working together respectively. Then, the aging sockets are installed on the second station 31 of the daughter board 3 respectively. According to the identifier 32, the aging devices are sequentially installed on the corresponding aging sockets. Through the aging platform, relevant aging detections are performed on the aging devices.

[0042] The above are only the preferred embodiments of the present utility model. It should be noted that for those of ordinary skill in the art, without departing from the creative concept of the present utility model, several deformations and improvements can still be made, and these all belong to the protection scope of the present utility model.

Claims

1. A narrow-body packaged integrated circuit double-layer mother-child high-temperature aging board, characterized in that: It comprises a motherboard (1), a gold finger (2) and a plurality of daughterboards (3); The motherboard (1) is provided with a plurality of first workstations (11), and the sub-boards (3) are respectively provided on the first workstations (11); The gold finger (2) is arranged on the motherboard (1), and the motherboard (1) and the daughterboard (3) are connected to the gold finger (2) via a pin header; The sub-board (3) is provided with a plurality of second workstations (31), and the second workstations (31) are respectively used for installing aging seats of aging components.

2. The narrow-body packaged integrated circuit double-layer mother-child high-temperature aging board according to claim 1, characterized in that: The voltage end and the grounding end of the motherboard (1) and the gold finger (2) are both provided with copper.

3. The narrow-body packaged integrated circuit double-layer mother-child high-temperature aging board according to claim 1, characterized in that: The pins at the connection points of the motherboard (1), the daughterboard (3) and the gold fingers (2) are all subjected to gold immersion treatment.

4. The narrow-body packaged integrated circuit double-layer mother-child high-temperature aging board according to claim 1, characterized in that: The surface of the sub-board (3) is entirely copper-clad.

5. The narrow-body packaged integrated circuit double-layer mother-child high-temperature aging board according to claim 1, characterized in that: The sub-board (3) is provided with an identifier (32).

6. The narrow-body packaged integrated circuit double-layer mother-child high-temperature aging board according to claim 1, characterized in that: A signal detection line is arranged on the back of the gold finger (2).

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