Fault protection circuit

Abstract

The utility model relates to a fault protection circuit. The fault protection circuit comprises a main control circuit, a power management circuit, a turn-off circuit, a power supply control circuit and a signal transceiving component, the main control circuit is used for generating a fault signal when the main control circuit fails; the power management circuit is used for generating a turn-off request signal according to the fault signal; or, when the power management circuit fails, a turn-off request signal is generated; the turn-off circuit is used for generating a turn-off control signal according to the turn-off request signal so as to turn off the signal transceiving component; the power supply control circuit is used for keeping or stopping supplying power to the power supply management circuit according to the fault signal, the turn-off request signal and the turn-off control signal; based on this, through the power supply control circuit, whether power supply to the power management circuit is kept or stopped can be accurately and reliably controlled according to the fault states of the main control circuit, the power management circuit and the turn-off circuit, the safety and reliability of the whole fault protection circuit are improved, and a foundation is laid for improving the safety of a vehicle.

Description

Technical Field

[0001] This application relates to the technical field of driving fault protection, and particularly to a fault protection circuit. Background Art

[0002] With the development of autonomous driving technology, the requirements for the safety of autonomous driving are getting higher and higher. For current autonomous driving domain controllers at SAE L2 and below levels, their functional safety state is generally defined as bus silence, that is, by means of bus silence, avoiding sending incorrect self-vehicle control signals to the bus or actuators.

[0003] In the prior art, a communication control circuit is usually added to the driving domain controller to achieve communication control. Among them, the communication control circuit includes a main control chip, a power management chip, a signal transceiver control chip, and a shutdown circuit. When the main control chip detects a fault, it sends a fault signal to the power management chip through a signal interface. After receiving the fault signal, the power management chip immediately sends a shutdown request signal to the shutdown circuit, and sends a shutdown control signal to the signal transceiver control chip through the shutdown circuit to achieve communication shutdown and reach the expected safety state (bus silence). However, in actual applications, if any link in the communication control circuit has a fault, the accuracy of the shutdown control signal cannot be ensured, and thus the communication cannot be shut down in a timely and reliable manner, resulting in poor safety of the self-vehicle driving. That is, the communication control circuit in the prior art cannot achieve fault protection, and thus cannot ensure that the communication can be reliably shut down when the domain controller has a fault, so as to avoid the safety risk brought to the self-vehicle by the external transmission of incorrect control signals.

[0004] In view of the problem in the prior art that the communication control circuit cannot achieve fault protection, resulting in low safety of the self-vehicle, no effective solution has been proposed yet. Summary of the Utility Model

[0005] Based on this, it is necessary to provide a fault protection circuit for the above technical problems.

[0006] This application provides a fault protection circuit, which includes a main control circuit, a power management circuit, a shutdown circuit, a power supply control circuit, and a signal transceiver component.

[0007] The main control circuit is connected to the power management circuit and is used to generate a fault signal when the main control circuit fails.

[0008] The power management circuit is connected to the shutdown circuit and is used to generate a shutdown request signal according to the fault signal; or, generate a shutdown request signal when the power management circuit fails.

[0009] The shutdown circuit is connected to the signal transceiver component and is configured to generate a shutdown control signal according to the shutdown request signal to shut down the signal transceiver component;

[0010] The power supply control circuit is respectively connected to the main control circuit, the power management circuit and the shutdown circuit, and is configured to maintain or stop supplying power to the power management circuit according to the fault signal, the shutdown request signal and the shutdown control signal.

[0011] In one embodiment, the power supply control circuit includes a first logic conversion circuit, a second logic conversion circuit and a switch circuit;

[0012] The first input end of the first logic conversion circuit is connected to the fault output end of the main control circuit, the second input end of the first logic conversion circuit is connected to the output end of the power management circuit, and the output end of the first logic conversion circuit is connected to the first input end of the second logic conversion circuit, and is configured to generate a first conversion signal according to the fault signal and the shutdown request signal;

[0013] The second input end of the second logic conversion circuit is connected to the output end of the shutdown circuit, and the output end of the second logic conversion circuit is connected to the first end of the switch circuit, and is configured to generate a switch control signal according to the shutdown control signal and the first conversion signal;

[0014] The second end of the switch circuit is connected to the power supply end of the power management circuit, and the third end of the switch circuit is connected to an external power supply, and is configured to turn on or off the switch circuit according to the switch control signal; when the switch circuit is turned on, power is supplied to the power management circuit through the external power supply; when the switch circuit is turned off, power supply to the power management circuit is stopped.

[0015] In one embodiment, the first logic conversion circuit includes a first OR gate circuit, a delay circuit and a NOT gate circuit;

[0016] The first input end of the first OR gate circuit is connected to the fault output end of the main control circuit, the second input end of the first OR gate circuit is connected to the output end of the power management circuit, and the output end of the first OR gate circuit is connected to the input end of the NOT gate circuit through the delay circuit, and is configured to generate a second conversion signal according to the fault signal and the shutdown request signal;

[0017] The delay circuit is configured to delay the second conversion signal by a preset time duration and transmit the delayed second conversion signal to the NOT gate circuit;

[0018] The output end of the NOT gate circuit is connected to the first input end of the second logic conversion circuit, and is configured to generate a first conversion signal according to the delayed second conversion signal.

[0019] In one embodiment, the delay circuit includes a first resistor and a first capacitor;

[0020] One end of the first resistor is connected to the output end of the first OR gate circuit, and the other end of the first resistor is connected to the input end of the NOT gate circuit;

[0021] One end of the first capacitor is connected to the connection point of the first resistor and the input end of the NOT gate circuit, and the other end of the first capacitor is grounded.

[0022] In one embodiment, the second logic conversion circuit includes a second OR gate circuit;

[0023] The first input end of the second OR gate circuit is connected to the output end of the NOT gate circuit, the second input end of the second OR gate circuit is connected to the output end of the turn-off circuit, and the output end of the second OR gate circuit is connected to the first end of the switch circuit, for generating a switch control signal according to the turn-off control signal and the first conversion signal.

[0024] In one embodiment, the switch circuit includes a first switch tube;

[0025] The first end of the first switch tube is connected to the output end of the second OR gate circuit, the second end of the first switch tube is connected to the power supply terminal of the power management circuit, and the third end of the first switch tube is connected to an external power supply.

[0026] In one embodiment, the first switch tube is a MOS tube.

[0027] In one embodiment, the turn-off circuit includes a second switch tube;

[0028] The first end of the second switch tube is connected to the power management circuit, the second end of the second switch tube is connected to an external power supply, and the third end of the second switch tube is connected to the signal transceiver module.

[0029] In one embodiment, the second switch tube is a triode.

[0030] In one embodiment, the power management circuit includes a power management chip;

[0031] The signal transceiver module includes a signal transceiver.

[0032] The above-mentioned fault protection circuit includes a main control circuit, a power management circuit, a shutdown circuit, a power supply control circuit, and a signal transceiver component; the main control circuit is connected to the power management circuit and is used to generate a fault signal when the main control circuit fails; the power management circuit is connected to the shutdown circuit and is used to generate a shutdown request signal according to the fault signal; or, generate a shutdown request signal when the power management circuit fails; the shutdown circuit is connected to the signal transceiver component and is used to generate a shutdown control signal according to the shutdown request signal to shut down the signal transceiver component; the power supply control circuit is respectively connected to the main control circuit, the power management circuit, and the shutdown circuit and is used to maintain or stop supplying power to the power management circuit according to the fault signal, the shutdown request signal, and the shutdown control signal; based on this, through the power supply control circuit, it is possible to accurately and reliably control whether to maintain or stop supplying power to the power management circuit according to the fault states of the main control circuit, the power management circuit, and the shutdown circuit, improving the safety and reliability of the entire fault protection circuit and laying a foundation for improving the safety of the vehicle itself. Description of the Drawings

[0033] In order to more clearly illustrate the technical solutions in the embodiments of the present application or the prior art, the following will briefly introduce the drawings required for use in the description of the embodiments or the prior art. Obviously, the drawings in the following description are only some embodiments of the present application. For those of ordinary skill in the art, without creative efforts, other drawings can also be obtained based on these drawings.

[0034] Figure 1 It is the overall structure diagram of the fault protection circuit in one embodiment;

[0035] Figure 2 It is the overall structure diagram of the fault protection circuit in another embodiment;

[0036] Figure 3 It is the schematic diagram of the power supply control circuit in one embodiment;

[0037] Figure 4 It is the schematic diagram of the shutdown circuit in one embodiment;

[0038] Figure 5 It is the schematic diagram of the shutdown circuit in another embodiment;

[0039] Figure 6 It is the schematic diagram of the shutdown circuit in another embodiment;

[0040] Figure 7 It is the schematic diagram of the fault protection circuit in a specific embodiment.

[0041] Description of the Reference Numerals:

[0042] 100, main control circuit; 200, power management circuit; 300, shutdown circuit; 400, signal transceiver module; 500, power supply control circuit; 510, first logic conversion circuit; 520, second logic conversion circuit; 530, switch circuit. Detailed implementation manners

[0043] To facilitate the understanding of the present application, the present application will be described more comprehensively below with reference to the relevant accompanying drawings. Embodiments of the present application are shown in the drawings. However, the present application can be implemented in many different forms and is not limited to the embodiments described herein. On the contrary, these embodiments are provided to make the disclosure of the present application more thorough and comprehensive.

[0044] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as commonly understood by those of ordinary skill in the technical field to which this application belongs. The terms used in the description of this application herein are only for the purpose of describing specific embodiments and are not intended to limit this application.

[0045] It can be understood that the terms "first", "second", etc. used in this application may be used herein to describe various elements, but these elements are not limited by these terms. These terms are only used to distinguish the first element from another element. For example, without departing from the scope of this application, the first resistor may be referred to as the second resistor, and similarly, the second resistor may be referred to as the first resistor. Both the first resistor and the second resistor are resistors, but they are not the same resistor.

[0046] It can be understood that in the following embodiments, "connection", if there is an electrical signal or data transfer between the connected circuits, modules, units, etc., should be understood as "electrical connection", "communication connection", etc.

[0047] It can be understood that "at least one" means one or more, and "a plurality" means two or more. "At least a part of an element" means a part or all of the element.

[0048] As used herein, the singular forms "a", "an" and "the" may also include the plural forms unless the context clearly indicates otherwise. It should also be understood that the terms "include" or "have", etc. specify the presence of the stated features, wholes, steps, operations, components, parts or combinations thereof, but do not exclude the possibility of the presence or addition of one or more other features, wholes, steps, operations, components, parts or combinations thereof. At the same time, the term "and / or" used in this specification includes any and all combinations of the related listed items.

[0049] In one embodiment, as Figure 1 shown Figure 1It is the overall structure diagram of the fault protection circuit in an embodiment; the fault protection circuit includes a main control circuit 100, a power management circuit 200, a shutdown circuit 300, a power supply control circuit 500, and a signal transceiver component 400;

[0050] The main control circuit 100 is connected to the power management circuit 200 and is used to generate a fault signal when the main control circuit 100 fails;

[0051] The power management circuit 200 is connected to the shutdown circuit 300 and is used to generate a shutdown request signal according to the fault signal; or, generate a shutdown request signal when the power management circuit 200 fails;

[0052] The shutdown circuit 300 is connected to the signal transceiver component 400 and is used to generate a shutdown control signal according to the shutdown request signal to shut down the signal transceiver component 400;

[0053] The power supply control circuit 500 is respectively connected to the main control circuit 100, the power management circuit 200, and the shutdown circuit 300, and is used to maintain or stop supplying power to the power management circuit 200 according to the fault signal, the shutdown request signal, and the shutdown control signal.

[0054] Among them, the main control circuit 100 includes a main control chip, and the main control chip can be but is not limited to an MCU or a heterogeneous SOC chip, and no specific limitation is made here; it should be noted that the main control circuit 100 is used to generate a fault signal when the main control circuit 100 fails; it is also used to generate a control signal to the signal transceiver component 400 to realize information interaction; among them, the fault signal is output from the fault output terminal of the main control circuit 100 and is used to indicate that the main control circuit 100 is in a fault state at the current moment; the fault signal is a high-level signal; it can be understood that when the main control circuit 100 is normal, the fault output terminal of the main control circuit 100 outputs a normal signal, that is, a low-level signal.

[0055] Among them, the power management circuit 200 includes a power management chip, which is used to supply power to the main control circuit 100, and is also used to respond to the fault signal, that is, the high-level signal, generated by the main control circuit 100 when it fails, and generate a corresponding shutdown request signal; it should be noted that when the power management circuit 200 fails, a corresponding shutdown request signal will also be generated, based on which the reliability of the fault protection circuit is ensured; among them, the shutdown request signal is a high-level signal and is used to control the shutdown circuit 300 to generate a corresponding shutdown control signal.

[0056] Among them, the shutdown circuit 300 is connected to the signal transceiver component 400 and is used to generate a shutdown control signal according to the shutdown request signal, that is, a high-level signal, so as to shut down the signal transceiver component 400. It should be noted that based on the shutdown request signal, that is, a high-level signal, when the shutdown circuit 300 is normal, the shutdown control signal is a high-level signal; when the shutdown circuit 300 fails, the shutdown control signal is a low-level signal.

[0057] Among them, the signal transceiver component 400 can be, but is not limited to, a CAN signal transceiver, a LIN signal transceiver, an Ethernet physical layer, etc., and is not specifically limited here. The signal transceiver component 400 is used to implement information interaction according to the control signal transmitted by the main control circuit 100; it is also used to shut down the signal transceiver component 400 according to the shutdown control signal to avoid the external transmission of incorrect control signals.

[0058] Among them, the power supply control circuit 500 is used to maintain or stop supplying power to the power management circuit 200 according to the fault signal, the shutdown request signal, and the shutdown control signal. For example, when the main control circuit 100 fails or the power management circuit 200 fails, if the shutdown circuit 300 is normal, at this time, according to the fault signal, that is, a high-level signal, the shutdown request signal, that is, a high-level signal, and the shutdown control signal, that is, a high-level signal, the power supply control circuit 500 maintains power supply to the power management circuit 200; when the main control circuit 100 fails or the power management circuit 200 fails, if the shutdown circuit 300 fails, at this time, according to the fault signal, that is, a high-level signal, the shutdown request signal, that is, a high-level signal, and the shutdown control signal, that is, a low-level signal, the power supply control circuit 500 stops supplying power to the power management circuit 200 to ensure that the power of the entire fault protection circuit is cut off and avoid the external transmission of incorrect control signals; when the main control circuit 100 is normal and the power management circuit 200 is normal, regardless of whether the shutdown circuit 300 is normal or not, at this time, the power supply control circuit 500 still maintains power supply to the power management circuit 200.

[0059] In this embodiment, based on the power supply control circuit 500, it can accurately and reliably control whether to maintain or stop supplying power to the power management circuit 200 according to the fault states of the main control circuit 100, the power management circuit 200, and the shutdown circuit 300. Based on this, the safety and reliability of the entire fault protection circuit are improved, laying a foundation for improving the safety of the vehicle itself.

[0060] In one embodiment, as Figure 2 shown, Figure 2 is the overall structure diagram of the fault protection circuit in another embodiment; the power supply control circuit 500 includes a first logic conversion circuit 510, a second logic conversion circuit 520, and a switch circuit 530;

[0061] The first input terminal of the first logic conversion circuit 510 is connected to the fault output terminal of the main control circuit 100, the second input terminal of the first logic conversion circuit 510 is connected to the output terminal of the power management circuit 200, and the output terminal of the first logic conversion circuit 510 is connected to the first input terminal of the second logic conversion circuit 520, and is configured to generate a first conversion signal according to the fault signal and the shutdown request signal;

[0062] The second input terminal of the second logic conversion circuit 520 is connected to the output terminal of the shutdown circuit 300, and the output terminal of the second logic conversion circuit 520 is connected to the first terminal of the switch circuit 530, and is configured to generate a switch control signal according to the shutdown control signal and the first conversion signal;

[0063] The second terminal of the switch circuit 530 is connected to the power supply terminal of the power management circuit 200, and the third terminal of the switch circuit 530 is connected to an external power supply, and is configured to turn on or off the switch circuit 530 according to the switch control signal; when the switch circuit 530 is turned on, the power management circuit 200 is powered by the external power supply; when the switch circuit 530 is turned off, the power supply to the power management circuit 200 is stopped.

[0064] Among them, the first logic conversion circuit 510 is configured to generate a first conversion signal according to the fault signal and the shutdown request signal; among them, the first conversion signal includes a high-level signal and a low-level signal; for example, when the main control circuit 100 fails or the power management circuit 200 fails, the first conversion signal is a low-level signal; when both the main control circuit 100 and the power management circuit are normal, the first conversion signal is a high-level signal.

[0065] Among them, the second logic conversion circuit 520 is configured to generate a switch control signal according to the first conversion signal and the shutdown control signal; among them, the switch control signal includes a high-level signal and a low-level signal; the switch control signal is used to control the switch circuit 530 to turn on or off; the switch circuit 530 has a conduction characteristic; when the switch circuit 530 is turned on, the power management circuit 200 is powered by the external power supply; when the switch circuit 530 is turned off, the power supply to the power management circuit 200 is stopped; among them, the external power supply is used to provide a power supply for the power management circuit 200 to ensure that the power management circuit 200 can provide a power supply for the main control circuit 100 so that the entire fault protection circuit can work normally. The external power supply can be, but is not limited to, a power supply provided by an external power supply device or an external power supply chip, and is not specifically limited here.

[0066] Exemplarily, when the main control circuit 100 fails or the power management circuit 200 fails, if the shutdown circuit 300 is normal, at this time, the shutdown control signal is a high-level signal. The second logic conversion circuit 520 generates a switch control signal, which is a high-level signal, according to the shutdown control signal, that is, the high-level signal, and the first conversion signal, that is, the low-level signal. At this time, the switch circuit 530 is turned on, and the power management circuit 200 is powered by an external power supply; when the main control circuit 100 fails or the power management circuit 200 fails, if the shutdown circuit 300 fails, at this time, the shutdown control signal is a low-level signal. The second logic conversion circuit 520 generates a switch control signal, which is a low-level signal, according to the shutdown control signal, that is, the low-level signal, and the first conversion signal, that is, the low-level signal. At this time, the switch circuit 530 is turned off, and the power supply to the power management circuit 200 is stopped to cut off the power supply of the entire fault protection circuit; when both the main control circuit 100 and the power management circuit 200 are normal, regardless of whether the shutdown circuit 300 is normal or not, at this time, the second logic conversion circuit 520 generates a switch control signal as a high-level signal according to the first conversion signal, that is, the high-level signal. Further, through the switch control signal, that is, the high-level signal, the switch circuit 530 is turned on, so that the external power supply supplies power to the power management circuit 200 through the switch circuit 530.

[0067] In this embodiment, based on the first logic conversion circuit 510, the second logic conversion circuit 520, and the switch circuit 530, when the main control circuit 100 fails or the power management circuit 200 fails, the signal transceiver component 400 can be timely and reliably turned off according to the state of the shutdown circuit 300, or the power supply of the power management circuit 200 can be cut off, so as to avoid the problem of low vehicle safety caused by the external transmission of incorrect control signals, improve the reliability of the fault protection circuit, and lay a foundation for improving the vehicle safety.

[0068] In one embodiment, referring to Figure 3 , the first logic conversion circuit 510 includes a first OR gate circuit, a delay circuit, and a NOT gate circuit;

[0069] The first input terminal of the first OR gate circuit is connected to the fault output terminal of the main control circuit 100, the second input terminal of the first OR gate circuit is connected to the output terminal of the power management circuit 200, and the output terminal of the first OR gate circuit is connected to the input terminal of the NOT gate circuit through the delay circuit, and is used to generate a second conversion signal according to the fault signal and the shutdown request signal;

[0070] The delay circuit is used to delay the second conversion signal for a preset duration and transmit the delayed second conversion signal to the NOT gate circuit;

[0071] The output terminal of the NOT gate circuit is connected to the first input terminal of the second logic conversion circuit 520, and is used to generate a first conversion signal according to the delayed second conversion signal.

[0072] Among them, a first OR gate circuit is configured to generate a second conversion signal according to a fault signal and a turn-off request signal. The second conversion signal includes a high-level signal and a low-level signal. For example, when the main control circuit 100 fails or the power management circuit 200 fails, the second conversion signal is a high-level signal; when both the main control circuit 100 and the power management circuit are normal, the second conversion signal is a low-level signal.

[0073] Among them, a delay circuit is configured to delay the second conversion signal by a preset duration and transmit the delayed second conversion signal to a NOT gate circuit. The preset duration needs to be set according to the actual time when the turn-off control signal is transmitted to the second input terminal of the second logic conversion circuit 520, and no specific limitation is made here. It can be understood that based on the delay circuit, the problem of mis-triggering caused by the delay of the turn-off control signal can be avoided.

[0074] Among them, the NOT gate circuit is configured to convert the delayed second conversion signal into a first conversion signal. It can be understood that the level state of the first conversion signal is opposite to that of the delayed second conversion signal.

[0075] Preferably, the delay circuit includes a first resistor R1 and a first capacitor C1.

[0076] One end of the first resistor R1 is connected to the output terminal of the first OR gate circuit, and the other end of the first resistor R1 is connected to the input terminal of the NOT gate circuit.

[0077] One end of the first capacitor C1 is connected to the connection point of the first resistor R1 and the input terminal of the NOT gate circuit, and the other end of the first capacitor C1 is grounded.

[0078] The resistance value of the first resistor R1 and the capacitance value of the first capacitor C1 need to be set according to the actual delay requirement, and no specific limitation is made here.

[0079] In this embodiment, based on the first OR gate circuit, the delay circuit, and the NOT gate circuit, a reliable and accurate second conversion signal can be generated, laying a foundation for improving the reliability and safety of the fault protection circuit. At the same time, based on the delay circuit, the problem of mis-triggering caused by the delay of the turn-off control signal can be effectively avoided, further improving the reliability of the fault protection circuit.

[0080] In one embodiment, referring to Figure 3 , the second logic conversion circuit 520 includes a second OR gate circuit.

[0081] The first input terminal of the second OR gate circuit is connected to the output terminal of the NOT gate circuit, the second input terminal of the second OR gate circuit is connected to the output terminal of the shutdown circuit 300, and the output terminal of the second OR gate circuit is connected to the first end of the switch circuit 530, and is configured to generate a switch control signal according to the shutdown control signal and the first conversion signal.

[0082] Among them, the second OR gate circuit is configured to generate a switch control signal according to the first conversion signal and the shutdown control signal; among them, the switch control signal includes a high-level signal and a low-level signal; for example, when the main control circuit 100 fails or the power management circuit 200 fails, the first conversion signal is a low-level signal; at this time, if the shutdown circuit 300 is normal, the shutdown control signal is a high-level signal, and the second OR gate circuit generates a switch control signal as a high-level signal according to the first conversion signal, that is, the low-level signal, and the shutdown control signal, that is, the high-level signal; if the shutdown circuit 300 fails, the shutdown control signal is a low-level signal, and the second OR gate circuit generates a switch control signal as a low-level signal according to the first conversion signal, that is, the low-level signal, and the shutdown control signal, that is, the low-level signal.

[0083] In this embodiment, based on the second OR gate circuit, a reliable and accurate switch control signal can be generated according to the first conversion signal and the shutdown control signal, laying a foundation for reliably turning on or off the switch circuit 530.

[0084] In one embodiment, refer to Figure 3 , the switch circuit 530 includes a first switching transistor Q1;

[0085] The first end of the first switching transistor Q1 is connected to the output terminal of the second OR gate circuit, the second end of the first switching transistor Q1 is connected to the power supply terminal of the power management circuit 200, and the third end of the first switching transistor Q1 is connected to an external power supply.

[0086] Preferably, the first switching transistor Q1 is a MOS transistor.

[0087] Among them, the first switching transistor Q1 has a conduction characteristic; the first end of the first switching transistor Q1 is the gate of the MOS transistor; the second end of the first switching transistor Q1 is the source of the MOS transistor; the third end of the first switching transistor Q1 is the drain of the MOS transistor. Among them, the external power supply is a 3.3V power supply.

[0088] Exemplarily, preferably, the first switching transistor Q1 is an NPN-type MOS transistor. If the switching control signal is a high-level signal, the first switching transistor Q1 conducts, that is, the second terminal and the third terminal of the first switching transistor Q1 conduct, that is, the source and the drain of the MOS transistor conduct. At this time, the external power supply supplies power to the power management circuit 200 through the first switching transistor Q1, that is, the MOS transistor. If the switching control signal is a low-level signal, the first switching transistor Q1 turns off, that is, the second terminal and the third terminal of the first switching transistor Q1 are disconnected, that is, the source and the drain of the MOS transistor are disconnected. At this time, the external power supply stops supplying power to the power management circuit 200.

[0089] In this embodiment, based on the conduction characteristic of the first switching transistor Q1, it is possible to accurately control whether the external power supply maintains or stops supplying power to the power management circuit 200, and further accurately control the power supply state of the entire fault protection circuit, so as to avoid the problem that when the main control circuit 100, or the power management circuit 200, or the shutdown circuit 300 fails, an incorrect control signal is sent out, affecting the safety of the vehicle itself.

[0090] In one embodiment, refer to Figure 4 , the shutdown circuit 300 includes a second switching transistor Q2;

[0091] The first terminal of the second switching transistor Q2 is connected to the power management circuit 200, the second terminal of the second switching transistor Q2 is connected to the external power supply, and the third terminal of the second switching transistor Q2 is connected to the signal transceiver component 400.

[0092] Preferably, the second switching transistor Q2 is a triode.

[0093] Among them, the second switching transistor Q2 has a conduction characteristic; the first terminal of the second switching transistor Q2 is the base of the triode; the second terminal of the second switching transistor Q2 is the emitter of the triode; the third terminal of the second switching transistor is the collector of the triode.

[0094] It should be noted that the third terminal of the second switching transistor Q2 is connected to the silent control terminal of the signal transceiver component 400, and is used to generate a shutdown control signal, that is, a high-level signal, according to the shutdown request signal, that is, a high-level signal, when the main control circuit 100 fails or the power management circuit 200 fails, and control the signal transceiver component 400 to be in a shutdown state.

[0095] Exemplarily, when the main control circuit 100 fails or the power management circuit 200 fails, according to the shutdown request signal, that is, a high-level signal, the second switching transistor Q2 is controlled to be in a conducting state, that is, the second terminal and the third terminal of the second switching transistor Q2 conduct, that is, the emitter and the collector of the triode conduct. At this time, the shutdown control signal is pulled high by the external power supply, that is, the shutdown control signal is a high-level signal. Further, connecting the shutdown control signal, that is, a high-level signal, to the silent control terminal of the signal transceiver component 400 can control the signal transceiver component 400 to be in a shutdown state.

[0096] It should be noted that when both the main control circuit 100 and the power management circuit 200 are normal, the second switching transistor Q2 is in the off state. At this time, the silent control terminal of the signal transceiver component 400 is in the low level state, and the signal transceiver component 400 operates normally.

[0097] Furthermore, in other embodiments, referring to Figure 5 , the shutdown circuit 300 further includes a third OR gate circuit;

[0098] The first input terminal of the third OR gate circuit is connected to the signal sending terminal of the main control circuit 100, the second input terminal of the third OR gate circuit is connected to the third terminal of the second switching transistor Q2, and the output terminal of the third OR gate circuit is connected to the signal external sending terminal of the signal transceiver component 400; it is used to generate a communication signal according to the shutdown control signal and transmit the communication signal to the signal transceiver component 400;

[0099] The signal transceiver component 400 is used to forward the communication signal to the outside.

[0100] Among them, the signal sending terminal of the main control circuit 100 is used to generate a control signal; the control signal includes data for information interaction.

[0101] For example, when the main control circuit 100 fails or the power management circuit 200 fails, according to the shutdown request signal, that is, the high level signal, the second switching transistor Q2 is controlled to be in the on state. At this time, the shutdown control signal is pulled high by the external power supply, that is, the shutdown control signal is a high level signal; further, the shutdown control signal is transmitted to the third OR gate circuit, and the third OR gate circuit generates a communication signal according to the control signal and the shutdown control signal, that is, the high level signal. At this time, the communication signal is a constant high level signal, and the signal transceiver component 400 shuts down the communication according to the communication signal, that is, the constant high level signal, to avoid the external transmission of incorrect control signals.

[0102] It should be noted that when both the main control circuit 100 and the power management circuit 200 are normal, the second switching transistor Q2 is in the off state. At this time, the second input terminal of the third OR gate circuit is in the high impedance state, and the communication signal changes correspondingly following the change of the control signal. Based on this, information interaction is realized.

[0103] In this embodiment, based on the shutdown circuit 300, when the main control circuit 100 fails or the power management circuit 200 fails, the signal transceiver component 400 can be reliably shut down to avoid the problem of external transmission of incorrect control signals, and further improve the reliability of the fault protection circuit.

[0104] In other embodiments, referring to Figure 6 , the shutdown circuit 300 includes a third switching transistor Q3, a fourth switching transistor Q4, a second resistor R2, and a third resistor R3;

[0105] The gate of the third switching transistor Q3 is connected to the power management circuit 200. The drain of the third switching transistor Q3 is connected to the gate of the fourth switching transistor Q4 via the third resistor R3, and the source of the third switching transistor Q3 is grounded.

[0106] The drain of the fourth switching transistor Q4 is connected to an external power supply, and the source of the fourth switching transistor Q4 is connected to the power supply terminal of the signal transceiver component 400.

[0107] The second resistor R2 is connected between the gate and the drain of the fourth switching transistor Q4.

[0108] Among them, the third switching transistor Q3 is an NPN-type MOS transistor; the fourth switching transistor Q4 is an NPN-type MOS transistor.

[0109] Exemplarily, when the main control circuit 100 fails or the power management circuit 200 fails, according to the turn-off request signal, i.e., the high-level signal, the third switching transistor Q3 is turned on, and the external power supply is grounded via the second resistor R2 and the third resistor R3. At this time, the gate of the fourth switching transistor Q4 is at a low level, and the fourth switching transistor Q4 is turned off, and the external power supply stops supplying power to the power supply terminal of the signal transceiver component 400. When both the main control circuit 100 and the power management circuit 200 are normal, the gate of the third switching transistor Q3 is at a low level, and the third switching transistor Q3 is turned off. At this time, the gate of the fourth switching transistor Q4 is pulled high by the external power supply via the second resistor R2, the fourth switching transistor Q4 is turned on, and the external power supply supplies power to the power supply terminal of the signal transceiver component 400 via the fourth switching transistor Q4.

[0110] In a specific embodiment, referring to Figure 7 , assume that the main control chip is an SOC chip; the power management chip is a PMIC chip, and the signal transceiver component 200 is a CAN signal transceiver; the turn-off circuit 300 includes a second switching transistor Q2 and a third OR gate circuit. The SOC chip sends a control signal to be transmitted to the bus to the CAN signal transceiver via the signal sending terminal TX. When the SOC chip fails or the PMIC chip fails, the fault signal MCU_Error_out is a high-level signal, and the turn-off request signal ENDRV is a high-level signal. If the turn-off circuit 300 is normal, the turn-off control signal CAN_TX_Shut_Off is a high-level signal. At this time, the switch control signal PowerOff is a high-level signal, the first switching transistor Q1 is turned on, and the power supply of the PMIC chip is normal.

[0111] When the SOC chip fails or the PMIC chip fails, the fault signal MCU_Error_out is a high-level signal, and the shutdown request signal ENDRV is a high-level signal. If the shutdown circuit 300 fails, the shutdown control signal CAN_TX_Shut_Off is a low-level signal. At this time, the switch control signal PowerOff is a low-level signal, the first switch Q1 is turned off, the power supply of the PMIC chip is cut off, and the system is forced to shut down.

[0112] When both the SOC chip and the PMIC chip are normal, regardless of whether the shutdown circuit 300 is normal or not, the switch control signal PowerOff is a high-level signal at this time, the first switch Q1 is turned on, and the power supply of the PMIC chip is normal.

[0113] For the above-mentioned fault protection circuit, on the one hand, based on the power supply control circuit 500, it can accurately and reliably control whether to maintain or stop supplying power to the power management circuit 200 according to the fault states of the main control circuit 100, the power management circuit 200, and the shutdown circuit 300. Based on this, the safety and reliability of the entire fault protection circuit are improved, laying a foundation for improving the safety of the vehicle itself. On the other hand, based on the first logic conversion circuit 510, the second logic conversion circuit 520, and the switch circuit 530, when the main control circuit 100 fails or the power management circuit 200 fails, the signal transceiver component 400 can be timely and reliably shut off according to the state of the shutdown circuit 300, or the power supply of the power management circuit 200 can be cut off, so as to avoid the problem of low vehicle safety caused by the external transmission of incorrect control signals, improve the reliability of the fault protection circuit, and lay a foundation for improving the safety of the vehicle itself. On the third hand, based on the first OR gate circuit, the delay circuit, and the NOT gate circuit, a reliable and accurate second conversion signal can be generated, laying a foundation for improving the reliability and safety of the fault protection circuit. At the same time, based on the delay circuit, the problem of false triggering caused by the delay of the shutdown control signal can be effectively avoided, further improving the reliability of the fault protection circuit. On the fourth hand, based on the second OR gate circuit, a reliable and accurate switch control signal can be generated according to the first conversion signal and the shutdown control signal, laying a foundation for reliably turning on or off the switch circuit 530. On the fifth hand, based on the conduction characteristics of the first switch Q1, it can accurately control whether the external power supply maintains or stops supplying power to the power management circuit 200, and then can accurately control the power supply state of the entire fault protection circuit, so as to avoid the problem of incorrect control signals being externally transmitted and affecting the vehicle safety when the main control circuit 100, or the power management circuit 200, or the shutdown circuit 300 fails. On the sixth hand, based on the shutdown circuit 300, when the main control circuit 100 fails or the power management circuit 200 fails, the signal transceiver component 400 can be reliably shut off to avoid the problem of incorrect control signals being externally transmitted, further improving the reliability of the fault protection circuit.

[0114] In the description of this specification, the descriptions referring to terms such as "some embodiments", "other embodiments", etc. mean that the specific features, structures, materials, or characteristics described in connection with the embodiment or example are included in at least one embodiment or example of the present application. In this specification, the schematic descriptions of the above terms do not necessarily refer to the same embodiment or example.

[0115] The technical features of the above-described embodiments can be combined arbitrarily. For the sake of brevity of description, not all possible combinations of the technical features in the above-described embodiments are described. However, as long as there is no contradiction in the combination of these technical features, it should be considered as the scope described in this specification.

[0116] The above-described embodiments only represent several implementation manners of the present application. The descriptions are relatively specific and detailed, but should not be construed as a limitation on the scope of the present application. It should be noted that for those of ordinary skill in the art, without departing from the concept of the present application, several modifications and improvements can still be made, and these all belong to the protection scope of the present application. Therefore, the protection scope of the present application should be subject to the appended claims.

Claims

1. A fault protection circuit, characterized in that: The fault protection circuit includes a main control circuit, a power management circuit, a shutdown circuit, a power supply control circuit and a signal transceiver component; The main control circuit is connected to the power management circuit and is used to generate a fault signal when the main control circuit fails; The power management circuit is connected to the shutdown circuit and is used to generate a shutdown request signal according to the fault signal; or, generating a shutdown request signal when a power management circuit fails; The shutdown circuit is connected to the signal transceiver component and is used to generate a shutdown control signal according to the shutdown request signal to shut down the signal transceiver component; The power supply control circuit is connected to the main control circuit, the power management circuit and the shutdown circuit respectively, and is used to maintain or stop supplying power to the power management circuit according to the fault signal, the shutdown request signal and the shutdown control signal.

2. The fault protection circuit according to claim 1, characterized in that: The power supply control circuit includes a first logic conversion circuit, a second logic conversion circuit and a switch circuit; The first input end of the first logic conversion circuit is connected to the fault output end of the main control circuit, the second input end of the first logic conversion circuit is connected to the output end of the power management circuit, and the output end of the first logic conversion circuit is connected to the first input end of the second logic conversion circuit, for generating a first conversion signal according to the fault signal and the shutdown request signal; The second input end of the second logic conversion circuit is connected to the output end of the shutdown circuit, and the output end of the second logic conversion circuit is connected to the first end of the switch circuit, for generating a switch control signal according to the shutdown control signal and the first conversion signal; The second end of the switch circuit is connected to the power supply end of the power management circuit, and the third end of the switch circuit is connected to the external power supply, and is used to turn on or off the switch circuit according to a switch control signal; when the switch circuit is turned on, power is supplied to the power management circuit through the external power supply; when the switch circuit is turned off, power supply to the power management circuit is stopped.

3. The fault protection circuit according to claim 2, characterized in that: The first logic conversion circuit includes a first OR gate circuit, a delay circuit and a NOT gate circuit; The first input end of the first OR gate circuit is connected to the fault output end of the main control circuit, the second input end of the first OR gate circuit is connected to the output end of the power management circuit, and the output end of the first OR gate circuit is connected to the input end of the NOT gate circuit via the delay circuit, and is used to generate a second conversion signal according to the fault signal and the shutdown request signal; The delay circuit is used to delay the second conversion signal for a preset time length, and transmit the delayed second conversion signal to the NOT gate circuit; The output end of the NOT gate circuit is connected to the first input end of the second logic conversion circuit, and is used to generate a first conversion signal according to the delayed second conversion signal.

4. The fault protection circuit according to claim 3, characterized in that: The delay circuit includes a first resistor and a first capacitor; One end of the first resistor is connected to the output end of the first OR gate circuit, and the other end of the first resistor is connected to the input end of the NOT gate circuit; One end of the first capacitor is connected to a connection point between the first resistor and the input end of the NOT gate circuit, and the other end of the first capacitor is grounded.

5. The fault protection circuit according to claim 3, characterized in that: The second logic conversion circuit includes a second OR gate circuit; The first input end of the second OR gate circuit is connected to the output end of the NOT gate circuit, the second input end of the second OR gate circuit is connected to the output end of the shutdown circuit, and the output end of the second OR gate circuit is connected to the first end of the switch circuit, and is used to generate a switch control signal according to the shutdown control signal and the first conversion signal.

6. The fault protection circuit according to claim 5, characterized in that: The switch circuit comprises a first switch tube; The first end of the first switch tube is connected to the output end of the second OR gate circuit, the second end of the first switch tube is connected to the power supply end of the power management circuit, and the third end of the first switch tube is connected to an external power supply.

7. The fault protection circuit according to claim 6, characterized in that: The first switch tube is a MOS tube.

8. The fault protection circuit according to claim 1, characterized in that: The shutdown circuit includes a second switch tube; The first end of the second switch tube is connected to the power management circuit, the second end of the second switch tube is connected to the external power supply, and the third end of the second switch tube is connected to the signal transceiver component.

9. The fault protection circuit according to claim 8, characterized in that: The second switch tube is a triode.

10. The fault protection circuit according to claim 1, characterized in that: The power management circuit includes a power management chip; The signal transceiver component includes a signal transceiver.

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