Building displacement deformation monitoring system

Abstract

The utility model provides a building displacement deformation monitoring system, which comprises a transmitting module, a laser module, an inclination angle module, a plurality of receiving frequency mixing modules, a plurality of gain modules and a control module, and is characterized in that the output end of the transmitting module is in communication connection with the input end of the laser module and the input end of the inclination angle module respectively; the monitoring module is used for sending monitoring signals to the laser module and the inclination module; the output end of the laser module and the output end of the inclination angle module are electrically connected with the input end of the corresponding receiving frequency mixing module. The output ends of the plurality of receiving frequency mixing modules are electrically connected with the input ends of the corresponding gain modules respectively; the output ends of the plurality of gain modules are electrically connected with the input end of the control module; monitoring signals of the laser module and the inclination angle module are amplified by the gain module and fed back to the control module; filtering and gain amplification can be carried out on a monitoring signal feedback signal, the quality of a transmission signal is improved, and the accuracy of building monitoring is further improved.

Description

Technical Field

[0001] The utility model relates to the technical field of building monitoring, in particular to a building displacement deformation monitoring system. Background Art

[0002] In recent years, natural disasters have occurred frequently, such as building collapse caused by earthquakes, mudslides and other disasters. When rescue teams search and rescue trapped people in collapsed buildings, they are prone to secondary collapse of the buildings, which threatens their lives. Therefore, it is often necessary to monitor the displacement and deformation of buildings.

[0003] A displacement monitoring system that can be used for monitoring deformation of building structures, with publication number CN207050704U, includes a first detection unit, which is used to detect the displacement and / or speed of a measured point of the building; the first detection unit includes at least one long-range detection component, which is used to obtain the displacement and / or speed change process of at least one measured point; the utility model implements real-time monitoring of characteristic positions of a building through non-contact sensing technologies such as radar, and can realize real-time feedback on the displacement changes and change trends of the main structures of the building.

[0004] In the prior art, detection sensors are usually used to monitor the characteristic positions of buildings. However, the sensors currently do not do much processing on the monitoring signals during the communication signal transmission with the host, which affects the signal quality when receiving the monitoring feedback signal, thereby reducing the accuracy of building monitoring. Utility Model Content

[0005] In view of this, the utility model proposes a building displacement deformation monitoring system, which can filter and gain amplify the monitoring signal feedback signal, improve the quality of the transmission signal, and further improve the accuracy of building monitoring.

[0006] The technical solution of the utility model is implemented as follows: The utility model provides a building displacement deformation monitoring system, the system includes a transmitting module, a laser module, a tilt module, multiple receiving mixing modules, multiple gain modules and a control module, wherein:

[0007] The output end of the transmitting module is communicatively connected to the input end of the laser module and the tilt module, and is used to send monitoring signals to the laser module and the tilt module;

[0008] The output ends of the laser module and the tilt module are electrically connected to the input ends of the corresponding receiving mixer modules respectively; the output ends of the multiple receiving mixer modules are electrically connected to the input ends of the corresponding gain modules respectively; the output ends of the multiple gain modules are electrically connected to the input end of the control module;

[0009] The monitoring signals of the laser module and the tilt module are amplified by the gain module and fed back to the control module.

[0010] On the basis of the above technical solution, preferably, the transmitting module includes a clock buffer unit, a clock processing unit, a frequency synthesis unit, a coupling processing unit and two low noise processing units, wherein:

[0011] The output end of the clock buffer unit is electrically connected to the input end of the clock processing unit and the frequency synthesis unit respectively; the output end of the frequency synthesis unit is electrically connected to the input end of the coupling processing unit, the coupling processing unit has two output ends, the two output ends of the coupling processing unit are electrically connected to the input end of the corresponding low-noise processing unit respectively, and the output ends of the two low-noise processing units are both electrically connected to the input end of the receiving mixing module.

[0012] On the basis of the above technical scheme, preferably, the clock buffer unit includes a clock chip U2, a resistor R33, a crystal oscillator chip, a capacitor C185, a capacitor C186, a resistor R21, a resistor R35, a capacitor C45, a capacitor C46, ​​a dual output winding transformer L2, a resistor R141 and a resistor R145, wherein a pin 1 of the clock chip U2 is electrically connected to one end of the resistor R33, the other end of the resistor R33 is electrically connected to the output end of the crystal oscillator chip, the power end of the crystal oscillator chip is electrically connected to the external power input end, the capacitor C186 and the capacitor C185 respectively, the other ends of the capacitor C186 and the capacitor C185 are commonly grounded, a pin 2 of the clock chip U2 is electrically connected to one end of the resistor R21, the other end of the resistor R21 is electrically connected to the external power input end, a pin 8 of the clock chip U2 is electrically connected to one end of the resistor R35, and the resistor R The other end of 35 is electrically connected to the input end of the clock processing unit 12, the pin 6 of the clock chip U2 is electrically connected to the external power input end and one end of the capacitor C45 respectively, the other end of the capacitor C45 is grounded, the pin 5 of the clock chip U2 is electrically connected to the capacitor C46, ​​the dual output winding transformer L2 has 5 pins, the other end of the capacitor C46 is electrically connected to the pin 5 of the dual output winding transformer L2, the pin 1 of the dual output winding transformer L2 is electrically connected to one end of the resistor R141, the pin 3 of the dual output winding transformer L2 is electrically connected to one end of the resistor R145, and one end of the resistor R141 and the resistor R145 are both electrically connected to the input end of the frequency synthesis unit 13, and the ground end of the crystal oscillator chip, the pin 4 of the clock chip U2, the other end of the capacitor C45, the pin 4 of the dual output winding transformer L2 and the pin 2 of the dual output winding transformer L2 are all grounded.

[0013] On the basis of the above technical scheme, preferably, the coupling processing unit includes a voltage-controlled oscillation chip Y1, a capacitor C235, a capacitor C56, a capacitor C44, a RF power splitter chip U7, a resistor R49, a capacitor C57, a first filter L4, a low-noise amplifier U8, a resistor R50, a resistor R51, a capacitor C59, a capacitor C60, a capacitor C61, a capacitor C58, a second filter L3, a directional coupler P1, a resistor R52, a resistor R53, a resistor R54, a resistor R55, a first RF coaxial connector J38, a filter F1, a RF power splitter chip U10 and a resistor R58, wherein the output end of the frequency synthesis unit 13 is electrically connected to the input end of the voltage-controlled oscillation chip Y1, and the voltage-controlled oscillation chip The power connection end of Y1 is electrically connected to the external power supply, capacitor C235, capacitor C56 and capacitor C44 respectively, the other ends of the capacitors C235, C56 and C44 are commonly grounded, the output end of the voltage-controlled oscillation chip Y1 is electrically connected to the input end of the RF power splitter chip U7, the RF power splitter chip U7 has a first output end and a second output end, the first output end of the RF power splitter chip U7 is electrically connected to the input end of the frequency synthesis unit 13, the second output end of the RF power splitter chip U7 is electrically connected to the resistor R49 and the capacitor C57 respectively, the other end of the resistor R49 is electrically connected to the first output end of the RF power splitter chip U7, the other end of the capacitor C57 is electrically connected to the first filter L4 and the low noise amplifier U8 respectively. The pin 2 of the low noise amplifier U8 is electrically connected, the other end of the first filter L4 is grounded, the pin 12 of the low noise amplifier U8 is electrically connected to one end of the resistor R50, the pin 11 of the low noise amplifier U8 is electrically connected to the other end of the resistor 50, the resistor R51, the capacitor C59, the capacitor C60, the capacitor C61 and the second filter L3 respectively, the other end of the second filter L3 is electrically connected to the pin 9 of the low noise amplifier U8, the other end of the resistor R51 is electrically connected to the external power supply, the other ends of the capacitors C59, C60 and C61 are commonly grounded, the pin 8 of the low noise amplifier U8 is electrically connected to the capacitor C58, the other end of the capacitor C58 is electrically connected to the pin 1 of the directional coupler P1, and the pin 2 of the directional coupler P1 is electrically connected to the first RF The coaxial connector J38 is electrically connected, the pin 3 of the directional coupler P1 is electrically connected to the resistor R52, the other end of the resistor R52 and the pin 5 of the directional coupler P1 are commonly grounded, the pin 4 of the directional coupler P1 is electrically connected to the resistor R54 and the resistor R53 respectively, the other end of the resistor R54 is grounded, the other end of the resistor R53 is electrically connected to the resistor R55 and the input end of the filter F1 respectively, the output end of the filter F1 is electrically connected to the input end of the RF power splitter chip U10, the RF power splitter chip U10 has two output ends, the two output ends of the RF power splitter chip U10 are respectively electrically connected to the corresponding low noise processing unit input ends, and a resistor R58 is electrically connected between the two output ends of the RF power splitter chip U10.

[0014] On the basis of the above technical solution, preferably, the low noise processing unit 15 includes a capacitor C240, a third filter L24, a low noise amplifier U31, a resistor R59, a resistor R68, a capacitor C242, a capacitor C244, a capacitor C245, a capacitor C241 and a fourth filter L23, wherein,

[0015] One end of the capacitor C240 ​​is electrically connected to the output end of the RF power splitter chip U10, and the other end of the capacitor C240 ​​is electrically connected to the third filter L24 and pin 2 of the low noise amplifier U31 respectively, the other end of the third filter L24 is grounded, the pin 12 of the low noise amplifier U31 is electrically connected to one end of the resistor R59, the pin 11 of the low noise amplifier U31 is electrically connected to the other end of the resistor R59, the resistor R68, the capacitor C242, the capacitor C244, the capacitor C245 and the fourth filter L23 respectively, the other end of the fourth filter L23 is electrically connected to pin 9 of the low noise amplifier U31, the other end of the resistor R68 is electrically connected to the external power supply, the other ends of the capacitors C242, C244 and C245 are commonly grounded, and the pin 8 of the low noise amplifier U31 is electrically connected to the capacitor C241.

[0016] On the basis of the above technical solution, preferably, the receiving mixing module 4 includes a mixing chip U12, a capacitor C72, a resistor R65, a resistor R66, a resistor R64, a bandpass filter F2, a capacitor C67, a capacitor C69, a capacitor C70, a capacitor C71, a fifth filter L7, a resistor R62, a resistor R63, a sixth filter L8, a capacitor C68, a low noise amplifier U11, and a second RF coaxial connector J11, wherein,

[0017] The output end of the low noise processing unit is electrically connected to pin 6 of the mixing chip U12, pin 2 of the mixing chip U12 is electrically connected to capacitor C72, and the other end of capacitor C72 is electrically connected to the input end of the gain module; pin 3 of the mixing chip U12 is electrically connected to resistor R64 and resistor R66 respectively, the other end of the resistor R64 is electrically connected to resistor R65 and the output end of the bandpass filter F2 respectively, the input end of the bandpass filter F2 is electrically connected to capacitor C67, and the other ends of the resistor R65 and resistor R66 are both grounded; one end of the capacitor C68 is electrically connected to the second RF coaxial connector J11, and the other end of the capacitor C68 is electrically connected to the sixth The filter L8 is electrically connected to pin 2 of the low noise amplifier U11, the other end of the sixth filter L8 is grounded, the pin 12 of the low noise amplifier U11 is electrically connected to one end of the resistor R62, the pin 11 of the low noise amplifier U11 is electrically connected to the other end of the resistor R62, the resistor R63, the capacitor C69, the capacitor C70, the capacitor C71 and the fifth filter L7 respectively, the other end of the fifth filter L7 is electrically connected to pin 9 of the low noise amplifier U11, the other end of the resistor R63 is electrically connected to the external power supply, the other ends of the capacitors C69, C70 and C71 are commonly grounded, and the pin 8 of the low noise amplifier U11 is electrically connected to the other end of the capacitor C67.

[0018] On the basis of the above technical solution, preferably, the gain module includes a first amplifier unit, a gain amplifier unit and a differential amplifier unit, the output end of the receiving mixing module is electrically connected to the input end of the first amplifier unit, the output end of the first amplifier unit is electrically connected to the input end of the gain amplifier unit, the output end of the gain amplifier unit is electrically connected to the input end of the differential amplifier unit, and the output end of the differential amplifier unit is electrically connected to the input end of the control module.

[0019] On the basis of the above technical solution, preferably, the amplifier unit 53 includes an amplifier U33, a resistor R77, a capacitor C82, a capacitor C81, a capacitor C80, a capacitor C79, a resistor R75, a resistor R30, a resistor R76, a resistor R100, a resistor R101, a capacitor C95, a capacitor C117, a capacitor C118, a capacitor C25, a capacitor C26, a capacitor C27, a capacitor C199, a capacitor C96 and a resistor R32, wherein:

[0020] Pin 1 of amplifier U33 is electrically connected to resistor R30, capacitor C80 and resistor R75 respectively, the other end of capacitor C80 is electrically connected to capacitor C81, capacitor C79 and resistor R76 respectively, the other end of capacitor C81 is electrically connected to capacitor C82 and resistor R77 respectively, the other end of capacitor C82 is grounded, and the other end of resistor R77 is electrically connected to the other end of capacitor C72; the other end of capacitor C79 is electrically connected to pin 2 of amplifier U33 and the other end of resistor R75 respectively, the other end of resistor R76 is electrically connected to pin 3 of amplifier U33, capacitor C25, capacitor C26, capacitor C27, capacitor C199, external power supply, pin 5 of amplifier U33 and capacitor C96 respectively, capacitors C25, capacitor C26, Capacitor C27 and capacitor C199 are commonly grounded; the other end of resistor R30 is electrically connected to resistor R99, the other end of resistor R99 is respectively electrically connected to the other end of capacitor C96, resistor R100 and resistor R101, the other end of resistor R100 is respectively electrically connected to pin 6 of amplifier U33 and capacitor C95, the other end of resistor R101 is respectively electrically connected to the other end of capacitor C95, pin 7 of amplifier U33 and resistor R32, the other end of resistor R32 is electrically connected to the input end of the gain amplifier unit, one end of pin 8 of amplifier U33 is respectively electrically connected to an external power supply, capacitor C118 and capacitor C117, the other ends of capacitor C118 and capacitor C117 are commonly electrically connected to pin 9 of amplifier U33 and grounded.

[0021] On the basis of the above technical scheme, preferably, the gain amplifier unit includes a gain amplifier chip U16, a capacitor C47, a resistor R31, a capacitor C50, a capacitor C84 and a capacitor C87, wherein pin 2 of the gain amplifier chip U16 is electrically connected to the other end of the resistor R32, pin 3 and pin 4 of the gain amplifier chip U16 are electrically connected to capacitor C47 and an external power supply respectively, the other end of capacitor C47 is grounded, pin 1 of the gain amplifier chip U16 is electrically connected to capacitor C50, an external power supply, capacitor C84, capacitor C87 and pin 10 of the gain amplifier chip U16 respectively, the other ends of capacitor C50, capacitor C84 and capacitor C87 are all grounded, pin 5 of the gain amplifier chip U16 is electrically connected to resistor R31, and the other end of resistor R31 is electrically connected to the input end of the differential amplifier unit.

[0022] On the basis of the above technical solution, preferably, the differential amplifier unit includes a differential amplifier chip U23, a resistor R81, a resistor R28, a resistor R115, a capacitor C104, a capacitor C163, a resistor R82, a capacitor C103, a capacitor C102, a resistor R85 and a resistor R84, wherein:

[0023] Pin 1 of the differential amplifier chip U23 is electrically connected to resistor R28 and resistor R82 respectively, the other end of resistor R28 is electrically connected to an external power supply, resistor R115 and capacitor C104 respectively, the other end of capacitor C104 is electrically connected to capacitor C163 and grounded, the other end of capacitor C163 is electrically connected to the other end of resistor R115 and pin 2 of the differential amplifier chip U23 respectively, the other end of resistor R82 is electrically connected to pin 4 of the differential amplifier chip U23 and the input end of the control module 6 respectively, the differential amplifier chip Pin 3 of U23 is electrically connected to resistor R85, capacitor C102, capacitor C103 and an external power supply respectively. The other ends of capacitor C102 and capacitor C103 are commonly grounded. The other end of resistor R85 is electrically connected to pin 7 of the differential amplifier chip U23. Pin 8 of the differential amplifier chip U23 is electrically connected to resistor R81 and resistor R84 respectively. The other end of resistor R81 is electrically connected to the other end of resistor R31. The other end of resistor R84 is electrically connected to pin 5 of the differential amplifier chip U23 and the input end of the control module respectively.

[0024] The building displacement deformation monitoring system of the utility model has the following beneficial effects compared with the prior art:

[0025] (1) When monitoring a building, the transmitting module sends a monitoring signal to the laser module and the tilt module. After the laser module and the tilt module receive the signal, the laser module can measure the distance of the building, and the tilt module can monitor the angle of the building. The signals monitored by the laser module and the tilt module are respectively fed back to the corresponding receiving mixing module. The mixing module filters the feedback signal for noise reduction and mixing. After mixing, the processed signal is passed to the gain module for gain processing. The dynamic range of the signal can be adjusted to make it more suitable for subsequent processing or analysis, thereby improving the quality of the signal, thereby improving the performance of the entire monitoring system and making it work more accurately and stably.

[0026] (2) By integrating clock buffering, clock processing, frequency synthesis, coupling and low-noise processing units, a stable, accurate and efficient signal transmission function is achieved, ensuring that the laser module and the tilt module can receive high-quality monitoring signals, providing a reliable data source for subsequent displacement and deformation monitoring. At the same time, it also improves the system's integration and reliability and reduces the complexity of maintenance and upgrades;

[0027] (3) Through the cascade connection of the first amplifier unit, the gain amplifier unit and the differential amplifier unit, the step-by-step amplification and differential conversion of the output signal of the receiving mixer module are realized, which helps to improve the amplitude and stability of the signal and ensure that the displacement deformation monitoring system can accurately and reliably measure and analyze. BRIEF DESCRIPTION OF THE DRAWINGS

[0028] In order to more clearly illustrate the embodiments of the utility model or the technical solutions in the prior art, the drawings required for use in the embodiments or the description of the prior art are briefly introduced below. Obviously, the drawings described below are only some embodiments of the utility model. For those of ordinary skill in the art, other drawings can be obtained based on these drawings without creative work.

[0029] Figure 1 This is a flow chart of the building displacement deformation monitoring system of the utility model;

[0030] Figure 2 This is a structural block diagram of a gain module of a building displacement deformation monitoring system of the utility model;

[0031] Figure 3 The circuit diagram of the clock buffer unit of the building displacement deformation monitoring system of the utility model;

[0032] Figure 4 This is a circuit diagram of a frequency synthesis unit of a building displacement deformation monitoring system of the utility model;

[0033] Figure 5 It is a circuit diagram of a clock processing unit of a building displacement deformation monitoring system of the utility model;

[0034] Figure 6 It is a circuit diagram of a coupling processing unit of a building displacement deformation monitoring system of the utility model;

[0035] Figure 7 It is a circuit diagram of a coupling processing unit of a building displacement deformation monitoring system of the utility model;

[0036] Figure 8 This is a circuit diagram of a low-noise processing unit of a building displacement deformation monitoring system of the utility model;

[0037] Fig. 9 This is a circuit diagram of a receiving mixing module of a building displacement deformation monitoring system of the utility model;

[0038] Fig.10 This is a circuit diagram of an amplifier unit of a building displacement deformation monitoring system of the utility model;

[0039] Fig.11 This is a circuit diagram of a gain amplifier unit of a building displacement deformation monitoring system of the utility model;

[0040] Fig.12 This is a circuit diagram of a differential amplifier unit of a building displacement deformation monitoring system of the utility model;

[0041] Fig.13This is a circuit diagram of a control module of a building displacement deformation monitoring system of the utility model. DETAILED DESCRIPTION

[0042] The technical solutions in the embodiments of the present invention will be clearly and completely described below in conjunction with the embodiments of the present invention. Obviously, the described embodiments are only part of the embodiments of the present invention, rather than all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without making creative work are within the scope of protection of the present invention.

[0043] like Figure 1-13 As shown, a building displacement deformation monitoring system of the utility model comprises a transmitting module 1, a laser module 2, a tilt module 3, a plurality of receiving mixing modules 4, a plurality of gain modules 5 and a control module 6, wherein:

[0044] The output end of the transmitting module 1 is communicatively connected to the input end of the laser module 2 and the inclination module 3, respectively, for sending monitoring signals to the laser module 2 and the inclination module 3; the output ends of the laser module 2 and the inclination module 3 are electrically connected to the input ends of the corresponding receiving mixer modules 4, respectively; the output ends of the plurality of receiving mixer modules 4 are electrically connected to the input ends of the corresponding gain modules 5, respectively; the output ends of the plurality of gain modules 5 are electrically connected to the input end of the control module 6; the monitoring signals of the laser module 2 and the inclination module 3 are amplified by the gain module 5 and fed back to the control module 6.

[0045] It should be noted that the laser module 2 and the inclination module 3 are respectively connected to the transmitting module 1 and the receiving mixing module 4 by wireless communication. When it is necessary to monitor the building, the transmitting module 1 sends a monitoring signal to the laser module 2 and the inclination module 3. After the laser module 2 and the inclination module 3 receive the signal, the laser module 2 can measure the distance to the building, and the inclination module 3 can monitor the angle of the building. The signals monitored by the laser module 2 and the inclination module 3 are respectively fed back to the corresponding receiving mixing module 4. The mixing module 4 filters, reduces noise and mixes the feedback signal. After mixing, the processed signal is passed to the gain module 5 for gain processing, which can adjust the dynamic range of the signal to make it more suitable for subsequent processing or analysis, thereby improving the quality of the signal, so as to improve the performance of the entire monitoring system and make it work more accurately and stably. The signal after gain processing is fed back to the control module 6, and a warning threshold is preset in the control module 6. When the feedback monitoring signal is greater than the warning threshold, the system will send an audible and visual alarm to remind the monitoring personnel.

[0046] Specifically, the laser module 2 in this embodiment is a high-precision laser rangefinder. Its principle is that after receiving the signal from the transmitting module 1, it will emit a laser beam to the building and measure the time from the emission to the reflection of the laser beam; based on this time difference, the laser module 2 can accurately calculate the distance between the building and the laser module; the inclination module 3 is a three-axis inclination sensor, which can accurately reflect the deformation of the building by measuring the inclination changes of the building in three directions in real time. The laser module 2 and the transmitting module 1 are both existing technologies and will not be described in detail here.

[0047] like Figure 1-8 As shown, the transmitting module 1 in this embodiment includes a clock buffer unit 11, a clock processing unit 12, a frequency synthesis unit 13, a coupling processing unit 14 and two low-noise processing units 15, wherein the output end of the clock buffer unit 11 is electrically connected to the input ends of the clock processing unit 12 and the frequency synthesis unit 13 respectively; the output end of the frequency synthesis unit 13 is electrically connected to the input end of the coupling processing unit 14, the coupling processing unit 14 has two output ends, the two output ends of the coupling processing unit 14 are electrically connected to the input ends of the corresponding low-noise processing units 15 respectively, and the output ends of the two low-noise processing units 15 are both electrically connected to the input end of the receiving mixing module 2.

[0048] It should be noted that the clock buffer unit 11 is used to provide a stable and accurate clock signal to ensure that the various units in the entire transmitting module 1 can work synchronously and reduce the error caused by clock deviation. The clock processing unit 12 further processes the clock signal from the clock buffer unit 11 and provides a variety of clock signal outputs to meet the needs of different functional units inside the transmitting module 1; the frequency synthesis unit 13 is used to generate and output a signal of a specified frequency according to system requirements, and provide an accurate and stable frequency signal for the transmitting module 1 to ensure that the laser module 2 and the tilt module 3 can receive accurate monitoring signals; the coupling processing unit 14 couples the signal from the frequency synthesis unit 13 for multi-channel output, so that the transmitting module 1 can send signals to the laser module 2 and the tilt module 3 at the same time, thereby improving the integration and efficiency of the system; the low-noise processing unit 15 is used to perform low-noise amplification and filtering on the signal to improve the signal-to-noise ratio of the signal, reduce the impact of noise on the signal quality, and ensure that the signal output by the transmitting module 1 has sufficient power and clarity, so that the laser module 2 and the tilt module 3 can accurately receive the signal, thereby improving the performance of the entire system.

[0049] like Figure 3As shown, as a preferred implementation, the clock buffer unit 11 in this embodiment includes a clock chip U2, a resistor R33, a crystal oscillator chip, a capacitor C185, a capacitor C186, a resistor R21, a resistor R35, a capacitor C45, a capacitor C46, ​​a dual-output winding transformer L2, a resistor R141 and a resistor R145, wherein a pin 1 of the clock chip U2 is electrically connected to one end of the resistor R33, the other end of the resistor R33 is electrically connected to the output end of the crystal oscillator chip, the power end of the crystal oscillator chip is electrically connected to the external power input end, the capacitor C186 and the capacitor C185 respectively, the other ends of the capacitor C186 and the capacitor C185 are commonly grounded, a pin 2 of the clock chip U2 is electrically connected to one end of the resistor R21, the other end of the resistor R21 is electrically connected to the external power input end, a pin 8 of the clock chip U2 is electrically connected to one end of the resistor R35, and the The other end of resistor R35 is electrically connected to the input end of the clock processing unit 12, pin 6 of the clock chip U2 is electrically connected to the external power input end and one end of capacitor C45 respectively, the other end of capacitor C45 is grounded, pin 5 of the clock chip U2 is electrically connected to capacitor C46, ​​the dual output winding transformer L2 has 5 pins, the other end of capacitor C46 is electrically connected to pin 5 of the dual output winding transformer L2, pin 1 of the dual output winding transformer L2 is electrically connected to one end of resistor R141, pin 3 of the dual output winding transformer L2 is electrically connected to one end of resistor R145, one end of resistor R141 and resistor R145 are both electrically connected to the input end of the frequency synthesis unit 13, the ground end of the crystal oscillator chip, pin 4 of the clock chip U2, the other end of capacitor C45, pin 4 of the dual output winding transformer L2 and pin 2 of the dual output winding transformer L2 are all grounded.

[0050] It should be noted that the clock buffer unit 11 provides a stable clock signal for the system, wherein the clock chip U2 is responsible for receiving and processing the clock signal from the crystal oscillator chip; the crystal oscillator chip generates the original clock signal, which is filtered and stabilized by capacitors C185 and C186 and then transmitted to pin 1 of the clock chip U2; this filtering process helps to eliminate noise and interference in the signal and improve the stability of the clock signal; resistors R33, R21 and R35 play the role of current limiting and voltage dividing in the circuit, and they are connected to the pins of the clock chip U2 to ensure the normal operation of the clock chip U2; wherein the other end of the resistor R35 is electrically connected to the input end of the clock processing unit 12, and the processing The processed clock signal is transmitted to the subsequent clock processing unit; capacitors C45 and C46 are used for power supply filtering and signal stabilization; they are connected to pins 6 and 5 of the clock chip U2 to ensure that the clock chip U2 obtains a stable power supply and reduces the influence of power supply noise on the clock signal; the dual-output winding transformer L2 is an important signal conversion and isolation element; it receives the signal from capacitor C46 and transmits the signal to resistors R141 and R145 through its pins 1 and 3; these two resistors then transmit the signal to the input end of the frequency synthesis unit 13; the use of the dual-output winding transformer L2 helps to achieve signal isolation and conversion and improve the signal's anti-interference ability.

[0051] Therefore, the clock buffer unit 11 provides a stable and accurate clock signal for the transmitting module 1, ensuring that the laser module 2 and the tilt module 3 can receive high-quality monitoring signals, thereby improving the performance of the entire displacement deformation monitoring system.

[0052] like Figure 6-7As shown, as a preferred implementation, the coupling processing unit 14 in this embodiment includes a voltage-controlled oscillation chip Y1, a capacitor C235, a capacitor C56, a capacitor C44, a RF power splitter chip U7, a resistor R49, a capacitor C57, a first filter L4, a low noise amplifier U8, a resistor R50, a resistor R51, a capacitor C59, a capacitor C60, a capacitor C61, a capacitor C58, a second filter L3, a directional coupler P1, a resistor R52, a resistor R53, a resistor R54, a resistor R55, a first RF coaxial connector J38, a filter F1, a RF power splitter chip U10 and a resistor R58, wherein the output end of the frequency synthesis unit 13 is electrically connected to the input end of the voltage-controlled oscillation chip Y1, and the voltage-controlled oscillator The power connection end of the voltage-controlled oscillation chip Y1 is electrically connected to the external power supply, the capacitor C235, the capacitor C56 and the capacitor C44 respectively, the other ends of the capacitors C235, C56 and C44 are commonly grounded, the output end of the voltage-controlled oscillation chip Y1 is electrically connected to the input end of the RF power splitter chip U7, the RF power splitter chip U7 has a first output end and a second output end, the first output end of the RF power splitter chip U7 is electrically connected to the input end of the frequency synthesis unit 13, the second output end of the RF power splitter chip U7 is electrically connected to the resistor R49 and the capacitor C57 respectively, the other end of the resistor R49 is electrically connected to the first output end of the RF power splitter chip U7, the other end of the capacitor C57 is electrically connected to the first filter L4 and the low noise amplifier U 8 is electrically connected, the other end of the first filter L4 is grounded, the pin 12 of the low noise amplifier U8 is electrically connected to one end of the resistor R50, the pin 11 of the low noise amplifier U8 is electrically connected to the other end of the resistor 50, the resistor R51, the capacitor C59, the capacitor C60, the capacitor C61 and the second filter L3 respectively, the other end of the second filter L3 is electrically connected to the pin 9 of the low noise amplifier U8, the other end of the resistor R51 is electrically connected to the external power supply, the other ends of the capacitors C59, C60 and C61 are commonly grounded, the pin 8 of the low noise amplifier U8 is electrically connected to the capacitor C58, the other end of the capacitor C58 is electrically connected to the pin 1 of the directional coupler P1, and the pin 2 of the directional coupler P1 is electrically connected to the first RF The coaxial connector J38 is electrically connected, the pin 3 of the directional coupler P1 is electrically connected to the resistor R52, the other end of the resistor R52 and the pin 5 of the directional coupler P1 are commonly grounded, the pin 4 of the directional coupler P1 is electrically connected to the resistor R54 and the resistor R53 respectively, the other end of the resistor R54 is grounded, the other end of the resistor R53 is electrically connected to the resistor R55 and the input end of the filter F1 respectively, the output end of the filter F1 is electrically connected to the input end of the RF power splitter chip U10, the RF power splitter chip U10 has two output ends, the two output ends of the RF power splitter chip U10 are respectively electrically connected to the corresponding input ends of the low noise processing unit 15, and a resistor R58 is electrically connected between the two output ends of the RF power splitter chip U10.

[0053] It should be noted that the coupling processing unit 14 is responsible for coupling the signal from the frequency synthesis unit 13 and outputting it to the low-noise processing unit 15; wherein, the voltage-controlled oscillation chip Y1 is one of the core components of the coupling processing unit 14; it receives the output signal from the frequency synthesis unit 13 and adjusts its oscillation frequency according to the signal; in order to ensure the stable operation of the voltage-controlled oscillation chip Y1, it is connected to the external power supply through capacitors C235, C56 and C44, and these capacitors play the role of filtering and stabilizing the power supply; the RF power division chip U7 has two output terminals, which receives the output signal from the voltage-controlled oscillation chip Y1 and divides the signal into two paths; wherein, the first output terminal is electrically connected to the input terminal of the frequency synthesis unit 13, which may be used for feedback or monitoring purposes; the second output terminal is connected to the subsequent circuit through resistor R49 and capacitor C57; this power division design enables the signal to meet the requirements of multiple processing paths at the same time; the low-noise amplifier U8 is used to perform low-noise amplification on the signal to improve the signal strength and signal-to-noise ratio; it receives the signal after the first filter L4 The processed signal is biased and filtered through a series of resistors and capacitors; the pin connection of the second filter L3 and the low noise amplifier U8 forms a feedback network, which helps to improve the stability of the amplifier; the directional coupler P1 is used to extract a part of the signal energy in the main transmission line and guide it to other circuit elements; here, it receives the signal from the low noise amplifier U8, and outputs a part of the signal through the first RF coaxial connector J38, and is grounded through the resistor R52; resistors R53, R54 and R55 are connected to other pins of the directional coupler P1 to form a signal sampling and detection circuit; the filter F1 is used to further filter out the stray components in the signal to ensure the purity of the output signal; it receives the signal processed by the directional coupler P1 and passes it to the RF power splitter chip U10; the RF power splitter chip U10 divides the signal output by the filter F1 into two paths again, and outputs them to two low noise processing units 15 respectively; the resistor R58 is connected between the two output ends of the RF power splitter chip U10, which may be used to balance the output or provide matching impedance.

[0054] Therefore, the coupling processing unit 14 realizes the signal coupling, amplification, filtering and distribution functions, ensuring that the transmitting module 1 can stably and accurately output the processed signal and provide high-quality signal input for the subsequent low-noise processing unit 15.

[0055] like Figure 8As shown, as a preferred implementation, the low noise processing unit 15 in this embodiment includes a capacitor C240, a third filter L24, a low noise amplifier U31, a resistor R59, a resistor R68, a capacitor C242, a capacitor C244, a capacitor C245, a capacitor C241 and a fourth filter L23, wherein one end of the capacitor C240 ​​is electrically connected to the output end of the RF power splitter chip U10, the other end of the capacitor C240 ​​is electrically connected to the third filter L24 and the pin 2 of the low noise amplifier U31, the other end of the third filter L24 is grounded, and the low noise Pin 12 of the amplifier U31 is electrically connected to one end of the resistor R59, and pin 11 of the low noise amplifier U31 is electrically connected to the other end of the resistor R59, the resistor R68, the capacitor C242, the capacitor C244, the capacitor C245 and the fourth filter L23 respectively, the other end of the fourth filter L23 is electrically connected to pin 9 of the low noise amplifier U31, the other end of the resistor R68 is electrically connected to the external power supply, the other ends of the capacitors C242, C244 and C245 are commonly grounded, and pin 8 of the low noise amplifier U31 is electrically connected to the capacitor C241.

[0056] It should be noted that the low-noise processing unit 15 performs low-noise amplification and filtering on the signal from the RF power splitter chip U10 to improve the signal-to-noise ratio and reduce the impact of noise on the signal quality. Among them, the capacitor C240 ​​is used as an input coupling capacitor, connected between the output end of the RF power splitter chip U10 and the input end of the low-noise amplifier U31; its function is to prevent the DC component from passing through and only allow the AC signal to pass through, thereby realizing the coupled transmission of the signal. The third filter L24 is an inductor element, which is connected to the capacitor C240 ​​and the pin 2 of the low-noise amplifier U31; the third filter L24 and the capacitor C240 ​​together constitute a simple low-pass filter for filtering out high-frequency noise and stray components in the input signal. The low-noise amplifier U31 is the core component of the low-noise processing unit 15, which amplifies the filtered signal; Pin 2 is the input end of the low-noise amplifier U31, connected Receive the signal from the third filter L24; Pin 11 and Pin 12 are the bias and power supply terminals of the low noise amplifier U31, which are connected to the external power supply through resistor R59 and resistor R68 to provide a stable operating voltage for the amplifier; capacitor C242, capacitor C244 and capacitor C245 are power supply filter capacitors of the low noise amplifier U31, which are respectively connected between pin 11 and ground, and are used to filter out noise in the power supply to ensure the stable operation of the low noise amplifier U31; the fourth filter L23 is connected to pin 9 and pin 11 of the low noise amplifier U31, and it and capacitors C242, C244 and C245 together form a feedback network; this feedback network can improve the performance of the low noise amplifier U31, such as improving stability, reducing distortion, etc.; capacitor C241 is connected to the output end of the low noise amplifier U31, and it may be used for coupling or filtering the output signal to ensure the purity of the output signal.

[0057] Therefore, the low noise processing unit 15 can effectively improve the signal-to-noise ratio of the signal and reduce the impact of noise on the signal quality, thereby providing high-quality signal input for the subsequent receiving mixing module 2; this helps to ensure the accuracy and reliability of the entire displacement deformation monitoring system.

[0058] like Fig. 9 As shown, as a preferred implementation, the receiving mixing module 4 in this embodiment includes a mixing chip U12, a capacitor C72, a resistor R65, a resistor R66, a resistor R64, a bandpass filter F2, a capacitor C67, a capacitor C69, a capacitor C70, a capacitor C71, a fifth filter L7, a resistor R62, a resistor R63, a sixth filter L8, a capacitor C68, a low noise amplifier U11, and a second RF coaxial connector J11, wherein the output end of the low noise processing unit 15 is electrically connected to pin 6 of the mixing chip U12, the pin 2 of the mixing chip U12 is electrically connected to the capacitor C72, and the other end of the capacitor C72 is electrically connected to the input end of the gain module 5; the pin 3 of the mixing chip U12 is electrically connected to the resistor R64 and the resistor R66 respectively, the other end of the resistor R64 is electrically connected to the resistor R65 and the output end of the bandpass filter F2 respectively, and the output end of the bandpass filter F2 is electrically connected to the input end of the gain module 5; the output end of the low noise processing unit 15 is electrically connected to the pin 6 of the mixing chip U12, the pin 2 of the mixing chip U12 is electrically connected to the capacitor C72, and the other end of the capacitor C72 is electrically connected to the input end of the gain module 5; the pin 3 of the mixing chip U12 is electrically connected to the resistor R64 and the resistor R66 respectively, the other end of the resistor R64 is electrically connected to the resistor R65 and the output end of the bandpass filter F2 respectively, and the output end of the bandpass filter F2 is electrically connected to the output end of the bandpass filter F2. The input end is electrically connected to the capacitor C67, and the other ends of the resistor R65 and the resistor R66 are both grounded; one end of the capacitor C68 is electrically connected to the second RF coaxial connector J11, and the other end of the capacitor C68 is electrically connected to the sixth filter L8 and the pin 2 of the low noise amplifier U11 respectively, the other end of the sixth filter L8 is grounded, the pin 12 of the low noise amplifier U11 is electrically connected to one end of the resistor R62, the pin 11 of the low noise amplifier U11 is electrically connected to the other end of the resistor R62, the resistor R63, the capacitor C69, the capacitor C70, the capacitor C71 and the fifth filter L7 respectively, the other end of the fifth filter L7 is electrically connected to the pin 9 of the low noise amplifier U11, the other end of the resistor R63 is electrically connected to the external power supply, the other ends of the capacitors C69, C70 and C71 are commonly grounded, and the pin 8 of the low noise amplifier U11 is electrically connected to the other end of the capacitor C67.

[0059] It should be noted that the receiving mixing module 4 is responsible for mixing the received RF signal with the local oscillator signal, wherein the output end of the low-noise processing unit 15 is electrically connected to pin 6 of the mixing chip U12, which means that the signal after low-noise processing will be directly input into the mixing chip U12 for mixing processing; pin 2 of the mixing chip U12 is electrically connected to capacitor C72, and capacitor C72 plays a role of isolation and filtering to ensure that the mixed signal can be output to the gain module 5 cleanly; pin 3 of the mixing chip U12 is the local oscillator signal input end, which is also connected to resistor R64 and resistor R66; the other end of resistor R64 is connected to resistor R65 and the output end of the bandpass filter F2, and the input end of the bandpass filter F2 is connected to capacitor C67; such a connection enables the local oscillator signal to be stably input into the mixing chip U12 after filtering and adjustment; resistors R65 and R66 are used as bias resistors to adjust the amplitude of the local oscillator signal and bias point; the second RF coaxial connector J11 is the RF signal input port of the receiving mixing module 4, which is connected to pin 2 of the low noise amplifier U11 through capacitor C68; capacitor C68 plays the role of isolating DC and coupling AC signals here; the low noise amplifier U11 is used to perform low-noise amplification on the received RF signal to improve the signal-to-noise ratio of the signal; pin 11 of the low noise amplifier U11 is its bias and power input terminal, which is connected to resistor R62, resistor R63, capacitor C69, capacitor C70, capacitor C71 and the fifth filter L7; these components together constitute the power supply and bias circuit of the low noise amplifier U11 to ensure its stable operation; the fifth filter L7 serves as a feedback element to help improve the performance of the amplifier; pin 8 of the low noise amplifier U11 is connected to the other end of the capacitor C67, which means that the amplified RF signal will be further processed by capacitor C67 and finally mixed with the local oscillator signal in the mixing chip U12.

[0060] Therefore, the receiving mixing module 4 realizes low-noise amplification, filtering and mixing processing of the radio frequency signal with the local oscillator signal; it helps to extract the useful intermediate frequency signal, and provides convenience for subsequent signal processing and demodulation.

[0061] like Figure 2 As shown, the gain module 5 in this embodiment includes a first amplifier unit 51, a gain amplifier unit 52 and a differential amplifier unit 53, the output end of the receiving mixing module 4 is electrically connected to the input end of the first amplifier unit 51, the output end of the first amplifier unit 51 is electrically connected to the input end of the gain amplifier unit 52, the output end of the gain amplifier unit 52 is electrically connected to the input end of the differential amplifier unit 53, and the output end of the differential amplifier unit 53 is electrically connected to the input end of the control module 6.

[0062] It should be noted that the gain module 5 is responsible for further increasing the amplitude of the output signal of the receiving mixer module 4 in the displacement deformation monitoring system, so that the subsequent control module 6 can perform more accurate processing and analysis.

[0063] like Fig.10 As shown, as a preferred implementation, the amplifier unit 53 of this embodiment includes an amplifier U33, a resistor R77, a capacitor C82, a capacitor C81, a capacitor C80, a capacitor C79, a resistor R75, a resistor R30, a resistor R76, a resistor R100, a resistor R101, a capacitor C95, a capacitor C117, a capacitor C118, a capacitor C25, a capacitor C26, a capacitor C27, a capacitor C199, a capacitor C96 and a resistor R32, wherein the pin 1 of the amplifier U33 is The other end of capacitor C79 is electrically connected to pin 2 of amplifier U33 and the other end of resistor R75, and the other end of resistor R76 is electrically connected to pin 2 of amplifier U33 and the other end of resistor R75. The other end of resistor R30 is electrically connected to pin 3 of amplifier U33, capacitor C25, capacitor C26, capacitor C27, capacitor C199, an external power supply, pin 5 of amplifier U33 and capacitor C96, and capacitors C25, capacitor C26, capacitor C27 and capacitor C199 are grounded; the other end of resistor R30 is electrically connected to resistor R99, and the other end of resistor R99 is electrically connected to the other end of capacitor C96, resistor R100 and resistor R101, and the other end of resistor R100 is electrically connected to Pin 6 of the amplifier U33 is electrically connected to the capacitor C95, the other end of the resistor R101 is electrically connected to the other end of the capacitor C95, pin 7 of the amplifier U33 and the resistor R32 respectively, the other end of the resistor R32 is electrically connected to the input end of the gain amplifier unit 52, one end of the pin 8 of the amplifier U33 is electrically connected to the external power supply, capacitor C118 and capacitor C117 respectively, the other ends of the capacitor C118 and capacitor C117 are electrically connected to pin 9 of the amplifier U33 and grounded.

[0064] It should be noted that the amplifier unit 53 is responsible for further amplifying and processing the signal from the gain amplifier unit 52, wherein the amplifier U33 is the core component of the amplifier unit 53, and each pin thereof assumes a different function; Pin 1 is the input end, which is connected to the resistor R30, the capacitor C80 and the resistor R75; the resistor R30 and the resistor R75 constitute an input bias network, and the capacitor C80 is used for filtering to remove high-frequency noise in the input signal; the other end of the capacitor C80 is connected to the capacitor C81, the capacitor C79 and the resistor R76; the capacitor C81 and the capacitor C79 and resistor R76 together form a feedback network for adjusting the gain and frequency response of the amplifier; capacitor C82 is used as a feedback capacitor, one end of which is connected to capacitor C81 and the other end is grounded, to provide necessary phase compensation and stability; the other end of resistor R76 is connected to pin 3 of amplifier U33 and multiple capacitors C25, C26, C27, C199 and an external power supply; these capacitors are mainly used for power supply filtering and decoupling to ensure the stable operation of amplifier U33; at the same time, resistor R76 also acts as an output resistor and together with pin 3 of amplifier U33 forms Output terminal; Pin 2 and Pin 5 are the power supply and bias terminals of amplifier U33, which are connected to the external power supply through resistor R75; this connection method can provide a stable operating voltage and bias current for the amplifier; the other end of resistor R30 is connected to resistor R99, and resistor R99, capacitor C96, resistor R100 and resistor R101 form a voltage divider circuit; this circuit is used to provide a suitable bias voltage for pins 6 and 7 of amplifier U33; capacitor C95 is used as a coupling capacitor, connected between pins 6 and 7, to isolate the DC component and only allow AC The flow signal passes through; the other end of the resistor R101 is also connected to the resistor R32, and the resistor R32 serves as an output resistor to pass the output signal of the amplifier U33 to the input end of the gain amplifier unit 52; in this way, the amplifier unit 53 completes the amplification and conditioning of the signal, and provides a high-quality signal for the subsequent displacement deformation calculation; Pins 8 and 9 are the power supply and ground terminals of the amplifier U33, which are connected to an external power supply, capacitor C117 and capacitor C118; these two capacitors are used as filter capacitors to remove noise in the power supply and ensure the stable operation of the amplifier U33.

[0065] like Fig.11As shown, as a preferred embodiment, the gain amplifier unit 52 of this embodiment includes a gain amplifier chip U16, a capacitor C47, a resistor R31, a capacitor C50, a capacitor C84 and a capacitor C87, wherein pin 2 of the gain amplifier chip U16 is electrically connected to the other end of the resistor R32, pin 3 and pin 4 of the gain amplifier chip U16 are electrically connected to capacitor C47 and an external power supply respectively, the other end of capacitor C47 is grounded, pin 1 of the gain amplifier chip U16 is electrically connected to capacitor C50, an external power supply, capacitor C84, capacitor C87 and pin 10 of the gain amplifier chip U16 respectively, the other ends of capacitor C50, capacitor C84 and capacitor C87 are all grounded, pin 5 of the gain amplifier chip U16 is electrically connected to resistor R31, and the other end of resistor R31 is electrically connected to the input end of the differential amplifier unit 53.

[0066] It should be noted that the gain amplifier unit 52 is responsible for further amplifying the signal output by the amplifier unit 53, wherein the gain amplifier chip U16 is the core component of the gain amplifier unit 52, and its different pins assume different functions. Pin 2 is electrically connected to the other end of the resistor R32 as the input end, and receives the output signal from the amplifier unit 53. The resistor R32 plays the role of signal transmission and impedance matching here; Pin 3 and Pin 4 are the power pins of the gain amplifier chip U16. They are electrically connected to the capacitor C47 and the external power supply together to provide a stable operating voltage for the gain amplifier chip U16. The capacitor C47 is used as a filter capacitor to remove noise in the power supply and ensure the stable operation of the amplifier chip; Pin 1 is the bias and feedback pin of the gain amplifier chip U16. It is electrically connected to the capacitor C50, the external power supply, the capacitor C84, the capacitor C87 and the pin 10. These capacitors and the power supply together constitute the bias and feedback network of the gain amplifier chip U16, which is used to set the gain and stability of the amplifier. The other ends of capacitor C50, capacitor C84 and capacitor C87 are all grounded, which plays a role in filtering and stabilizing the bias voltage; Pin 5 is the output end of the gain amplifier chip U16, which is electrically connected to the resistor R31. The resistor R31 is used as an output resistor, which not only limits the amplitude of the output current, but also plays a role in isolation and matching. The other end of the resistor R31 is electrically connected to the input end of the differential amplifier unit 53, so that the signal amplified by the gain amplifier unit 52 can be transmitted to the differential amplifier unit 53 for subsequent processing.

[0067] like Fig.12As shown, as a preferred implementation, the differential amplifier unit 53 of this embodiment includes a differential amplifier chip U23, a resistor R81, a resistor R28, a resistor R115, a capacitor C104, a capacitor C163, a resistor R82, a capacitor C103, a capacitor C102, a resistor R85 and a resistor R84, wherein the pin 1 of the differential amplifier chip U23 is electrically connected to the resistor R28 and the resistor R82 respectively, the other end of the resistor R28 is electrically connected to the external power supply, the resistor R115 and the capacitor C104 respectively, the other end of the capacitor C104 is electrically connected to the capacitor C163 and grounded, the other end of the capacitor C163 is electrically connected to the other end of the resistor R115 and the pin 1 of the differential amplifier chip U23 respectively. Pin 2 is electrically connected, the other end of resistor R82 is electrically connected to pin 4 of the differential amplifier chip U23 and the input end of the control module 6 respectively, pin 3 of the differential amplifier chip U23 is electrically connected to resistor R85, capacitor C102, capacitor C103 and the external power supply respectively, the other ends of capacitors C102 and C103 are commonly grounded, the other end of resistor R85 is electrically connected to pin 7 of the differential amplifier chip U23, pin 8 of the differential amplifier chip U23 is electrically connected to resistor R81 and resistor R84 respectively, the other end of resistor R81 is electrically connected to the other end of resistor R31, and the other end of resistor R84 is electrically connected to pin 5 of the differential amplifier chip U23 and the input end of the control module 6 respectively.

[0068] It should be noted that the differential amplifier unit 53 converts the single-ended input signal into a differential output signal, which helps to improve the common mode rejection ratio and dynamic range of the signal, thereby improving the signal-to-noise ratio and stability of the signal. The differential amplifier chip U23 is the core component of the differential amplifier unit 53. Its pin 1 is one of the input terminals and is electrically connected to the resistor R28 and the resistor R82. The resistor R28 forms a part of the input bias network and is connected to the external power supply, the resistor R115 and the capacitor C104. The capacitor C104 and the capacitor C163 work together to form a low-pass filter for filtering high-frequency noise in the input signal. The other end of the capacitor C163 is connected to the other end of the resistor R115 and the pin 2 of the differential amplifier chip U23 to form a differential input pair; the resistor R82 is used as an output resistor to connect the pin 4 of the differential amplifier chip U23 to the input terminal of the control module 6. It is responsible for converting the differential output signal of the differential amplifier chip U23 into a single-ended signal and passing it to the control module 6 for subsequent processing. Pin 3 of the differential amplifier chip U23 is a power supply and bias pin, which is connected to resistor R85, capacitor C102, capacitor C103 and an external power supply. Capacitor C102 and capacitor C103 are used for power supply filtering to ensure the stable operation of the differential amplifier chip U23. Resistor R85 connects pin 3 and pin 7 to form a feedback network for adjusting the gain and stability of the differential amplifier. Pin 8 and pin 5 are the output ends of the differential amplifier chip U23. Pin 8 is connected to the other end of resistor R31 through resistor R81, and forms an output bias network with resistor R84; the other end of resistor R84 is connected to the input end of the control module 6, and together with resistor R82, it forms a differential output pair. This differential output structure helps to suppress common mode noise and improve the anti-interference ability of the signal.

[0069] Therefore, the differential amplifier unit 53 realizes the function of converting the single-ended input signal into a stable, high-quality differential output signal, which helps to improve the measurement accuracy and reliability of the displacement deformation monitoring system.

[0070] Working principle:

[0071] The laser module 2 and the inclination module 3 are respectively connected to the transmitting module 1 and the receiving mixing module 4 by wireless communication. When it is necessary to monitor the building, the transmitting module 1 sends a monitoring signal to the laser module 2 and the inclination module 3. After the laser module 2 and the inclination module 3 receive the signal, the laser module 2 can measure the distance to the building, and the inclination module 3 can monitor the angle of the building. The signals monitored by the laser module 2 and the inclination module 3 are respectively fed back to the corresponding receiving mixing module 4. The mixing module 4 filters, reduces noise and mixes the feedback signal. After mixing, the processed signal is passed to the gain module 5 for gain processing. The gain-processed signal is fed back to the control module 6. The control module 6 is preset with an early warning threshold. When the feedback monitoring signal is greater than the early warning threshold, the system will send an audible and visual alarm to remind the monitoring personnel.

[0072] The above description is only a preferred embodiment of the present invention and is not intended to limit the present invention. Any modifications, equivalent substitutions, improvements, etc. made within the spirit and principles of the present invention should be included in the protection scope of the present invention.

Claims

1. A building displacement deformation monitoring system, characterized in that: The system comprises a transmitting module (1), a laser module (2), a tilt module (3), a plurality of receiving mixing modules (4), a plurality of gain modules (5) and a control module (6), wherein: The output end of the transmitting module (1) is communicatively connected to the input ends of the laser module (2) and the tilt module (3), respectively, and is used to send monitoring signals to the laser module (2) and the tilt module (3); The output ends of the laser module (2) and the tilt module (3) are respectively electrically connected to the input ends of the corresponding receiving mixer modules (4); the output ends of the plurality of receiving mixer modules (4) are respectively electrically connected to the input ends of the corresponding gain modules (5); the output ends of the plurality of gain modules (5) are all electrically connected to the input end of the control module (6); The monitoring signals of the laser module (2) and the tilt module (3) are amplified by the gain module (5) and fed back to the control module (6).

2. The building displacement deformation monitoring system according to claim 1, characterized in that: The transmitting module (1) comprises a clock buffer unit (11), a clock processing unit (12), a frequency synthesis unit (13), a coupling processing unit (14) and two low noise processing units (15), wherein: The output end of the clock buffer unit (11) is electrically connected to the input end of the clock processing unit (12) and the frequency synthesis unit (13) respectively; the output end of the frequency synthesis unit (13) is electrically connected to the input end of the coupling processing unit (14); the coupling processing unit (14) has two output ends; the two output ends of the coupling processing unit (14) are electrically connected to the input end of the corresponding low-noise processing unit (15) respectively; the output ends of the two low-noise processing units (15) are both electrically connected to the input end of the receiving mixing module (4).

3. The building displacement deformation monitoring system according to claim 2, characterized in that: The clock buffer unit (11) comprises a clock chip U2, a resistor R33, a crystal oscillator chip, a capacitor C185, a capacitor C186, a resistor R21, a resistor R35, a capacitor C45, a capacitor C46, ​​a dual-output winding transformer L2, a resistor R141 and a resistor R145, wherein a pin 1 of the clock chip U2 is electrically connected to one end of the resistor R33, the other end of the resistor R33 is electrically connected to the output end of the crystal oscillator chip, the power end of the crystal oscillator chip is electrically connected to the external power input end, the capacitor C186 and the capacitor C185 respectively, the other ends of the capacitor C186 and the capacitor C185 are commonly grounded, a pin 2 of the clock chip U2 is electrically connected to one end of the resistor R21, the other end of the resistor R21 is electrically connected to the external power input end, a pin 8 of the clock chip U2 is electrically connected to one end of the resistor R35, the other end of the resistor R35 is electrically connected to the clock The input end of the clock processing unit (12) is electrically connected, the pin 6 of the clock chip U2 is electrically connected to the external power input end and one end of the capacitor C45 respectively, the other end of the capacitor C45 is grounded, the pin 5 of the clock chip U2 is electrically connected to the capacitor C46, ​​the dual output winding transformer L2 has 5 pins, the other end of the capacitor C46 is electrically connected to the pin 5 of the dual output winding transformer L2, the pin 1 of the dual output winding transformer L2 is electrically connected to one end of the resistor R141, the pin 3 of the dual output winding transformer L2 is electrically connected to one end of the resistor R145, the resistor R141 and one end of the resistor R145 are both electrically connected to the input end of the frequency synthesis unit (13), and the ground end of the crystal oscillator chip, the pin 4 of the clock chip U2, the other end of the capacitor C45, the pin 4 of the dual output winding transformer L2 and the pin 2 of the dual output winding transformer L2 are all grounded.

4. The building displacement deformation monitoring system according to claim 3, characterized in that: The coupling processing unit (14) comprises a voltage-controlled oscillation chip Y1, a capacitor C235, a capacitor C56, a capacitor C44, a radio frequency power splitter chip U7, a resistor R49, a capacitor C57, a first filter L4, a low noise amplifier U8, a resistor R50, a resistor R51, a capacitor C59, a capacitor C60, a capacitor C61, a capacitor C58, a second filter L3, a directional coupler P1, a resistor R52, a resistor R53, a resistor R54, a resistor R55, a first radio frequency coaxial connector J38, a filter F1, a radio frequency power splitter chip U10 and a resistor R58, wherein the output end of the frequency synthesis unit (13) is electrically connected to the input end of the voltage-controlled oscillation chip Y1, and the power connection end of the voltage-controlled oscillation chip Y1 is electrically connected to the input end of the voltage-controlled oscillation chip Y1. The RF power splitter chip U7 is electrically connected to the external power supply, capacitor C235, capacitor C56 and capacitor C44 respectively, the other ends of the capacitors C235, C56 and C44 are commonly grounded, the output end of the voltage-controlled oscillation chip Y1 is electrically connected to the input end of the RF power splitter chip U7, the RF power splitter chip U7 has a first output end and a second output end, the first output end of the RF power splitter chip U7 is electrically connected to the input end of the frequency synthesis unit (13), the second output end of the RF power splitter chip U7 is electrically connected to the resistor R49 and the capacitor C57 respectively, the other end of the resistor R49 is electrically connected to the first output end of the RF power splitter chip U7, the other end of the capacitor C57 is electrically connected to the first filter L4 and the pin 2 of the low noise amplifier U8 respectively The other end of the first filter L4 is grounded, the pin 12 of the low noise amplifier U8 is electrically connected to one end of the resistor R50, the pin 11 of the low noise amplifier U8 is electrically connected to the other end of the resistor 50, the resistor R51, the capacitor C59, the capacitor C60, the capacitor C61 and the second filter L3 respectively, the other end of the second filter L3 is electrically connected to the pin 9 of the low noise amplifier U8, the other end of the resistor R51 is electrically connected to the external power supply, the other ends of the capacitors C59, C60 and C61 are commonly grounded, the pin 8 of the low noise amplifier U8 is electrically connected to the capacitor C58, the other end of the capacitor C58 is electrically connected to the pin 1 of the directional coupler P1, and the pin 2 of the directional coupler P1 is electrically connected to the first RF coaxial connector J38 is electrically connected, the directional coupler P1 pin 3 is electrically connected to the resistor R52, the other end of the resistor R52 and the directional coupler P1 pin 5 are commonly grounded, the directional coupler P1 pin 4 is electrically connected to the resistor R54 and the resistor R53 respectively, the other end of the resistor R54 is grounded, the other end of the resistor R53 is electrically connected to the resistor R55 and the input end of the filter F1 respectively, the output end of the filter F1 is electrically connected to the input end of the RF power splitter chip U10, the RF power splitter chip U10 has two output ends, the two output ends of the RF power splitter chip U10 are electrically connected to the corresponding low noise processing unit (15) input end respectively, and the resistor R58 is electrically connected between the two output ends of the RF power splitter chip U10.

5. The building displacement deformation monitoring system according to claim 4, characterized in that: The low noise processing unit (15) comprises a capacitor C240, a third filter L24, a low noise amplifier U31, a resistor R59, a resistor R68, a capacitor C242, a capacitor C244, a capacitor C245, a capacitor C241 and a fourth filter L23, wherein: One end of the capacitor C240 ​​is electrically connected to the output end of the RF power splitter chip U10, and the other end of the capacitor C240 ​​is electrically connected to the third filter L24 and pin 2 of the low noise amplifier U31 respectively, the other end of the third filter L24 is grounded, the pin 12 of the low noise amplifier U31 is electrically connected to one end of the resistor R59, the pin 11 of the low noise amplifier U31 is electrically connected to the other end of the resistor R59, the resistor R68, the capacitor C242, the capacitor C244, the capacitor C245 and the fourth filter L23 respectively, the other end of the fourth filter L23 is electrically connected to pin 9 of the low noise amplifier U31, the other end of the resistor R68 is electrically connected to the external power supply, the other ends of the capacitors C242, C244 and C245 are commonly grounded, and the pin 8 of the low noise amplifier U31 is electrically connected to the capacitor C241.

6. The building displacement deformation monitoring system according to claim 5, characterized in that: The receiving mixing module (4) includes a mixing chip U12, a capacitor C72, a resistor R65, a resistor R66, a resistor R64, a bandpass filter F2, a capacitor C67, a capacitor C69, a capacitor C70, a capacitor C71, a fifth filter L7, a resistor R62, a resistor R63, a sixth filter L8, a capacitor C68, a low noise amplifier U11, and a second RF coaxial connector J11, wherein: The output end of the low noise processing unit (15) is electrically connected to the pin 6 of the mixing chip U12, the pin 2 of the mixing chip U12 is electrically connected to the capacitor C72, and the other end of the capacitor C72 is electrically connected to the input end of the gain module (5); the pin 3 of the mixing chip U12 is electrically connected to the resistor R64 and the resistor R66 respectively, the other end of the resistor R64 is electrically connected to the resistor R65 and the output end of the band pass filter F2 respectively, the input end of the band pass filter F2 is electrically connected to the capacitor C67, and the other ends of the resistor R65 and the resistor R66 are both grounded; one end of the capacitor C68 is electrically connected to the second RF coaxial connector J11, and the other end of the capacitor C68 is electrically connected to the second RF coaxial connector J11. The sixth filter L8 is electrically connected to the pin 2 of the low noise amplifier U11 respectively, the other end of the sixth filter L8 is grounded, the pin 12 of the low noise amplifier U11 is electrically connected to one end of the resistor R62, the pin 11 of the low noise amplifier U11 is electrically connected to the other end of the resistor R62, the resistor R63, the capacitor C69, the capacitor C70, the capacitor C71 and the fifth filter L7 respectively, the other end of the fifth filter L7 is electrically connected to the pin 9 of the low noise amplifier U11, the other end of the resistor R63 is electrically connected to the external power supply, the other ends of the capacitors C69, C70 and C71 are commonly grounded, and the pin 8 of the low noise amplifier U11 is electrically connected to the other end of the capacitor C67.

7. The building displacement deformation monitoring system according to claim 6, characterized in that: The gain module (5) comprises a first amplifier unit (51), a gain amplifier unit (52) and a differential amplifier unit (53); the output end of the receiving mixer module (4) is electrically connected to the input end of the first amplifier unit (51); the output end of the first amplifier unit (51) is electrically connected to the input end of the gain amplifier unit (52); the output end of the gain amplifier unit (52) is electrically connected to the input end of the differential amplifier unit (53); and the output end of the differential amplifier unit (53) is electrically connected to the input end of the control module (6).

8. The building displacement deformation monitoring system according to claim 7, characterized in that: The amplifier unit (53) includes an amplifier U33, a resistor R77, a capacitor C82, a capacitor C81, a capacitor C80, a capacitor C79, a resistor R75, a resistor R30, a resistor R76, a resistor R100, a resistor R101, a capacitor C95, a capacitor C117, a capacitor C118, a capacitor C25, a capacitor C26, a capacitor C27, a capacitor C199, a capacitor C96 and a resistor R32, wherein: Pin 1 of amplifier U33 is electrically connected to resistor R30, capacitor C80 and resistor R75 respectively, the other end of capacitor C80 is electrically connected to capacitor C81, capacitor C79 and resistor R76 respectively, the other end of capacitor C81 is electrically connected to capacitor C82 and resistor R77 respectively, the other end of capacitor C82 is grounded, and the other end of resistor R77 is electrically connected to the other end of capacitor C72; the other end of capacitor C79 is electrically connected to pin 2 of amplifier U33 and the other end of resistor R75 respectively, the other end of resistor R76 is electrically connected to pin 3 of amplifier U33, capacitor C25, capacitor C26, capacitor C27, capacitor C199, external power supply, pin 5 of amplifier U33 and capacitor C96 respectively, capacitor C25, capacitor C26, capacitor C27 C27 and capacitor C199 are commonly grounded; the other end of resistor R30 is electrically connected to resistor R99, the other end of resistor R99 is respectively electrically connected to the other end of capacitor C96, resistor R100 and resistor R101, the other end of resistor R100 is respectively electrically connected to pin 6 of amplifier U33 and capacitor C95, the other end of resistor R101 is respectively electrically connected to the other end of capacitor C95, pin 7 of amplifier U33 and resistor R32, the other end of resistor R32 is electrically connected to the input end of gain amplifier unit (52), one end of pin 8 of amplifier U33 is respectively electrically connected to an external power supply, capacitor C118 and capacitor C117, the other ends of capacitor C118 and capacitor C117 are commonly electrically connected to pin 9 of amplifier U33 and are grounded.

9. The building displacement deformation monitoring system according to claim 8, characterized in that: The gain amplifier unit (52) comprises a gain amplifier chip U16, a capacitor C47, a resistor R31, a capacitor C50, a capacitor C84 and a capacitor C87, wherein a pin 2 of the gain amplifier chip U16 is electrically connected to the other end of the resistor R32, a pin 3 and a pin 4 of the gain amplifier chip U16 are electrically connected to the capacitor C47 and an external power supply respectively, the other end of the capacitor C47 is grounded, a pin 1 of the gain amplifier chip U16 is electrically connected to the capacitor C50, the external power supply, the capacitor C84, the capacitor C87 and a pin 10 of the gain amplifier chip U16 respectively, the other ends of the capacitors C50, C84 and C87 are all grounded, a pin 5 of the gain amplifier chip U16 is electrically connected to the resistor R31, and the other end of the resistor R31 is electrically connected to the input end of the differential amplifier unit (53).

10. The building displacement deformation monitoring system according to claim 9, characterized in that: The differential amplifier unit (53) comprises a differential amplifier chip U23, a resistor R81, a resistor R28, a resistor R115, a capacitor C104, a capacitor C163, a resistor R82, a capacitor C103, a capacitor C102, a resistor R85 and a resistor R84, wherein: Pin 1 of the differential amplifier chip U23 is electrically connected to resistor R28 and resistor R82 respectively, the other end of resistor R28 is electrically connected to an external power supply, resistor R115 and capacitor C104 respectively, the other end of capacitor C104 is electrically connected to capacitor C163 and grounded, the other end of capacitor C163 is electrically connected to the other end of resistor R115 and pin 2 of the differential amplifier chip U23 respectively, the other end of resistor R82 is electrically connected to pin 4 of the differential amplifier chip U23 and the input end of the control module (6) respectively, the differential amplifier chip Pin 3 of U23 is electrically connected to resistor R85, capacitor C102, capacitor C103 and an external power supply respectively, the other ends of capacitor C102 and capacitor C103 are commonly grounded, the other end of resistor R85 is electrically connected to pin 7 of differential amplifier chip U23, pin 8 of differential amplifier chip U23 is electrically connected to resistor R81 and resistor R84 respectively, the other end of resistor R81 is electrically connected to the other end of resistor R31, and the other end of resistor R84 is electrically connected to pin 5 of differential amplifier chip U23 and the input end of control module (6).

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