Temperature control mechanism for memory test

Abstract

The utility model relates to the technical field of memory bank testing, and provides a memory testing temperature control mechanism which comprises a housing used for covering a testing mainboard, the housing is divided into a plurality of temperature control areas which are in one-to-one correspondence with and matched with slot areas of the testing mainboard, and a temperature control assembly used for providing temperature conditions is arranged in each temperature control area. The temperature control assembly comprises a temperature control substrate, a plurality of TEC temperature control sheets and a plurality of temperature control fins, one functional surface of each TEC temperature control sheet is attached to the temperature control substrate, the plurality of temperature control fins are arranged in parallel, and a space between every two adjacent temperature control fins is a temperature control grid used for accommodating a memory bank during testing; integrated refrigeration / heating is achieved through the TEC temperature control pieces, the temperature in the temperature control grid is correspondingly controlled to be the target temperature, the temperature condition is provided for memory bank testing, the structure is simple, the space occupancy rate is small, and therefore the testing space layout is optimized.

Description

Technical Field

[0001] The utility model relates to the technical field of memory module testing, and specifically to a temperature control mechanism for memory testing. Background Art

[0002] With the rapid development of computer technology, as one of the core components of a computer system, the performance stability of a memory module directly affects the operation efficiency and reliability of the entire system. During the research and development, production, and quality control processes of memory modules, testing them is an essential step. Especially testing under specific temperature conditions is crucial for evaluating the performance of memory modules in different working environments.

[0003] Currently, for memory module temperature testing, the industry mainly uses two sets of independent modules to separately implement heating and cooling functions, which are costly and complex to maintain. Moreover, they occupy a large amount of testing space, increasing the complexity of the testing space and being unfavorable for flexible layout and efficient resource utilization in a limited testing space.

[0004] Therefore, the utility model proposes a temperature control mechanism for memory testing to solve the above problems. Summary of the Utility Model

[0005] The purpose of the embodiment of the utility model is to provide a temperature control mechanism for memory testing to solve the above problems.

[0006] To achieve the above purpose, the utility model provides the following technical solution:

[0007] A temperature control mechanism for memory testing includes a housing for covering a test main board. The housing is divided into several temperature control zones corresponding to and adapted to the slot areas of the test main board one by one. Each temperature control zone is provided with a temperature control component for providing temperature conditions. The temperature control component includes a temperature control substrate, several TEC temperature control chips, and multiple temperature control fins. One functional surface of the TEC temperature control chip is attached to the temperature control substrate. The multiple temperature control fins are arranged in parallel, and the space between two adjacent temperature control fins is a temperature control grid for accommodating a memory module during testing.

[0008] In an optional solution: The temperature control component further includes several temperature control fans arranged on one side of the temperature control zone for blowing air into the temperature control grid. Ventilation holes are provided at both sides of the temperature control zone corresponding to both ends of each temperature control grid.

[0009] In an optional solution: The multiple temperature control fins are arranged in parallel on the temperature control substrate.

[0010] In an optional solution: The multiple temperature control fins are arranged in parallel on the side of the temperature control substrate away from the temperature control fan.

[0011] In an alternative embodiment: The temperature control component further includes a heat conducting plate and a plurality of heat dissipation fins arranged in parallel on the heat conducting plate. The other functional surface of the TEC temperature control chip is attached to the heat conducting plate, and a heat insulation sheet is provided between the temperature control substrate and the heat conducting plate.

[0012] In an alternative embodiment: The temperature control component further includes a plurality of heat dissipation fans arranged on one side of the temperature control area for blowing air flow towards the heat dissipation fins. The side of the temperature control area opposite to the heat dissipation fans is semi-open, corresponding to the distribution of the plurality of heat dissipation fins.

[0013] In an alternative embodiment: A plurality of electric heating elements are further provided on the temperature control substrate.

[0014] In an alternative embodiment: A temperature sensor is provided in each temperature control cell.

[0015] Compared with the prior art, the beneficial effects of the embodiments of the present utility model are as follows:

[0016] The test main board with the memory module to be tested is covered by the housing, and the temperature control area separates the corresponding slot area on the test main board to avoid cold / hot cross-flow interference. The memory module to be tested is located in the corresponding temperature control cell, and one temperature control cell corresponds to one memory module. Integrated cooling / heating is achieved through a plurality of TEC temperature control chips, so that the temperature in the temperature control cell is correspondingly controlled at the target temperature, providing temperature conditions for the memory module test. The structure is simple and the space occupancy rate is small, thereby optimizing the test space layout.

[0017] It should be understood that the above general description and the following detailed description are only exemplary and explanatory, and cannot limit the present application. BRIEF DESCRIPTION OF THE DRAWINGS

[0018] The accompanying drawings herein are incorporated into the specification and form a part of the specification, showing embodiments consistent with the present application and used together with the specification to explain the principles of the present application. At the same time, these drawings and the text description are not intended to limit the scope of the concept of the present application in any way, but to illustrate the concept of the present application to those skilled in the art by referring to specific embodiments.

[0019] Figure 1 It is a schematic structural diagram of an embodiment of the present utility model.

[0020] Figure 2 It is a schematic structural diagram (partial) of the temperature control component in an embodiment of the present utility model.

[0021] Figure 3 It is a schematic structural diagram of another angle of an embodiment of the present utility model.

[0022] Annotation of reference numerals: 1 - housing, 2 - temperature control area, 3 - temperature control component, 301 - temperature control substrate, 302 - heat conducting plate, 303 - TEC temperature control chip, 304 - temperature control fin, 305 - temperature control grid, 306 - heat dissipation fin, 307 - heat insulation sheet, 308 - electric heating element, 309 - temperature control fan, 310 - heat dissipation fan, 311 - ventilation hole. Detailed implementation manners

[0023] The following further describes the present application in detail with reference to the accompanying drawings. It is necessary to point out here that the following specific implementation manners are only used to further illustrate the present application and cannot be construed as a limitation on the protection scope of the present application. Those skilled in the art can make some non-essential improvements and adjustments to the present application according to the above application content.

[0024] Please refer to Figures 1 to 3 , a temperature control mechanism for memory testing, including a housing 1 for covering the test main board. The housing 1 is divided into several temperature control areas 2 corresponding to and adapted to the slot areas of the test main board one by one. Each temperature control area 2 is provided with a temperature control component 3 for providing temperature conditions. The temperature control component 3 includes a temperature control substrate 301, several TEC temperature control chips 303 and a plurality of temperature control fins 304. One functional surface of the TEC temperature control chip 303 is attached to the temperature control substrate 301. The plurality of temperature control fins 304 are arranged in parallel, and the space between two adjacent temperature control fins 304 is a temperature control grid 305 for accommodating memory modules during testing.

[0025] It should be noted that the temperature control substrate 301 is made of a metal heat conducting material. In addition, the number of TEC temperature control chips 303 arranged is adapted to the size of the temperature control substrate 301 to achieve uniform regional temperature.

[0026] Furthermore, each temperature control grid 305 is provided with a temperature sensor (not shown in the figure). The temperature of the temperature control grid 305 is monitored in real time through the temperature sensor to determine whether it reaches the set temperature control value. Preferably, the model of the temperature sensor is: MIK-Pt100.

[0027] The test main board with the memory module to be tested is covered by the housing 1. The temperature control area 2 separates the corresponding slot areas on the test main board to avoid cold / hot cross-flow interference. The memory module to be tested is located in the corresponding temperature control grid 305, and one temperature control grid 305 corresponds to one memory module. Integrated refrigeration / heating is achieved through several TEC temperature control chips 303 (the refrigeration / heating principle of the TEC temperature control chip 303 is prior art and will not be elaborated here), so that the temperature in the temperature control grid 305 is correspondingly controlled at the target temperature, providing temperature conditions for memory module testing. The structure is simple and the space occupancy rate is small, thus optimizing the test space layout.

[0028] Further, a plurality of heating elements 308 are also provided on the temperature control substrate 301. The heating elements 308 can be heating devices such as heating sheets and heating wires, which are prior arts and will not be defined and described herein. When performing a high-temperature test on the memory module, the plurality of heating elements 308 assist the TEC temperature control chip 303 to jointly generate heat. Similarly, the number of arranged heating elements 308 is adapted to the size of the temperature control substrate 301 to achieve regional temperature balance.

[0029] Please refer to Figure 2 , in an embodiment of the present invention, a plurality of the temperature control fins 304 are arranged in parallel on the temperature control substrate 301, and the plurality of temperature control fins 304 are connected to the temperature control substrate 301.

[0030] Please refer to Figure 1 and Figure 3 , in an embodiment of the present invention, the temperature control assembly 3 further includes a plurality of temperature control fans 309 provided on one side of the temperature control area 2 for blowing air flow to the temperature control grids 305. Ventilation holes 311 are provided at positions corresponding to both ends of each temperature control grid 305 on both sides of the temperature control area 2.

[0031] In this embodiment, when testing the memory module, the memory module itself generates a certain amount of heat during operation. The temperature control fan 309 blows air flow to the temperature control grids 305 to timely discharge the heat generated by the memory module, so as to maintain the constant temperature in the temperature control grids 305 and avoid the increase in the temperature in the temperature control grids 305 caused by the accumulation of the heat generated by the memory module during operation, which affects the test accuracy. It should be noted that the temperature control fan 309 is a speed-adjustable fan, and the rotation speed of its fan blades is adjustable, so as to realize the regulation of the wind force. It is necessary to be able to timely discharge the heat generated by the memory module and avoid the decrease in the temperature in the temperature control grids 305 caused by excessive wind force (the temperature control fan 309 is automatically controlled by the control system in combination with the temperature monitoring data of the temperature sensor. This control technology belongs to the existing mature technology and there is no technical obstacle, so it will not be described herein).

[0032] Further, in this embodiment, a plurality of the temperature control fins 304 can be arranged in parallel on the side of the temperature control substrate 301 away from the temperature control fan 309. When the TEC temperature control chip 303 cools / heating, a cold / hot "area" is formed at the position below the TEC temperature control chip 303 (described from a Figure 3 angle). When the temperature control fan 309 blows air flow to the temperature control grids 305, the air flow will be cooled / heated when passing through the cold / hot "area", and then enter each temperature control grid 305 to achieve temperature control of the temperature control grids 305.

[0033] Please refer to Figure 1 and Figure 2, in an embodiment of the present utility model, the temperature control assembly 3 further includes a heat conducting plate 302 and a plurality of heat dissipation fins 306 arranged in parallel on the heat conducting plate 302. The other functional surface of the TEC temperature control chip 303 is attached to the heat conducting plate 302, and a heat insulation sheet 307 is provided between the temperature control substrate 301 and the heat conducting plate 302;

[0034] The temperature control assembly 3 further includes a plurality of heat dissipation fans 310 arranged on one side of the temperature control area 2, which are used to blow air flow to the heat dissipation fins 306. The side of the temperature control area 2 opposite to the heat dissipation fans 310 is semi-open, corresponding to the distribution of the plurality of heat dissipation fins 306.

[0035] In this embodiment, when performing a low-temperature test on the memory module, the functional surface of the TEC temperature control chip 303 attached to the temperature control substrate 301 cools, while the functional surface of the TEC temperature control chip 303 attached to the heat conducting plate 302 generates heat. The heat dissipation fins 306 and the heat dissipation fans 310 are used to dissipate the heat of the heat-generating functional surface of the TEC temperature control chip 303 in a timely and effective manner.

[0036] In addition, it should be understood that although this specification is described according to embodiments, not every embodiment only includes an independent technical solution. This narrative way of the specification is only for clarity. Those skilled in the art should regard the specification as a whole, and the technical solutions in each embodiment can also be appropriately combined to form other embodiments that can be understood by those skilled in the art.

Claims

1. A memory test temperature control mechanism, characterized in that: The invention comprises a cover shell (1) for covering a test mainboard, the cover shell (1) being divided into a plurality of temperature control zones (2) corresponding to and adapted to the test mainboard slot areas one by one, each of the temperature control zones (2) being provided with a temperature control component (3) for providing temperature conditions, the temperature control component (3) comprising a temperature control substrate (301), a plurality of TEC temperature control sheets (303) and a plurality of temperature control fins (304), one functional surface of the TEC temperature control sheet (303) being in contact with the temperature control substrate (301), a plurality of the temperature control fins (304) being arranged in parallel, and a space between two adjacent temperature control fins (304) being a temperature control grid (305) for accommodating a memory stick during testing.

2. The memory test temperature control mechanism according to claim 1, characterized in that: The temperature control assembly (3) further comprises a plurality of temperature control fans (309) arranged on one side of the temperature control zone (2) for blowing airflow to the temperature control grids (305); ventilation holes (311) are arranged at positions corresponding to the two ends of each temperature control grid (305) on both sides of the temperature control zone (2).

3. The memory test temperature control mechanism according to claim 1, characterized in that: The plurality of temperature control fins (304) are arranged in parallel on the temperature control substrate (301).

4. The memory test temperature control mechanism according to claim 2, characterized in that: The plurality of temperature control fins (304) are arranged in parallel on a side of the temperature control substrate (301) away from the temperature control fan (309).

5. The memory test temperature control mechanism according to claim 1, characterized in that: The temperature control component (3) further comprises a heat conducting plate (302) and a plurality of heat dissipation fins (306) arranged in parallel on the heat conducting plate (302); another functional surface of the TEC temperature control plate (303) is in contact with the heat conducting plate (302); and a heat insulating plate (307) is provided between the temperature control substrate (301) and the heat conducting plate (302).

6. The memory test temperature control mechanism according to claim 5, characterized in that: The temperature control component (3) further comprises a plurality of cooling fans (310) arranged on one side of the temperature control zone (2) for blowing airflow to the cooling fins (306); the side of the temperature control zone (2) opposite to the cooling fans (310) is half open, corresponding to the distribution of the plurality of cooling fins (306).

7. The memory test temperature control mechanism according to claim 1, characterized in that: The temperature control substrate (301) is also provided with a plurality of electric heating elements (308).

8. The memory test temperature control mechanism according to claim 1, characterized in that: Each of the temperature control grids (305) is provided with a temperature sensor.

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