Backup power supply switching circuit for solid state disk

Abstract

The utility model relates to the field of solid state disk power supplies, and provides a backup power supply switching circuit for a solid state disk, which comprises a USB (Universal Serial Bus) power supply circuit, a super capacitor charging circuit and a dual-power supply switching circuit, the USB power supply circuit is electrically connected with the super capacitor charging circuit and the dual-power switching circuit and is used for USB power supply; the super-capacitor charging circuit is electrically connected with the dual-power-supply switching circuit and is used for supplying power to the super-capacitor; the dual-power switching circuit is electrically connected with the USB power supply circuit and the super-capacitor charging circuit, and is used for switching between the USB power supply circuit and the super-capacitor charging circuit. The super capacitor is adopted as the standby power supply, and the dual-power-supply switching circuit is automatically switched to the super capacitor for power supply when the power supply is cut off, so that long-term effective standby power supply is realized, data loss of the solid state disk under the condition of abnormal power failure of the system is avoided, and the safety and reliability of data are ensured.

Description

Technical Field

[0001] The utility model relates to the field of solid - state drive power supplies, and particularly to a backup power supply switching circuit for a solid - state drive. Background Art

[0002] The cache of a solid - state drive usually uses SDRAM (Synchronous Dynamic Random Access Memory). Such a memory is a power - off volatile device. When the solid - state drive experiences an abnormal power - off in the system, it is possible that the cached data has not been saved to the Nand Flash memory in time, resulting in data loss. In the prior art, to solve the problem of data loss due to power - off of the solid - state drive, the method of increasing tantalum capacitors and electrolytic capacitors is mostly adopted. Usually, the capacitors are directly paralleled into the USB main power supply. This method is effective in the short term, but over time, the tantalum capacitors and electrolytic capacitors may fail in a harsh usage environment, which will also affect the use of the solid - state drive.

[0003] Chinese Patent with publication number CN105677241A discloses a charging method, device and solid - state drive, which dynamically adjusts the power of the backup capacitor for power supply according to the actual backup power demand of the SSD, reducing the number of backup capacitors required for power supply to the SSD. However, this patent still cannot solve the problem of data loss caused by long - term power loss. Summary of the Utility Model

[0004] In view of this, the utility model proposes a backup power supply switching circuit for a solid - state drive. By using a supercapacitor as a backup power supply, it is not used during normal operation and is only used when the power supply is cut off. Taking advantage of the long - term effectiveness of the supercapacitor, the solid - state drive can avoid power - off for a long time and solve the problem of data loss.

[0005] The technical solution of the utility model is realized as follows: A backup power supply switching circuit for a solid - state drive includes a USB power supply circuit, a supercapacitor charging circuit, and a dual - power switching circuit;

[0006] The USB power supply circuit is electrically connected to the supercapacitor charging circuit and the dual - power switching circuit respectively, and is used for USB power supply;

[0007] The supercapacitor charging circuit is electrically connected to the dual - power switching circuit, and is used for supercapacitor power supply;

[0008] The dual - power switching circuit is electrically connected to the USB power supply circuit and the supercapacitor charging circuit respectively, and is used for switching between the USB power supply circuit and the supercapacitor charging circuit.

[0009] Based on the above technical solutions, preferably, the supercapacitor charging circuit includes a supercapacitor charging chip U1, a supercapacitor SCAP, capacitors C1, C2, C3, a resistor R1, R PROG ;

[0010] Pin 1 of the supercapacitor charging chip U1 is electrically connected to one end of the capacitor C3, pin 2 of the supercapacitor charging chip U1 is electrically connected to the other end of the capacitor C3, pin 3 of the supercapacitor charging chip U1 is electrically connected to pin 2 of the supercapacitor SCAP, pins 4, 6, 9 of the supercapacitor charging chip U1 and one end of the capacitor C1 are all electrically connected to one end of the capacitor C2, the other end of the capacitor C1 and the other end of the capacitor C2 are grounded, pin 11 of the supercapacitor charging chip U1 is grounded, pin 7 of the supercapacitor charging chip U1 is electrically connected to one end of the resistor R PROG ; PROG The other end of is grounded, pin 5 of the supercapacitor charging chip U1 is electrically connected to one end of the resistor R1, pin 8 of the supercapacitor charging chip U1 is electrically connected to pin 1 of the supercapacitor SCAP, and pin 10 of the supercapacitor charging chip U1 is electrically connected to pin 3 of the supercapacitor SCAP.

[0011] Based on the above technical solutions, preferably, 5V_USB voltage is connected to pin 9 of the supercapacitor charging chip U1, VCC5V0_USB voltage is connected to the other end of the resistor R1, and 5V_CAP voltage is output from pin 10 of the supercapacitor charging chip U1.

[0012] Based on the above technical solutions, preferably, the supercapacitor charging chip U1 uses a supercapacitor charger with the model of LTC3225.

[0013] Based on the above technical solutions, preferably, the supercapacitor SCAP uses a supercapacitor with the model of DMF3Z5R5H474M3DTA0.

[0014] Based on the above technical solutions, preferably, the dual - power switching circuit includes a power management chip U2, MOSFET transistors Q1, Q2, and a resistor R2;

[0015] Pin 1 of the power management chip U2 is electrically connected to the drain of the MOSFET transistor Q2, pins 2 and 3 of the power management chip U2 are both grounded, pin 4 of the power management chip U2 is respectively electrically connected to one end of the resistor R2 and the gate of the MOSFET transistor Q1, pin 5 of the power management chip U2 is electrically connected to the gate of the MOSFET transistor Q2, and pin 6 of the power management chip U2 is respectively electrically connected to the other end of the resistor R2, the source of the MOSFET transistor Q2, and the source of the MOSFET transistor Q1.

[0016] Based on the above technical solutions, preferably, pin 1 of the power management chip U2 is connected to the 5V_CAP voltage, the drain of the MOSFET Q1 is connected to the 5V_USB voltage, and pin 6 of the power management chip U2 outputs the VCC5V0_SYS voltage.

[0017] Based on the above technical solutions, preferably, the power management chip U2 uses a power management chip with the model number LTC4412ES6.

[0018] Based on the above technical solutions, preferably, the MOSFETs Q1 and Q2 use field effect transistors with the model number Si4421DY.

[0019] Based on the above technical solutions, preferably, the USB power supply circuit outputs the 5V_USB voltage and the VCC5V0_USB voltage.

[0020] A backup power supply switching circuit for a solid state drive provided by the present utility model has the following beneficial effects compared with the prior art:

[0021] (1) By using a super capacitor as a backup power supply and automatically switching to the super capacitor power supply when the power supply is cut off through a dual power supply switching circuit, long-term and effective backup power supply is achieved, avoiding data loss of the solid state drive in the case of abnormal power failure of the system, and ensuring the security and reliability of the data;

[0022] (2) By connecting the USB power supply voltage to the super capacitor charging circuit and outputting the super capacitor power supply voltage, a stable voltage is output, realizing the conversion from USB power supply to super capacitor power supply, and storing electrical energy in the super capacitor in the non-power failure state to meet the requirements of the backup power supply of the solid state drive;

[0023] (3) Through the dual power supply switching circuit, the automatic switching from USB power supply to super capacitor power supply is realized, ensuring that the system can still work normally in the case of abnormal power failure. By optimizing the power management chip and MOSFET components, the reliability and stability of the dual power supply switching are improved. BRIEF DESCRIPTION OF THE DRAWINGS

[0024] In order to more clearly illustrate the technical solutions in the embodiments of the present utility model or the prior art, the following will briefly introduce the drawings required for use in the description of the embodiments or the prior art. Obviously, the following drawings are only some embodiments of the present utility model. For those of ordinary skill in the art, without creative efforts, other drawings can also be obtained based on these drawings.

[0025] Figure 1 It is a structural diagram of a backup power supply switching circuit for a solid state drive of the present utility model;

[0026] Figure 2 It is the wiring diagram of the supercapacitor charging circuit of the present utility model;

[0027] Figure 3 It is the wiring diagram of the dual-power switching circuit of the present utility model. Specific embodiments

[0028] Next, in combination with the embodiments of the present utility model, the technical solutions in the embodiments of the present utility model will be clearly and completely described. Obviously, the described embodiments are only a part of the embodiments of the present utility model, rather than all the embodiments. Based on the embodiments in the present utility model, all other embodiments obtained by those of ordinary skill in the art without creative efforts shall fall within the protection scope of the present utility model.

[0029] Please refer to Figure 1 , this embodiment provides a backup power switching circuit for a solid-state drive, including a USB power supply circuit, a supercapacitor charging circuit 1, and a dual-power switching circuit 2;

[0030] The USB power supply circuit is electrically connected to the supercapacitor charging circuit 1 and the dual-power switching circuit 2 respectively, and is used for USB power supply;

[0031] The supercapacitor charging circuit 1 is electrically connected to the dual-power switching circuit 2, and is used for supercapacitor power supply;

[0032] The dual-power switching circuit 2 is electrically connected to the USB power supply circuit and the supercapacitor charging circuit 1 respectively, and is used for switching between the USB power supply circuit and the supercapacitor charging circuit 1.

[0033] Specifically, when the USB power supply of a backup power switching circuit for a solid-state drive in this embodiment is normal, the dual-power switching circuit 2 is used to select and output the USB power supply as the output. In this way, the charging times of the supercapacitor can be greatly reduced. Compared with the technical solution of connecting capacitors in parallel to the USB main power supply, the supercapacitor can be effective for a long time, and the supercapacitor has the characteristics of large capacity and high output power. The solution of this embodiment has the characteristics of optimized charge and discharge cycle life and higher reliability than electrolytic capacitors and other capacitors.

[0034] A backup power switching circuit for a solid-state drive in this embodiment uses a supercapacitor as a backup power supply, and automatically switches to supercapacitor power supply when the power supply is cut off through the dual-power switching circuit, realizing long-term and effective backup power supply, avoiding the problem of data loss of the solid-state drive in the case of abnormal power-off of the system, and ensuring the security and reliability of the data.

[0035] Such as Figure 2As shown, the supercapacitor charging circuit 1 includes a supercapacitor charging chip U1, a supercapacitor SCAP, capacitors C1, C2, C3, a resistor R1, and a resistor R PRDG ;

[0036] One end of pin 1 of the supercapacitor charging chip U1 is electrically connected to one end of capacitor C3, the other end of pin 2 of the supercapacitor charging chip U1 is electrically connected to the other end of capacitor C3, pin 3 of the supercapacitor charging chip U1 is electrically connected to pin 2 of the supercapacitor SCAP, one ends of pins 4, 6, 9 of the supercapacitor charging chip U1 and one end of capacitor C1 are all electrically connected to one end of capacitor C2, the other end of capacitor C1 and the other end of capacitor C2 are grounded, pin 11 of the supercapacitor charging chip U1 is grounded, pin 7 of the supercapacitor charging chip U1 is electrically connected to one end of resistor R PRDG ; PRDG ;

[0037] The other end of pin 9 of the supercapacitor charging chip U1 is connected to the 5V_USB voltage, the other end of resistor R1 is connected to the VCC5V0_USB voltage, and pin 10 of the supercapacitor charging chip U1 outputs the 5V_CAP voltage.

[0038] The supercapacitor charging chip U1 uses a supercapacitor charger with the model number LTC3225.

[0039] The supercapacitor SCAP uses a supercapacitor with the model number DMF3Z5R5H474M3DTA0.

[0040] Specifically, the supercapacitor charging circuit 1 of this embodiment realizes the effective charging of the supercapacitor through components such as the supercapacitor charging chip U1, the supercapacitor SCAP, capacitors C1, C2, C3, resistor R1, and resistor RPRDG, ensuring that the supercapacitor can provide a stable backup power supply when needed.

[0041] Controlling a reasonable charging current I out is beneficial to ensuring the lifespan of the supercapacitor. The setting of the charging current I out is determined by the value of resistor R PROG , and the calculation formula is as follows:

[0042]

[0043] The 5V_USB voltage is connected to pin 9 of the supercapacitor charging chip U1, and pin 10 outputs the 5V_CAP voltage to output a stable voltage, realizing the conversion from USB power supply to supercapacitor power supply. The electric energy is stored in the supercapacitor in the non-power-off state to meet the demand for the backup power supply of the solid-state drive.

[0044] As Figure 3 shown, the dual-power switching circuit 2 includes a power management chip U2, MOSFET transistors Q1, Q2, and resistor R2;

[0045] Pin 1 of the power management chip U2 is electrically connected to the drain of the MOSFET transistor Q2. Pins 2 and 3 of the power management chip U2 are both grounded. Pin 4 of the power management chip U2 is electrically connected to one end of the resistor R2 and the gate of the MOSFET transistor Q1 respectively. Pin 5 of the power management chip U2 is electrically connected to the gate of the MOSFET transistor Q2. Pin 6 of the power management chip U2 is electrically connected to the other end of the resistor R2, the source of the MOSFET transistor Q2, and the source of the MOSFET transistor Q1 respectively.

[0046] The 5V_CAP voltage is connected to pin 1 of the power management chip U2, the 5V_USB voltage is connected to the drain of the MOSFET transistor Q1, and pin 6 of the power management chip U2 outputs the VCC5V0_SYS voltage.

[0047] The power management chip U2 uses a power management chip with the model number LTC4412ES6.

[0048] The MOSFET transistors Q1 and Q2 use field effect transistors with the model number Si4421DY.

[0049] Specifically, the dual-power switching circuit 2 of this embodiment controls the MOSFET transistors Q1 and Q2 through the power management chip U2 to realize the automatic switching from USB power supply to supercapacitor power supply.

[0050] When the USB power supply is normal, the power management chip U2 turns on the MOSFET transistor Q1 to output the VCC5V0_SYS voltage. When the USB power supply is abnormal, the MOSFET transistor Q2 is turned on to output the VCC5V0_SYS voltage supplied by the 5V_CAP voltage of the supercapacitor.

[0051] Using the power management chip U2 with the model number LTC4412ES6 can effectively realize the switching control of the dual power supplies and ensure the reliability of the system power supply.

[0052] Selecting the MOSFET transistors Q1 and Q2 with the model number Si4421DY has good switching characteristics and can undertake the function of dual-power switching.

[0053] The dual-power switching circuit 2 of this embodiment realizes the automatic switching from USB power supply to supercapacitor power supply, ensuring that the system can still work properly during abnormal power failure. Through the optimized power management chip and MOSFET components, the reliability and stability of dual-power switching are improved, providing reliable system power supply for the solid-state drive and solving the problem of data loss caused by power failure.

[0054] The USB power supply circuit outputs 5V_USB voltage and VCC5V0_USB voltage.

[0055] Specifically, as Figures 1-3 shown, when the 5V_USB voltage output by the USB power supply circuit is connected during the operation of a backup power switching circuit for a solid-state drive in this embodiment, the pin 5 of the power management chip U2 outputs a high level, and the MOSFET Q2 is turned off; when the pin 4 of the power management chip U2 outputs a low level, the MOSFET Q1 is turned on, and VCC5V0_SYS = 5V_USB. When the system has an abnormal power failure, that is, when the 5V_USB stops being connected, the pin of the power management chip U2 outputs a low level, and the MOSFET Q2 is turned on; the pin 4 of the power management chip U2 outputs a high level, and the MOSFET Q1 is turned off, and VCC5V0_SYS = 5V_CAP. A backup power switching circuit for a solid-state drive in this embodiment uses an external power supply when the USB power supply circuit normally provides 5V_USB voltage, and automatically switches to supercapacitor power supply through the dual-power switching circuit 2 in case of an abnormal situation. This can reduce the charge and discharge frequency of the supercapacitor, ensure that the supercapacitor can be effective for a long time, and the supercapacitor has a large capacity and a long power supply time.

[0056] The above are only the preferred embodiments of the present invention and are not intended to limit the present invention. Any modifications, equivalent replacements, improvements, etc. made within the spirit and principle of the present invention shall be included in the protection scope of the present invention.

Claims

1. A backup power switching circuit for a solid state hard disk, characterized in that: It comprises a USB power supply circuit, a super capacitor charging circuit (1) and a dual power supply switching circuit (2); The USB power supply circuit is electrically connected to the supercapacitor charging circuit (1) and the dual power supply switching circuit (2) respectively, and is used for USB power supply; The supercapacitor charging circuit (1) is electrically connected to the dual power supply switching circuit (2) and is used for supplying power to the supercapacitor; The dual power supply switching circuit (2) is electrically connected to the USB power supply circuit and the super capacitor charging circuit (1) respectively, and is used for switching between the USB power supply circuit and the super capacitor charging circuit (1).

2. A backup power switching circuit for a solid state hard disk as claimed in claim 1, characterized in that: The supercapacitor charging circuit (1) comprises a supercapacitor charging chip U1, a supercapacitor SCAP, capacitors C1, C2, C3, resistors R1, R PROG ; Pin 1 of the supercapacitor charging chip U1 is electrically connected to one end of the capacitor C3, pin 2 of the supercapacitor charging chip U1 is electrically connected to the other end of the capacitor C3, pin 3 of the supercapacitor charging chip U1 is electrically connected to pin 2 of the supercapacitor SCAP, pins 4, 6, 9 of the supercapacitor charging chip U1 and one end of the capacitor C1 are electrically connected to one end of the capacitor C2, the other end of the capacitor C1 and the other end of the capacitor C2 are grounded, pin 11 of the supercapacitor charging chip U1 is grounded, and pin 7 of the supercapacitor charging chip U1 is connected to the resistor R PROG One end is electrically connected to the resistor R PROG The other end of is grounded, pin 5 of the supercapacitor charging chip U1 is electrically connected to one end of the resistor R1, pin 8 of the supercapacitor charging chip U1 is electrically connected to pin 1 of the supercapacitor SCAP, and pin 10 of the supercapacitor charging chip U1 is electrically connected to pin 3 of the supercapacitor SCAP.

3. A backup power switching circuit for a solid state hard disk as claimed in claim 2, characterized in that: Pin 9 of the supercapacitor charging chip U1 is connected to the 5V_USB voltage, the other end of the resistor R1 is connected to the VCC5V0_USB voltage, and the pin 10 of the supercapacitor charging chip U1 outputs the 5V_CAP voltage.

4. A backup power switching circuit for a solid state hard disk as claimed in claim 3, characterized in that: The supercapacitor charging chip U1 adopts a supercapacitor charger of model LTC3225.

5. A backup power switching circuit for a solid state hard disk as claimed in claim 4, characterized in that: The super capacitor SCAP adopts a super capacitor with a model of DMF3Z5R5H474M3DTA0.

6. A backup power switching circuit for a solid state hard disk as claimed in claim 1, characterized in that: The dual power switching circuit (2) comprises a power management chip U2, MOSFET tubes Q1, Q2, and a resistor R2; Pin 1 of the power management chip U2 is electrically connected to the drain of the MOSFET tube Q2, pins 2 and 3 of the power management chip U2 are both grounded, pin 4 of the power management chip U2 is electrically connected to one end of the resistor R2 and the gate of the MOSFET tube Q1, pin 5 of the power management chip U2 is electrically connected to the gate of the MOSFET tube Q2, and pin 6 of the power management chip U2 is electrically connected to the other end of the resistor R2, the source of the MOSFET tube Q2, and the source of the MOSFET tube Q1.

7. A backup power switching circuit for a solid state hard disk as claimed in claim 6, characterized in that: Pin 1 of the power management chip U2 is connected to the 5V_CAP voltage, the drain of the MOSFET tube Q1 is connected to the 5V_USB voltage, and pin 6 of the power management chip U2 outputs the VCC5V0_SYS voltage.

8. A backup power switching circuit for a solid state hard disk as claimed in claim 7, characterized in that: The power management chip U2 is a power management chip of model LTC4412ES6.

9. A backup power switching circuit for a solid state hard disk as claimed in claim 8, characterized in that: The MOSFET tubes Q1 and Q2 are field effect tubes of model Si4421DY.

10. The backup power switching circuit for a solid state hard disk as claimed in claim 1, characterized in that: The USB power supply circuit outputs a 5V_USB voltage and a VCC5V0_USB voltage.

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