Solar cell and photovoltaic module
By setting a non-pyramid structure on the back and front surface of the silicon substrate of the solar cell, the problem of composite center and leakage in the prior art solar cell during the polishing process is solved, and a lower series resistance and higher photoelectric conversion efficiency are achieved.
Patent Information
- Application Number
- CN202421602993.5
- Authority / Receiving Office
- CN · China
- Patent Type
- Utility models(China)
- Current Assignee / Owner
- Filing Date
- 2024-07-08
- Publication Date
- 2025-06-27
- Estimated Expiration
- 2034-07-08
AI Technical Summary
During the polishing process of backlight surface, existing solar cells are prone to composite center and leakage, resulting in an increase in series resistance and low photoelectric conversion efficiency.
A first non-pyramid structure is provided on the rear surface of the silicon substrate of the solar cell, and a second non-pyramid structure is provided on the corresponding semiconductor layer area on the front surface, and its side length and relative size are controlled to reduce series resistance and improve photoelectric conversion efficiency.
By setting up a non-pyramid structure, the series resistance of the solar cell is reduced, and the short-circuit current and photoelectric conversion efficiency are improved.
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Figure CN223040513U_ABST
Abstract
Description
Technical Field
[0001] The present application relates to the technical field of solar cells, and particularly to a solar cell and a photovoltaic module. Background Art
[0002] Solar cells and photovoltaic power generation systems are widely used in various fields. Improving the photoelectric conversion efficiency of solar cells is one of the main requirements in current solar cell preparation technologies. By polishing the back surface of a solar cell to obtain a back surface with pyramid bases of a certain size, the passivation effect of the back surface of the solar cell can be improved, the series resistance (Rs) of the solar cell can be reduced, and the photoelectric conversion efficiency can be enhanced. However, this process is also likely to cause more recombination centers and leakage phenomena, thereby increasing the recombination in the metallization region of the solar cell. Summary of the Utility Model
[0003] The purpose of the embodiments of the present application is to provide a solar cell and a photovoltaic module. The solar cell has a lower series resistance, a higher short-circuit current, and a higher photoelectric conversion efficiency.
[0004] To achieve the above purpose, the embodiments of the present application provide the following technical solutions:
[0005] In a first aspect, the embodiments of the present application provide a solar cell, including:
[0006] A silicon substrate having a front surface and a back surface disposed opposite to each other;
[0007] A patterned semiconductor layer disposed on the front surface of the silicon substrate; wherein,
[0008] The back surface of the silicon substrate has a plurality of first non-pyramid structures, and the first non-pyramid structures are concave or convex with respect to the back surface of the silicon substrate; corresponding to the region where the semiconductor layer is located, the front surface of the silicon substrate has a plurality of second non-pyramid structures, and the second non-pyramid structures are concave or convex with respect to the front surface of the silicon substrate; the horizontal projection shapes of the first non-pyramid structures and the second non-pyramid structures on the surface of the silicon substrate are polygons;
[0009] The side length d1 of the first non-pyramid structure is 1 μm to 25 μm; the side length d2 of the second non-pyramid structure is 2 μm to 35 μm; the longest side of the first non-pyramid structure is d1max, the shortest side of the first non-pyramid structure is d1min, the longest side of the second non-pyramid structure is d2max, the shortest side of the second non-pyramid structure is d2min, and the ratio range of (d2max + d2min) / 2 to (d1max + d1min) / 2 is 1 to 1.5.
[0010] Further, the area S1 of the first non-pyramid structure is 1 μm 2 ~625 μm 2 , and the area S2 of the second non-pyramid structure is 4 μm 2 ~1225 μm 2 ;
[0011] The average value of the areas of a plurality of the first non-pyramid structures is The average value of the areas of a plurality of the second non-pyramid structures is
[0012] Further, the height l1 of the first non-pyramid structure is 100 nm to 800 nm, and the height of the second non-pyramid structure is 50 nm to 500 nm;
[0013] The average value of the heights of a plurality of the first non-pyramid structures is The average value of the heights of a plurality of the second non-pyramid structures is
[0014] Further, the solar cell further includes: a first dielectric layer and a first doped polysilicon layer which are sequentially arranged on the rear surface of the silicon substrate along the direction away from the silicon substrate, and the first doped polysilicon layer has the same conductivity type as the silicon substrate.
[0015] Further, the thickness of the first dielectric layer is 0.5 nm to 4 nm, and the thickness of the first doped polysilicon layer is 100 nm to 400 nm.
[0016] Further, the semiconductor layer has a conductivity type different from that of the silicon substrate, the semiconductor layer is a second doped polysilicon layer, and a second dielectric layer is further provided between the second doped polysilicon layer and the silicon substrate.
[0017] Further, the thickness of the second dielectric layer is 0.5 nm to 4 nm, and the thickness of the second doped polysilicon layer is 100 nm to 400 nm.
[0018] Further, the semiconductor layer is a diffusion layer, and the diffusion layer has a conductivity type different from that of the silicon substrate.
[0019] Further, the solar cell has a metallization region and a non-metallization region, the patterned region of the semiconductor layer corresponds to the position of the metallization region, and on the front surface of the silicon substrate, the non-metallization region has a pyramid structure; and / or,
[0020] On the back surface of the silicon substrate, in a direction away from the silicon substrate, a first functional layer and a first electrode are provided on the first doped polysilicon layer, and the first electrode is in ohmic contact with the first doped polysilicon layer through the first functional layer;
[0021] On the front surface of the silicon substrate, in a direction away from the silicon substrate, a second functional layer and a second electrode are further provided on the semiconductor layer, and the second electrode is in ohmic contact with the semiconductor layer through the second functional layer.
[0022] In a second aspect, an embodiment of the present application provides a photovoltaic module, and the photovoltaic module includes the solar cell described in the first aspect.
[0023] Compared with the prior art, the beneficial effects of the embodiments of the present application are as follows:
[0024] In the embodiments of the present application, a plurality of first non-pyramid structures are provided on the back surface of the silicon substrate of the solar cell, which is beneficial to reducing the recombination of the metal electrode and the silicon substrate at the corresponding position, reducing the contact resistance, and can enhance the light reflection on the back surface of the silicon substrate and improve the light collection efficiency of the solar cell. A patterned semiconductor layer is provided on the front surface of the silicon substrate of the solar cell, and a second non-pyramid structure is provided on the surface area of the silicon substrate corresponding to the patterned semiconductor layer, which is beneficial to improving the Schottky contact performance between the metal electrode and the semiconductor layer and reducing the contact resistance.
[0025] The series resistance of the solar cell is mainly composed of the front and back electrode transverse resistances, the contact resistance between the metal electrode and the semiconductor layer, the base region resistance, and the emitter transverse resistance. The contact resistances on the front and back surfaces and the difference in contact resistances will comprehensively affect the series resistance of the solar cell, and the morphological differences between the first non-pyramid structure and the second non-pyramid structure will also affect the base region resistance, thereby affecting the series resistance of the solar cell. The present application finds that when the side lengths of the first non-pyramid structure and the second non-pyramid structure are 1 μm to 25 μm and 2 μm to 35 μm respectively, and the ratio of the average value of the longest side and the shortest side of the second non-pyramid structure to the average value of the longest side and the shortest side of the first non-pyramid structure is 1 to 1.5, the series resistance of the solar cell is relatively low and the photoelectric conversion efficiency is relatively high.
[0026] In summary, in the embodiments of the present application, by providing a first non-pyramid structure on the back surface of the silicon substrate of the solar cell, a second non-pyramid structure in the region of the silicon substrate corresponding to the semiconductor layer on the front surface, and when the side lengths and relative dimensions of the first non-pyramid structure and the second non-pyramid structure meet a certain range, the overall performance of the solar cell is good. Description of the Drawings
[0027] To more clearly illustrate the technical solutions in the embodiments of the present application, the following will briefly introduce the accompanying drawings required for use in the embodiments. Obviously, the accompanying drawings in the following description are only some embodiments of the present application. For those of ordinary skill in the art, without creative efforts, other accompanying drawings can also be obtained based on these drawings.
[0028] Figure 1 is a schematic structural diagram of a solar cell provided by an embodiment of the present application;
[0029] Figure 2 is a scanning electron microscope image of a first non-pyramidal structure from a first perspective provided by an embodiment of the present application;
[0030] Figure 3 is a scanning electron microscope image of a second non-pyramidal structure from a first perspective provided by an embodiment of the present application;
[0031] Figure 4 is a scanning electron microscope image of a first non-pyramidal structure from a second perspective provided by an embodiment of the present application;
[0032] Figure 5 is a scanning electron microscope image of a second non-pyramidal structure from a second perspective provided by an embodiment of the present application.
[0033] Reference numerals:
[0034] 1, silicon substrate; 1a, rear surface; 1b, front surface; 11, first non-pyramidal structure; 12, second non-pyramidal structure; 2, first dielectric layer; 3, first doped polysilicon layer; 4, semiconductor layer; 41, second dielectric layer; 42, second doped polysilicon layer; 5, first functional layer; 6, first electrode; 7, second functional layer; 8, second electrode. Detailed implementation manners
[0035] The following will clearly and completely describe the technical solutions in the embodiments of the present application in conjunction with the accompanying drawings in the embodiments of the present application. Obviously, the described embodiments are only some embodiments of the present application, rather than all embodiments. Based on the embodiments in the present application, all other embodiments obtained by those of ordinary skill in the art without creative efforts belong to the scope of protection of the present application.
[0036] In this application, the terms "upper", "lower", "left", "right", "front", "rear", "top", "bottom", "inner", "outer", "middle", "vertical", "horizontal", "lateral", "longitudinal", etc. indicate the orientation or positional relationship based on the orientation or positional relationship shown in the drawings. These terms are mainly used to better describe this application and its embodiments, and are not used to limit that the indicated device, element or component must have a specific orientation, or be constructed and operated in a specific orientation.
[0037] Moreover, in addition to being able to represent the orientation or positional relationship, some of the above terms may also be used to represent other meanings. For example, the term "upper" may also be used to represent a certain attachment relationship or connection relationship in some cases. For those of ordinary skill in the art, the specific meanings of these terms in this application can be understood according to specific circumstances.
[0038] In addition, the terms "mounted", "arranged", "provided with", "connected", "linked" should be understood in a broad sense. For example, it can be a fixed connection, a detachable connection, or an integral structure; it can be a mechanical connection or an electrical connection; it can be directly connected, or indirectly connected through an intermediate medium, or there is internal communication between two devices, elements or components. For those of ordinary skill in the art, the specific meanings of the above terms in this application can be understood according to specific circumstances.
[0039] In addition, the terms "first", "second", etc. are mainly used to distinguish different devices, elements or components (the specific types and structures may be the same or different), and are not used to indicate or imply the relative importance and quantity of the indicated devices, elements or components. Unless otherwise specified, the meaning of "a plurality" is two or more.
[0040] Next, the technical solution provided by this application will be further described in conjunction with embodiments and drawings.
[0041] An embodiment of this application provides a solar cell. Please refer to Figure 1 , the solar cell includes:
[0042] A silicon substrate 1, the silicon substrate 1 has a rear surface 1a and a front surface 1b arranged opposite to each other;
[0043] A patterned semiconductor layer 4, the semiconductor layer 4 is disposed on the front surface 1b of the silicon substrate 1;
[0044] Among them, a plurality of first non-pyramid structures 11 are provided on the rear surface 1a of the silicon substrate 1, and the first non-pyramid structures 11 are concave or convex with respect to the rear surface 1a of the silicon substrate 1; corresponding to the region where the semiconductor layer 4 is located, the front surface 1b of the silicon substrate 1 has a plurality of second non-pyramid structures 12, and the second non-pyramid structures 12 are concave or convex with respect to the front surface 1b of the silicon substrate 1; the horizontal projection shapes of the first non-pyramid structures 11 and the second non-pyramid structures 12 on the silicon substrate surface are polygons;
[0045] Among them, the side length d1 of the first non-pyramid structure 11 is 1 μm to 25 μm, and the side length of the second non-pyramid structure 12 is 2 μm to 35 μm; the longest side of the first non-pyramid structure 11 is d1max, the shortest side of the first non-pyramid structure 11 is d1min, the longest side of the second non-pyramid structure 12 is d2max, and the shortest side of the pyramid base is d2min. The ratio range of (d2max + d2min) / 2 to (d1max + d1min) / 2 is 1 to 1.5.
[0046] It can be understood that the first non-pyramid structure 11 and the second non-pyramid structure 12 in this application refer to structures whose structural shapes are no longer complete pyramid shapes. The above non-pyramid structures can be obtained by existing polishing techniques such as alkali polishing. For example, the surface of the silicon substrate is polished and etched with a polishing and etching solution composed of sodium hydroxide and an alkali polishing additive, etc., so that the silicon substrate presents a textured surface with a non-pyramid shape after polishing. The shape of the non-pyramid structure includes a rectangle or an irregular quadrilateral similar to a rectangle, etc. The textured surface of the non-pyramid mechanism can be obtained by polishing a silicon substrate with a pyramid velvet surface structure. In short, most or all of the pyramid tips and the tower bodies of the pyramid velvet surface structure are etched away, so that the surface of the polished silicon substrate changes from a pyramid shape to a non-pyramid shape that protrudes or concaves with respect to the front surface 1b and / or the rear surface 1a of the silicon substrate. The formation method of the pyramid base in this application is not limited.
[0047] It should be noted that there are certain dimensional differences among the plurality of first non-pyramid structures 11. Therefore, the side length d1 of the first non-pyramid structure 11 in this application is 1 μm to 25 μm, which means that the side lengths of these first non-pyramid structures 11 are within the above range. For any one of the first non-pyramid structures 11, there is a longest side d 1max and a shortest side d 1min . Taking the first non-pyramid structure 11 as a rectangle as an example, the rectangle has a long side and a short side. The longest side d 1max of the first non-pyramid structure 11 refers to this long side, and the shortest side d of the first non-pyramid structure 111min refers to the short side, and the side length d1 of the first non-pyramidal structure 11 is between d 1max and d 1min The same applies to d2, d 2max , d 2min of the second non-pyramidal structure 12 as that of the first non-pyramidal structure 11, so details are not described herein again.
[0048] In addition, (d1max + d1min) / 2 reflects the average side length of the first non-pyramidal structure 11, and (d2max + d2min) / 2 reflects the average side length of the second non-pyramidal structure 12. The ratio of the two can reflect the overall size difference between the first non-pyramidal structure 11 and the second non-pyramidal structure 12 to a certain extent. By respectively arranging the first non-pyramidal structure 11 and the second non-pyramidal structure 12 on the rear surface 1a, and simultaneously controlling the side length ranges of the first non-pyramidal structure 11 and the second non-pyramidal structure 12 and the average side length ratio of the two, the series resistance of the solar cell can be effectively reduced, and the photoelectric conversion efficiency of the solar cell can be improved.
[0049] In the embodiment of the present application, when the first non-pyramidal structure 11 is arranged on the rear surface 1a of the solar cell silicon substrate 1 and its side length d1 is 1 μm to 25 μm, it is beneficial to remove the back junction generated during boron diffusion, reduce the recombination of the metal electrode and the silicon substrate 1, lower the contact resistance, and enhance the light reflection of the rear surface 1a of the silicon substrate 1, thereby improving the light collection efficiency of the solar cell. When the second non-pyramidal structure 12 is arranged in the area corresponding to the semiconductor layer 4 on the front surface 1b of the solar cell silicon substrate 1 and its side length d2 is 2 μm to 35 μm, compared with the situation where the metal electrode is in direct contact with the smooth silicon wafer surface, resulting in poor contact and thus too large contact resistance or increased interface recombination, or the metal electrode is in direct contact with the overly rough silicon wafer surface, hindering current flow and resulting in too large resistance, the arrangement of the second non-pyramidal structure 12 in the embodiment of the present application makes the contact surface between the metal electrode and the silicon substrate 1 have a certain roughness, which is beneficial to improving the contact between the metal in the metallization area and the silicon substrate 1 and reducing the contact resistance. Exemplarily, the side length d1 of the first non-pyramidal structure 11 is any point value within the above range, including but not limited to 1 μm, 5 μm, 10 μm, 12 μm, 15 μm, 18 μm, 20 μm, 25 μm, etc.; the side length d2 of the second non-pyramidal structure 12 is any point value within the above range, including but not limited to 2 μm, 5 μm, 10 μm, 20 μm, 23 μm, 26 μm, 29 μm, 32 μm, 35 μm, etc.
[0050] The series resistance of a solar cell is mainly composed of the lateral resistance of the front and rear electrodes, the contact resistance between the metal and the semiconductor, the base region resistance, and the lateral resistance of the emitter. The contact resistance of the front surface 1b and the rear surface 1a respectively, as well as the difference in the contact resistance between the front surface 1b and the rear surface 1a, will affect the resistance of the solar cell. Moreover, the morphological differences between the first non-pyramidal structure 11 and the second non-pyramidal structure 12 will also affect the base region resistance, and thus comprehensively affect the series resistance of the solar cell. The applicant has found that the side lengths of the first non-pyramidal structure 11 and the second non-pyramidal structure 12 are 1 μm to 25 μm and 2 μm to 35 μm respectively, and their relative sizes satisfy a certain range, that is, when the ratio of the average value of the longest side and the shortest side of the second non-pyramidal structure 12 to the average value of the longest side and the shortest side of the first non-pyramidal structure 11 is 1 to 1.5, the overall series resistance of the solar cell is smaller, the short-circuit current increases, and the conversion efficiency of the solar cell is improved. The average value of the longest side and the shortest side of the pyramid base can reflect the overall length of the side of the solar cell.
[0051] It can be understood that the semiconductor layer 4 provided on the front surface 1b of the silicon substrate 1 can be a doped crystalline silicon layer deposited on the silicon substrate 1 by a vapor deposition process, or a diffusion layer formed by thermal diffusion into the surface of the silicon substrate 1. The semiconductor layer 4 is a patterned structure, that is, the semiconductor layer 4 does not entirely cover the silicon substrate 1, but partially covers it. Therefore, the front surface 1b of the silicon substrate 1 corresponding to the region where the semiconductor layer 4 is located has a second non-pyramidal structure, while other regions of the front surface 1b of the silicon substrate 1 can still have a pyramidal structure.
[0052] It can be understood that the first non-pyramidal structure 11 provided on the rear surface 1a of the silicon substrate 1 can only correspond to the metallized region on the rear surface 1a, or can be provided in both the metallized region and the non-metallized region on the rear surface 1a.
[0053] Furthermore, the area S1 of the first non-pyramidal structure 11 is 1 μm 2 ~625 μm 2 , and the area S2 of the second non-pyramidal structure 12 is 4 μm 2 ~1225 μm 2 ; the average value of the areas of several first non-pyramidal structures 11 is the average value of the areas of several second non-pyramidal structures 12 is To a certain extent, the area of the non-pyramidal structure can reflect the roughness of the interface with the non-pyramidal structure. Compared with the interface of the first non-pyramidal structure 11 with a smaller area, the interface roughness of the second non-pyramidal structure 12 with a larger area is relatively lower. That is to say, the roughness of the interface corresponding to the first non-pyramid structure is greater than or equal to the roughness of the interface corresponding to the second non-pyramid structure. Forming a polished surface with a certain roughness on the back surface 1a of the silicon substrate 1 is beneficial to improving the passivation effect of the back surface 1a of the solar cell. For the contact interface between the metal electrode and the silicon substrate 1 in the solar cell, if the roughness is too low, the contact between the metal electrode and the silicon substrate 1 will be unstable, while if the roughness of the contact interface is too high, there will be more lattice defects at the contact interface, increasing the formation of dangling bonds. The increased dangling bonds may increase the recombination of electron-hole pairs, thereby reducing the photoelectric conversion efficiency of the solar cell. In the embodiments of the present application, by controlling the respective areas and relative areas of the first non-pyramid structure 11 and the second non-pyramid structure 12, the contact resistance between the metal electrode and the silicon substrate 1 is relatively low and the overall series resistance is relatively low, thereby improving the photoelectric conversion efficiency of the solar cell.
[0054] Among them, the average value of the area of the non-pyramid structure is measured by the following method: Use a scanning electron microscope to test the first non-pyramid structure 11 and the second non-pyramid structure 12. Randomly select 5 different regions on the four sides and in the middle of the wafer to measure the first non-pyramid structure 11 and the second non-pyramid structure 12. Test from the surface direction of the battery (that is, from the angle looking down at the surface of the solar cell). The area of this field of view is approximately 175μm × 115μm. Measure the longest side length and the shortest side length of the largest and smallest non-pyramid structures in this region, calculate the area according to the area formula, and take the average value. It should be noted that when testing the first non-pyramid structure 11 and the second non-pyramid structure 12, the film layers such as the metal electrode, the passivation layer, and the semiconductor layer have been removed by chemical etching method, and only the silicon substrate 1 remains. Therefore, the first non-pyramid structure 11 on the back surface 1a of the silicon substrate 1 and the second non-pyramid structure 12 on the front surface 1b can be observed and measured.
[0055] Furthermore, the height l1 of the first non-pyramid structure 11 is 100nm - 800nm, and the height l2 of the second non-pyramid structure 12 is 100nm - 500nm; the average value of the heights of several first non-pyramid structures 11 is The average value of the heights of several said second non-pyramid structures 12 is To a certain extent, the height of the non-pyramidal structure can reflect the flatness of the contact interface with the non-pyramidal structure. The higher the non-pyramidal structure, the lower the flatness of the contact interface with the non-pyramidal structure. Lower flatness will lead to higher non-uniformity of the contact interface and an increase in dangling bonds. Similar to the area, the height of the first non-pyramidal structure 11 can be greater than or equal to the height of the second non-pyramidal structure 12, that is, the flatness of the interface corresponding to the first non-pyramidal structure is less than or equal to the flatness of the second non-pyramidal structure. The relatively uneven interface is beneficial to improving the passivation effect of the back surface 1a of the solar cell. In the embodiments of the present application, by controlling the flatness of the contact interface, good contact between the metal electrode and the silicon wafer can be achieved while reducing the number of dangling bonds, which helps to reduce the recombination of electron-hole pairs at the dangling bonds.
[0056] Among them, the average value of the height of the non-pyramidal structure is measured by the following method: Use a scanning electron microscope to measure the heights of the first non-pyramidal structure 11 and the second non-pyramidal structure 12. Randomly select 5 different regions on the four sides and in the middle of the wafer to measure the first non-pyramidal structure 11 and the second non-pyramidal structure 12. Measure through the battery cross-section direction. The area of this field of view is approximately 175μm × 115μm. Measure the maximum and minimum heights of the non-pyramidal structures in this region and take the average value. It should be noted that when testing the non-pyramidal structure, the metal electrode, passivation layer, semiconductor layer and other film layers have been removed by chemical etching method, and only the silicon substrate 1 remains, so the first non-pyramidal structure 11 on the back surface 1a of the silicon substrate 1 and the second non-pyramidal structure 12 on the front surface 1b can be observed and measured.
[0057] Furthermore, the solar cell further includes: along the direction away from the silicon substrate 1, a first dielectric layer 2 and a first doped polysilicon layer 3 are sequentially arranged on the back surface 1a of the silicon substrate 1. The first doped polysilicon layer 3 has the same conductivity type as the silicon substrate 1, for example, both are N-type. That is to say, a whole-layer back surface passivation contact structure can be arranged on the back surface 1a of the solar cell. The existence of the passivation contact structure avoids the direct contact between the metal electrode and the silicon substrate, can greatly reduce the carrier recombination in the metal contact area, and can significantly improve the open-circuit voltage and efficiency of the battery. And for the region corresponding to the first non-pyramidal structure 11 of the passivation contact structure, it can increase the number of reflections of photons entering the silicon substrate 1 inside the silicon substrate 1, improve the long-wave spectral response of the solar cell, and further increase the light absorption of the solar cell and enhance the photoelectric conversion efficiency of the solar cell.
[0058] Among them, the material of the first dielectric layer may include various dielectric materials, such as at least one of silicon oxide, magnesium fluoride, amorphous silicon, polycrystalline silicon, silicon carbide, silicon nitride, silicon oxynitride, aluminum oxide, or titanium oxide. Specifically, the first dielectric layer may be composed of a silicon oxide layer containing silicon oxide. This is because the silicon oxide layer has excellent passivation performance, can minimize the recombination loss of minority carriers on the surface of the semiconductor substrate, and is a film with excellent durability for subsequent high-temperature processes. The first dielectric layer, as a kind of barrier for electrons and holes, can combine with the doped polycrystalline silicon layer to prevent the passage of minority carriers. The dielectric layer can also have the role of pinhole channels, enabling the free movement of carriers in the solar cell, and generating selective passage for majority carriers through heavily doped polycrystalline silicon, which is beneficial to reducing the recombination loss of minority carriers. In addition, the first dielectric layer can be used as a diffusion barrier to prevent the dopant in the doped polycrystalline silicon layer from diffusing into the semiconductor substrate.
[0059] Furthermore, the thickness of the first dielectric layer 2 is 0.5 nm to 4 nm, and the thickness of the first doped polycrystalline silicon layer 3 is 100 nm to 400 nm. The settings of the thickness of the first dielectric layer 2 and the first doped polycrystalline silicon layer 3 enable the majority carriers to penetrate while the minority carriers are blocked, ensuring good passivated contact performance.
[0060] Furthermore, the semiconductor layer 4 has a different conductivity type from the silicon substrate 1. For example, the silicon substrate is an N-type silicon substrate, and the semiconductor layer 4 has a P-type doping element. As an implementation manner, in the embodiments of the present application, as Figure 1 shown, the semiconductor layer 4 is a second doped polycrystalline silicon layer 42, and there is also a second dielectric layer 41 between the second doped polycrystalline silicon layer 42 and the silicon substrate 1, that is, a front surface passivated contact structure is formed on the front surface 1b of the silicon substrate 1. When passivated contact structures are provided on both the rear surface 1a and the front surface 1b of the silicon substrate 1, the solar cell forms a solar cell with passivated contact structures on both sides, and the front surface passivated contact structure can be provided only in the metallization region corresponding to the metal electrode to avoid affecting the light utilization rate of the front surface 1b.
[0061] Furthermore, the thickness of the second dielectric layer 41 is 0.5 nm to 4 nm, and the thickness of the second doped polycrystalline silicon layer 42 is 100 μm to 400 μm.
[0062] Furthermore, when the semiconductor layer 4 is a diffusion layer, the diffusion layer has a different conductivity type from the silicon substrate 1. For example, an N-type silicon substrate is used, and a P-type element (such as boron element) is thermally diffused on its front surface to form a diffusion layer, and this diffusion layer is the semiconductor layer.
[0063] Furthermore, the solar cell has a metallized region and a non-metallized region. The patterned region of the semiconductor layer corresponds to the position of the metallized region. On the front surface 1b of the silicon substrate 1, the non-metallized region has a pyramid structure; and / or on the back surface 1a of the silicon substrate 1, along the direction away from the silicon substrate 1, a first functional layer 5 and a first electrode 6 are provided on the first doped polysilicon layer 3. The first electrode 6 makes an ohmic contact with the first doped polysilicon layer 3 through the first functional layer 5; on the front surface 1b of the silicon substrate 1, along the direction away from the silicon substrate 1, a second functional layer 7 and a second electrode 8 are further provided on the semiconductor layer 4. The second electrode 8 makes an ohmic contact with the semiconductor layer 4 through the second functional layer 7.
[0064] Among them, the fact that the patterned region of the semiconductor layer corresponds to the position of the metallized region means that the region where the semiconductor layer is located has the characteristic of corresponding to the region where the metal electrode in the solar cell is located. Here, the correspondence can be that the width of the semiconductor layer is the same as the width of the metal electrode grid line, so that their projections on the surface of the silicon substrate coincide, or the width of the semiconductor layer is slightly larger than the width of the metal electrode grid line, so that the projection region of the metal electrode on the surface of the silicon substrate is located within the projection region of the semiconductor layer on the surface of the silicon substrate, ensuring good contact between the metal electrode and the semiconductor layer and avoiding leakage and other situations.
[0065] A pyramid structure is provided in the non-metallized region of the front surface 1b. The existence of the pyramid structure can extend the optical path of the incident light in the silicon substrate 1, increase the refraction and scattering of the incident light inside the silicon substrate 1, be beneficial to reducing the reflectivity of the surface of the silicon substrate 1, and enhancing the light utilization rate. In one embodiment, the first functional layer 5 is a first passivation layer and a first antireflection layer provided on the semiconductor layer 4 of the silicon substrate 1 along the direction away from the silicon substrate 1; the second functional layer 7 includes a second passivation layer and / or a second antireflection layer.
[0066] In a second aspect, an embodiment of the present application provides a photovoltaic module, including the solar cell in the first aspect. After several of the above-mentioned solar cells are connected in series and / or in parallel to obtain a solar cell string, they are encapsulated to obtain a photovoltaic module.
[0067] Embodiment
[0068] This embodiment provides a solar cell, including:
[0069] An N-type silicon substrate having a front surface and a back surface disposed opposite to each other;
[0070] In the direction away from the silicon substrate, a first silicon oxide layer, a boron-doped polysilicon layer, a first passivation layer, a first antireflection layer, and a first electrode are sequentially disposed on the front surface of the silicon substrate. The first electrode is in ohmic contact with the boron-doped polysilicon layer after passing through the first antireflection layer and the first passivation layer. Among them, the positions of the first silicon oxide layer and the boron-doped polysilicon layer correspond to the position of the first electrode and are located in the metallization region. The front surface of the silicon substrate has several first non-pyramidal structures in the corresponding metallization region.
[0071] In the direction away from the silicon substrate, a second silicon oxide layer, a phosphorus-doped polysilicon layer, a second passivation layer, and a second electrode are sequentially disposed on the rear surface of the silicon substrate. The second electrode is in ohmic contact with the phosphorus-doped polysilicon layer after passing through the second antireflection layer. Among them, the second silicon oxide layer and the phosphorus-doped polysilicon layer are disposed as a whole layer, and there are several second non-pyramidal structures on the rear surface of the silicon substrate. These second non-pyramidal structures are distributed in the entire layer region of the rear surface.
[0072] Among them, the side length d1 of the first non-pyramidal structure is 1 μm to 25 μm; the side length d2 of the second non-pyramidal structure is 2 μm to 35 μm; the longest side of the first non-pyramidal structure is d1max, the shortest side of the first non-pyramidal structure is d1min, the longest side of the second non-pyramidal structure is d2max, the shortest side of the second non-pyramidal structure is d2min, and the ratio range of (d2max + d2min) / 2 to (d1max + d1min) / 2 is 1 to 1.5.
[0073] The area S1 of the first non-pyramidal structure is 1 μm 2 ~625 μm 2 The area S2 of the second non-pyramidal structure is 4 μm 2 ~1225 μm 2 The average value of the areas of several first non-pyramidal structures is The average value of the areas of several second non-pyramidal structures is
[0074] The height l1 of the first non-pyramidal structure is 100 nm to 800 nm, the height of the second non-pyramidal structure is 50 nm to 500 nm, and the average value of the heights of several first non-pyramidal structures is The average value of the heights of several second non-pyramidal structures is
[0075] See Figures 2 to 5 This is the scanning electron microscope image of this embodiment. Among them, Figure 2 and Figure 3 are the scanning electron microscope images from the top view of the surface of the solar cell as the first perspective.Figure 2 At A and B in it, the side length d1 of the first non-pyramidal structure, Figure 3 At C and D in it, the side length d2 of the second non-pyramidal structure. Figure 4 and Figure 5 is a scanning electron microscope image from the side of the solar cell as the second viewing angle, Figure 4 At E in it, Figure 5 At F in it, the height of the first non-pyramidal structure and the height of the second non-pyramidal structure are respectively shown.
[0076] The electrical performance of the solar cell of the above embodiment was tested. The open-circuit voltage, short-circuit current, fill factor and other performance tests were carried out using a halm test and sorting device. The halm machine is a device that simulates sunlight, and is equipped with an electronic load, data acquisition and calculation devices, etc. for testing the electrical performance of the solar cell. The results are shown in Table 1.
[0077] Table 1 Performance test results of the solar cell
[0078]
[0079] The above has introduced in detail a solar cell and a photovoltaic module disclosed in the embodiments of the present application. Specific examples are used in this article to elaborate on the principles and implementation manners of the embodiments of the present application. The description of the above embodiments is only used to help understand the technical solutions and their core ideas of the embodiments of the present application; at the same time, for those of ordinary skill in the art, according to the ideas of the embodiments of the present application, there will be changes in the specific implementation manners and application scopes. In summary, the content of this specification should not be construed as a limitation to the embodiments of the present application.
Claims
1. A solar cell, characterized in that: The solar cell comprises: A silicon substrate having a front surface and a rear surface disposed opposite to each other; A patterned semiconductor layer, the semiconductor layer being disposed on the front surface of the silicon substrate; The rear surface of the silicon substrate has a plurality of first non-pyramid structures, which are arranged concavely or convexly relative to the rear surface of the silicon substrate; the front surface of the silicon substrate has a plurality of second non-pyramid structures corresponding to the area where the semiconductor layer is located, which are arranged concavely or convexly relative to the front surface of the silicon substrate; the horizontal projection shapes of the first non-pyramid structures and the second non-pyramid structures on the surface of the silicon substrate are polygonal; The side length d1 of the first non-pyramid type structure is 1 μm to 25 μm; the side length d2 of the second non-pyramid type structure is 2 μm to 35 μm; the longest side of the first non-pyramid type structure is d1max, the shortest side of the first non-pyramid type structure is d1min, the longest side of the second non-pyramid type structure is d2max, the shortest side of the second non-pyramid type structure is d2min, and the ratio of (d2max+d2min) / 2 to (d1max+d1min) / 2 ranges from 1 to 1.
5.
2. The solar cell according to claim 1, characterized in that: The area S1 of the first non-pyramid structure is 1 μm 2 ~625μm 2 , the area S2 of the second non-pyramid structure is 4 μm 2 ~1225μm 2 ; The average area of the first non-pyramid structures is The average area of the plurality of second non-pyramid structures is , 1≤ / <4.
3. The solar cell according to claim 1, characterized in that: The height l1 of the first non-pyramid structure is 100 nm to 800 nm, and the height of the second non-pyramid structure is 50 nm to 500 nm; The average height of the first non-pyramid structures is The average height of the second non-pyramid structure is , 1≤ / <1.
7.
4. The solar cell according to claim 1, characterized in that: The solar cell further comprises: a first dielectric layer and a first doped polysilicon layer which are sequentially arranged on the rear surface of the silicon substrate in a direction away from the silicon substrate, wherein the first doped polysilicon layer has the same conductivity type as the silicon substrate.
5. The solar cell according to claim 4, characterized in that: The thickness of the first dielectric layer is 0.5 nm to 4 nm, and the thickness of the first doped polysilicon layer is 100 nm to 400 nm.
6. The solar cell according to claim 1, characterized in that: The semiconductor layer has a conductivity type different from that of the silicon substrate. The semiconductor layer is a second doped polysilicon layer. A second dielectric layer is provided between the second doped polysilicon layer and the silicon substrate.
7. The solar cell according to claim 6, characterized in that: The thickness of the second dielectric layer is 0.5 nm to 4 nm, and the thickness of the second doped polysilicon layer is 100 nm to 400 nm.
8. The solar cell according to claim 1, characterized in that: The semiconductor layer is a diffusion layer, and the diffusion layer has a conductivity type different from that of the silicon substrate.
9. The solar cell according to any one of claims 1 to 8, characterized in that: The solar cell has a metallized region and a non-metallized region, the patterned region of the semiconductor layer corresponds to the position of the metallized region, and the non-metallized region has a pyramid structure on the front surface of the silicon substrate; and / or, On the rear surface of the silicon substrate, along the direction away from the silicon substrate, the solar cell further includes: a first dielectric layer and a first doped polysilicon layer sequentially arranged on the rear surface of the silicon substrate, a first functional layer and a first electrode are arranged on the first doped polysilicon layer, and the first electrode passes through the first functional layer and is in ohmic contact with the first doped polysilicon layer; On the front surface of the silicon substrate, along the direction away from the silicon substrate, a second functional layer and a second electrode are further arranged on the semiconductor layer, and the second electrode passes through the second functional layer to form an ohmic contact with the semiconductor layer.
10. A photovoltaic module, characterized in that: The photovoltaic module comprises the solar cell according to any one of claims 1 to 9.