Packaging bottom plate and power semiconductor device with same

By setting a heat dissipation runner inside the first connection structure of the package base plate of the power semiconductor device, the problem of poor heat dissipation effect of the package base plate in the prior art is solved, and the effects of efficient heat dissipation and low thermal resistance are achieved.

CN223052136UActive Publication Date: 2025-07-01BEIJING HONGWEI HUAISHI SEMICONDUCTOR CO LTD
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Patent Information

Application Number
CN202521017961.3
Authority / Receiving Office
CN · China
Patent Type
Utility models(China)
Current Assignee / Owner
Filing Date
2025-05-22
Publication Date
2025-07-01
Estimated Expiration
2035-05-22

AI Technical Summary

Technical Problem

In the package structure of existing power semiconductor devices, the heat transfer path is long, resulting in large thermal resistance and poor heat dissipation effect of the packaging base plate, which limits the performance advantages of silicon carbide materials.

Method used

A package base plate is designed, including an insulating substrate, a first connection structure, a second connection structure and a heat dissipation structure inside the first connection structure. The heat dissipation structure includes a first heat dissipation runner through which heat generated by the chip can be effectively derivatized.

Benefits of technology

By providing a heat dissipation structure inside the first connecting structure of the package base plate, the heat dissipation effect can be improved, the thermal resistance of the package base plate can be reduced, and the needs of high power density and high temperature service can be met.

✦ Generated by Eureka AI based on patent content.

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Abstract

The utility model provides a packaging bottom plate and a power semiconductor device with the same, and the packaging bottom plate comprises an insulating substrate which is provided with a first surface and a second surface which are opposite to each other; the first connecting structure is arranged on the first surface of the insulating substrate and is used for connecting a chip; the second connecting structure is arranged on the second surface of the insulating substrate; and the heat dissipation structure is arranged in the first connecting structure. According to the technical scheme, the problem of poor heat dissipation effect of the packaging bottom plate in the related technology is effectively solved.
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Description

Technical Field

[0001] The utility model relates to the technical field of power semiconductor devices, and more specifically, to a packaging base plate and a power semiconductor device having the same. Background Art

[0002] With the iterative upgrade of power semiconductor technology, the application advantages of wide bandgap semiconductor devices represented by silicon carbide are becoming increasingly prominent in the fields of new energy vehicles, rail transit, and smart grids. However, the development trends of device miniaturization and high power density make thermal management more important. Although the silicon carbide chip itself has a high temperature resistance capacity, it is limited by the temperature resistance limits of materials such as epoxy resin and solder in the traditional packaging structure, resulting in the overall operating temperature of the device being forced to be lowered, which restricts the performance advantages of silicon carbide materials from being exerted.

[0003] In the prior art, the heat transfer of the packaging structure of a power semiconductor device is gradually conducted in sequence from the chip, the chip solder layer, the ceramic substrate, the substrate solder layer to the metal base plate. Although heat conduction can be achieved, the heat dissipation path is relatively long, and the heat dissipation thermal resistance of the device is relatively large, resulting in poor heat dissipation effects. Summary of the Utility Model

[0004] The main purpose of the utility model is to provide a packaging base plate and a power semiconductor device having the same, so as to solve the problem of poor heat dissipation effect of the packaging base plate in the related art.

[0005] To achieve the above object, according to one aspect of the utility model, a packaging base plate is provided, including: an insulating substrate having a first surface and a second surface facing away from each other; a first connection structure disposed on the first surface of the insulating substrate and used for connecting a chip; a second connection structure, the second connection structure being disposed on the second surface of the insulating substrate; and a heat dissipation structure, the heat dissipation structure being disposed inside the first connection structure.

[0006] Further, the heat dissipation structure includes a first heat dissipation flow channel disposed inside the first connection structure, and an inlet and an outlet of the first heat dissipation flow channel are both disposed on the surface of the first connection structure.

[0007] Further, the first connection structure includes a first connection plate, and the packaging base plate further includes a first connection pipe and / or a second connection pipe, wherein both the first connection pipe and the second connection pipe are disposed on the first connection plate, the first connection pipe is communicated with the inlet of the first heat dissipation flow channel, and the second connection pipe is communicated with the outlet of the first heat dissipation flow channel.

[0008] Further, the first heat dissipation flow channel includes a plurality of channel segments communicating with each other, and the plurality of channel segments are sequentially and spaced apart from the middle of the first connection structure to the outside of the first connection structure.

[0009] Further, the channel section has a U-shaped structure. Among two adjacent channel sections, the outer channel section is disposed around the outer side of the inner channel section.

[0010] Further, the first heat dissipation channel further includes an inlet channel. The first end of the inlet channel is located on the outer surface of the first connection structure. The inlet channel extends from the outside of the first connection structure to the middle of the first connection structure. The second end of the inlet channel communicates with the innermost one of the plurality of channel sections.

[0011] Further, the first end of the channel section is the inlet end, and the second end of the channel section is the outlet end. Among two adjacent channel sections, the second end of the inner channel section communicates with the first end of the outer channel section.

[0012] Further, the encapsulation base plate further includes a second heat dissipation channel. The second heat dissipation channel is disposed in the second connection structure. The inlet and outlet of the second heat dissipation channel are both disposed on the surface of the second connection structure.

[0013] Further, the second connection structure includes a second connection plate and a heat dissipation part. The second heat dissipation channel is disposed in the second connection plate. The second connection plate is disposed between the insulating substrate and the heat dissipation part.

[0014] According to another aspect of the present invention, there is provided a power semiconductor device, which includes an encapsulation base plate and a chip disposed on the encapsulation base plate. The encapsulation base plate is the above-mentioned encapsulation base plate.

[0015] Further, the power semiconductor device further includes a first power terminal and a second power terminal. The first power terminal is disposed on the first connection structure. The second power terminal is disposed on the insulating substrate. The first power terminal and the second power terminal are insulated from each other.

[0016] Further, the power semiconductor device further includes an encapsulation housing disposed on the insulating substrate. The encapsulation housing has an insulating shielding part. The insulating shielding part is disposed on the outer periphery of the first power terminal to insulate the first power terminal and the second power terminal from each other.

[0017] Further, a first avoidance hole is provided on the encapsulation housing to enable the first power terminal to extend out of the encapsulation housing. The insulating shielding part is located on the outer periphery of the first avoidance hole. A second avoidance hole is provided on the encapsulation housing to enable the second power terminal to extend out of the encapsulation housing.

[0018] Applying the technical solution of the present utility model, the encapsulation bottom plate includes an insulating substrate, a first connection structure disposed on the first surface of the insulating substrate, a second connection structure disposed on the second surface of the insulating substrate, and a heat dissipation structure disposed inside the first connection structure. The first surface and the second surface of the insulating substrate are disposed opposite to each other. The first connection structure is used to connect the chip. Through the above arrangement, by providing a heat dissipation structure inside the first connection structure, after the heat generated by the chip is conducted to the first connection structure, part of the heat can be conducted to the insulating substrate through the first connection structure and then exported through the second connection structure, and part of the heat can be conducted to the heat dissipation structure through the first connection structure and then exported through the heat dissipation structure. Compared with the heat generated by the chip in the prior art, which is gradually conducted to the outside through the upper copper layer, the insulating substrate, and the lower copper layer, providing a heat dissipation structure inside the first connection structure can improve the heat dissipation effect. Therefore, the technical solution of the present application effectively solves the problem of poor heat dissipation effect of the encapsulation bottom plate in the related art. BRIEF DESCRIPTION OF THE DRAWINGS

[0019] The accompanying drawings forming a part of this application are used to provide a further understanding of the present utility model, and the schematic embodiments and descriptions thereof of the present utility model are used to explain the present utility model and do not constitute an improper limitation to the present utility model. In the drawings:

[0020] Figure 1 Shows a three-dimensional structural schematic diagram of an embodiment of an encapsulation bottom plate according to the present utility model;

[0021] Figure 2 Shows Figure 1 A cross-sectional view of the first connection structure of the encapsulation bottom plate;

[0022] Figure 3 Shows Figure 1 A three-dimensional structural schematic diagram of the connection of the first connection structure, the first connection pipe, and the second connection pipe of the encapsulation bottom plate;

[0023] Figure 4 Shows Figure 1 A three-dimensional structural schematic diagram of the second connection structure of the encapsulation bottom plate;

[0024] Figure 5 Shows a three-dimensional structural schematic diagram of an embodiment of a power semiconductor device according to the present utility model;

[0025] Figure 6 Shows Figure 5 An exploded structural schematic diagram of an embodiment of the power semiconductor device;

[0026] Figure 7 Shows Figure 5 A front view structural schematic diagram of the power semiconductor device;

[0027] Figure 8 Shows Figure 5 a top - view structural schematic diagram of a power semiconductor device;

[0028] Figure 9 Shows Figure 5 a side - view structural schematic diagram of a power semiconductor device;

[0029] Figure 10 Shows Figure 5 a three - dimensional structural schematic diagram of a packaging housing of a power semiconductor device;

[0030] Figure 11 Shows Figure 10 a top - view structural schematic diagram of a packaging housing;

[0031] Figure 12 Shows Figure 10 a front - view structural schematic diagram of a packaging housing;

[0032] Figure 13 Shows Figure 10 a side - view structural schematic diagram of a packaging housing.

[0033] Among them, the above - mentioned drawings include the following reference numerals:

[0034] 10, insulating substrate; 20, first connection structure; 21, first connection plate; 30, second connection structure; 31, second connection plate; 32, heat - dissipation part; 40, heat - dissipation structure; 41, first heat - dissipation flow channel; 411, channel section; 412, inlet channel; 413, communication section; 50, first connection pipe; 60, second connection pipe; 70, third connection structure; 80, fourth connection structure; 100, chip; 110, first power terminal; 120, second power terminal; 130, packaging housing; 131, insulating shielding part; 132, first avoidance hole; 133, second avoidance hole; 134, third avoidance hole; 135, fourth avoidance hole; 140, third power terminal; 150, fourth power terminal. Detailed implementation manners

[0035] Next, the technical solutions in the embodiments of the present invention will be clearly and completely described in conjunction with the accompanying drawings in the embodiments of the present invention. Obviously, the described embodiments are only a part of the embodiments of the present invention, rather than all of the embodiments. The following description of at least one exemplary embodiment is actually only illustrative and in no way limits the present invention and its application or use. Based on the embodiments of the present invention, all other embodiments obtained by those of ordinary skill in the art without creative efforts belong to the scope of protection of the present invention.

[0036] It should be noted that the terms used herein are for the purpose of describing specific embodiments only and are not intended to limit the exemplary embodiments according to the present application. As used herein, unless the context clearly indicates otherwise, the singular forms are also intended to include the plural forms. In addition, it should be understood that when the terms "comprising" and / or "including" are used in this specification, they specify the presence of features, steps, operations, devices, components, and / or combinations thereof.

[0037] Unless otherwise specifically stated, the relative arrangements of components and steps, numerical expressions, and values set forth in these embodiments do not limit the scope of the present invention. At the same time, it should be understood that, for the sake of convenience of description, the dimensions of the various parts shown in the drawings are not drawn in actual proportional relationships. Technologies, methods, and devices known to those of ordinary skill in the relevant art may not be discussed in detail, but in appropriate cases, the said technologies, methods, and devices should be regarded as part of the specification. In all the examples shown and discussed herein, any specific value should be construed as merely exemplary and not as a limitation. Therefore, other examples of the exemplary embodiments may have different values. It should be noted that like reference numerals and letters denote like items in the following drawings, and thus, once an item is defined in one drawing, it does not require further discussion in subsequent drawings.

[0038] With the progress of power semiconductor technology, the advantages of power semiconductor devices in aspects such as power traction, power conversion, and switching control have become increasingly prominent. Higher requirements are put forward for the voltage and power levels of power devices in different application scenarios. However, at the same time, with the progress of technology, the chip and package sizes have gradually shrunk, and the packaging integration degree is also higher, which has led to a gradual increase in the power density of the device and a corresponding increase in the chip temperature. The increase in the chip temperature will in turn trigger a series of reliability problems inside the device package, such as the performance of heat, electricity, and force inside the packaging structure, and even directly threaten the operating reliability of the device. Therefore, the heat dissipation performance of the power device package is closely related to the device reliability. In the existing packaging of power devices, especially the packaging of silicon carbide chips, the semiconductor material itself has the characteristic of high temperature resistance, but due to the lack of high temperature resistance of other packaging materials, the application potential of silicon carbide chips is greatly limited. Therefore, in order to fully exert the performance of power devices, achieving a high heat dissipation and low thermal resistance packaging of the device has become the key to ensuring the thermal performance and reliability of the device.

[0039] The current power device package still adopts the traditional package form stacked by a metal heat dissipation bottom plate, a substrate solder layer, a DBC substrate, a chip solder layer, and multiple layers of packaging materials for the chip. There are relatively many layers of packaging materials, and high thermal conductivity packaging materials are still lacking at present. The heat generated by the chip can only be transferred layer by layer from top to bottom to the metal heat dissipation bottom plate, and then the heat is released into the environment through an external heat sink. Such a package form results in a relatively long heat dissipation path for the chip, a large heat dissipation thermal resistance for the device, a relatively high chip junction temperature, the packaging materials being in a high-temperature environment for a long time, accelerating the aging of the packaging materials, and reducing the service life of the device.

[0040] In view of the problems of the current packaging structure of power semiconductor devices having relatively many material layers and a large heat dissipation thermal resistance of the device, this embodiment proposes a packaging bottom plate and a power semiconductor device having the same. The power semiconductor device has the characteristic of high power density. Using the power semiconductor device with the packaging bottom plate of this embodiment can achieve efficient heat dissipation, can meet the high-power density packaging and high-temperature service of power semiconductor devices, and meet the thermal reliability of power devices.

[0041] As Figure 1 and Figure 2 shown, the packaging bottom plate of this embodiment includes: an insulating substrate 10, a first connection structure 20, a second connection structure 30, and a heat dissipation structure 40. The insulating substrate 10 has a first surface and a second surface facing away from each other. The first connection structure 20 is disposed on the first surface of the insulating substrate 10 and is used for connecting the chip 100. The second connection structure 30 is disposed on the second surface of the insulating substrate 10. The heat dissipation structure 40 is disposed inside the first connection structure 20.

[0042] Applying the technical solution of this embodiment, the packaging bottom plate includes an insulating substrate 10, a first connection structure 20 disposed on the first surface of the insulating substrate 10, a second connection structure 30 disposed on the second surface of the insulating substrate 10, and a heat dissipation structure 40 disposed inside the first connection structure 20. The first surface and the second surface of the insulating substrate 10 are disposed facing away from each other. The first connection structure 20 is used for connecting the chip 100. Through the above settings, by disposing the heat dissipation structure 40 inside the first connection structure 20, after the heat generated by the chip 100 is conducted to the first connection structure 20, part of the heat can be conducted to the insulating substrate 10 through the first connection structure 20 and then exported through the second connection structure 30, and part of the heat can be conducted to the heat dissipation structure 40 through the first connection structure 20 and then exported through the heat dissipation structure 40. Compared with the heat generated by the chip in the prior art, which is gradually conducted to the outside through the upper copper layer, the insulating substrate, and the lower copper layer, disposing the heat dissipation structure 40 inside the first connection structure 20 can improve the heat dissipation effect. Therefore, the technical solution of this embodiment effectively solves the problem of poor heat dissipation effect of the packaging bottom plate in the related art.

[0043] As Figure 2As shown, in this embodiment, the heat dissipation structure 40 includes a first heat dissipation flow channel 41. The first heat dissipation flow channel 41 is disposed inside the first connection structure 20, and both the inlet and the outlet of the first heat dissipation flow channel 41 are disposed on the surface of the first connection structure 20. Fluids can flow within the first heat dissipation flow channel 41, thereby being able to take out part of the heat conducted to the first connection structure 20 from the encapsulation base plate, realizing timely heat dissipation. Both the inlet and the outlet of the first heat dissipation flow channel 41 are disposed on the surface of the first connection structure 20, facilitating the inflow and outflow of fluids.

[0044] The fluid can be a liquid or a gas.

[0045] As Figure 2 and Figure 3 As shown, in this embodiment, the first connection structure 20 includes a first connection plate 21. The encapsulation base plate further includes a first connection pipe 50 and a second connection pipe 60. Among them, both the first connection pipe 50 and the second connection pipe 60 are disposed on the first connection plate 21. The first connection pipe 50 is communicated with the inlet of the first heat dissipation flow channel 41, and the second connection pipe 60 is communicated with the outlet of the first heat dissipation flow channel 41. Fluids can flow sequentially through the first connection pipe 50, the inlet of the first heat dissipation flow channel 41, the first heat dissipation flow channel 41, the outlet of the first heat dissipation flow channel 41, and the second connection pipe 60, realizing timely heat dissipation. The settings of the first connection pipe 50 and the second connection pipe 60 facilitate the connection between the first heat dissipation flow channel 41 and the outside.

[0046] It should be noted that the first connection pipe 50 and the second connection pipe 60 are disposed on the same surface of the first connection plate 21. In this embodiment, the first connection pipe 50 and the second connection pipe 60 are connected to the side wall of the first connection plate, rather than on the surface of the first connection plate 21 away from the insulating substrate 10.

[0047] The material of the first connection plate 21 is copper.

[0048] As Figure 2 As shown, in this embodiment, the first heat dissipation flow channel 41 includes a plurality of mutually connected channel segments 411. The plurality of channel segments 411 are sequentially and spaced apart from the middle of the first connection structure 20 to the outside of the first connection structure 20. Through the above settings, the contact area between the fluid and the first connection structure 20 can be made larger, and thus the heat can be conducted more effectively.

[0049] As Figure 2 As shown, in this embodiment, the channel segment 411 is a U-shaped structure. Among two adjacent channel segments 411, the channel segment 411 located on the outside surrounds and is disposed outside the channel segment 411 located on the inside. Such a setting facilitates the arrangement of more channel segments 411, and makes the contact area between the fluid and the first connection structure 20 larger, so that the heat can be taken out by the fluid, realizing heat dissipation.

[0050] The channel segment 411 is a U-shaped structure, and it only needs to be approximately U-shaped.

[0051] As Figure 2 shown, in this embodiment, the first heat dissipation channel 41 further includes an inlet channel 412. The first end of the inlet channel 412 is located on the outer surface of the first connection structure 20. The inlet channel 412 extends from the outside of the first connection structure 20 to the middle of the first connection structure 20. The second end of the inlet channel 412 communicates with the innermost one of the plurality of channel segments 411. The fluid can flow into the middle of the first connection structure 20 through the inlet channel 412. At this time, the fluid just enters the first connection structure 20 and has a lower temperature, which can carry out more heat and further improve the heat dissipation effect.

[0052] The first end of the inlet channel 412 is the inlet of the first heat dissipation channel 41.

[0053] As Figure 2 shown, in this embodiment, the first end of the channel segment 411 is the inlet end, and the second end of the channel segment 411 is the outlet end. Among two adjacent channel segments 411, the second end of the inner channel segment 411 communicates with the first end of the outer channel segment 411. The above setting facilitates the arrangement of the plurality of channel segments 411 and the flow of the fluid.

[0054] It should be noted that the first heat dissipation channel 41 further includes at least one connecting segment 413, and the connecting segment 413 is connected between the second end of the inner channel segment 411 and the first end of the outer channel segment 411.

[0055] The direction from the inner side to the outer side is perpendicular to the direction from the insulating substrate 10 to the first connection structure 20.

[0056] In this embodiment, there are a plurality of connecting segments 413. Each connecting segment 413 is arranged parallel to the inlet channel 412.

[0057] Except for the innermost one of the channel segments 411, the remaining channel segments 411 all include a first segment, a second segment, a third segment, a fourth segment, and a fifth segment connected in sequence. In one channel segment 411, the end of the first segment far from the second segment is the inlet end of the channel segment 411, and the end of the fifth segment far from the third segment is the outlet end of the channel segment 411. The second segment, the third segment, and the fourth segment enclose a U-shaped structure. The first segment extends along the direction from the second segment to the fourth segment, and the fifth segment extends along the direction from the fourth segment to the second segment.

[0058] The innermost channel segment 411 only includes a first sub-segment, a second sub-segment, a third sub-segment, and a fourth sub-segment that are sequentially connected. In the innermost channel segment 411, one end of the first sub-segment away from the second sub-segment is the inlet end of the channel segment 411, and one end of the fourth sub-segment away from the third sub-segment is the outlet end of the channel segment 411. The second sub-segment, the third sub-segment, and the fourth sub-segment enclose a U-shaped structure. The first sub-segment extends in the direction from the second sub-segment to the fourth sub-segment.

[0059] As Figure 1 and Figure 4 shown, in this embodiment, the encapsulation bottom plate further includes a second heat dissipation channel, and the second heat dissipation channel is disposed within the second connection structure 30. The inlet and the outlet of the second heat dissipation channel are both disposed on the surface of the second connection structure 30. Fluids can flow within the second heat dissipation channel, and thus can take out part of the heat conducted to the second connection structure 30, realizing timely heat dissipation. The inlet and the outlet of the second heat dissipation channel are both disposed on the surface of the second connection structure 30, which is convenient for the inflow and outflow of fluids.

[0060] As Figure 1 and Figure 4 shown, in this embodiment, the second connection structure 30 includes a second connection plate 31 and a heat dissipation portion 32. The second heat dissipation channel is disposed within the second connection plate 31, and the second connection plate 31 is disposed between the insulating substrate 10 and the heat dissipation portion 32. By connecting the heat dissipation portion 32 to the second connection plate, further heat dissipation can be realized. Compared with the prior art in which the heat dissipation portion 32 is connected to the second connection plate 31 through a metal bottom plate, the thermal resistance of the encapsulation bottom plate can also be reduced.

[0061] The material of the second connection plate 31 is copper.

[0062] The encapsulation bottom plate further includes a third connection pipe and a fourth connection pipe. Among them, both the third connection pipe and the fourth connection pipe are disposed on the second connection plate 31. The third connection pipe is communicated with the inlet of the second heat dissipation channel, and the fourth connection pipe is communicated with the outlet of the second heat dissipation channel. Fluids can flow sequentially through the third connection pipe, the inlet of the second heat dissipation channel, the second heat dissipation channel, the outlet of the second heat dissipation channel, and the fourth connection pipe, realizing timely heat dissipation. The arrangement of the third connection pipe and the fourth connection pipe facilitates the connection between the second heat dissipation channel and the outside.

[0063] It should be noted that the second heat dissipation channel is similar in structure to the first heat dissipation channel, and the dimensions can be different.

[0064] The heat dissipation portion 32 is a heat dissipation fin. The cross-sectional shape of the heat dissipation fin can be circular, oval, triangular, quadrilateral, polygonal, "Z"-shaped, "U"-shaped, "J"-shaped, corrugated, or other irregular shapes.

[0065] The first connection plate 21 includes a first plate layer and a second plate layer disposed on one side of the first plate layer away from the insulating substrate. Part of the structure of the first fluid channel is machined on the first plate layer, another part of the structure of the first fluid channel is machined on the second plate layer, and the first plate layer and the second plate layer are connected to obtain the first connection plate 21.

[0066] The second connection plate 31 includes a third plate layer and a fourth plate layer disposed on one side of the third plate layer away from the insulating substrate. Part of the structure of the second fluid channel is machined on the third plate layer, another part of the structure of the second fluid channel is machined on the fourth plate layer, and the third plate layer and the fourth plate layer are connected to obtain the second connection plate 31.

[0067] The heat dissipation part 32 and the fourth plate layer are an integrally formed structure, which can reduce the thermal resistance of the packaging bottom plate.

[0068] In other embodiments, the heat dissipation structure 40 can be thermal conductive silicone grease or phase change heat conduction columns or heat conductive graphite columns.

[0069] The power semiconductor device of this embodiment is a thick copper DBC substrate power device with integrated heat dissipation. Using the power semiconductor device of this embodiment can meet the needs of power semiconductor device packaging and efficient heat dissipation.

[0070] The packaging bottom plate further includes a third connection structure 70 and a fourth connection structure 80 disposed on the first surface of the insulating substrate 10. The third connection structure 70 and the fourth connection structure 80 are both spaced apart from the first connection structure 20. The second power terminal 120 is disposed on the third connection structure 70, and the fourth power terminal 150 is disposed on the fourth connection structure 80.

[0071] The third power terminal 140 is disposed on the third connection structure 70.

[0072] The third connection structure 70 includes a first vertical plate, a second vertical plate, and a third vertical plate connected in sequence. The first vertical plate and the third vertical plate are symmetrically disposed with respect to the symmetry plane of the second vertical plate. The second power terminal 120 is connected to the first vertical plate. The third power terminal 140 is connected to the third vertical plate. By providing the first vertical plate and the third vertical plate, it is convenient to connect the second power terminal 120 and the third power terminal 140.

[0073] The second vertical plate is provided with an avoidance groove for avoiding the first connection pipe 50 and the second connection pipe 60.

[0074] The first connection structure 20 is surrounded between the first vertical plate, the second vertical plate, and the third vertical plate. The first vertical plate is connected to the second power terminal 120, and the third vertical plate is connected to the third power terminal 140.

[0075] The fourth connection structure 80 includes a fourth vertical plate, which is disposed opposite to the second vertical plate and is respectively located on both sides of the first connection structure 20.

[0076] The insulation shielding portion 131 is a U-shaped insulation baffle structure. The insulation shielding portion 131 includes a fifth vertical plate, a sixth vertical plate, and a seventh vertical plate that are connected in sequence. The fifth vertical plate and the seventh vertical plate are arranged in parallel. A part of the structure of the insulation shielding portion 131 is located inside the package housing 130, and another part of the structure is located outside the package housing 130, which can more effectively prevent the first power terminal 110 and the second power terminal 120 from being conducted.

[0077] This embodiment provides a thick copper DBC package structure that integrates heat dissipation using a DBC substrate. The DBC upper copper layer includes a first connection structure 20, a third connection structure 70, and a fourth connection structure 80, and the DBC lower copper layer includes a second connection structure 30. By integrating a heat dissipation channel (i.e., the first heat dissipation flow channel 41) inside the first connection structure 20, while achieving near-junction cooling of the chip, the heat dissipation capacity of the DBC substrate itself is enhanced. Additionally, a cooling channel (i.e., the second heat dissipation flow channel) can be integrated inside the second connection plate 31, and at the same time, heat dissipation fins (i.e., the heat dissipation portion 32) such as pin fins can be further integrated on the surface of the second connection plate 31 away from the insulation substrate 10 to further transfer the heat of the lower copper layer to the environment and enhance the heat dissipation capacity of the lower copper layer. Through the technical solution of this embodiment, efficient heat dissipation of the chip can be achieved, greatly reducing the thermal resistance of the device package, reducing the volume and mass of the power semiconductor device package, and improving the overall performance of the device.

[0078] As Figure 1 、 Figure 5 and Figure 6 shown, the power semiconductor device of this embodiment includes a package bottom plate and a chip 100 disposed on the package bottom plate, and the package bottom plate is the above-mentioned package bottom plate. A heat dissipation structure 40 is disposed inside the first connection structure 20 of the above-mentioned package bottom plate, so that the heat conducted to the first connection structure 20 can not only be conducted to the insulation substrate 10 through the first connection structure 20, but also be conducted to the outside of the package bottom plate through the heat dissipation structure 40, improving the heat dissipation effect of the package bottom plate. The power semiconductor device having the above-mentioned package bottom plate also has the above-mentioned advantages.

[0079] As Figure 5 and Figure 7As shown, in this embodiment, the power semiconductor device further includes a first power terminal 110 and a second power terminal 120. The first power terminal 110 is disposed on the first connection structure 20, and the second power terminal 120 is disposed on the insulating substrate 10. The first power terminal 110 and the second power terminal 120 are insulated from each other. By providing the first power terminal 110 and the second power terminal 120, the chip 100 can operate normally. The insulation between the first power terminal 110 and the second power terminal 120 can prevent the direct conduction between the first power terminal 110 and the second power terminal 120, which affects the flow of current.

[0080] As Figure 7 and Figure 8 shown, in this embodiment, the power semiconductor device further includes a package housing 130 disposed on the insulating substrate 10. The package housing 130 has an insulating shielding portion 131, and the insulating shielding portion 131 is disposed on the outer periphery of the first power terminal 110 to insulate the first power terminal 110 and the second power terminal 120. By providing the insulating shielding portion 131, the insulation between the first power terminal 110 and the second power terminal 120 can be ensured.

[0081] The package housing 130 is a plastic tube shell housing.

[0082] In other embodiments, the insulating shielding portion may not be provided. Specifically, it can be determined according to the distance between the first power terminal 110 and the second power terminal 120.

[0083] The power device further includes a third power terminal 140 and a fourth power terminal 150, and both the third power terminal 140 and the fourth power terminal 150 are connected to the chip 100. The first power terminal 110 is a drain terminal, the second power terminal 120 is a first gate terminal, the third power terminal 140 is a second gate terminal, and the fourth power terminal 150 is a source terminal.

[0084] As Figures 8 to 13 shown, in this embodiment, a first avoidance hole 132 is provided on the package housing 130 to allow the first power terminal 110 to extend out of the package housing 130. The insulating shielding portion 131 is located on the outer periphery of the first avoidance hole 132. A second avoidance hole 133 is provided on the package housing 130 to allow the second power terminal 120 to extend out of the package housing 130. The first avoidance hole 132 enables the first power terminal 110 to extend out of the package housing 130, and the second avoidance hole 133 enables the second power terminal 120 to extend out of the package housing 130. The insulating shielding portion 131 being located on the outer periphery of the first avoidance hole 132 can effectively insulate the first power terminal 110 and the second power terminal 120, preventing the direct conduction between the first power terminal 110 and the second power terminal 120.

[0085] The encapsulation housing 130 is further provided with a third avoidance hole 134 to enable the third power terminal 140 to extend out of the encapsulation housing 130. The encapsulation housing 130 is further provided with a fourth avoidance hole 135 to enable the fourth power terminal 150 to extend out of the encapsulation housing 130.

[0086] The second avoidance hole 133 and the third avoidance hole 134 are symmetrically arranged. The first avoidance hole 132 and the fourth avoidance hole 135 are both in a strip-shaped structure. The second avoidance hole 133 includes a first hole segment and a second hole segment connected in sequence. The first hole segment extends along the direction from the first avoidance hole 132 to the fourth avoidance hole 135, and the second hole segment extends towards the third avoidance hole 134 along the direction perpendicular to the direction from the first avoidance hole 132 to the fourth avoidance hole 135.

[0087] In the direction from the second avoidance hole 133 to the third avoidance hole 134, the second hole segment of the second avoidance hole 133, the fifth vertical plate, the sixth vertical plate, the seventh vertical plate, and the second hole segment of the third avoidance hole 134 are arranged in sequence.

[0088] The positions of the first power terminal 110, the second power terminal 120, the third power terminal 140, and the fourth power terminal 150 can be adjusted as needed. When the second power terminal 120 is located in the part of the second avoidance hole close to the first avoidance hole, that is, at one end of the first hole segment close to the second hole segment or inside the second hole segment, the insulating shielding portion can more effectively insulate the first power terminal 110 and the second power terminal 120. The insulation principle of the third power terminal 140 and the first power terminal 110 is the same as the insulation principle of the first power terminal 110 and the second power terminal 120.

[0089] This embodiment proposes a DBC integrated heat dissipation thick copper power device packaging structure, which is very beneficial to the heat dissipation of high-power devices, can effectively reduce the chip junction temperature, significantly reduce the packaging thermal resistance of the device, and achieve near-junction cooling of the chip. Through the packaging of this structure, the packaging materials of the power device are significantly reduced, the structure is simpler, the packaging volume is reduced, and the device quality is reduced.

[0090] The chip 100 can be connected to the first connection structure 20 of the DBC substrate (i.e., the packaging bottom plate) by welding or sintering process.

[0091] The chip 100 can be connected to the first connection structure 20 in a single-chip or multi-chip parallel connection manner.

[0092] The gate of the chip 100 is connected by wire bonding, connecting the gate to the gate terminal bonding area of the copper layer on the DBC substrate (i.e., the third connection structure 70). The source of the chip can use wire bonding such as aluminum wire, copper wire, or gold wire, or copper sheet, copper strip, copper Clip, or copper bridge, and is connected to the source terminal bonding area of the copper layer on the DBC substrate (i.e., the fourth connection structure 80) in the form of single-point or multi-point bonding on the chip.

[0093] The second power terminal 120, the third power terminal 140, and the Kelvin source terminal are respectively connected to the gate terminal bonding area and the source terminal bonding area of the copper layer on the DBC substrate by soldering or ultrasonic soldering to realize the extraction of the chip electrodes.

[0094] The thickness of the first connection structure 20 and the second connection structure 30 is increased compared to the copper layer of the device without a heat dissipation structure in the copper layer.

[0095] The geometric area of the second connection plate 31 can be equal to or greater than the geometric area of the first connection plate 21.

[0096] The first heat dissipation channel 41 and the second heat dissipation channel can be heat dissipation microchannels, or square, loop-shaped, or circular cooling channels, or other forms.

[0097] The "inside-out" cooling channels (i.e., the first heat dissipation channel 41) integrated in the first connection structure 20 and the "inside-out" cooling channels (i.e., the second heat dissipation channel) integrated in the second connection structure 30 can have a circular or square shape.

[0098] The "inside-out" cooling channel integrated in the first connection structure 20 is located directly below the chip 100, and can achieve "cold and hot core of the refrigerant (i.e., fluid)".

[0099] The "refrigerant" in the first heat dissipation channel 41 and the second heat dissipation channel can use water, oil, ethylene glycol, a mixture of water and ethylene glycol, or other dielectric fluids, etc., but need to meet the insulation characteristics.

[0100] The third connection structure 70 is arranged around the outer periphery of the first connection structure 20, and the fourth connection structure 80 is arranged on the side of the first connection structure 20. The gate of the chip 100 is connected to the third connection structure 70 and the source of the chip 100 is connected to the fourth connection structure 80 by bonding wires and bonding tapes. The first power terminal 110, the second power terminal 120, the third power terminal 140, and the fourth power terminal 150 can be connected by soldering, sintering, or ultrasonic bonding. The drain of the chip 100 is connected to the first connection structure 20 to realize the electrical connection and extraction of the electrodes of the chip 100.

[0101] The encapsulation housing 130 is adhered to the ceramic layer of the DBC substrate (i.e., the insulating substrate 10) around its perimeter through an adhesive material.

[0102] The side wall of the encapsulation housing 130 is provided with a first mounting hole and a second mounting hole. The first mounting hole can avoid the first connecting pipe, and the second mounting hole can avoid the second connecting pipe. The gaps between the first mounting hole and the first connecting pipe and between the second mounting hole and the second connecting pipe can be filled with a sealant or potting compound.

[0103] It should be noted that the first connecting pipe 50 and the second connecting pipe 60 are parallel and arranged at intervals. The axes of the first connecting pipe 50 and the second connecting pipe 60 can both be arranged parallel to the insulating substrate 10. At this time, first connect the encapsulation housing 130 to the insulating substrate 10, and then pass the first connecting pipe 50 and the second connecting pipe 60 through the encapsulation housing 130 respectively to connect with the first connecting structure 20. Of course, the axes of the first connecting pipe 50 and the second connecting pipe 60 can also be arranged obliquely relative to the insulating substrate 10. At this time, the minimum distance between the end of the first connecting pipe 50 far from the first connecting structure 20 and the insulating substrate is greater than the minimum distance between the end of the first connecting pipe 50 far from the first connecting structure 20 and the insulating substrate 10, and the minimum distance between the second connecting pipe 60 and the insulating substrate is greater than the minimum distance between the end of the second connecting pipe 60 far from the first connecting structure 20 and the insulating substrate 10. In this way, when installing the encapsulation housing 130, move the encapsulation housing 130 along the axial direction of the first connecting pipe 50 so that the encapsulation housing 130 is sleeved outside the first connecting pipe 50 and the second connecting pipe 60 and finally contacts the insulating substrate 10.

[0104] There are grooves with a certain depth on the inner side of the bottom peripheral frame of the encapsulation housing 130. The encapsulation housing 130 is connected to the insulating substrate by applying a high-temperature sealant on the grooves.

[0105] The first avoidance hole 132, the second avoidance hole 133, the third avoidance hole 134, and the fourth avoidance hole 135 do not need to be very long, and the opening positions and sizes can be correspondingly set according to the specific positions of the power terminals.

[0106] The encapsulation housing 130 can be made of materials such as PA, PBT, PET, PPA, PPS, etc., which have high melting points, high comparative tracking indices, and good insulation properties and are halogen-free and other harmful substances.

[0107] The insulating potting material can be potted onto the surface of the chip 100 through the first avoidance hole 132, the second avoidance hole 133, the third avoidance hole 134, and the fourth avoidance hole 135.

[0108] The insulating potting material is preferably silicone gel, and it is required that the silicone gel has a temperature resistance of at least more than 175 °C. Considering the insulation requirements, the potted silicone gel should meet certain thickness requirements and should completely cover the highest points of the bonding wires and / or tapes, etc.

[0109] During the potting process of the insulating potting material, it should be noted that it is carried out under vacuum conditions and degassing treatment is performed.

[0110] The second connection structure 30 can directly exchange heat with the external environment, that is, it can be cooled by natural air convection, forced air convection, natural liquid convection, and forced liquid convection.

[0111] A cooling cavity can also be installed outside the second connection structure 30. The cooling cavity completely wraps the lower surface of the second connection structure 30, and a fluid is provided between the cooling cavity and the second connection structure.

[0112] In the description of the present invention, it should be understood that "a plurality of" means a quantity of two or more than two. Directional terms such as "front, rear, upper, lower, left, right", "lateral, vertical, perpendicular, horizontal" and "top, bottom", etc. The indicated orientation or positional relationship is usually based on the orientation or positional relationship shown in the drawings. It is only for the convenience of describing the present invention and simplifying the description. Without contrary description, these directional terms do not indicate and imply that the device or element referred to must have a specific orientation or be constructed and operated in a specific orientation, so it cannot be understood as a limitation on the protection scope of the present invention; the directional terms "inside, outside" refer to the inside and outside relative to the contour of each component itself.

[0113] For the convenience of description, spatial relative terms such as "above...", "over...", "on the upper surface of...", "above" etc. can be used here to describe the spatial positional relationship between a device or feature shown in the figure and other devices or features. It should be understood that the spatial relative terms are intended to include different orientations in use or operation in addition to the orientation described in the figure for the device. For example, if the device in the drawing is inverted, the device described as "above other devices or structures" or "over other devices or structures" will then be positioned as "below other devices or structures" or "under other devices or structures". Thus, the exemplary term "above..." can include both the orientations of "above..." and "below...". The device can also be positioned in other different ways (rotated 90 degrees or in other orientations), and corresponding interpretations are made for the spatial relative descriptions used here.

[0114] In addition, it should be noted that the use of terms such as "first" and "second" to limit components is only for the convenience of distinguishing the corresponding components. Without additional declaration, the above terms have no special meaning, so it cannot be understood as a limitation on the protection scope of the present utility model.

[0115] The above are only the preferred embodiments of the present utility model and are not used to limit the present utility model. For those skilled in the art, the present utility model can have various changes and modifications. Any modification, equivalent replacement, improvement, etc. made within the spirit and principle of the present utility model shall be included within the protection scope of the present utility model.

Claims

1. An encapsulation base plate, characterized in that, Comprising: An insulating substrate (10) having a first surface and a second surface facing away from each other; A first connection structure (20) disposed on the first surface of the insulating substrate (10) and for connecting a chip (100); A second connection structure (30), the second connection structure (30) being disposed on the second surface of the insulating substrate (10); A heat dissipation structure (40), the heat dissipation structure (40) being disposed inside the first connection structure (20).

2. The encapsulation base plate according to claim 1, characterized in that The heat dissipation structure (40) includes a first heat dissipation flow channel (41), the first heat dissipation flow channel (41) being disposed inside the first connection structure (20), and an inlet and an outlet of the first heat dissipation flow channel (41) being both disposed on the surface of the first connection structure (20).

3. The encapsulation base plate according to claim 2, characterized in that, The first connection structure (20) includes a first connection plate (21), and the encapsulation bottom plate further includes a first connection pipe (50) and / or a second connection pipe (60), wherein the first connection pipe (50) and the second connection pipe (60) are both disposed on the first connection plate (21), the first connection pipe (50) communicates with the inlet of the first heat dissipation flow channel (41), and the second connection pipe (60) communicates with the outlet of the first heat dissipation flow channel (41).

4. The encapsulation base plate according to claim 2, characterized in that, The first heat dissipation flow channel (41) includes a plurality of channel segments (411) communicating with each other, and the plurality of channel segments (411) are sequentially and spaced apart from the middle of the first connection structure (20) to the outside of the first connection structure (20).

5. The encapsulation base plate according to claim 4, wherein The channel segment (411) is a U-shaped structure, and in two adjacent channel segments (411), the channel segment (411) located on the outside surrounds and is disposed outside the channel segment (411) located on the inside.

6. The encapsulation base plate according to claim 4 or 5, characterized in that, The first heat dissipation flow channel (41) further includes an inlet channel (412), a first end of the inlet channel (412) being located on the outer surface of the first connection structure (20), the inlet channel (412) extending from the outside of the first connection structure (20) to the middle of the first connection structure (20), and a second end of the inlet channel (412) communicating with the innermost one of the plurality of channel segments (411).

7. The encapsulation base plate according to claim 4 or 5, characterized in that, A first end of the channel segment (411) is an inlet end, and a second end of the channel segment (411) is an outlet end. In two adjacent channel segments (411), the second end of the channel segment (411) located on the inside communicates with the first end of the channel segment (411) located on the outside.

8. The encapsulation base plate according to any one of claims 1 to 5, characterized in that, The encapsulation bottom plate further includes a second heat dissipation flow channel, the second heat dissipation flow channel being disposed inside the second connection structure (30), and an inlet and an outlet of the second heat dissipation flow channel being both disposed on the surface of the second connection structure (30).

9. The encapsulation base plate according to claim 8, wherein, The second connection structure (30) includes a second connection plate (31) and a heat dissipation portion (32), the second heat dissipation flow channel being disposed inside the second connection plate (31), and the second connection plate (31) being disposed between the insulating substrate (10) and the heat dissipation portion (32).

10. A power semiconductor device, the power semiconductor device comprising a package bottom plate and a chip (100) disposed on the package bottom plate, characterized in that, The encapsulation bottom plate is the encapsulation bottom plate according to any one of claims 1 to 9.

11. The power semiconductor device according to claim 10, characterized in that, The power semiconductor device further includes a first power terminal (110) and a second power terminal (120). The first power terminal (110) is disposed on the first connection structure (20), and the second power terminal (120) is disposed on the insulating substrate (10). The first power terminal (110) and the second power terminal (120) are insulated from each other.

12. The power semiconductor device according to claim 11, characterized in that, The power semiconductor device further includes a package housing (130) disposed on the insulating substrate (10). The package housing (130) has an insulating shielding portion (131) disposed on the outer periphery of the first power terminal (110) to insulate the first power terminal (110) and the second power terminal (120) from each other.

13. The power semiconductor device according to claim 12, wherein A first avoidance hole (132) is formed in the package housing (130) to allow the first power terminal (110) to protrude from the package housing (130). The insulating shielding portion (131) is located on the outer periphery of the first avoidance hole (132). A second avoidance hole (133) is formed in the package housing (130) to allow the second power terminal (120) to protrude from the package housing (130).