Chip wake-up circuit and electronic equipment

Abstract

The utility model discloses a chip wake-up circuit and an electronic device, which are used in the technical field of chip communication. The chip wake-up circuit comprises a signal detection module, a threshold judgment module and a filtering module, the input end of the signal detection module is connected with a differential analog input port of the chip, and the signal detection module is used for receiving a differential input signal on the differential analog input port and detecting a voltage peak value and an overturning state of the differential input signal to obtain a first output signal; the threshold judgment module is connected with the output end of the signal detection module and is used for obtaining a second output signal when the voltage of the first output signal is greater than or equal to a preset voltage threshold; the filtering module is connected with the output end of the threshold value judgment module, and the filtering module is used for filtering the second output signal and transmitting a wake-up signal obtained after filtering to the chip; the differential input signal can be detected more accurately, and the chip is effectively prevented from being awakened by mistake.

Description

Technical Field

[0001] The utility model relates to the technical field of chip communication, in particular to a chip wake-up circuit and an electronic device. Background Art

[0002] Existing electronic chips are often powered by batteries. To extend the battery life and reduce the maintenance cost, it is necessary to reduce the operating power consumption of the electronic chips and make them operate at low power. The common method is: when the chip is in the idle mode, such as when the communication port of the chip does not send a signal, the chip enters the sleep state to achieve the purpose of reducing power consumption; when the chip needs to work, it is necessary to quickly restore the chip to the working state. For example, when the communication port of the chip receives an external signal, the chip needs to be immediately woken up to the working state to process the received signal.

[0003] In the existing chip wake-up circuit, the voltage peak of the input signal to the chip is detected. When the voltage peak of the input signal exceeds the peak threshold, a wake-up signal is generated to wake up the chip. However, there will be electromagnetic interference in the application process of the chip wake-up circuit. For example, in the application process, external electromagnetic interference may be coupled to the communication cable of the chip wake-up circuit, which is likely to cause a relatively high DC voltage on the cable; if this DC voltage exceeds the peak threshold, it may cause the chip to be woken up by mistake.

[0004] Therefore, there is an urgent need for a chip wake-up solution to avoid waking up the chip by mistake. Summary of the Utility Model

[0005] The utility model provides a chip wake-up circuit and an electronic device, which can effectively avoid waking up the chip by mistake.

[0006] The utility model provides a chip wake-up circuit. The chip is in the sleep state. The communication port of the chip includes: a differential analog input port. The wake-up circuit includes: a signal detection module, a threshold judgment module, and a filtering module;

[0007] The input end of the signal detection module is connected to the differential analog input port of the chip. The signal detection module is used to receive the differential input signal on the differential analog input port, detect the voltage peak and the flip state of the differential input signal to obtain a first output signal;

[0008] The threshold judgment module is connected to the output end of the signal detection module. The threshold judgment module is used to obtain a second output signal when the voltage of the first output signal is greater than or equal to a preset voltage threshold;

[0009] The filtering module is connected to the output end of the threshold judgment module. The filtering module is used to filter the second output signal and transmit the filtered wake-up signal to the chip.

[0010] Further, the differential analog input port includes: a first input port and a second input port; the signal detection module includes: a first coupling capacitor, a second coupling capacitor, a first PMOS transistor, and a second PMOS transistor;

[0011] Wherein, the first input port is connected to one end of the first coupling capacitor, and the other end of the first coupling capacitor is connected to the source of the first PMOS transistor and the gate of the second PMOS transistor;

[0012] The second input port is connected to one end of the second coupling capacitor, and the other end of the second coupling capacitor is connected to the gate of the first PMOS transistor and the source of the second PMOS transistor;

[0013] The drain of the first PMOS transistor is connected to the drain of the second PMOS transistor.

[0014] Further, the signal detection module further includes: a filtering capacitor;

[0015] The drain of the first PMOS transistor is connected to one end of the filtering capacitor, and the other end of the filtering capacitor is grounded.

[0016] Further, the signal detection module further includes: a pull-down resistor;

[0017] One end of the pull-down resistor is connected to one end of the filtering capacitor, and the other end of the pull-down resistor is connected to the other end of the filtering capacitor.

[0018] Further, the differential analog input port includes: a first input port and a second input port; the signal detection module includes: a first coupling capacitor, a second coupling capacitor, a first NMOS transistor, and a second NMOS transistor;

[0019] Wherein, the first input port is connected to one end of the first coupling capacitor, and the other end of the first coupling capacitor is connected to the drain of the first NMOS transistor and the gate of the second NMOS transistor;

[0020] The second input port is connected to one end of the second coupling capacitor, and the other end of the second coupling capacitor is connected to the gate of the first NMOS transistor and the drain of the second NMOS transistor;

[0021] The source of the first NMOS transistor is connected to the source of the second NMOS transistor.

[0022] Further, the threshold judgment module includes: a comparator;

[0023] The non-inverting input terminal of the comparator is connected to the output terminal of the signal detection module, the inverting input terminal of the comparator inputs a preset voltage threshold, and the output terminal of the comparator is connected to the filtering module.

[0024] Further, the threshold judgment module further includes: an adjustable voltage source;

[0025] The adjustable voltage source is connected to the inverting input terminal of the comparator and is used to adjust the preset voltage threshold input to the inverting input terminal of the comparator.

[0026] Further, the filtering module includes: a low-pass filter, a high-pass filter, a band-pass filter or a band-stop filter.

[0027] Further, the communication port of the chip further includes: a signal receiving port; the signal receiving port is connected to the filtering module and is used to wake up the chip after receiving a wake-up signal.

[0028] The present invention also provides an electronic device, including the above chip wake-up circuit.

[0029] It can be seen from the above technical solutions that the present invention has the following advantages:

[0030] The chip wake-up circuit of the present invention includes: a signal detection module, a threshold judgment module and a filtering module; the input terminal of the signal detection module is connected to the differential analog input port of the chip, the signal detection module is used to receive the differential input signal on the differential analog input port, detect the voltage peak value and the flip state of the differential input signal to obtain a first output signal; the threshold judgment module is connected to the output terminal of the signal detection module, and the threshold judgment module is used to obtain a second output signal when the voltage of the first output signal is greater than or equal to a preset voltage threshold; the filtering module is connected to the output terminal of the threshold judgment module, and the filtering module is used to filter the second output signal and transmit the obtained wake-up signal after filtering to the chip.

[0031] It can be seen that in the signal detection module, by simultaneously detecting the voltage peak value and the flip state of the differential input signal to obtain a first output signal, the influence of the electromagnetic interference corresponding to only peak detection is eliminated, the differential input signal can be detected more accurately, and the chip can be effectively prevented from being accidentally woken up. Description of the Drawings

[0032] In order to more clearly illustrate the technical solutions in the present invention, the following will briefly introduce the drawings required for the description of the embodiments. Obviously, the drawings in the following description are only some embodiments recorded in the present application. For those of ordinary skill in the art, other drawings can also be obtained according to these drawings.

[0033] Figure 1 Schematic diagram of the framework of a chip wake-up circuit disclosed by the present utility model;

[0034] Figure 2 Schematic circuit diagram of a chip wake-up circuit disclosed by the present utility model;

[0035] Figure 3 Waveform diagram in a chip wake-up circuit disclosed by the present utility model. Specific embodiments

[0036] Hereinafter, embodiments of the technical solution of the present utility model will be described in detail with reference to the accompanying drawings. The following embodiments are only used to more clearly illustrate the technical solution of the present utility model, and therefore are only examples and cannot be used to limit the protection scope of the present utility model.

[0037] In the description of the present utility model, it should be noted that the orientation or positional relationship indicated by the terms "center", "upper", "lower", "left", "right", "vertical", "horizontal", "inner", "outer", etc. is based on the orientation or positional relationship shown in the drawings, and is only for the convenience of describing the present utility model and simplifying the description, rather than indicating or implying that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation, and therefore cannot be understood as a limitation of the present utility model.

[0038] In the description of the present utility model, it should be noted that unless otherwise clearly defined and limited, the terms "installation", "connection", and "connection" should be understood in a broad sense. For example, it can be a fixed connection, a detachable connection, or an integral connection; it can be a mechanical connection or an electrical connection; it can be directly connected, or indirectly connected through an intermediate medium, and it can be the communication inside two elements. For those of ordinary skill in the art, the specific meanings of the above terms in the present utility model can be understood according to specific situations.

[0039] In the existing chip wake-up circuit, the voltage peak of the input signal to the chip is detected. When the voltage peak of the input signal exceeds the peak threshold, a wake-up signal is generated to wake up the chip. However, there will be electromagnetic interference in the process of applying the chip wake-up circuit. For example, in the process of application, external electromagnetic interference may be coupled to the communication cable of the chip wake-up circuit, which is likely to cause a relatively high DC voltage on the cable; if this DC voltage exceeds the peak threshold, it may cause the chip to be woken up by mistake. Therefore, the present utility model provides a chip wake-up circuit that can effectively avoid waking up the chip by mistake, such as Figure 1 as shown, specifically as follows:

[0040] In the utility model, the chip is in a dormant state, that is, the chip does not process signals, and the battery of the chip only provides the power required for standby; the communication port of the chip includes: a differential analog input port (VP port and VN port), and the wake-up circuit includes: a signal detection module 101, a threshold judgment module 102 and a filter module 103; wherein, the signal detection module 101 is used to detect whether there is a signal on the communication port of the chip, the input end of the signal detection module 101 is connected to the differential analog input port of the chip, and the signal detection module is used to receive the differential input signal on the differential analog input port (that is, the input signal on the VP port and the VN port of the chip), detect the voltage peak value and flip state of the differential input signal to obtain a first output signal; specifically, the signal detection module 101 can detect whether the voltage peak value of the differential input signal is greater than a preset peak value threshold, and detect whether the differential input signal flips; if the voltage peak value is greater than the preset peak value threshold, and the differential input signal flips, then the first output signal is output. The signal detection module 101 includes a switch tube (MOS tube or triode, etc.), and the preset peak value threshold is the conduction threshold of the switch tube. It can be understood that when the voltage peak value of the differential input signal is greater than the preset peak value threshold, the more the number of flipping times of the differential input signal is, the greater the voltage of the first output signal is.

[0041] The threshold judgment module 102 is connected to the output end of the signal detection module 101. The threshold judgment module 102 is used to obtain the second output signal when the voltage of the first output signal is greater than or equal to the preset voltage threshold; that is, the threshold judgment module 102 is used to detect whether the number of flips of the differential input signal reaches a certain number. That is, the chip will be awakened only when the voltage peak of the differential input signal is greater than the preset peak threshold and the number of flips of the differential input signal reaches a certain number. The filter module 103 is connected to the output end of the threshold judgment module 102. The filter module 103 is used to filter the second output signal, eliminate the influence of glitches in the second output signal, and transmit the wake-up signal obtained after filtering to the chip.

[0042] It can be seen that the chip wake-up circuit of the utility model includes: a signal detection module, a threshold judgment module and a filtering module; the input end of the signal detection module is connected to the differential analog input port of the chip, the signal detection module is used to receive the differential input signal on the differential analog input port, detect the voltage peak and flip state of the differential input signal to obtain a first output signal; the threshold judgment module is connected to the output end of the signal detection module, the threshold judgment module is used to obtain the second output signal when the voltage of the first output signal is greater than or equal to the preset voltage threshold; the filtering module is connected to the output end of the threshold judgment module, the filtering module is used to filter the second output signal, and transmit the wake-up signal obtained after filtering to the chip.

[0043] In the signal detection module, the first output signal is obtained by simultaneously detecting the voltage peak value and the inversion state of the differential input signal, eliminating the influence of electromagnetic interference corresponding to only peak detection, enabling more accurate detection of the differential input signal, and effectively avoiding false wake-up of the chip. By eliminating the influence of external electromagnetic interference (common-mode interference), the reliability and anti-interference ability of the chip wake-up circuit are better, the signal of the communication port of the chip is detected more accurately, and the chip is accurately woken up.

[0044] The following will combine Figure 2 Describe the chip wake-up circuit in detail as follows:

[0045] In the present utility model, the differential analog input port of the chip includes a first input port VP and a second input port VN; the signal detection module 101 includes: a first coupling capacitor C1, a second coupling capacitor C2, a first PMOS transistor M1, and a second PMOS transistor M2; wherein, the first input port VP is connected to one end of the first coupling capacitor C1, the other end of the first coupling capacitor C1 is connected to the source of the first PMOS transistor M1 and the gate of the second PMOS transistor M2; the second input port VN is connected to one end of the second coupling capacitor C2, the other end of the second coupling capacitor C2 is connected to the gate of the first PMOS transistor M1 and the source of the second PMOS transistor M2; the drain of the first PMOS transistor M1 is connected to the drain of the second PMOS transistor M2. It can be understood that when there is a differential input signal VP / VN (i.e., the input signal of the first input port VP and the input signal of the second input port VN) at the first input port VP and the second input port VN, and the differential input signal is inverted, through the coupling of the first capacitor C1 and the second capacitor C2, the input voltage V1 of the first input port VP and the input voltage V2 of the second input port VN will change, and the corresponding waveform is as Figure 3 shown. When the voltage peak value of the differential input signal VP / VN is large enough so that the voltage difference between the input voltage V1 and the input voltage V2 is greater than the conduction threshold of the first POMS transistor M1 or the second PMOS transistor M2, a current I1 or a current I2 will be generated. That is, when the input voltage V1 is greater than the input voltage V2, and the voltage difference between the input voltage V1 and the input voltage V2 is greater than the conduction threshold of the first POMS transistor M1, the first POMS transistor M1 conducts, and a current I1 will be generated; when the input voltage V2 is greater than the input voltage V1, and the voltage difference between the input voltage V2 and the input voltage V1 is greater than the conduction threshold of the second PMOS transistor M2, the second PMOS transistor M2 conducts, and a current I2 will be generated.

[0046] Further, the signal detection module 101 further includes: a filtering capacitor C3; the drain of the first PMOS transistor M1 is connected to one end of the filtering capacitor C3, and the other end of the filtering capacitor C3 is grounded. When the differential input signal flips and the first PMOS transistor M1 or the second PMOS transistor M2 is turned on, the current I1 or the current I2 will charge the filtering capacitor C3; as the number of flips of the differential input signal increases, the voltage V3 of the first output signal corresponding to the signal detection module 101 gradually increases. Among them, the signal detection module 101 further includes: a pull-down resistor R1; one end of the pull-down resistor R1 is connected to one end of the filtering capacitor C3, and the other end of the pull-down resistor R1 is connected to the other end of the filtering capacitor C3. The pull-down resistor R1 is used to ensure that the initial value of the voltage V3 of the first output signal is 0V, that is, when the current I1 or the current I2 is not generated, the voltage V3 of the first output signal is 0V, improving the signal detection accuracy of the signal detection module 101.

[0047] It can be understood that if the differential input signal VP / VN is a static DC signal, the input voltage V1, the input voltage V2, and the voltage V3 will not change. Only when the differential input signal VP / VN flips and the voltage peak value of the differential input signal is large enough, the first PMOS transistor M1 or the second PMOS transistor M2 will be turned on, generating the current I1 or the current I2 to charge the filtering capacitor C3. The more the number of flips, the higher the voltage V3.

[0048] Further, the first PMOS transistor and the second PMOS transistor in the signal detection module 101 can be replaced by the first NMOS transistor and the second NMOS transistor. Specifically, the differential analog input port includes: a first input port and a second input port; the signal detection module includes: a first coupling capacitor, a second coupling capacitor, a first NMOS transistor, and a second NMOS transistor; wherein, the first input port is connected to one end of the first coupling capacitor, and the other end of the first coupling capacitor is connected to the drain of the first NMOS transistor and the gate of the second NMOS transistor; the second input port is connected to one end of the second coupling capacitor, and the other end of the second coupling capacitor is connected to the gate of the first NMOS transistor and the drain of the second NMOS transistor; the source of the first NMOS transistor is connected to the source of the second NMOS transistor.

[0049] Further, the threshold judgment module 102 includes: a comparator COMP; the non-inverting input terminal of the comparator COMP is connected to the output terminal of the signal detection module 101, the inverting input terminal of the comparator COMP inputs a preset voltage threshold Vref, and the output terminal of the comparator COMP is connected to the filtering module 103. It can be understood that when the voltage V3 of the first output signal of the signal detection module 101 is greater than the preset voltage threshold Vref, the comparator COMP flips, and the second output signal CMP_OUT is output as a high level; after being filtered by the filtering module 103, the wake-up signal Wakeup is output.

[0050] Further, the threshold judgment module 102 further includes: an adjustable voltage source; the adjustable voltage source is connected to the inverting input terminal of the comparator COMP and is used to adjust the preset voltage threshold input to the inverting input terminal of the comparator COMP. That is, the preset voltage threshold Vref input to the inverting input terminal of the comparator COMP can be changed through the adjustable voltage source to set the number of flips required to output the second output signal when triggering wake-up; the higher the preset voltage threshold Vref, the more flips are corresponding to triggering wake-up; that is, the sensitivity of triggering wake-up is adjustable through the adjustable voltage source, and the application range of the chip wake-up circuit is improved.

[0051] Further, the filter Filter in the filtering module 103 includes: a low-pass filter, a high-pass filter, a band-pass filter or a band-stop filter. The low-pass filter allows low-frequency signals to pass through while suppressing high-frequency signals; the high-pass filter allows high-frequency signals to pass through while suppressing low-frequency signals; the band-pass filter only allows signals within a specific frequency range to pass through; the band-stop filter only blocks signals within a specific frequency range.

[0052] Further, the communication port of the chip further includes: a signal receiving port; the signal receiving port is connected to the filtering module and is used to wake up the chip after receiving the wake-up signal.

[0053] The present utility model also provides an electronic device, including the above-mentioned chip wake-up circuit.

[0054] In the present utility model, the terms "first", "second", "third", and "fourth" are only used for descriptive purposes and cannot be understood as indicating or implying relative importance. The term "plurality" means two or more, unless otherwise clearly defined.

[0055] The above embodiments are only used to illustrate the technical solutions of the present invention, rather than to limit it; although the present invention has been described in detail with reference to the foregoing embodiments, those of ordinary skill in the art should understand that: they can still modify the technical solutions described in the foregoing embodiments, or perform equivalent replacements on some or all of the technical features; and these modifications or replacements do not make the essence of the corresponding technical solutions deviate from the scope of the technical solutions of the embodiments of the present invention, and they should all be covered within the scope of the claims and the description of the present invention.

Claims

1. A chip wake-up circuit, the chip is in a dormant state, and the communication port of the chip includes: The differential analog input port is characterized in that the wake-up circuit includes: a signal detection module, a threshold judgment module and a filtering module; The input end of the signal detection module is connected to the differential analog input port of the chip, and the signal detection module is used to receive the differential input signal on the differential analog input port, detect the voltage peak value and flip state of the differential input signal to obtain a first output signal; The threshold judgment module is connected to the output end of the signal detection module, and the threshold judgment module is used to obtain a second output signal when the voltage of the first output signal is greater than or equal to a preset voltage threshold; The filtering module is connected to the output end of the threshold judgment module, and the filtering module is used to filter the second output signal and transmit the wake-up signal obtained after filtering to the chip.

2. The chip wake-up circuit according to claim 1, characterized in that: The differential analog input port includes: a first input port and a second input port; the signal detection module includes: a first coupling capacitor, a second coupling capacitor, a first PMOS tube and a second PMOS tube; Wherein, the first input port is connected to one end of the first coupling capacitor, and the other end of the first coupling capacitor is connected to the source of the first PMOS tube and the gate of the second PMOS tube; The second input port is connected to one end of the second coupling capacitor, and the other end of the second coupling capacitor is connected to the gate of the first PMOS tube and the source of the second PMOS tube; The drain of the first PMOS tube is connected to the drain of the second PMOS tube.

3. The chip wake-up circuit according to claim 2, characterized in that: The signal detection module further includes: a filter capacitor; The drain of the first PMOS tube is connected to one end of the filter capacitor, and the other end of the filter capacitor is grounded.

4. The chip wake-up circuit according to claim 3, characterized in that: The signal detection module further includes: a pull-down resistor; One end of the pull-down resistor is connected to one end of the filter capacitor, and the other end of the pull-down resistor is connected to the other end of the filter capacitor.

5. The chip wake-up circuit according to claim 1, characterized in that: The differential analog input port includes: a first input port and a second input port; the signal detection module includes: a first coupling capacitor, a second coupling capacitor, a first NMOS transistor and a second NMOS transistor; The first input port is connected to one end of the first coupling capacitor, and the other end of the first coupling capacitor is connected to the drain of the first NMOS transistor and the gate of the second NMOS transistor; The second input port is connected to one end of the second coupling capacitor, and the other end of the second coupling capacitor is connected to the gate of the first NMOS transistor and the drain of the second NMOS transistor; The source of the first NMOS tube is connected to the source of the second NMOS tube.

6. The chip wake-up circuit according to claim 1, characterized in that: The threshold determination module includes: a comparator; The non-inverting input terminal of the comparator is connected to the output terminal of the signal detection module, the inverting input terminal of the comparator inputs a preset voltage threshold, and the output terminal of the comparator is connected to the filtering module.

7. The chip wake-up circuit according to claim 6, characterized in that: The threshold determination module further includes: an adjustable voltage source; The adjustable voltage source is connected to the inverting input terminal of the comparator and is used to adjust a preset voltage threshold input to the inverting input terminal of the comparator.

8. The chip wake-up circuit according to claim 1, characterized in that: The filtering module includes: a low-pass filter, a high-pass filter, a band-pass filter or a band-stop filter.

9. The chip wake-up circuit according to claim 1, characterized in that: The communication port of the chip further includes: a signal receiving port; the signal receiving port is connected to the filter module and is used to wake up the chip after receiving a wake-up signal.

10. An electronic device, characterized in that: The chip wake-up circuit comprises any one of claims 1 to 9.

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