Packaging structure of chip module

Abstract

The utility model provides a packaging structure of a chip module. The packaging structure comprises a substrate, at least one filter chip, a separation film and a plastic packaging layer. The filter chip is arranged on the substrate, the front surface of the filter chip faces the substrate, and a first gap is formed between the front surface of the filter chip and the substrate; the separation membrane covers the side wall and the back surface of the filter chip and part of the surface of the substrate to encapsulate the first gap, so that a sealed first cavity is formed between the filter chip and the substrate, and a second gap is formed between the edge of the separation membrane and the edge of the substrate; the plastic package layer covers the remaining surface of the substrate and the separation film. As the second gap is formed between the edge of the separation film and the edge of the substrate, the separation film can be wrapped by the plastic packaging layer and cannot be exposed in the air, when the packaging structure of the chip module works in a high-humidity environment, water vapor cannot intrude into the first cavity through the separation film, and the problem that the performance of the filter chip is reduced or even fails is avoided.

Description

Technical Field

[0001] The utility model relates to the technical field of chip packaging, in particular to a packaging structure of a chip module. Background Art

[0002] A surface acoustic wave filter (SAW Filter) is one of the core devices in the field of radio frequency communication. It utilizes the transmission of acoustic waves on the front side of the chip to achieve its function. Therefore, for the packaging of a surface acoustic wave filter chip, it is necessary to ensure that the surface of the interdigital transducer (the working sensor of the surface acoustic wave filter) on the front side of the chip does not come into contact with other substances, that is, it is necessary to ensure that there is enough cavity on the front side of the chip, otherwise the signal transmission will be affected.

[0003] The existing packaging of surface acoustic wave filter modules mostly adopts the packaging technical solution of BDMP (Bare Die Module Package), that is, first mount the filter chip on the substrate, then attach the separation film on the surface of the substrate, the side wall and the top surface of the filter chip to form a cavity, then fill the plastic encapsulant on the substrate to form a plastic encapsulation layer, and finally perform cutting to form an individual packaging structure. This method can effectively reduce costs. However, after cutting, the separation film will expose from the side wall of the packaging structure. Since the water absorption rate of the separation film is relatively high, when the product works in a high-humidity environment, water vapor will invade the cavity on the front side of the filter chip through the separation film, contaminating the interdigital transducer and causing the product performance to decline or even fail. Summary of the Utility Model

[0004] The purpose of the utility model is to provide a packaging structure of a chip module to solve the problem that the cavity on the front side of the existing filter chip is easily invaded by water vapor.

[0005] To achieve the above purpose, the utility model provides a packaging structure of a chip module, including:

[0006] A substrate;

[0007] At least one filter chip and at least one non-filter chip, both are arranged on the substrate, the front side of the filter chip faces the substrate, and there is a first gap between the filter chip and the substrate;

[0008] A separation film, covering at least the side wall and the back surface of the filter chip and a part of the surface of the substrate to encapsulate the first gap, so that a sealed first cavity is formed between the filter chip and the substrate, and there is a second gap between the edge of the separation film and the edge of the substrate; and,

[0009] A plastic encapsulation layer, covering the remaining surface of the substrate and the separation film.

[0010] Optionally, the separation film is a dry film or a photosensitive film.

[0011] Optionally, the width of the second gap is 50 micrometers to 100 micrometers.

[0012] Optionally, the electrode surface of the non-filter chip faces the substrate, and there is a third gap between the non-filter chip and the substrate; and,

[0013] The separation film also covers the side wall and the non-electrode surface of the non-filter chip, the separation film has a break around the non-filter chip, and the encapsulation layer passes through the break to fill the third gap.

[0014] Optionally, the encapsulation structure of the chip module further includes:

[0015] A solder mask layer covering the non-welding area of the substrate, and the separation film is disposed on the solder mask layer.

[0016] Optionally, the edge of the solder mask layer is aligned with the edge of the substrate.

[0017] Optionally, the part of the solder mask layer covered by the separation film is the first part, the part of the solder mask layer outside the first part is the second part, and the thickness of the first part is greater than the thickness of the second part.

[0018] Optionally, there is a fourth gap between the edge of the solder mask layer and the edge of the substrate.

[0019] Optionally, the widths of the second gap and the fourth gap are equal, so that the edge of the separation film is aligned with the edge of the solder mask layer.

[0020] In the encapsulation structure of the chip module provided by the present invention, it includes a substrate, at least one filter chip, a separation film and an encapsulation layer. The filter chip is disposed on the substrate, the front surface of the filter chip faces the substrate, and there is a first gap between the filter chip and the substrate; the separation film covers the side wall and the back surface of the filter chip and a part of the surface of the substrate to encapsulate the first gap, so that a sealed first cavity is formed between the filter chip and the substrate, and there is a second gap between the edge of the separation film and the edge of the substrate; the encapsulation layer covers the remaining surface of the substrate and the separation film. Since there is the second gap between the edge of the separation film and the edge of the substrate, the separation film will be wrapped by the encapsulation layer and will not be exposed to the air. When the encapsulation structure of the chip module works in a high-humidity environment, water vapor will not invade the first cavity through the separation film, avoiding the problem that the performance of the filter chip deteriorates or even fails. Description of the Drawings

[0021] Figure 1 Flow chart of the encapsulation method of the chip module provided in the first embodiment of the present utility model;

[0022] Figures 2 to 6 Schematic structural diagram corresponding to the corresponding steps of the encapsulation method of the chip module provided in the first embodiment of the present utility model, wherein, Figure 6 Schematic structural diagram of the encapsulation structure of the chip module provided in the first embodiment of the present utility model;

[0023] Figures 7 to 8 Schematic structural diagram corresponding to the corresponding steps of the encapsulation method of the chip module provided in the second embodiment of the present utility model, wherein, Figure 8 Schematic structural diagram of the encapsulation structure of the chip module provided in the second embodiment of the present utility model;

[0024] Figures 9 to 10 Schematic structural diagram corresponding to the corresponding steps of the encapsulation method of the chip module provided in the third embodiment of the present utility model, wherein, Figure 10 Schematic structural diagram of the encapsulation structure of the chip module provided in the third embodiment of the present utility model;

[0025] Figures 11 to 13 Schematic structural diagram corresponding to the corresponding steps of the encapsulation method of the chip module provided in the fourth embodiment of the present utility model;

[0026] Wherein, the reference numerals are:

[0027] 100 - Substrate; 200 - Solder mask layer; 301 - Filter chip; 302 - Non - filter chip; 300a - First cavity; 300b - Second cavity; 300c - Fracture; 400 - Bump; 500 - Separation film; 500a - Separation groove; 600 - Encapsulation layer; H1 - First gap; H2 - Second gap; H3 - Third gap; H4 - Fourth gap. Detailed implementation manners

[0028] The following will describe the detailed implementation manners of the present utility model in more detail with reference to the schematic diagrams. According to the following description, the advantages and features of the present utility model will be clearer. It should be noted that the attached drawings are all in a very simplified form and use non - precise scales, only for conveniently and clearly assisting in explaining the purpose of the embodiments of the present utility model.

[0029] Embodiment 1

[0030] Figure 6 Schematic structural diagram of the encapsulation structure of the chip module provided in this embodiment. As Figure 6 shown, the encapsulation structure of the chip module includes:

[0031] Substrate 100;

[0032] At least one filter chip 301 is disposed on the substrate 100. The front surface of the filter chip 301 faces the substrate 100, and there is a first gap H1 between the filter chip 301 and the substrate 100.

[0033] A separation film 500 covers the side wall and the back surface of the filter chip 301 and a partial surface of the substrate 100 to encapsulate the first gap H1, so that a sealed first cavity 300a is formed between the filter chip 301 and the substrate 100. There is a second gap H2 between the edge of the separation film 500 and the edge of the substrate 100; and,

[0034] A plastic encapsulation layer 600 covers the remaining surface of the substrate 100 and the separation film 500.

[0035] Continue to refer to Figure 6 , specifically, the substrate 100 has a circuit structure, and a plurality of pads (not shown in Figure 6 ) electrically connected to the circuit structure are disposed on the substrate 100. The number of the pads is preferably multiple, and the pads can include those for electrically connecting with the filter chip 301 and can also be used for electrically connecting with other components (such as non-filter chips 302, etc.). The substrate 100 can be a high-temperature sintered ceramic substrate (HTCC), a printed circuit board, or an LTCC substrate.

[0036] In this embodiment, a solder mask layer 200 is further disposed on the substrate 100. The solder mask layer 200 covers the non-welding area of the substrate 100, and the non-welding area is the area on the substrate 100 except the pads. The solder mask layer 200 can prevent the pads on the substrate 100 from being short-circuited by tin bridging. Optionally, the material of the solder mask layer 200 is usually solder resist.

[0037] Furthermore, in this embodiment, the edge of the solder mask layer 200 is aligned with the edge of the substrate 100.

[0038] The filter chip 301 can be a surface acoustic wave filter chip, which includes an opposite front surface and a back surface and side walls connecting the front surface and the back surface. Other functional elements such as interdigital transducers are disposed on the front surface of the filter chip 301, and the front surface of the filter chip 301 faces the substrate 100.

[0039] In this embodiment, the packaging structure of the chip module further includes a non-filter chip 302. The non-filter chip 302 refers to other ordinary chips other than the filter chip 301, such as a power amplifier, a low-noise amplifier, etc. The non-filter chip 302 includes an opposite electrode surface and a non-electrode surface, and a side wall connecting the electrode surface and the non-electrode surface. Electrodes are provided on the electrode surface of the non-filter chip 302, and the electrode surface of the non-filter chip 302 faces the substrate 100.

[0040] In some embodiments, the electrode surface of the non-filter chip 302 can be the front surface of the non-filter chip 302 or the back surface of the non-filter chip 302. That is, the non-filter chip 302 can also face the substrate 100 with its front surface or its back surface.

[0041] It should be noted that Figure 6 only one filter chip 301 and one non-filter chip 302 are schematically shown, but it should be understood that the numbers of the filter chip 301 and the non-filter chip 302 should not be limited thereto. The numbers of the filter chip and the non-filter chip 302 can be designed according to actual situations, and no further examples will be given here. Of course, there may also be non-chip components, such as resistors, capacitors, etc. in the packaging structure of the chip module.

[0042] Furthermore, a plurality of bumps 400 are provided on the front surfaces of the filter chip 301 and the non-filter chip 302. The bumps 400 can be solder balls or metal posts. The filter chip 301 and the non-filter chip 302 can electrically connect the bumps 400 to corresponding pads on the substrate 100 by means of flip-chip die bond (FC Die Bond) or the like, so as to fix the filter chip 301 and the non-filter chip 302 on the substrate 100. Since the bumps 400 have a certain height, a first gap H1 is formed between the front surface of the filter chip 301 and the substrate 100, and a third gap H3 is formed between the electrode surface of the non-filter chip 302 and the substrate 100. The heights of the first gap H1 and the third gap H3 may not be equal.

[0043] Please continue to refer to Figure 6, the separation film 500 covers the side wall and the back surface of the filter chip 301 and a part of the surface of the substrate 100 (specifically, covers a part of the surface of the solder mask layer 200 in this embodiment) to encapsulate the first gap H1 and form a first cavity 300a for accommodating the interdigital transducer. The first cavity 300a is a sealed space. The separation film 500 can isolate the encapsulation layer 600 outside the first cavity 300a to prevent the injection molding material from entering the first cavity 300a when the encapsulation layer 600 is formed.

[0044] Certainly, in this embodiment, the separation film 500 also covers the side wall and the back surface of the non-filter chip 302 to encapsulate the third gap H3. The separation film 500 has a break 300c around the non-filter chip 302, and the break 300c can be arranged around the non-filter chip 302. The encapsulation layer 600 passes through the break 300c to fill the third gap H3. The encapsulation layer 600 in the third gap H3 can support the non-filter chip 302, realizing bottom filling of the non-filter chip 302, thereby ensuring the reliability of the non-filter chip 302.

[0045] Furthermore, the separation film 500 does not completely cover the substrate 100, and there is a second gap H2 between the edge of the separation film 500 and the edge of the substrate 100. The edge of the separation film 500 is not aligned with the edge of the substrate 100. In this way, the separation film 500 will be wrapped by the encapsulation layer 600 and will not be exposed to the air. When the packaging structure of the chip module works in a high-humidity environment, water vapor will not invade the first cavity 300a through the separation film 500, and the problem of performance degradation or even failure of the chip module can be avoided.

[0046] It should be noted that the edge of the separation film 500 refers to the edge of the entire separation film 500, and the second gap H2 also refers to the gap between the edge of the projection of the entire separation film 500 on the substrate 100 and the edge of the substrate 100.

[0047] It should be noted that since the chip module is a BDMP module, it is necessary to ensure that the separation film 500 encapsulates the first gap H1 to form the first cavity 300a. Therefore, the width of the second gap H2 should not be too large; and, in order to leave a processing margin during the packaging process, the width of the second gap H2 cannot be too small. Therefore, the width of the second gap H2 is preferably 50 microns to 100 microns, but it should not be limited thereto. The width of the second gap H2 can also refer to the cutting offset accuracy. The current cutting offset accuracy is usually 50 microns. Therefore, the width of the second gap H2 can be 100 microns.

[0048] In this embodiment, the separation film 500 can be a dry film or a photosensitive film. When the separation film 500 is a dry film, the cost is low and the process is mature. When the separation film 500 is a photosensitive film, the related process of forming the second gap H2 between the edge of the separation film 500 and the edge of the substrate 100 is more controllable. The material of the dry film is usually a polymer material, and the material of the photosensitive film can be a polymer material with photosensitive characteristics.

[0049] Furthermore, the encapsulation layer 600 covers the remaining surface of the substrate 100 (specifically, the remaining surface of the solder mask layer 200 in this embodiment) and the separation film 500. The separation film 500 isolates the encapsulation layer 600 outside the first cavity 300a, preventing the interdigital transducer from being contaminated by the encapsulation material. At the same time, the encapsulation layer 600 enters the third gap H3 through the break 300c, thereby supporting the non-filter chip 302 and ensuring the stability of the non-filter chip 302.

[0050] Optionally, the material of the encapsulation layer 600 is preferably an epoxy encapsulation material, or it can be other possible materials.

[0051] Based on this, this embodiment provides a method for encapsulating a chip module. Figure 1 is a flowchart of the method for encapsulating the chip module provided in this embodiment. As Figure 1 shown, the method for encapsulating the chip module includes:

[0052] Step S100: Provide a substrate;

[0053] Step S200: Dispose at least one filter chip on the substrate, with the front side of the filter chip facing the substrate and having a first gap therebetween;

[0054] Step S300: Attach a separation film to the side wall and the back surface of the filter chip and the substrate, with the separation film encapsulating the first gap, so as to form a sealed first cavity between the filter chip and the substrate;

[0055] Step S400: Remove the separation film at the edge of each module area to form a separation groove;

[0056] Step S500: Form an encapsulation layer, with the encapsulation layer covering the separation film and filling the separation groove; and,

[0057] Step S600: Cut the encapsulation layer and the substrate along the separation groove to obtain the encapsulation structure of the chip module. In the encapsulation structure of each chip module, there is a second gap between the edge of the separation film and the edge of the substrate.

[0058] Figures 2 to 6 It is a schematic structural diagram corresponding to the corresponding step of the encapsulation method of the chip module provided in this embodiment. Next, the encapsulation method of the chip module provided in this embodiment will be described in detail in conjunction with Figures 2 to 6 this.

[0059] As Figure 2 shown, perform step S100 to provide the substrate 100. A circuit structure is provided in the substrate 100, and a plurality of pads electrically connected to the circuit structure are provided on the substrate 100 ( Figure 2 not shown in the figure). The substrate 100 can be a wafer at this time.

[0060] Please continue to refer to Figure 2 this figure, and form the solder mask layer 200 in the non-soldering area of the substrate 100. The solder mask layer 200 can be formed in the non-soldering area of the substrate 100 by means of screen printing. At this time, the solder mask layer 200 covers the substrate 100 at the edge of each module area ( Figure 2 only one module area is shown in the figure).

[0061] As Figure 3 shown, perform step S200 to provide at least one filter chip 301. The front surface of the filter chip 301 has the bumps 400. The bumps 400 on the front surface of the filter chip 301 are electrically connected to the corresponding pads on the substrate 100 by means of flip-chip die bonding or the like, so as to dispose the filter chip 301 on the substrate 100. The front surface of the filter chip 301 faces the substrate 100, and there is a first gap H1 between the filter chip 301 and the substrate 100.

[0062] Please continue to refer to Figure 3 this figure. At the same time, provide at least one non-filter chip 302. The electrode surface of the filter chip 301 also has the bumps 400. The bumps 400 on the front surface of the non-filter chip 302 are electrically connected to the corresponding pads on the substrate 100 by means of flip-chip die bonding or the like, so as to dispose the non-filter chip 302 on the substrate 100. The electrode surface of the non-filter chip 302 faces the substrate 100, and there is a third gap H3 between the non-filter chip 302 and the substrate 100.

[0063] As Figure 4As shown, step S300 is executed to attach the separation film 500 to the side wall and the back surface of the filter chip 301 and the substrate 100. The separation film 500 conformally covers the filter chip 301 and the solder mask layer 200. The separation film 500 encapsulates the first gap H1, so that a sealed first cavity 300a is formed between the filter chip 301 and the substrate 100.

[0064] Please continue to refer to Figure 4 , when attaching the separation film 500 to the side wall and the back surface of the filter chip 301 and the substrate 100, the separation film 500 is also attached to the side wall and the non-electrode surface of the non-filter chip 302. Similarly, the separation film 500 also encapsulates the third gap H3, so that a sealed second cavity 300b is formed between the non-filter chip 302 and the substrate 100.

[0065] In some embodiments, the separation film 500 is a dry film, and the dry film attachment process can be used to attach the separation film 500. The specific process flow of the dry film attachment process is a mature technology, and will not be elaborated in this embodiment. In some embodiments, the separation film 500 is a photosensitive film, and a process similar to the dry film attachment process can also be used to attach the separation film 500.

[0066] As Figure 5 shown, step S400 is executed to remove the separation film 500 at the edge of each module area to form the separation groove 500a. For each module area, the separation groove 500a surrounds the module area, thereby separating adjacent module areas. It can be understood that the module area is the area occupied by each chip module on the substrate 100. Figure 5 Since only one module area is shown in

[0067] In some embodiments, the separation film 500 is a dry film, and a laser film removal process can be used to remove the separation film 500 at the edge of each module area. In a specific implementation, the laser film removal process uses a laser device to generate a laser, and the laser is irradiated to a specified position of the separation film 500 to remove the separation film 500 at that position. In some embodiments, the separation film 500 is a photosensitive film, and an exposure and development process can be used to remove the separation film 500 at the edge of each module area. In a specific implementation, a mask can be used to cover the areas of the separation film 500 that are not desired to be removed, exposing the areas of the separation film 500 that are desired to be removed. After exposure and development, the separation film 500 at the specified position can be removed.

[0068] As Figure 6 shown, control the separation film 500 to rupture around the non-filter chip 302, thereby forming a break 300c. For example, the height difference between the first gap H1 and the third gap H3 can be designed. For example, the height of the first gap H1 is less than 40 microns, and the height of the third gap H3 is greater than 50 microns. The separation film 500 is hot-pressed. Under a certain pressure, only the separation film 500 around the non-filter chip 302 will rupture to form the break 300c, while the separation film 500 around the filter chip 301 will not rupture.

[0069] Next, step S500 is executed. A molding compound is filled on the substrate 100, and after the molding compound is cured, the molding layer 600 is formed. The molding layer 600 will cover the separation film 500 and fill the separation groove 500a. When filling the molding compound, the molding compound will also enter the third gap H3 to fill the third gap H3. Therefore, the molding layer 600 will pass through the break 300c and fill the third gap H3.

[0070] Please continue to refer to Figure 6 , step S600 is executed. The molding layer 600 and the substrate 100 are cut along the separation groove 500a to separate each module area, and each module area can form a packaging structure of the chip module. After cutting, in the packaging structure of each chip module, there is the second gap H2 between the edge of the separation film 500 and the edge of the substrate 100, so that the separation film 500 will be wrapped by the molding layer 600 and will not be exposed to the air. When the packaging structure of the chip module works in a high-humidity environment, water vapor will not invade the first cavity 300a through the separation film 500, avoiding the problem that the performance of the filter chip 301 deteriorates or even fails.

[0071] It should be noted that the width of the separation groove 500a needs to be greater than the cutting offset accuracy for cutting the encapsulation layer 600 and the substrate 100, so as to prevent the separation film 500 from exposing from the side wall of the encapsulation layer 600 after cutting the encapsulation layer 600 and the substrate 100.

[0072] Embodiment 2

[0073] Figure 8 is a schematic structural diagram of the packaging structure of the chip module provided in this embodiment. As Figure 8 shown, the difference from Embodiment 1 is that in this embodiment, the solder mask layer 200 does not completely cover the substrate 100, and there is a fourth gap H4 between the edge of the solder mask layer 200 and the edge of the substrate 100. The solder mask layer 200 has a certain water absorption. In this embodiment, the solder mask layer 200 will be wrapped by the encapsulation layer 600 and will not be exposed to the air. When the packaging structure of the chip module works in a high-humidity environment, water vapor will not invade the first cavity 300a through the separation film 500 and the solder mask layer 200, avoiding the problem that the performance of the filter chip 301 deteriorates or even fails.

[0074] It should be noted that the edge of the solder mask layer 200 refers to the entire edge of the solder mask layer 200, and the fourth gap H4 also refers to the gap between the edge of the projection of the entire solder mask layer 200 on the substrate 100 and the edge of the substrate 100.

[0075] In this embodiment, the width of the second gap H2 is equal to the width of the fourth gap H4 so that the edge of the separation film 500 is aligned with the edge of the solder mask layer 200. In some embodiments, the width of the second gap H2 and the width of the fourth gap H4 may also be unequal. Considering the feasibility of preparation, the width of the second gap H2 may be greater than the width of the fourth gap H4, but it should not be limited thereto.

[0076] The packaging method of the chip module in this embodiment is similar to that in Embodiment 1, and the difference is only that, as Figure 7 shown, after removing the separation film 500 at the edge of each module area in Embodiment 1 to form the separation groove 500a, the solder mask layer 200 at the edge of each module area will be exposed in the separation groove 500a. Next, in this embodiment, the solder mask layer 200 in the separation groove 500a is also removed, so that the separation groove 500a extends downward to expose the surface of the substrate 100. After that, as Figure 8As shown, the encapsulation layer 600 is formed again, and the encapsulation layer 600 and the substrate 100 are cut along the separation groove 500a to obtain the encapsulation structure of the chip module. In the encapsulation structure of each chip module, there is a fourth gap H4 between the edge of the solder mask layer 200 and the edge of the substrate 100.

[0077] It can be understood that in some embodiments, a part of the solder mask layer 200 in the separation groove 500a can be removed (the substrate 100 still needs to be exposed). At this time, after the encapsulation structure of the chip module is formed, the width of the second gap H2 can be greater than the width of the fourth gap H4.

[0078] In this embodiment, a laser film removal process can be used to remove the solder mask layer 200 in the separation groove 500a. In specific implementation, the laser film removal process uses a laser device to generate laser light, and the laser light is irradiated onto the solder mask layer 200 in the separation groove 500a to remove the solder mask layer 200 in the separation groove 500a. Of course, in some embodiments, the solder mask layer 200 can also be photosensitive. At this time, an exposure and development process can be used to remove the solder mask layer 200 in the separation groove 500a.

[0079] Embodiment Three

[0080] Figure 10 is a schematic structural diagram of the encapsulation structure of the chip module provided in this embodiment. As Figure 10 shown, the difference from Embodiment One is that in this embodiment, the part of the solder mask layer 200 covered by the separation film 500 is the first part (i.e., the part directly below the separation film 500), and the part outside the first part is the second part (i.e., the part in the second gap H2). The thickness of the first part is greater than the thickness of the second part. The solder mask layer 200 has a certain water absorption. In this embodiment, when the encapsulation structure of the chip module works in a high-humidity environment, since less of the solder mask layer 200 is exposed to the air, the water vapor invading the first cavity 300a through the solder mask layer 200 can be reduced, thereby reducing the possibility of performance degradation or even failure of the filter chip 301.

[0081] The encapsulation method of the chip module in this embodiment is similar to that in Embodiment One, and the difference is only that, as Figure 9As shown, after removing the separation film 500 at the edge of each module area in the executed first embodiment to form the separation groove 500a, the separation groove 500a will expose the solder mask layer 200 at the edge of each module area. Next, in this embodiment, a part of the thickness of the solder mask layer 200 in the separation groove 500a is also removed, so that the separation groove 500a extends downward, but does not expose the surface of the substrate 100. After that, as Figure 10 shown, then the encapsulation layer 600 is formed and the encapsulation layer 600 and the substrate 100 are cut along the separation groove 500a. In the encapsulation structure of each chip module, the edge of the solder mask layer 200 is still aligned with the edge of the substrate 100. In this embodiment, the solder mask layer 200 still exposes from the edge of the substrate 100, but in the encapsulation structure of each chip module, a certain thickness of the edge area of the solder mask layer 200 is removed, reducing the contact area with air, thereby reducing the water vapor invading the first cavity 300a through the solder mask layer 200, and further reducing the possibility of performance degradation or even failure of the filter chip 301; at the same time, the solder mask layer 200 in the separation groove 500a is not completely removed, which can avoid damaging the substrate 100 when removing the solder mask layer 200. After forming the encapsulation structure of the chip module, the solder mask layer 200 can also continue to protect the substrate 100.

[0082] In this embodiment, a laser film removal process can be used to remove the solder mask layer 200 in the separation groove 500a. In specific implementation, the laser film removal process uses a laser device to generate laser, and irradiates the laser to the solder mask layer 200 in the separation groove 500a to remove a part of the thickness of the solder mask layer 200 in the separation groove 500a.

[0083] Embodiment Four

[0084] Figures 11 to 13 It is a schematic structural diagram corresponding to the corresponding steps of the encapsulation method of the chip module provided in this embodiment. The encapsulation structure of the chip module in this embodiment can be the same as that in Embodiment Two, except that the encapsulation method of the chip module in this embodiment is different from that in Embodiment Two.

[0085] As Figure 11 shown, in this embodiment, after the solder mask layer 200 is formed on the substrate 100, the solder mask layer 200 does not cover the substrate 100 at the edge of each module area.

[0086] As Figure 12 shown, the filter chip 301 and the non-filter chip 302 are disposed on the substrate 100.

[0087] AsFigure 13 As shown, the separation film 500 is attached. At this time, the separation film 500 will not only be attached to the top surface and side walls of the filter chip 301, the non-electrode surfaces and side walls of the non-filter chips 302, and the surface of the solder mask layer 200, but also be attached to the exposed surface of the substrate 100 (i.e., the edge area of each module area).

[0088] After that, as Figure 7 shown, the separation film 500 at the edge of each module area is removed to form the separation groove 500a, and the separation groove 500a will also expose the surface of the substrate 100. After that, as Figure 8 shown, the encapsulation layer 600 is formed, and then the encapsulation layer 600 and the substrate 100 are cut along the separation groove 500a to obtain the encapsulated structure of the chip module. At this time, in the encapsulated structure of each chip module, there will also be a fourth gap H4 between the edge of the solder mask layer 200 and the edge of the substrate 100.

[0089] Compared with the second embodiment, this embodiment can omit the step of removing the solder mask layer 200 in the separation groove 500a, simplify the process, and reduce the packaging cost; moreover, this embodiment can also make the second gap H2 smaller than the fourth gap H4.

[0090] In summary, in the encapsulated structure of the chip module provided by the embodiment of the present invention, it includes a substrate, at least one filter chip, a separation film, and an encapsulation layer. The filter chip is disposed on the substrate, the front surface of the filter chip faces the substrate, and there is a first gap between the filter chip and the substrate; the separation film covers the side walls and the back surface of the filter chip and a part of the surface of the substrate to encapsulate the first gap, so that a sealed first cavity is formed between the filter chip and the substrate, and there is a second gap between the edge of the separation film and the edge of the substrate; the encapsulation layer covers the remaining surface of the substrate and the separation film. Since there is the second gap between the edge of the separation film and the edge of the substrate, the separation film will be wrapped by the encapsulation layer and will not be exposed to the air. When the encapsulated structure of the chip module works in a high-humidity environment, water vapor will not invade the first cavity through the separation film, avoiding the problem that the performance of the filter chip deteriorates or even fails.

[0091] It should be noted that the embodiments in this specification are described in a progressive manner. The key point of each embodiment is to illustrate the differences from other embodiments. The same or similar parts among the embodiments can be referred to each other. For the system disclosed in the embodiment, since it corresponds to the method disclosed in the embodiment, the description is relatively simple, and the relevant parts can be referred to the description in the method part.

[0092] It should also be noted that although the present utility model has been disclosed above with preferred embodiments, the above embodiments are not intended to limit the present utility model. For any person skilled in the art, without departing from the scope of the technical solution of the present utility model, many possible changes and modifications can be made to the technical solution of the present utility model by using the technical content disclosed above, or it can be modified into equivalent embodiments with equivalent changes. Therefore, any simple modification, equivalent change and modification made to the above embodiments based on the technical essence of the present utility model without departing from the content of the technical solution of the present utility model still belong to the scope protected by the technical solution of the present utility model.

[0093] It should also be understood that unless otherwise specified or indicated, the terms "first", "second", "third", etc. in the specification are only used to distinguish the various components, elements, steps, etc. in the specification, rather than to represent the logical relationship or sequential relationship, etc. between the various components, elements, steps.

[0094] In addition, it should also be recognized that the terms described herein are only used to describe specific embodiments and are not used to limit the scope of the present utility model. It must be noted that the singular forms "a" and "an" used herein and in the appended claims include plural referents unless the context clearly dictates otherwise. For example, the reference to "a step" or "a device" means a reference to one or more steps or devices and may include sub-steps and sub-devices. All conjunctions used should be understood in the broadest sense. Also, the word "or" should be understood to have the definition of logical "or" rather than the definition of logical "exclusive or" unless the context clearly dictates otherwise. In addition, the implementation of the methods and / or devices in the embodiments of the present utility model may include performing the selected tasks manually, automatically or in combination.

Claims

1. An encapsulation structure of a chip module, characterized in that, Comprising: A substrate; At least one filter chip and at least one non-filter chip, both disposed on the substrate, the front side of the filter chip facing the substrate and having a first gap therebetween; A separation film, covering at least the side wall and the back side of the filter chip and a partial surface of the substrate to encapsulate the first gap, such that a sealed first cavity is formed between the filter chip and the substrate, and there is a second gap between the edge of the separation film and the edge of the substrate; and, A plastic encapsulation layer, covering the remaining surface of the substrate and the separation film.

2. The encapsulation structure of the chip module according to claim 1, wherein, The separation film is a dry film or a photosensitive film.

3. The encapsulation structure of the chip module according to claim 1, characterized in that, The width of the second gap is 50 micrometers to 100 micrometers.

4. The encapsulation structure of the chip module according to claim 1, characterized in that, The electrode surface of the non-filter chip faces the substrate and has a third gap therebetween; and, The separation film also covers the side wall and the non-electrode surface of the non-filter chip, and the separation film has a break around the non-filter chip, and the plastic encapsulation layer passes through the break to fill the third gap.

5. The encapsulation structure of the chip module according to any one of claims 1 to 4, characterized in that The packaging structure of the chip module further comprises: A solder mask layer, covering the non-welding area of the substrate, and the separation film is disposed on the solder mask layer.

6. The encapsulation structure of the chip module according to claim 5, characterized in that, The edge of the solder mask layer is aligned with the edge of the substrate.

7. The encapsulation structure of the chip module as described in claim 6, characterized in that, The part of the solder mask layer covered by the separation film is the first part, and the part of the solder mask layer outside the first part is the second part, and the thickness of the first part is greater than the thickness of the second part.

8. The encapsulation structure of the chip module according to claim 5, wherein, There is a fourth gap between the edge of the solder mask layer and the edge of the substrate.

9. The encapsulation structure of the chip module according to claim 8, wherein, The width of the second gap is equal to the width of the fourth gap, so that the edge of the separation film is aligned with the edge of the solder mask layer.

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