High-frequency impedance matcher and plasma generating device

Abstract

The utility model discloses a high-frequency impedance matcher and a plasma generating device, and belongs to the technical field of impedance matching. Wherein the impedance matcher is provided with a signal access end and a load access end, and the high-frequency impedance matcher comprises a main control circuit, a frequency detection circuit, an adjustable filter circuit and an adjustable impedance matching device; the adjustable filter circuit is used for limiting the frequency of the input signal within a preset signal frequency range and outputting the signal; the frequency detection circuit is used for detecting the signal frequency output by the adjustable filter circuit and outputting a frequency detection signal; the adjustable impedance matching device is used for adjusting the impedance matching relation between the signal source and the load according to the control signal output by the main control circuit; wherein the main control circuit is used for adjusting a preset signal frequency range of the adjustable filter circuit according to the frequency detection signal. The utility model aims to improve the working stability of the high-frequency impedance matching circuit.

Description

Technical Field

[0001] The utility model relates to the technical field of impedance matching, and particularly relates to a high-frequency impedance matcher and a plasma generating device. Background Art

[0002] In a plasma generating device, a high-frequency impedance matching circuit is used to ensure good impedance matching between a plasma generator and a plasma chamber. This can improve the energy transfer efficiency, reduce reflections, and optimize the generation of plasma. In the high-frequency range, impedance matching is particularly important because improper matching will result in energy loss and a decrease in plasma quality. Among them, in the case of using a high-frequency signal to excite plasma, the interference of a low-frequency signal may affect the stability and quality of plasma generation, thereby affecting the performance of the final product. In addition, when the high-frequency signal used is above a certain threshold, it will also affect the stability of plasma generation. Summary of the Utility Model

[0003] The main object of the utility model is to provide a high-frequency impedance matcher, aiming to improve the stability of the operation of a high-frequency impedance matching circuit.

[0004] To achieve the above object, the high-frequency impedance matcher proposed by the utility model is provided with a signal access end and a load access end. The high-frequency impedance matcher includes a main control circuit, a frequency detection circuit, an adjustable filter circuit, and an adjustable impedance matching device;

[0005] The input end of the adjustable filter circuit is electrically connected to the signal access end, the output end of the adjustable filter circuit is electrically connected to the adjustable impedance matching device, and the controlled end of the adjustable filter circuit is electrically connected to the main control circuit, and is used to limit the input signal frequency within a preset signal frequency range and output it;

[0006] The input end of the frequency detection circuit is electrically connected to the output end of the adjustable filter circuit, and the output end of the frequency detection circuit is electrically connected to the main control circuit, and is used to detect the signal frequency output by the adjustable filter circuit and output a frequency detection signal;

[0007] The input end of the adjustable impedance matching device is electrically connected to the output end of the adjustable filter circuit, the output end of the adjustable impedance matching device is electrically connected to the load access end, and the controlled end of the adjustable impedance matching circuit is electrically connected to the main control circuit, and is used to adjust the impedance matching relationship between the signal source and the load according to the control signal output by the main control circuit;

[0008] Among them, the main control circuit is used to adjust the preset signal frequency range of the adjustable filter circuit according to the frequency detection signal.

[0009] In one embodiment, the adjustable filtering circuit includes:

[0010] An adjustable low-pass filtering circuit, the input end of the adjustable low-pass filtering circuit is electrically connected to the signal access end, and the controlled end of the adjustable low-pass filtering circuit is electrically connected to the main control circuit, and is used to limit the frequency of the input signal below the first signal frequency and output it;

[0011] An adjustable high-pass filtering circuit, the input end of the adjustable high-pass filtering circuit is electrically connected to the adjustable low-pass filtering circuit, and the controlled end of the adjustable high-pass filtering circuit is electrically connected to the main control circuit, and is used to limit the frequency of the input signal above the second signal frequency and output it.

[0012] In one embodiment, the high-frequency impedance matcher further includes a sampling circuit, the input end of the sampling circuit is electrically connected to the signal access end and the load access end, the output end of the sampling circuit is electrically connected to the main control circuit, and the sampling circuit is used to collect electrical signals and feedback them to the main control circuit.

[0013] In one embodiment, the sampling circuit includes:

[0014] A first current sampling circuit, the input end of the first current sampling circuit is electrically connected to the signal access end, and the output end of the first current sampling circuit is electrically connected to the main control circuit; the first current sampling circuit is used to collect the current signal of the signal access end;

[0015] A first voltage sampling circuit, the input end of the first voltage sampling circuit is electrically connected to the signal access end, and the output end of the first voltage sampling circuit is electrically connected to the main control circuit; the first voltage sampling circuit is used to collect the voltage signal of the signal access end;

[0016] A second current sampling circuit, the input end of the second current sampling circuit is electrically connected to the load access end, and the output end of the second current sampling circuit is electrically connected to the main control circuit; the second current sampling circuit is used to collect the current signal of the load access end;

[0017] A second voltage sampling circuit, the input end of the second voltage sampling circuit is electrically connected to the load access end, and the output end of the second voltage sampling circuit is electrically connected to the main control circuit; the second voltage sampling circuit is used to collect the voltage signal of the load access end.

[0018] In one embodiment, the first current sampling circuit includes a first resistor, a second resistor, a third resistor, a fourth resistor, a fifth resistor, and a first operational amplifier; the second current sampling circuit includes a sixth resistor, a seventh resistor, an eighth resistor, a ninth resistor, a tenth resistor, and a second operational amplifier;

[0019] Among them, the first end of the first resistor is electrically connected to the signal access terminal, and the second end of the first resistor is grounded; the first end of the second resistor is electrically connected to the first end of the first resistor, and the second end of the second resistor is electrically connected to the first end of the third resistor and the non-inverting input terminal of the first operational amplifier; the second end of the third resistor is grounded; the first end of the fourth resistor is electrically connected to the second end of the first resistor, and the second end of the fourth resistor is electrically connected to the first end of the fifth resistor and the inverting input terminal of the first operational amplifier; the second end of the fifth resistor is electrically connected to the output terminal of the first operational amplifier and the main control circuit; the first end of the sixth resistor is electrically connected to the load access terminal, and the second end of the sixth resistor is grounded; the first end of the seventh resistor is electrically connected to the first end of the sixth resistor, and the second end of the seventh resistor is electrically connected to the first end of the eighth resistor and the non-inverting input terminal of the second operational amplifier; the second end of the eighth resistor is grounded; the first end of the ninth resistor is electrically connected to the second end of the sixth resistor, and the second end of the ninth resistor is electrically connected to the first end of the tenth resistor and the inverting input terminal of the second operational amplifier; the second end of the tenth resistor is electrically connected to the output terminal of the second operational amplifier and the main control circuit.

[0020] In one embodiment, the first voltage sampling circuit includes an eleventh resistor, a twelfth resistor, a thirteenth resistor, a fourteenth resistor, a third operational amplifier, a first capacitor, and a second capacitor; the second voltage sampling circuit includes a fifteenth resistor, a sixteenth resistor, a seventeenth resistor, an eighteenth resistor, a fourth operational amplifier, a third capacitor, and a fourth capacitor;

[0021] Among them, the first end of the eleventh resistor is electrically connected to the signal access terminal, and the second end of the eleventh resistor is electrically connected to the first end of the twelfth resistor and the first end of the thirteenth resistor; the second end of the twelfth resistor is grounded; the second end of the thirteenth resistor is electrically connected to the first end of the first capacitor and the non-inverting input terminal of the third operational amplifier; the second end of the first capacitor is grounded; the inverting input terminal of the third operational amplifier is electrically connected to the output terminal of the third operational amplifier and the first end of the fourteenth resistor; the second end of the fourteenth resistor is electrically connected to the first end of the second capacitor and the main control circuit; the second end of the second capacitor is grounded; the first end of the fifteenth resistor is electrically connected to the load access terminal, and the second end of the fifteenth resistor is electrically connected to the first end of the sixteenth resistor and the first end of the seventeenth resistor; the second end of the sixteenth resistor is grounded; the second end of the seventeenth resistor is electrically connected to the first end of the third capacitor and the non-inverting input terminal of the fourth operational amplifier; the second end of the third capacitor is grounded; the inverting input terminal of the fourth operational amplifier is electrically connected to the output terminal of the fourth operational amplifier and the first end of the eighteenth resistor; the second end of the eighteenth resistor is electrically connected to the first end of the fourth capacitor and the main control circuit; the second end of the fourth capacitor is grounded.

[0022] In one embodiment, the adjustable impedance matching device includes a first adjustable inductor, a second adjustable inductor, an adjustable capacitor, a first driving component, a second driving component, a third driving component, and a driving module; the first adjustable inductor is drivingly connected to the first driving component, the second adjustable inductor is drivingly connected to the second driving component, and the adjustable capacitor is drivingly connected to the third driving component; the driving module is electrically connected to the first driving component, the second driving component, and the third driving component respectively, and the driving module is electrically connected to the main control circuit;

[0023] The main control circuit is configured to control the driving module to drive the first driving component and / or the second driving component and / or the third driving component according to the electrical signal fed back by the sampling circuit, so as to adjust the impedance matching relationship between the signal source and the load;

[0024] Among them, the first end of the first adjustable inductor is electrically connected to the output terminal of the adjustable filter circuit, and the second end of the first adjustable inductor is electrically connected to the first end of the second adjustable inductor, the first end of the adjustable capacitor, and the load access terminal; the second end of the second adjustable inductor is electrically connected to the second end of the adjustable capacitor, the output terminal of the adjustable filter circuit, and the load access terminal.

[0025] In one embodiment, the driving module includes:

[0026] The first driving circuit, the input end of the first driving circuit is electrically connected to the output end of the main control circuit, the first driving circuit is electrically connected to the first driving component, and the first driving circuit is used to control the operation of the first driving component according to the first driving signal output by the main control circuit;

[0027] The second driving circuit, the input end of the second driving circuit is electrically connected to the output end of the main control circuit, the second driving circuit is electrically connected to the second driving component, and the second driving circuit is used to control the operation of the second driving component according to the second driving signal output by the main control circuit;

[0028] The third driving circuit, the input end of the third driving circuit is electrically connected to the output end of the main control circuit, the third driving circuit is electrically connected to the third driving component, and the third driving circuit is used to control the operation of the third driving component according to the third driving signal output by the main control circuit.

[0029] The present utility model also provides a plasma generating device, and the plasma generating device includes the high-frequency impedance matcher as described in any one of the above.

[0030] The technical solution of the present utility model limits the input signal frequency within a preset signal frequency range and outputs it by adopting an adjustable filter circuit. The output signal frequency is detected by a frequency detection circuit and fed back to the main control circuit. The main control circuit adaptively adjusts the adjustable filter circuit according to the frequency detection signal so that the adjustable filter circuit outputs a signal frequency within the preset signal frequency range. The adjustable impedance matching device adjusts the impedance matching relationship between the signal source and the load according to the control signal output by the main control circuit, so as to achieve the technical effect of impedance matching between the signal source and the load, and outputs the input signal frequency to the load. Through the limitation of the adjustable filter circuit and the detection of the frequency detection circuit, and finally through the regulation of the main control circuit to output to the adjustable impedance matching device and output to the load, the working stability of the high-frequency impedance matching circuit is effectively improved. Description of the Drawings

[0031] In order to more clearly illustrate the technical solutions in the embodiments of the present utility model or the prior art, the following will briefly introduce the drawings required for use in the description of the embodiments or the prior art. Obviously, the following drawings are only some embodiments of the present utility model. For those of ordinary skill in the art, without creative efforts, other drawings can also be obtained based on the structures shown in these drawings.

[0032] Figure 1 It is a module schematic diagram of the high-frequency impedance matcher of the present utility model;

[0033] Figure 2Schematic diagram of a module of an embodiment of the high-frequency impedance matcher of the present utility model;

[0034] Figure 3 Schematic diagram of a module of another embodiment of the high-frequency impedance matcher of the present utility model;

[0035] Figure 4 Schematic circuit diagram of an embodiment of the high-frequency impedance matcher of the present utility model;

[0036] Figure 5 Schematic circuit diagram of an embodiment of the high-frequency impedance matcher of the present utility model.

[0037] Explanation of the reference numerals in the drawings:

[0038] 10, main control circuit; 20, adjustable filter circuit; 21, adjustable low-pass filter circuit; 22, adjustable high-pass filter circuit; 30, frequency detection circuit; 40, adjustable impedance matching device; 50, sampling circuit; 51, first current sampling circuit; 52, first voltage sampling circuit; 53, second current sampling circuit; 54, second voltage sampling circuit; R1-R18, first resistor - eighteenth resistor; C1-C4, first capacitor - fourth capacitor.

[0039] The realization, functional features and advantages of the object of the present utility model will be further described in conjunction with the embodiments with reference to the accompanying drawings. Specific embodiments

[0040] Next, the technical solutions in the embodiments of the present utility model will be clearly and completely described in conjunction with the accompanying drawings in the embodiments of the present utility model. Obviously, the described embodiments are only a part of the embodiments of the present utility model, rather than all of the embodiments. All other embodiments obtained by those of ordinary skill in the art based on the embodiments of the present utility model without making creative efforts shall fall within the protection scope of the present utility model.

[0041] It should be noted that all the directional indications (such as up, down, left, right, front, back...) in the embodiments of the present utility model are only used to explain the relative positional relationship and movement conditions between components in a specific posture (as shown in the accompanying drawings). If the specific posture changes, the directional indications will also change accordingly.

[0042] In addition, the descriptions involving "first", "second", etc. in the present utility model are only for descriptive purposes and should not be construed as indicating or implying their relative importance or implicitly specifying the quantity of the indicated technical features. Thus, the features defined with "first" and "second" may explicitly or implicitly include at least one such feature. Additionally, the technical solutions between various embodiments may be combined with each other, but it must be based on the ability of those of ordinary skill in the art to implement. When the combination of technical solutions results in contradictions or cannot be implemented, it should be considered that such a combination of technical solutions does not exist and is not within the scope of protection required by the present utility model.

[0043] Reference Figure 1 and Figure 2 , the present utility model provides a high-frequency impedance matcher. The impedance matcher is provided with a signal access end and a load access end. The high-frequency impedance matcher includes a main control circuit 10, a frequency detection circuit 30, an adjustable filtering circuit 20, and an adjustable impedance matching device 40;

[0044] The input end of the adjustable filtering circuit 20 is electrically connected to the signal access end, the output end of the adjustable filtering circuit 20 is electrically connected to the adjustable impedance matching device 40, and the controlled end of the adjustable filtering circuit 20 is electrically connected to the main control circuit 10, and is used to limit the input signal frequency within a preset signal frequency range and output it;

[0045] The input end of the frequency detection circuit 30 is electrically connected to the output end of the adjustable filtering circuit 20, and the output end of the frequency detection circuit 30 is electrically connected to the main control circuit 10, and is used to detect the signal frequency output by the adjustable filtering circuit 20 and output a frequency detection signal;

[0046] The input end of the adjustable impedance matching device 40 is electrically connected to the output end of the adjustable filtering circuit 20, the output end of the adjustable impedance matching device 40 is electrically connected to the load access end, and the controlled end of the adjustable impedance matching circuit is electrically connected to the main control circuit 10, and is used to adjust the impedance matching relationship between the signal source and the load according to the control signal output by the main control circuit 10;

[0047] Among them, the main control circuit 10 is used to adjust the preset signal frequency range of the adjustable filtering circuit 20 according to the frequency detection signal.

[0048] In this embodiment, the main control circuit 10 can be implemented by a PLC (Programmable Logic Controller), an MCU (Microcontroller Unit), a DSP (Digital Signal Process), an FPGA (Field Programmable Gate Array), an SOC (System On Chip), etc. Among them, the main control circuit 10 adjusts the adjustable filter circuit 20 by obtaining the frequency detection signal input by the frequency detection circuit 30, so that the adjustable filter circuit 20 performs corresponding actions. Specifically, the main control circuit 10 can obtain the analog signal output by the frequency detection circuit 30 and judge whether the signal frequency output by the current adjustable filter circuit 20 is within the required frequency range through analog-to-digital conversion, so as to judge whether it is necessary to adjust the preset signal frequency range of the adjustable filter circuit 20 to avoid the signal frequency output by the high-frequency impedance matcher not meeting the actual requirements.

[0049] In this embodiment, the adjustable filter circuit 20 can be implemented by an adjustable band-pass filter circuit, an adjustable low-pass filter circuit 21, an adjustable high-pass filter circuit 22, etc. Specifically, the adjustable filter circuit 20 includes: an adjustable low-pass filter circuit 21, the input end of the adjustable low-pass filter circuit 21 is electrically connected to the signal access end, and the controlled end of the adjustable low-pass filter circuit 21 is electrically connected to the main control circuit 10, and is used for limiting the input signal frequency below the first signal frequency and outputting; an adjustable high-pass filter circuit 22, the input end of the adjustable high-pass filter circuit 22 is electrically connected to the adjustable low-pass filter circuit 21, and the controlled end of the adjustable high-pass filter circuit 22 is electrically connected to the main control circuit 10, and is used for limiting the input signal frequency above the second signal frequency and outputting. Among them, both the adjustable low-pass filter circuit 21 and the adjustable high-pass filter circuit 22 can be implemented by an adjustable RC filter circuit. By setting the corresponding cut-off frequency in the adjustable low-pass filter circuit 21, the input signal frequency starts to attenuate when it is higher than the cut-off frequency, so as to limit the input signal frequency below the first signal frequency and output. Further, the main control circuit 10 can adjust the cut-off frequency of the adjustable low-pass filter circuit 21 by controlling the digital potentiometer to change the resistance value in the adjustable low-pass filter circuit 21. Similarly, the adjustable high-pass filter circuit 22 also needs to set the corresponding cut-off frequency, so that the input signal frequency starts to attenuate when it is lower than the cut-off frequency, so as to limit the input signal frequency above the second signal frequency and output. The main control circuit 10 can also adjust the cut-off frequency of the adjustable high-pass filter circuit 22 by controlling the digital potentiometer to change the resistance value in the adjustable high-pass filter circuit 22.

[0050] In this embodiment, the frequency detection circuit 30 can be implemented by using a phase-locked loop, an analog multiplier, an analog integrator in an analog circuit, or a digital frequency counter in a digital circuit, etc. Taking the frequency detection circuit 30 as a phase-locked loop as an example. A phase-locked loop can track the frequency of an input signal and can provide an output signal related to the frequency of the input signal. Among them, the phase-locked loop includes a voltage-controlled oscillator, a frequency divider, and a phase comparator. The phase comparator compares the input signal and the output signal of the voltage-controlled oscillator, and adjusts the frequency of the voltage-controlled oscillator through a feedback mechanism to make it synchronized with the input signal. Specifically, the signal to be detected is connected to the input end of the phase-locked loop as the signal to be synchronized, and then a stable signal with a known frequency is selected as the reference signal. The parameters of the phase-locked loop (such as the parameters of the loop filter) are adjusted to ensure that it can quickly and accurately lock to the frequency of the signal to be detected. Once the phase-locked loop is locked, the output frequency of the voltage-controlled oscillator should be the same as the frequency of the signal to be detected. By measuring the output frequency of the voltage-controlled oscillator, the frequency of the signal to be detected can be determined. The main control circuit 10 obtains the analog signal output by the phase-locked loop and performs analog-to-digital conversion, and then obtains the signal frequency output by the adjustable filter circuit 20.

[0051] In this embodiment, the adjustable impedance matching device 40 can be implemented by using an adjustable L-type impedance matching network, an adjustable π-type impedance matching network, a T-type impedance matching network, etc. Among them, taking the adjustable L-type impedance matching network as an example. The adjustable L-type impedance matching network includes a series element and a parallel element, and is further divided into a series-parallel type and a parallel-series type. Specifically, the series-parallel type is applicable to the case where the input impedance is greater than the required matching impedance, while the parallel-series type is applicable to the case where the input impedance is less than the required matching impedance. Further, the adjustable capacitor and the adjustable inductor in the adjustable L-type impedance matching network can be adjusted according to the control signal output by the main control circuit 10, so as to adjust the impedance matching relationship between the signal source and the load, and achieve the technical effect of impedance matching.

[0052] In this embodiment, the input signal frequency is limited within a preset signal frequency range and output by using the adjustable filter circuit 20, and the output signal frequency is detected by the frequency detection circuit 30 and fed back to the main control circuit 10. The main control circuit 10 adaptively adjusts the adjustable filter circuit 20 according to the frequency detection signal, so that the adjustable filter circuit 20 outputs the signal frequency within the preset signal frequency range. The adjustable impedance matching device 40 adjusts the impedance matching relationship between the signal source and the load according to the control signal output by the main control circuit 10, so as to achieve the technical effect of impedance matching between the signal source and the load, and outputs the input signal frequency to the load. Through the limitation of the adjustable filter circuit 20 and the detection of the frequency detection circuit 30, and finally through the regulation of the main control circuit 10 and output to the adjustable impedance matching device 40 and output to the load, the working stability of the high-frequency impedance matching circuit is effectively improved.

[0053] Reference Figures 3 to 5 In an embodiment of the present utility model, the high-frequency impedance matcher further includes a sampling circuit 50. The input end of the sampling circuit 50 is electrically connected to the signal access end and the load access end, and the output end of the sampling circuit 50 is electrically connected to the main control circuit 10. The sampling circuit 50 is used to collect electrical signals and feedback them to the main control circuit 10.

[0054] In this embodiment, the sampling circuit 50 can be implemented by a voltage sampling circuit, a current sampling circuit, etc. Specifically, the sampling circuit 50 includes:

[0055] A first current sampling circuit 51, the input end of the first current sampling circuit 51 is electrically connected to the signal access end, and the output end of the first current sampling circuit 51 is electrically connected to the main control circuit 10; the first current sampling circuit 51 is used to collect the current signal of the signal access end;

[0056] A first voltage sampling circuit 52, the input end of the first voltage sampling circuit 52 is electrically connected to the signal access end, and the output end of the first voltage sampling circuit 52 is electrically connected to the main control circuit 10; the first voltage sampling circuit 52 is used to collect the voltage signal of the signal access end;

[0057] A second current sampling circuit 53, the input end of the second current sampling circuit 53 is electrically connected to the load access end, and the output end of the second current sampling circuit 53 is electrically connected to the main control circuit 10; the second current sampling circuit 53 is used to collect the current signal of the load access end;

[0058] A second voltage sampling circuit 54, the input end of the second voltage sampling circuit 54 is electrically connected to the load access end, and the output end of the second voltage sampling circuit 54 is electrically connected to the main control circuit 10; the second voltage sampling circuit 54 is used to collect the voltage signal of the load access end.

[0059] Furthermore, the first current sampling circuit 51 includes a first resistor R1, a second resistor R2, a third resistor R3, a fourth resistor R4, a fifth resistor R5, and a first operational amplifier; the second current sampling circuit 53 includes a sixth resistor R6, a seventh resistor R7, an eighth resistor R8, a ninth resistor R9, a tenth resistor R10, and a second operational amplifier;

[0060] Among them, the first end of the first resistor R1 is electrically connected to the signal access terminal, and the second end of the first resistor R1 is grounded; the first end of the second resistor R2 is electrically connected to the first end of the first resistor R1, and the second end of the second resistor R2 is electrically connected to the first end of the third resistor R3 and the non-inverting input terminal of the first operational amplifier; the second end of the third resistor R3 is grounded; the first end of the fourth resistor R4 is electrically connected to the second end of the first resistor R1, and the second end of the fourth resistor R4 is electrically connected to the first end of the fifth resistor R5 and the inverting input terminal of the first operational amplifier; the second end of the fifth resistor R5 is electrically connected to the output terminal of the first operational amplifier and the main control circuit 10;

[0061] The first end of the sixth resistor R6 is electrically connected to the load access terminal, and the second end of the sixth resistor R6 is grounded; the first end of the seventh resistor R7 is electrically connected to the first end of the sixth resistor R6, and the second end of the seventh resistor R7 is electrically connected to the first end of the eighth resistor R8 and the non-inverting input terminal of the second operational amplifier; the second end of the eighth resistor R8 is grounded; the first end of the ninth resistor R9 is electrically connected to the second end of the sixth resistor R6, and the second end of the ninth resistor R9 is electrically connected to the first end of the tenth resistor R10 and the inverting input terminal of the second operational amplifier; the second end of the tenth resistor R10 is electrically connected to the output terminal of the second operational amplifier and the main control circuit 10.

[0062] The first voltage sampling circuit 52 includes an eleventh resistor R11, a twelfth resistor R12, a thirteenth resistor R13, a fourteenth resistor R14, a third operational amplifier, a first capacitor C1, and a second capacitor C2; the second voltage sampling circuit 54 includes a fifteenth resistor R15, a sixteenth resistor R16, a seventeenth resistor R17, an eighteenth resistor R18, a fourth operational amplifier, a third capacitor C3, and a fourth capacitor C4;

[0063] Among them, the first end of the eleventh resistor R11 is electrically connected to the signal access terminal, and the second end of the eleventh resistor R11 is electrically connected to the first end of the twelfth resistor R12 and the first end of the thirteenth resistor R13; the second end of the twelfth resistor R12 is grounded; the second end of the thirteenth resistor R13 is electrically connected to the first end of the first capacitor C1 and the non-inverting input terminal of the third operational amplifier; the second end of the first capacitor C1 is grounded; the inverting input terminal of the third operational amplifier is electrically connected to the output terminal of the third operational amplifier and the first end of the fourteenth resistor R14; the second end of the fourteenth resistor R14 is electrically connected to the first end of the second capacitor C2 and the main control circuit 10; the second end of the second capacitor C2 is grounded;

[0064] The first end of the fifteenth resistor R15 is electrically connected to the load access end, and the second end of the fifteenth resistor R15 is electrically connected to the first end of the sixteenth resistor R16 and the first end of the seventeenth resistor R17; the second end of the sixteenth resistor R16 is grounded; the second end of the seventeenth resistor R17 is electrically connected to the first end of the third capacitor C3 and the non-inverting input terminal of the fourth operational amplifier; the second end of the third capacitor C3 is grounded; the inverting input terminal of the fourth operational amplifier is electrically connected to the output terminal of the fourth operational amplifier and the first end of the eighteenth resistor R18; the second end of the eighteenth resistor R18 is electrically connected to the first end of the fourth capacitor C4 and the main control circuit 10; the second end of the fourth capacitor C4 is grounded.

[0065] It can be understood that the structures of the first current sampling circuit 51 and the first voltage sampling circuit 52 are the same as those of the second current sampling circuit 53 and the second voltage sampling circuit 54 respectively, thus effectively avoiding the accuracy deviation of the sampling results caused by inconsistent circuit structures. Taking the first current sampling circuit 51 as an example. When the signal access terminal is turned on and current starts to flow through the first resistor R1, a voltage drop V1 will be generated between the first end of the first resistor R1 and the first end of the second resistor. Among them, the non-inverting input terminal of the first operational amplifier is connected to the second end of the second resistor R2, so it will detect the voltage of V1. After the current starts to flow through the first resistor R1, a voltage drop V2 will be generated between the second end of the first resistor R1 and the first end of the fourth resistor R4. Among them, the inverting input terminal of the second operational amplifier is connected to the second end of the fourth resistor R4, so it will detect the voltage of V2. The operational amplifier is a high-gain device, and its output voltage VOUT is set to minimize the voltage difference between the non-inverting input terminal and the inverting input terminal. In this way, the operational amplifier can adjust its output to keep the voltage difference between the positive input terminal and the negative input terminal to a minimum. Among them, VOUT = R3 / R2(V1 - V2), and V1 - V2 = I*R1. Through conversion, the current in the circuit can be sampled.

[0066] Taking the first voltage sampling circuit 52 as an example. The input signal is divided by the eleventh resistor R11 and then connected in parallel with the thirteenth resistor R13 to facilitate adjusting the magnitude of the input signal to adapt to the input range of the operational amplifier. The adjusted input signal enters the non-inverting input terminal of the third operational amplifier through the thirteenth resistor R13. Among them, the third operational amplifier is a non-inverting operational amplifier, and its output voltage is in phase with and equal to the input voltage. Therefore, the output voltage of the operational amplifier is in phase with and equal to the input voltage. After the output voltage passes through the second filter, it is output to the main control circuit 10. The function of the second capacitor C2 is to filter out high-frequency noise and ensure the accuracy of sampling by the main control circuit 10. The fourteenth resistor R14 and the second capacitor C2 form an RC low-pass filter, which can further filter out high-frequency noise and improve the signal quality. The fourteenth resistor R14 and the second capacitor C2 also form an RC time constant, which determines the cut-off frequency of the filter. The lower the cut-off frequency, the better the filtering effect, but the response speed will also slow down. The values of the fourteenth resistor R14 and the second capacitor C2 can be adjusted according to actual needs to achieve the best filtering effect and response speed. The twelfth resistor R12 and the first capacitor C1 form an RC filter to suppress power supply noise. Power supply noise may affect the performance of the operational amplifier, so it needs to be suppressed. The values of the twelfth resistor R12 and the first capacitor C1 can also be adjusted according to actual needs to achieve the best filtering effect and response speed.

[0067] In this embodiment, the high-frequency impedance matcher samples the signal access terminal and the load access terminal through the sampling circuit 50, and feeds the collected electrical signal back to the main control circuit 10, so that the main control circuit 10 determines the impedance matching relationship between the signal source and the load according to the input electrical signal, thereby realizing the control of the adjustable impedance matching circuit.

[0068] In an embodiment of the present invention, the adjustable impedance matching device 40 includes a first adjustable inductor, a second adjustable inductor, an adjustable capacitor, a first driving component, a second driving component, a third driving component, and a driving module; the first adjustable inductor is drivingly connected to the first driving component, the second adjustable inductor is drivingly connected to the second driving component, and the adjustable capacitor is drivingly connected to the third driving component; the driving module is electrically connected to the first driving component, the second driving component, and the third driving component respectively, and the driving module is electrically connected to the main control circuit 10;

[0069] The main control circuit 10 is configured to control the driving module to drive the first driving component and / or the second driving component and / or the third driving component according to the electrical signal fed back by the sampling circuit 50, so as to adjust the impedance matching relationship between the signal source and the load;

[0070] Among them, the first end of the first adjustable inductor is electrically connected to the output end of the adjustable filter circuit 20, and the second end of the first adjustable inductor is electrically connected to the first end of the second adjustable inductor, the first end of the adjustable capacitor, and the load access end; the second end of the second adjustable inductor is electrically connected to the second end of the adjustable capacitor, the output end of the adjustable filter circuit 20, and the load access end.

[0071] In this embodiment, the first driving component, the second driving component, and the third driving component can be implemented by a motor or a manipulator. Among them, the driving module includes: a first driving circuit, the input end of the first driving circuit is electrically connected to the output end of the main control circuit 10, the first driving circuit is electrically connected to the first driving component, and the first driving circuit is used to control the first driving component to act according to the first driving signal output by the main control circuit 10; a second driving circuit, the input end of the second driving circuit is electrically connected to the output end of the main control circuit 10, the second driving circuit is electrically connected to the second driving component, and the second driving circuit is used to control the second driving component to act according to the second driving signal output by the main control circuit 10; a third driving circuit, the input end of the third driving circuit is electrically connected to the output end of the main control circuit 10, the third driving circuit is electrically connected to the third driving component, and the third driving circuit is used to control the third driving component to act according to the third driving signal output by the main control circuit 10. Taking the first driving component, the second driving component, and the third driving component as motors as an example. The role of the motor here is similar to that of a precise mechanical driver, and it changes the parameters of the adjustable capacitor or inductor connected to it through its rotational motion. For example, for an adjustable capacitor, the motor can change the distance between two capacitor plates by rotating a mechanical structure, thereby changing the capacitance value. For an inductor, the motor can adjust the geometric shape of the coil (such as the coil pitch) or move the position of the magnetic core in a variable magnetic core inductor or the length of the coil connected to the circuit to change the inductance. In order to enable the motor to dynamically adjust the capacitor or inductor as needed, a sampling circuit 50 is provided in the impedance matcher. The sampling circuit 50 samples the impedance matching state of the circuit (usually by sampling parameters such as voltage, current, or power factor), and outputs these signals to the main control circuit 10, so that the main control circuit 10 outputs a control signal for controlling the motor. This means that the rotation speed or rotation direction of the motor will be determined by the real-time impedance matching requirements, thereby realizing the dynamic adjustment of the adjustable capacitor or adjustable inductor. The first adjustable inductor, the second adjustable inductor, and the adjustable capacitor in the adjustable impedance matching device 40 constitute a series-parallel type L-shaped matching network. By respectively regulating the first adjustable inductor, the second adjustable inductor, and the adjustable capacitor through the first driving component, the second driving component, and the third driving component, the optimal impedance matching between the signal source and the load can be achieved.

[0072] The present utility model also provides a plasma generating device, which includes a high-frequency impedance matcher as described in any one of the above. It should be noted that since the plasma generating device of the present utility model is based on the above high-frequency impedance matcher, therefore, the embodiments of the plasma generating device of the present utility model include all the technical solutions of all the embodiments of the above high-frequency impedance matcher, and the achieved technical effects are also exactly the same, which will not be elaborated here.

[0073] The above are only the preferred embodiments of the present utility model, and do not limit the patent scope of the present utility model. Any equivalent structural transformation made under the inventive concept of the present utility model by using the content of the specification and drawings of the present utility model, or directly / indirectly applied to other related technical fields, is included in the patent protection scope of the present utility model.

Claims

1. A high-frequency impedance matcher, characterized in that, The impedance matcher is provided with a signal access end and a load access end. The high-frequency impedance matcher includes a main control circuit, a frequency detection circuit, an adjustable filtering circuit, and an adjustable impedance matching device; The input end of the adjustable filtering circuit is electrically connected to the signal access end, the output end of the adjustable filtering circuit is electrically connected to the adjustable impedance matching device, and the controlled end of the adjustable filtering circuit is electrically connected to the main control circuit, and is used for limiting the input signal frequency within a preset signal frequency range and outputting; The input end of the frequency detection circuit is electrically connected to the output end of the adjustable filtering circuit, and the output end of the frequency detection circuit is electrically connected to the main control circuit, and is used for detecting the signal frequency output by the adjustable filtering circuit and outputting a frequency detection signal; The input end of the adjustable impedance matching device is electrically connected to the output end of the adjustable filtering circuit, the output end of the adjustable impedance matching device is electrically connected to the load access end, and the controlled end of the adjustable impedance matching device is electrically connected to the main control circuit, and is used for adjusting the impedance matching relationship between the signal source and the load according to the control signal output by the main control circuit; Wherein, the main control circuit is used for adjusting the preset signal frequency range of the adjustable filtering circuit according to the frequency detection signal.

2. The high-frequency impedance matcher according to claim 1, wherein The adjustable filtering circuit includes: An adjustable low-pass filtering circuit, the input end of the adjustable low-pass filtering circuit is electrically connected to the signal access end, and the controlled end of the adjustable low-pass filtering circuit is electrically connected to the main control circuit, and is used for limiting the input signal frequency below a first signal frequency and outputting; An adjustable high-pass filtering circuit, the input end of the adjustable high-pass filtering circuit is electrically connected to the adjustable low-pass filtering circuit, and the controlled end of the adjustable high-pass filtering circuit is electrically connected to the main control circuit, and is used for limiting the input signal frequency above a second signal frequency and outputting.

3. The high-frequency impedance matcher according to claim 1, characterized in that, The high-frequency impedance matcher further includes a sampling circuit, the input end of the sampling circuit is electrically connected to the signal access end and the load access end, the output end of the sampling circuit is electrically connected to the main control circuit, and the sampling circuit is used for collecting electrical signals and feeding them back to the main control circuit.

4. The high-frequency impedance matcher according to claim 3, wherein The sampling circuit includes: A first current sampling circuit, the input end of the first current sampling circuit is electrically connected to the signal access end, and the output end of the first current sampling circuit is electrically connected to the main control circuit; the first current sampling circuit is used for collecting the current signal of the signal access end; A first voltage sampling circuit, the input end of the first voltage sampling circuit is electrically connected to the signal access end, and the output end of the first voltage sampling circuit is electrically connected to the main control circuit; the first voltage sampling circuit is used for collecting the voltage signal of the signal access end; A second current sampling circuit, the input end of the second current sampling circuit is electrically connected to the load access end, and the output end of the second current sampling circuit is electrically connected to the main control circuit; the second current sampling circuit is used for collecting the current signal of the load access end; The second voltage sampling circuit, the input end of the second voltage sampling circuit is electrically connected to the load access end, and the output end of the second voltage sampling circuit is electrically connected to the main control circuit; the second voltage sampling circuit is used to collect the voltage signal of the load access end.

5. The high-frequency impedance matcher according to claim 4, wherein The first current sampling circuit includes a first resistor, a second resistor, a third resistor, a fourth resistor, a fifth resistor, and a first operational amplifier; the second current sampling circuit includes a sixth resistor, a seventh resistor, an eighth resistor, a ninth resistor, a tenth resistor, and a second operational amplifier; Wherein, the first end of the first resistor is electrically connected to the signal access end, and the second end of the first resistor is grounded; the first end of the second resistor is electrically connected to the first end of the first resistor, and the second end of the second resistor is electrically connected to the first end of the third resistor and the non-inverting input terminal of the first operational amplifier; the second end of the third resistor is grounded; the first end of the fourth resistor is electrically connected to the second end of the first resistor, and the second end of the fourth resistor is electrically connected to the first end of the fifth resistor and the inverting input terminal of the first operational amplifier; the second end of the fifth resistor is electrically connected to the output terminal of the first operational amplifier and the main control circuit; the first end of the sixth resistor is electrically connected to the load access end, and the second end of the sixth resistor is grounded; the first end of the seventh resistor is electrically connected to the first end of the sixth resistor, and the second end of the seventh resistor is electrically connected to the first end of the eighth resistor and the non-inverting input terminal of the second operational amplifier; the second end of the eighth resistor is grounded; the first end of the ninth resistor is electrically connected to the second end of the sixth resistor, and the second end of the ninth resistor is electrically connected to the first end of the tenth resistor and the inverting input terminal of the second operational amplifier; the second end of the tenth resistor is electrically connected to the output terminal of the second operational amplifier and the main control circuit.

6. The high-frequency impedance matcher according to claim 4, wherein The first voltage sampling circuit includes an eleventh resistor, a twelfth resistor, a thirteenth resistor, a fourteenth resistor, a third operational amplifier, a first capacitor, and a second capacitor; the second voltage sampling circuit includes a fifteenth resistor, a sixteenth resistor, a seventeenth resistor, an eighteenth resistor, a fourth operational amplifier, a third capacitor, and a fourth capacitor; Among them, the first end of the eleventh resistor is electrically connected to the signal access terminal, and the second end of the eleventh resistor is electrically connected to the first end of the twelfth resistor and the first end of the thirteenth resistor; the second end of the twelfth resistor is grounded; the second end of the thirteenth resistor is electrically connected to the first end of the first capacitor and the positive input terminal of the third operational amplifier; the second end of the first capacitor is grounded; the inverting input terminal of the third operational amplifier is electrically connected to the output terminal of the third operational amplifier and the first end of the fourteenth resistor; the second end of the fourteenth resistor is electrically connected to the first end of the second capacitor and the main control circuit; the second end of the second capacitor is grounded; the first end of the fifteenth resistor is electrically connected to the load access terminal, and the second end of the fifteenth resistor is electrically connected to the first end of the sixteenth resistor and the first end of the seventeenth resistor; the second end of the sixteenth resistor is grounded; the second end of the seventeenth resistor is electrically connected to the first end of the third capacitor and the positive input terminal of the fourth operational amplifier; the second end of the third capacitor is grounded; the inverting input terminal of the fourth operational amplifier is electrically connected to the output terminal of the fourth operational amplifier and the first end of the eighteenth resistor; the second end of the eighteenth resistor is electrically connected to the first end of the fourth capacitor and the main control circuit; the second end of the fourth capacitor is grounded.

7. The high-frequency impedance matcher according to claim 3, wherein The adjustable impedance matching device includes a first adjustable inductor, a second adjustable inductor, an adjustable capacitor, a first driving component, a second driving component, a third driving component, and a driving module; the first adjustable inductor is drivingly connected to the first driving component, the second adjustable inductor is drivingly connected to the second driving component, and the adjustable capacitor is drivingly connected to the third driving component; the driving module is electrically connected to the first driving component, the second driving component, and the third driving component respectively, and the driving module is electrically connected to the main control circuit; The main control circuit is configured to control the driving module to drive the first driving component and / or the second driving component and / or the third driving component according to the electrical signal fed back by the sampling circuit, so as to adjust the impedance matching relationship between the signal source and the load; Among them, the first end of the first adjustable inductor is electrically connected to the output terminal of the adjustable filter circuit, and the second end of the first adjustable inductor is electrically connected to the first end of the second adjustable inductor, the first end of the adjustable capacitor, and the load access terminal; the second end of the second adjustable inductor is electrically connected to the second end of the adjustable capacitor, the output terminal of the adjustable filter circuit, and the load access terminal.

8. The high-frequency impedance matcher according to claim 7, wherein The driving module includes: A first driving circuit, the input end of the first driving circuit is electrically connected to the output end of the main control circuit, the first driving circuit is electrically connected to the first driving component, and the first driving circuit is configured to control the first driving component to act according to the first driving signal output by the main control circuit; A second driving circuit, an input end of the second driving circuit is electrically connected to an output end of the main control circuit, the second driving circuit is electrically connected to the second driving component, and the second driving circuit is configured to control the second driving component to act according to a second driving signal output by the main control circuit; A third driving circuit, an input end of the third driving circuit is electrically connected to an output end of the main control circuit, the third driving circuit is electrically connected to the third driving component, and the third driving circuit is configured to control the third driving component to act according to a third driving signal output by the main control circuit.

9. A plasma generating device, characterized in that, The plasma generating device includes the high-frequency impedance matcher according to any one of claims 1 to 8.

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