Testing device suitable for PWM (Pulse Width Modulation) power management chip

Abstract

The utility model relates to a testing device suitable for a PWM power supply management chip. The system comprises a test machine used for testing a PWM power management chip to be tested; the auxiliary test unit is adaptively connected with the test machine and the PWM power management chip to be tested and comprises a boost bootstrap circuit and a current detection circuit, the boost bootstrap circuit is adaptively connected with the test machine and the current detection circuit, test voltage output by the test machine is lifted through the boost bootstrap circuit, and the test voltage output by the test machine is detected through the current detection circuit. The current detection circuit is used for detecting the current of the to-be-detected PWM power supply management chip; the current detection circuit is in adaptive connection with the test machine and the to-be-tested PWM power supply management chip, and is used for converting the leakage current of the to-be-tested PWM power supply management chip during testing into a test current voltage, and loading the test current voltage formed by conversion to the test machine. According to the utility model, the PWM power management chip can be effectively tested, the test precision is improved, and the test cost is reduced.

Description

Technical Field

[0001] The utility model relates to a test device, in particular to a test device suitable for a PWM power management chip. Background Art

[0002] The PWM power management chip is an application-specific integrated circuit, which is mostly used in electronic devices. Its main function is to convert the input voltage into a stable output voltage and adjust the output voltage as needed to manage and control the power supply of the electronic device. Among them, when adjusting the voltage, the duty cycle of the input voltage can be continuously adjusted to control the magnitude of the output voltage, so as to achieve precise control of the output voltage.

[0003] At present, the PWM power management chip mainly converts the direct current output by the high-voltage battery into the direct current required by the low-voltage electronic system. Therefore, the PWM power management chip is mostly applied to telecommunication power converters, industrial power converters, and +42V automotive systems.

[0004] The input voltage of the PWM power management chip can generally be as high as 13V - 48V. Therefore, when testing the packaged finished product of the PWM power management chip, it is necessary to test the electrical characteristics such as voltage and current of the PWM power management chip under the condition of 48V high voltage to test whether it meets the regulations of the PWM power management chip operation manual.

[0005] Generally, the method of testing a chip needs to rely on a test machine that meets the conditions. The test machine is used to drive the chip, capture the output feedback of the chip, and compare it with the expected feedback in the test machine to determine the quality of the chip. From the above description, it can be seen that when testing the PWM power management chip, the voltage supply of the test machine should reach at least 48V. At present, the test machines that meet this voltage range on the market are expensive, and the higher the voltage and current requirements and the higher the precision of the test machine, the higher the price of the test machine, which will greatly increase the cost of testing the PWM power management chip.

[0006] In addition, when testing the PWM power management chip, it is also necessary to test the leakage current value of the PWM power management chip, but testing the leakage current value is very demanding on the precision of the DC power supply. This is because the range of the leakage current value is between 0.2mA - 1.0mA, which requires the precision of the current provided by the power supply to reach 0.1mA in order to display the leakage current value. If the precision of the current provided by the DC power supply is not enough and the current reading shows 0A, then it will not be possible to determine whether the measured leakage current value meets the requirements.

[0007] In order to meet the leakage current test requirements of the PWM power management chip, a high-precision DC power supply can be purchased separately, but this will also increase the cost of chip testing and cannot meet the actual test requirements. Summary of the Invention

[0008] The purpose of the present utility model is to overcome the deficiencies existing in the prior art, and provide a test device suitable for a PWM power management chip, which can effectively test the PWM power management chip, improve the test accuracy, and reduce the test cost.

[0009] According to the technical solution provided by the present utility model, a test device suitable for a PWM power management chip, the test device includes:

[0010] A testing machine for testing the PWM power management chip to be tested;

[0011] An auxiliary test unit is adaptively connected to the testing machine and the PWM power management chip to be tested, and includes a boost bootstrap circuit and a current detection circuit. Among them,

[0012] The boost bootstrap circuit is adaptively connected to the testing machine and the current detection circuit, and the test voltage output by the testing machine is boosted through the boost bootstrap circuit to provide a target test voltage to the current detection circuit and the PWM power management chip to be tested;

[0013] The current detection circuit is adaptively connected to the testing machine and the PWM power management chip to be tested, and is used to convert the leakage current during the test of the PWM power management chip to be tested into a test current voltage, and load the converted test current voltage onto the testing machine.

[0014] The testing machine uses DL1000, and the test voltage output by the testing machine is 20V to 40V;

[0015] The test voltage output by the testing machine is boosted through the boost bootstrap circuit, and a target test voltage is output, and the target test voltage is 48V.

[0016] The boost bootstrap circuit includes a boost bootstrap chip U2 and a lift voltage stabilization circuit adaptively connected to the boost bootstrap chip U2. Among them, the boost bootstrap chip U2 uses a chip with the model XL6019E1;

[0017] The lift voltage stabilization circuit includes at least an inductor L1 and a capacitor C5. Among them, the first end of the inductor L1 is connected to the VIN terminal of the boost bootstrap chip U2, the second end of the inductor L1 is connected to a switch SW terminal of the boost bootstrap chip U2, one end of a resistor R2, and one end of the capacitor C5. The other end of the resistor R2 is connected to the FB terminal of the boost bootstrap chip U2 and one end of a resistor R3. The other ends of the resistor R3 and the capacitor C5 are both grounded;

[0018] The VIN terminal of the boost bootstrap chip U2 is connected to the output terminal of the testing machine, and the inductor L1 is connected to the resistor R2 and the capacitor C5 to form a lift voltage output node;

[0019] The boost bootstrap circuit is connected to the current detection circuit through a boosted voltage output node.

[0020] It further includes a reverse voltage protection circuit. Among them, the second end of the inductor L1 is connected to one end of the resistor R2 and one end of the capacitor C5 through the reverse voltage protection circuit.

[0021] The reverse voltage protection circuit includes a Schottky diode D1. Among them,

[0022] The anode end of the Schottky diode D1 is connected to the second end of the inductor L1 and the SW end of the boost bootstrap chip U2. The cathode end of the Schottky diode D1 is connected to the resistor R2 and the capacitor C5.

[0023] The VIN end of the boost bootstrap chip U2 is also connected to one end of the capacitor C2 and one end of the capacitor C3. The other end of the capacitor C2, the other end of the capacitor C3, and the GND end of the boost bootstrap chip U2 are all grounded;

[0024] The boosted voltage output node is also grounded through the capacitor C4.

[0025] The current detection circuit includes a current detection amplifier chip U1 and a current detection voltage stabilization circuit adapted to be connected to the current detection amplifier chip U1. Among them,

[0026] The current detection amplifier chip U1 uses a chip with the model MAX4080SASA. The RS+ end and VCC end of the current detection amplifier chip U1 are connected to one end of the conversion resistor R1 and the current detection voltage stabilization circuit;

[0027] The RS- end of the current detection amplifier chip U1 is connected to the other end of the conversion resistor R1, the PWM power management chip to be measured, and the current detection voltage stabilization circuit;

[0028] The OUT end of the current detection amplifier chip U1 is connected to the tester, and the OUT end of the current detection amplifier chip U1 is grounded through the capacitor C1.

[0029] The current detection voltage stabilization circuit includes a zener diode D5, a zener diode D7, and a diode D6. Among them,

[0030] The cathode end of the zener diode D5 is connected to the RS+ end and VCC end of the current detection amplifier chip U1. The cathode end of the zener diode D5 is connected to the anode end of the diode D6. The cathode end of the diode D6 and the GND end of the current detection amplifier chip U1 are both grounded;

[0031] The cathode end of the zener diode D7 is connected to the RS- end of the current detection amplifier chip U1. The anode end of the zener diode D7 is grounded.

[0032] Advantages of the present utility model: When testing a PWM power management chip, by using a boost circuit and a current detection circuit in cooperation with a testing machine, it is possible to provide the target test voltage required for testing the PWM power chip to be tested, and through the current detection circuit, it is possible to achieve the high-voltage start-up leakage current of the PWM power management chip to be tested. The testing machine is isolated from the high voltage required by the PWM power management chip to be tested, improving the reliability of the testing machine test, reducing the requirements for the testing machine and the DC regulated power supply, reducing the testing cost, and being safe and reliable. Description of the Drawings

[0033] Figure 1 It is a circuit block diagram of an embodiment of the testing device of the present utility model.

[0034] Figure 2 It is a circuit schematic diagram of an embodiment of the boost bootstrap circuit of the present invention.

[0035] Figure 3 It is a circuit schematic diagram of an embodiment of the current detection circuit of the present invention. Detailed Embodiment

[0036] The present utility model will be further described below in conjunction with specific drawings and embodiments.

[0037] In order to effectively test the PWM power management chip, improve the test accuracy, and reduce the test cost, the present utility model provides a testing device suitable for the PWM power management chip. Specifically, the testing device includes:

[0038] A testing machine for testing the PWM power management chip to be tested;

[0039] An auxiliary testing unit is adaptively connected to the testing machine and the PWM power management chip to be tested, and includes a boost bootstrap circuit and a current detection circuit. Among them,

[0040] The boost bootstrap circuit is adaptively connected to the testing machine and the current detection circuit, and the test voltage output by the testing machine is lifted through the boost bootstrap circuit to provide the target test voltage to the current detection circuit and the PWM power management chip to be tested;

[0041] The current detection circuit is adaptively connected to the testing machine and the PWM power management chip to be tested, and is used to convert the leakage current during the test of the PWM power management chip to be tested into a test current voltage, and load the converted test current voltage onto the testing machine.

[0042] Figure 1 The circuit block diagram of the testing device is shown in Figure 1It can be seen that in order to meet the test requirements for the PWM power management chip, the test device should include a tester. The tester has the ability to test the PWM power management chip. The tester can use existing commonly used test equipment. For example, the tester can use equipment with the model number DL1000. At this time, the test voltage output by the tester is 20V to 40V. The test voltage output by the tester is the voltage required to provide the test for the PWM power management chip to be tested. The PWM power management chip to be tested can be an existing commonly used power management chip, which can be specifically selected according to needs to meet the actual test requirements.

[0043] As can be seen from the above description, the test voltage of the PWM power management chip to be tested may be 48V. At this time, the test voltage output by the tester cannot meet the test requirements of the PWM power management chip to be tested. In order to realize the test of the PWM power management chip and reduce the test cost, the tester is adaptively connected to the PWM power management chip to be tested through an auxiliary test unit. The specific situation of the auxiliary test unit will be described in detail below.

[0044] In an embodiment of the present invention, the auxiliary test unit at least includes a boost bootstrap circuit and a current detection circuit. Among them, the test voltage output by the tester can be boosted through the boost bootstrap circuit, and the target test voltage can be obtained after boosting the test voltage, and the target test voltage is loaded onto the PWM power management chip to be tested through the circuit detection circuit. As can be seen from the above description, the target test voltage can be 48V; of course, the target test voltage can also be other values, which can be specifically selected according to needs to meet the test of the PWM power management chip to be tested.

[0045] Furthermore, the current detection circuit can convert the leakage current during the test of the PWM power management chip to be tested into a test current voltage and load the converted test current voltage onto the tester. Thus, the current detection circuit can meet the test requirements for the leakage current of the PWM power management chip to be tested during the test.

[0046] In an embodiment of the present invention, the boost bootstrap circuit includes a boost bootstrap chip U2 and a lift voltage stabilization circuit adaptively connected to the boost bootstrap chip U2. Among them, the boost bootstrap chip U2 uses a chip with the model number XL6019E1;

[0047] The lift voltage stabilization circuit at least includes an inductor L1 and a capacitor C5. Among them, the first end of the inductor L1 is connected to the VIN terminal of the boost bootstrap chip U2, the second end of the inductor L1 is connected to a switch SW terminal of the boost bootstrap chip U2, one end of a resistor R2, and one end of the capacitor C5. The other end of the resistor R2 is connected to the FB terminal of the boost bootstrap chip U2 and one end of a resistor R3. The other ends of the resistor R3 and the capacitor C5 are both grounded;

[0048] The VIN terminal of the boost bootstrap chip U2 is connected to the output terminal of the testing machine. The inductor L1, resistor R2, and capacitor C5 are interconnected to form a lift voltage output node.

[0049] The boost bootstrap circuit is connected to the current detection circuit through the lift voltage output node.

[0050] Figure 2 An embodiment of the boost bootstrap circuit is shown. Specifically, when the boost bootstrap chip U2 uses the model XL6019E1, the operating voltage of the boost bootstrap chip U2 is 5V to 40V DC, and the maximum output voltage of the boost bootstrap chip U2 can be 60V. Thus, it can meet the connection and cooperation with the testing machine and the PWM power management chip to be tested, that is, it can output the 48V voltage required for testing the PWM power management chip to be tested. In addition, the boost bootstrap chip U2 can also provide a current output of 1.5A.

[0051] When the switch SW pin of the boost bootstrap chip U2 is closed, the current in the inductor L1 increases linearly, and at the same time, the capacitor C5 starts to be charged. When the switch SW pin of the boost bootstrap chip U2 is turned on, the current in the inductor L1 starts to decrease, and at the same time, the capacitor C5 starts to discharge to the load to maintain the voltage of the load. Thus, relying on the characteristic that the current in the inductor L1 cannot change suddenly, using the principle of energy storage in the inductor, during the process of continuously charging and discharging the capacitor C5, stable control of the output voltage is achieved. Therefore, through the interaction between the inductor L1 and the capacitor C5, the boost bootstrap circuit generates a stable high-voltage output by itself.

[0052] In addition, the resistor R2, resistor R3 are connected to the FB terminal of the boost bootstrap chip U2 to form a feedback loop, and the resistance values of the resistor R2 and resistor R3 can be adjusted to control the output voltage of the boost bootstrap circuit.

[0053] In an embodiment of the present utility model, a voltage reverse protection circuit is further included. Among them, the second end of the inductor L1 is connected to one end of the resistor R2 and one end of the capacitor C5 through the voltage reverse protection circuit.

[0054] Specifically, the voltage reverse protection circuit prevents the high voltage after bootstrapping from reversely entering the VIN terminal of the boost bootstrap chip U2. In specific implementation, the voltage reverse protection circuit includes a Schottky diode D1, where

[0055] The anode terminal of the Schottky diode D1 is connected to the second end of the inductor L1 and the SW terminal of the boost bootstrap chip U2, and the cathode terminal of the Schottky diode D1 is connected to the resistor R2 and the capacitor C5.

[0056] By Figure 2It can be known that when using the Schottky diode D1 to achieve voltage reverse protection, the boost voltage output node should be formed by connecting the cathode end of the Schottky diode D1 to the resistor R2 and the capacitor C5.

[0057] In an embodiment of the present invention, the VIN terminal of the boost bootstrap chip U2 is also connected to one end of the capacitor C2 and one end of the capacitor C3, and the other ends of the capacitor C2, the capacitor C3, and the GND terminal of the boost bootstrap chip U2 are all grounded;

[0058] The boost voltage output node is also grounded through the capacitor C4.

[0059] Specifically, the capacitor C2 and the capacitor C4 can be of the same type. The capacitors C2 and C3 can also be used for functions such as filtering. After the capacitors C2, C3, and the inductor L1 are connected to the VIN terminal of the boost bootstrap chip U2, the output voltage of the test machine is loaded onto the VIN terminal. Thereafter, a 48V voltage can be obtained through the boost voltage output node.

[0060] From the above description, it can be seen that the boost bootstrap circuit has the characteristics of small volume and light weight, and can effectively meet the high-voltage and small-current requirements for the PWM power management chip to be tested. The boost bootstrap circuit improves the stability and reliability of the output voltage, while reducing the number of components required in the circuit, thereby effectively reducing the volume and weight of the circuit, which further improves the efficiency and reliability of the circuit.

[0061] In an embodiment of the present invention, the current detection circuit includes a current detection amplifier chip U1 and a current detection voltage stabilization circuit adapted to be connected to the current detection amplifier chip U1. Among them,

[0062] The current detection amplifier chip U1 uses a chip with the model MAX4080SASA. The RS+ terminal and the VCC terminal of the current detection amplifier chip U1 are connected to one end of the conversion resistor R1 and the current detection voltage stabilization circuit;

[0063] The RS- terminal of the current detection amplifier chip U1 is connected to the other end of the conversion resistor R1, the PWM power management chip to be tested, and the current detection voltage stabilization circuit;

[0064] The OUT terminal of the current detection amplifier chip U1 is connected to the test machine, and the OUT terminal of the current detection amplifier chip U1 is grounded through the capacitor C1.

[0065] Specifically, the MAX4080SASA chip is a high-precision and high-speed current detection amplifier with an input voltage range of 4.5V to 76V, a measurement withstand voltage of 4.5V to 76V, and a full-scale accuracy of 0.1%. It can achieve microamp-level current measurement, thus effectively meeting the test requirements for the PWM power management chip to be tested. The MAX4080SASA chip does not require a separate externally connected reference voltage. The real-time current is represented by the voltage output from the OUT terminal. After measuring this voltage output and performing calculations, the current value flowing through can be obtained.

[0066] The boost bootstrap circuit boosts the test voltage output by the tester to 48V. The current detection circuit converts the detected current into a voltage of 0 to 3V and provides it to the tester. The tester then converts the voltage of 0 to 3V into the detected current. Throughout the process, the tester is not physically connected to the 48V voltage output by the boost circuit, avoiding damage to the tester caused by the 48V voltage and obtaining the high-voltage start-up leakage current of the PWM power management chip to be tested.

[0067] The conversion resistor R1 is placed on the leakage current measurement path. When the start-up leakage current flows through the conversion resistor R1, the generated voltage signal is amplified by the current detection and amplification chip U1 and corrected through the internal gain adjustment circuit, thereby realizing the conversion of the leakage current into the corresponding voltage.

[0068] In an embodiment of the present invention, the current detection voltage stabilization circuit includes a zener diode D5, a zener diode D7, and a diode D6, where,

[0069] The cathode terminal of the zener diode D5 is connected to the RS+ terminal and the VCC terminal of the current detection and amplification chip U1. The cathode terminal of the zener diode D5 is connected to the anode terminal of the diode D6. The cathode terminal of the diode D6 and the GND terminal of the current detection and amplification chip U1 are both grounded;

[0070] The cathode terminal of the zener diode D7 is connected to the RS- terminal of the current detection and amplification chip U1, and the anode terminal of the zener diode D7 is grounded.

[0071] Figure 1 In the middle, the current detection circuit is connected in series between the boost bootstrap circuit and the PWM power management chip to be tested, Figure 3 An embodiment of the current detection voltage stabilization circuit is shown in the middle. The zener diode D5, the zener diode D7, and the diode D6 form the current detection voltage stabilization circuit, which can prevent the high voltage exceeding 48V from damaging the PWM power management chip to be tested.

[0072] From the above description, it can be seen that when testing the PWM power management chip to be tested, the current detection circuit will convert the current flowing through the conversion resistor R1 into a linear voltage output of 0 to 3V. This current is the high-voltage startup leakage current of the VDUT pin of the PWM power management chip to be tested. The test machine measures the voltage output from the OUT terminal of the current detection amplifier chip U1, and calculates the current flowing through the conversion resistor R1. Specifically, the conversion between voltage and current can be expressed as: I R1 =V OUT / Gain / R1, where V OUT is the output voltage of the OUT terminal of the current detection amplifier chip U1, Gain is the voltage amplification gain of the current detection amplifier chip U1, and R1 is the resistance value of the conversion resistor R1.

[0073] In summary, when testing the PWM power management chip, the boost circuit and the current detection circuit are used in conjunction with the test machine to provide the target test voltage required for the PWM power management chip to be tested. The high voltage startup leakage current of the PWM power management chip to be tested can be achieved through the current detection circuit. The high voltage required by the test machine and the PWM power management chip to be tested is isolated, thereby improving the reliability of the test machine test, reducing the requirements for the test machine and the DC regulated power supply, reducing the test cost, and ensuring safety and reliability.

Claims

1. A test device suitable for a PWM power management chip, characterized in that The test device includes: A testing machine for testing the PWM power management chip to be tested; An auxiliary test unit, which is adaptively connected to the testing machine and the PWM power management chip to be tested, and includes a boost bootstrap circuit and a current detection circuit. Among them, The boost bootstrap circuit is adaptively connected to the testing machine and the current detection circuit, and the test voltage output by the testing machine is boosted through the boost bootstrap circuit to provide a target test voltage to the current detection circuit and the PWM power management chip to be tested; The current detection circuit is adaptively connected to the testing machine and the PWM power management chip to be tested, and is used to convert the leakage current during the test of the PWM power management chip to be tested into a test current voltage, and load the converted test current voltage onto the testing machine.

2. The test device suitable for the PWM power management chip according to claim 1, characterized in that: The testing machine uses DL1000, and the test voltage output by the testing machine is 20V to 40V; The test voltage output by the testing machine is boosted through the boost bootstrap circuit, and a target test voltage is output, and the target test voltage is 48V.

3. The test device suitable for the PWM power management chip according to claim 2, characterized in that: The boost bootstrap circuit includes a boost bootstrap chip U2 and a lift voltage stabilization circuit adaptively connected to the boost bootstrap chip U2. Among them, the boost bootstrap chip U2 uses a chip with the model XL6019E1; The lift voltage stabilization circuit includes at least an inductor L1 and a capacitor C5. Among them, the first end of the inductor L1 is connected to the VIN terminal of the boost bootstrap chip U2, the second end of the inductor L1 is connected to a switch SW terminal of the boost bootstrap chip U2, one end of a resistor R2, and one end of the capacitor C5. The other end of the resistor R2 is connected to the FB terminal of the boost bootstrap chip U2 and one end of a resistor R3. The other ends of the resistor R3 and the capacitor C5 are both grounded; The VIN terminal of the boost bootstrap chip U2 is connected to the output terminal of the testing machine, and the inductor L1, the resistor R2, and the capacitor C5 are connected to each other to form a lift voltage output node; The boost bootstrap circuit is connected to the current detection circuit through the lift voltage output node.

4. The test device suitable for a PWM power management chip according to claim 3, characterized in that: It also includes a voltage reverse connection prevention circuit. Among them, the second end of the inductor L1 is connected to one end of the resistor R2 and one end of the capacitor C5 through the voltage reverse connection prevention circuit.

5. The test device suitable for a PWM power management chip according to claim 4, characterized in that: The voltage reverse connection prevention circuit includes a Schottky diode D1. Among them, The anode terminal of the Schottky diode D1 is connected to the second end of the inductor L1 and the SW terminal of the boost bootstrap chip U2, and the cathode terminal of the Schottky diode D1 is connected to the resistor R2 and the capacitor C5.

6. The test device suitable for the PWM power management chip according to claim 3, characterized in that: The VIN terminal of the boost bootstrap chip U2 is also connected to one end of a capacitor C2 and one end of a capacitor C3. The other ends of the capacitor C2, the capacitor C3, and the GND terminal of the boost bootstrap chip U2 are all grounded; The lift voltage output node is also grounded through a capacitor C4.

7. The test device for a PWM power management chip according to any one of claims 1 to 6, characterized in that: The current detection circuit includes a current detection amplifier chip U1 and a current detection voltage stabilization circuit adaptively connected to the current detection amplifier chip U1. Among them, The current detection amplifier chip U1 uses a chip with the model MAX4080SASA. The RS+ terminal and the VCC terminal of the current detection amplifier chip U1 are connected to one end of a conversion resistor R1 and the current detection voltage stabilization circuit; The RS- terminal of the current detection amplifier chip U1 is connected to the other end of the conversion resistor R1, the PWM power management chip to be measured, and the current detection voltage stabilization circuit; The OUT terminal of the current detection amplifier chip U1 is connected to the tester, and the OUT terminal of the current detection amplifier chip U1 is grounded through the capacitor C1.

8. The test device suitable for a PWM power management chip according to claim 7, characterized in that: The current detection voltage stabilization circuit includes a voltage stabilizing diode D5, a voltage stabilizing diode D7, and a diode D6, where The cathode terminal of the voltage stabilizing diode D5 is connected to the RS+ terminal and the VCC terminal of the current detection amplifier chip U1. The cathode terminal of the voltage stabilizing diode D5 is connected to the anode terminal of the diode D6. The cathode terminal of the diode D6 and the GND terminal of the current detection amplifier chip U1 are both grounded; The cathode terminal of the voltage stabilizing diode D7 is connected to the RS- terminal of the current detection amplifier chip U1, and the anode terminal of the voltage stabilizing diode D7 is grounded.

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