Local oscillator module circuit

Abstract

The utility model provides a local oscillator module circuit. Comprising a frequency multiplier U1, a comb spectrum generator U2, couplers U4 to U7, filters Z1 to Z6, a filter Z9, a filter Z10, amplifiers A1 to A10, power dividers U8 to U11, a power divider U16, radio frequency switches S1 to S3, a frequency mixer U13, a frequency mixer U19, a frequency mixer U21, a frequency multiplier U12, a frequency multiplier U20, a frequency divider U13, a frequency divider U15, a frequency divider U17, a switch filter U14, a switch filter U22, a phase-locked source U18 and a radio frequency switch S4. The system comprises a radio frequency switch S5, an attenuator U33, an amplifier A16, a power divider U34, an attenuator U35, an amplifier A17, a power divider U36, a power divider U38 and an attenuator U37. According to the utility model, multipath output signals with different frequencies can be output.

Description

Technical Field

[0001] The utility model relates to the technical field of local oscillators, and particularly relates to a local oscillator module circuit. Background Art

[0002] The local oscillator, abbreviated as LO, also known as the local oscillator (LOCAL OSCILLATOR), is actually a self-excited sine wave oscillator. Its function is to generate a high-frequency equal-amplitude sine wave signal that is higher than the received signal by an intermediate frequency (usually specified as 37 MHz), and inject this oscillation signal into the mixer to obtain an intermediate frequency television signal after mixing with the high-frequency television signal.

[0003] The oscillation circuit adopted by the local oscillator belongs to a three-point type LC sine oscillator. Its basic types can be divided into two types: the inductive three-point type and the capacitive three-point type. In practical applications, in order to improve the frequency stability, a modified capacitive three-point oscillation circuit is often adopted, and this circuit is also called the Clapp circuit.

[0004] In transistor televisions, according to the way the transistor electrodes are grounded, the local oscillation circuit can be further divided into two circuit types: the base-grounded (common-base) capacitive three-point type and the collector-grounded (common-collector) capacitive three-point type.

[0005] Currently, the frequencies of the multiplex output signals of the local oscillator are basically the same, which is not suitable for scenarios that require multiplex output signals with different frequencies. Content of the Utility Model

[0006] The utility model provides a local oscillator module circuit that can output multiplex output signals with different frequencies.

[0007] An embodiment of this specification discloses a local oscillator module circuit, including frequency multiplier U1, comb spectrum generator U2, coupler U4, coupler U5, coupler U6, coupler U7, filter Z1, filter Z2, filter Z3, filter Z4, filter Z5, filter Z6, filter Z9, filter Z10, amplifier A1, amplifier A2, amplifier A3, amplifier A4, amplifier A5, amplifier A6, amplifier A7, amplifier A8, amplifier A9, amplifier A10, power divider U8, power divider U9, power divider U10, power divider U11, power divider U16, RF switch S1, RF switch S2, RF switch S3, mixer U13, mixer U19, mixer U21, frequency multiplier U12, frequency multiplier U20, frequency divider U13, frequency divider U15, frequency divider U17, switch filter U14, switch filter U22, phase-locked source U18, RF switch S4, RF switch S5, attenuator U33, amplifier A16, power divider U34, attenuator U35, amplifier A17, power divider U36, power divider U38, and attenuator U37;

[0008] The input end of the frequency multiplier U1 is externally connected to a reference signal. The input end of the comb spectrum generator U2 is connected to the output end of the frequency multiplier U1. The output end of the comb spectrum generator U2 is connected to the input end of the coupler U4. The coupling end of the coupler U4, the filter Z1, the amplifier A1, and the input end of the power divider U8 are connected in series in sequence. The output end of the coupler U4 is connected to the input end of the coupler U5. The coupling end of the coupler U5, the filter Z2, the amplifier A2, and the input end of the power divider U9 are connected in series in sequence. The output end of the coupler U5 is connected to the input end of the coupler U6. The coupling end of the coupler U6, the filter Z3, the amplifier A3, and the input end of the power divider U10 are connected in series in sequence. The output end of the coupler U6 is connected to the input end of the coupler U7. The coupling end of the coupler U7, the filter Z4, the amplifier A4, and the input end of the power divider U11 are connected in series in sequence. The output end of the coupler U7, the filter Z5, and the amplifier A5 are connected in series in sequence;

[0009] The first output end of the power divider U8 is connected to the input end of the frequency divider U15. The second output end of the power divider U8, the first output end of the power divider U9, the first output end of the power divider U10, and the first output end of the power divider U11 are respectively connected to the four moving ends of the radio frequency switch S1 in one-to-one correspondence. The second output end of the power divider U9, the second output end of the power divider U10, the second output end of the power divider U11, and the output end of the amplifier A5 are respectively connected to the four moving ends of the radio frequency switch S2 in one-to-one correspondence. The fixed end of the radio frequency switch S1, the amplifier A6, the frequency multiplier U12, the filter Z6, the amplifier A7, and the LO end of the mixer U13 are connected in series in sequence. The fixed end of the radio frequency switch S2, the frequency divider U13, the amplifier A10, and the LO end of the mixer U21 are connected in series in sequence;

[0010] The output terminal of the frequency divider U15 is connected to the input terminal of the power divider U16. The first output terminal of the power divider U16, the amplifier A9, and the LO terminal of the mixer U19 are connected in series in sequence. The second output terminal of the power divider U16, the frequency divider U17, the phase-locked source U18, and the IF terminal of the mixer U19 are connected in series in sequence. The RF terminal of the mixer U19, the filter Z9, the frequency multiplier U20, the filter Z10, and the RF terminal of the mixer U21 are connected in series in sequence. The IF terminal of the mixer U21, the switched filter U22, and the IF terminal of the mixer U13 are connected in series in sequence. The RF terminal of the mixer U13, the switched filter U14, the amplifier A8, and the fixed terminal of the RF switch S3 are connected in series in sequence. The first moving terminal of the RF switch S3, the RF switch S4, the attenuator U33, the amplifier A16, and the input terminal of the power divider U34 are connected in series in sequence. The second moving terminal of the RF switch S3, the RF switch S5, the attenuator U35, the amplifier A17, and the input terminal of the power divider U36 are connected in series in sequence. The first output terminal of the power divider U36 is connected to the input terminal of the power divider U38. The second output terminal of the power divider U36 is connected to the input terminal of the attenuator U37. The two output terminals of the power divider U34, the two output terminals of the power divider U38, and the output terminal of the attenuator U37 are respectively used as signal output terminals.

[0011] In an embodiment disclosed by the present utility model, the local oscillator module circuit further includes a phase-locked source U24, a power divider U25, an attenuator U26, an attenuator U27, an amplifier A12, an amplifier A13, a power divider U26, and a power divider U27. The input terminal of the phase-locked source U24 is externally connected to a reference signal. The output terminal of the phase-locked source U24 is connected to the input terminal of the power divider U25. The first output terminal of the power divider U25, the attenuator U26, the amplifier A12, and the input terminal of the power divider U26 are connected in series in sequence. The second output terminal of the power divider U25, the attenuator U27, the amplifier A13, and the input terminal of the power divider U27 are connected in series in sequence. The two output terminals of the power divider U26 and the two output terminals of the power divider U27 are respectively used as signal output terminals.

[0012] In an embodiment disclosed by the present utility model, the local oscillator module circuit further includes a power divider U3, a filter Z7, an amplifier A11, a frequency multiplier U23, a filter Z8, a power divider U28, an attenuator U29, an amplifier A14, a power divider U31, an attenuator U30, an amplifier A15, and a power divider U32; the input end of the power divider U3 is connected to the output end of the comb spectrum generator U2, the first output end of the power divider U3 is connected to the input end of the coupler U4, and the second output end of the power divider U3, the filter Z7, the amplifier A11, the frequency multiplier U23, the filter Z8, and the input ends of the power divider U28 are connected in series in sequence. The first output end of the power divider U28, the attenuator U29, the amplifier A14, and the input end of the power divider U31 are connected, the second output end of the power divider U28, the attenuator U30, the amplifier A15, and the input end of the power divider U32 are connected, and the two output ends of the power divider U31 and the two output ends of the power divider U32 are respectively used as signal output ends.

[0013] In an embodiment disclosed by the present utility model, the local oscillator module circuit further includes an adapter board U44, an FPGA, a DCDC module U39, a DCDC module U40, an LDO module U41, an LDO module U42, and an LDO module U43. The adapter board U44 is respectively connected to the FPGA, the DCDC module U39, the DCDC module U40, and the LDO module U41. The DCDC module U39 is connected to the LDO module U42, and the DCDC module U40 is connected to the LDO module U43.

[0014] The embodiments of this specification can at least achieve the following beneficial effects:

[0015] By using the two output ends of the power divider U34, the two output ends of the power divider U38, and the output end of the attenuator U37 as signal output ends respectively, multi-channel output signals with different frequencies can be output; by controlling the input power of the front stage of the mixer, the overall output spurious can be controlled. Description of the Drawings

[0016] In order to more clearly illustrate the technical solutions of the embodiments of the present utility model, the drawings required for the description of the embodiments will be briefly introduced below. Obviously, the drawings in the following description are only some embodiments of the present utility model. For those of ordinary skill in the art, without creative efforts, other drawings can be obtained based on these drawings.

[0017] Figure 1 It is a partial schematic diagram of the local oscillator module circuit involved in some embodiments of the present utility model.

[0018] Figure 2Another schematic diagram of the local oscillator module circuit involved in some embodiments of the present utility model. Detailed implementation manners

[0019] In the following, only some exemplary embodiments are simply described. As those skilled in the art can recognize, the described embodiments can be modified in various different ways without departing from the spirit or scope of the embodiments of the present utility model. Therefore, the drawings and the description are considered to be exemplary in nature rather than restrictive.

[0020] In the description of the embodiments of the present utility model, it should be understood that the orientation or positional relationship indicated by terms such as "length", "vertical", "horizontal", "top", "bottom", etc. is based on the orientation or positional relationship shown in the drawings, and is only for the convenience of describing the embodiments of the present utility model and simplifying the description, rather than indicating or implying that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation, and thus should not be construed as a limitation on the embodiments of the present utility model.

[0021] In addition, the terms "first" and "second" are only used for descriptive purposes and cannot be understood as indicating or implying relative importance or implicitly specifying the quantity of the indicated technical features. Thus, the features defined with "first" and "second" may explicitly or implicitly include one or more of such features. In the description of the embodiments of the present utility model, the meaning of "a plurality" is two or more unless otherwise specifically defined.

[0022] In the embodiments of the present utility model, unless otherwise clearly specified and limited, the terms such as "mounted", "connected", "coupled", "fixed", etc. should be understood in a broad sense. For example, it may be a fixed connection, a detachable connection, or integrated; it may be a mechanical connection, an electrical connection, or a communication connection; it may be directly connected, or indirectly connected through an intermediate medium, and it may be the internal communication of two elements or the interaction relationship between two elements. For those of ordinary skill in the art, the specific meanings of the above terms in the embodiments of the present utility model can be understood according to specific circumstances.

[0023] In the embodiments of the present utility model, unless otherwise clearly specified and limited, the first feature being "on" or "under" the second feature may include the direct contact between the first and second features, or may include the situation where the first and second features are not in direct contact but in contact through other features therebetween. Moreover, the first feature being "above", "over" and "on" the second feature includes that the first feature is directly above and obliquely above the second feature, or merely indicates that the horizontal height of the first feature is higher than that of the second feature. The first feature being "under", "below" and "beneath" the second feature includes that the first feature is directly below and obliquely below the second feature, or merely indicates that the horizontal height of the first feature is lower than that of the second feature.

[0024] The following disclosure provides many different embodiments or examples for implementing different structures of the embodiments of the present utility model. To simplify the disclosure of the embodiments of the present utility model, the components and settings of specific examples are described below. Of course, they are only examples and are not intended to limit the embodiments of the present utility model. In addition, the embodiments of the present utility model may repeat reference numerals and / or reference letters in different examples. This repetition is for the purpose of simplification and clarity, and does not itself indicate the relationship between the various embodiments and / or settings discussed.

[0025] The embodiments of the present utility model will be described in detail below with reference to the accompanying drawings.

[0026] As Figure 1 shown, the embodiments of this specification disclose a local oscillator module circuit, including frequency doubler U1, comb spectrum generator U2, coupler U4, coupler U5, coupler U6, coupler U7, filter Z1, filter Z2, filter Z3, filter Z4, filter Z5, filter Z6, filter Z9, filter Z10, amplifier A1, amplifier A2, amplifier A3, amplifier A4, amplifier A5, amplifier A6, amplifier A7, amplifier A8, amplifier A9, amplifier A10, power divider U8, power divider U9, power divider U10, power divider U11, power divider U16, RF switch S1, RF switch S2, RF switch S3, mixer U13, mixer U19, mixer U21, frequency doubler U12, frequency doubler U20, frequency divider U13, frequency divider U15, frequency divider U17, switch filter U14, switch filter U22, phase-locked source U18, RF switch S4, RF switch S5, attenuator U33, amplifier A16, power divider U34, attenuator U35, amplifier A17, power divider U36, power divider U38 and attenuator U37;

[0027] The input end of the frequency multiplier U1 is externally connected to a reference signal. The input end of the comb spectrum generator U2 is connected to the output end of the frequency multiplier U1. The output end of the comb spectrum generator U2 is connected to the input end of the coupler U4. The coupled end of the coupler U4, the filter Z1, the amplifier A1, and the input end of the power splitter U8 are connected in series in sequence. The output end of the coupler U4 is connected to the input end of the coupler U5. The coupled end of the coupler U5, the filter Z2, the amplifier A2, and the input end of the power splitter U9 are connected in series in sequence. The output end of the coupler U5 is connected to the input end of the coupler U6. The coupled end of the coupler U6, the filter Z3, the amplifier A3, and the input end of the power splitter U10 are connected in series in sequence. The output end of the coupler U6 is connected to the input end of the coupler U7. The coupled end of the coupler U7, the filter Z4, the amplifier A4, and the input end of the power splitter U11 are connected in series in sequence. The output end of the coupler U7, the filter Z5, and the amplifier A5 are connected in series in sequence;

[0028] The first output end of the power splitter U8 is connected to the input end of the frequency divider U15. The second output end of the power splitter U8, the first output end of the power splitter U9, the first output end of the power splitter U10, and the first output end of the power splitter U11 are respectively connected to the four moving ends of the radio frequency switch S1 in one-to-one correspondence. The second output end of the power splitter U9, the second output end of the power splitter U10, the second output end of the power splitter U11, and the output end of the amplifier A5 are respectively connected to the four moving ends of the radio frequency switch S2 in one-to-one correspondence. The fixed end of the radio frequency switch S1, the amplifier A6, the frequency multiplier U12, the filter Z6, the amplifier A7, and the LO end of the mixer U13 are connected in series in sequence. The fixed end of the radio frequency switch S2, the frequency divider U13, the amplifier A10, and the LO end of the mixer U21 are connected in series in sequence;

[0029] The output terminal of the frequency divider U15 is connected to the input terminal of the power divider U16. The first output terminal of the power divider U16, the amplifier A9, and the LO terminal of the mixer U19 are connected in series in sequence. The second output terminal of the power divider U16, the frequency divider U17, the phase-locked source U18, and the IF terminal of the mixer U19 are connected in series in sequence. The RF terminal of the mixer U19, the filter Z9, the frequency multiplier U20, the filter Z10, and the RF terminal of the mixer U21 are connected in series in sequence. The IF terminal of the mixer U21, the switched filter U22, and the IF terminal of the mixer U13 are connected in series in sequence. The RF terminal of the mixer U13, the switched filter U14, the amplifier A8, and the fixed terminal of the RF switch S3 are connected in series in sequence. The first moving terminal of the RF switch S3, the RF switch S4, the attenuator U33, the amplifier A16, and the input terminal of the power divider U34 are connected in series in sequence. The second moving terminal of the RF switch S3, the RF switch S5, the attenuator U35, the amplifier A17, and the input terminal of the power divider U36 are connected in series in sequence. The first output terminal of the power divider U36 is connected to the input terminal of the power divider U38. The second output terminal of the power divider U36 is connected to the input terminal of the attenuator U37. The two output terminals (LO3-1, LO3-2) of the power divider U34, the two output terminals (LO3-3, LO3-4) of the power divider U38, and the output terminal of the attenuator U37 are respectively used as signal output terminals (LO3-5).

[0030] In some embodiments, the local oscillator module circuit further includes a phase-locked source U24, a power divider U25, an attenuator U26, an attenuator U27, an amplifier A12, an amplifier A13, a power divider U26, and a power divider U27. The input terminal of the phase-locked source U24 is externally connected to a reference signal. The output terminal of the phase-locked source U24 is connected to the input terminal of the power divider U25. The first output terminal of the power divider U25, the attenuator U26, the amplifier A12, and the input terminal of the power divider U26 are connected in series in sequence. The second output terminal of the power divider U25, the attenuator U27, the amplifier A13, and the input terminal of the power divider U27 are connected in series in sequence. The two output terminals (LO1-1, LO1-2) of the power divider U26 and the two output terminals (LO1-3, LO1-4) of the power divider U27 are respectively used as signal output terminals.

[0031] In some embodiments, the local oscillator module circuit also includes a power divider U3, a filter Z7, an amplifier A11, a frequency multiplier U23, a filter Z8, a power divider U28, an attenuator U29, an amplifier A14, a power divider U31, an attenuator U30, an amplifier A15 and a power divider U32; the input end of the power divider U3 is connected to the output end of the comb generator U2, the first output end of the power divider U3 is connected to the input end of the coupler U4, the second output end of the power divider U3, the filter Z7, the amplifier A 11. The input ends of the frequency multiplier U23, the filter Z8 and the power divider U28 are connected in series in sequence, the first output end of the power divider U28, the attenuator U29, the amplifier A14 and the input end of the power divider U31 are connected, the second output end of the power divider U28, the attenuator U30, the amplifier A15 and the input end of the power divider U32 are connected, and the two output ends (LO2-1, LO2-2) of the power divider U31 and the two output ends (LO2-3, LO2-4) of the power divider U32 are respectively used as signal output ends.

[0032] In some embodiments, Figure 2 As shown, the local oscillator module circuit also includes an adapter board U44, an FPGA, a DCDC module U39, a DCDC module U40, an LDO module U41, an LDO module U42 and an LDO module U43. The adapter board U44 is connected to the FPGA, the DCDC module U39, the DCDC module U40 and the LDO module U41 respectively, the DCDC module U39 is connected to the LDO module U42, and the DCDC module U40 is connected to the LDO module U43. This scheme constitutes a power control module, the power supply and control are input through the adapter board, and the +12V input voltage generates -5.5V and +5.5V respectively after passing through the DCDC, and then generates +5V and -5V respectively through the LDO, and 12V generates +8V through the LDO for internal use of the module. The control first passes through the FPGA, and the module is controlled by the FPGA using the parallel port control method.

[0033] In summary, the 100M-IN generated by the 100M reference source is used as the reference signal. After the 8.6G signal is processed twice by power division, 4 signals (LO1-1, LO1-2, LO1-3, and LO1-4) are output externally.

[0034] The signal generated by the 100M signal through the frequency multiplier is used as the reference signal of the 2G comb spectrum after the noise is filtered out by the filter. The 2G comb spectrum generator generates a series of frequency spectra, which are divided into two paths after two power divisions. One path is used for the LO3 local oscillator, and the other path passes through the filter to select the 10G signal. After the noise is filtered out by the filter, it is amplified and multiplied by 2 / 3 times to generate a 30G point frequency signal. Finally, after two power division processes, 4 signals (LO2-1, LO2-2, LO2-3, LO2-4) are output to the outside.

[0035] The signal generated by the 100M signal through the frequency multiplier is used as the reference signal of the 2G comb spectrum after filtering out the clutter by the filter. The 2G comb spectrum generator generates a series of frequency spectra, which are divided into two paths after being split into two. One path is used for the LO2 local oscillator, and the other path is coupled by the first coupler. The main path selects the 14G signal with the filter, and after filtering out the clutter, it is amplified and split. One path is split after being divided by 2 through the 2-divider from the F14G-O port. One 7G signal enters the DDS module of 0.25 - 0.75 as the reference clock after passing through the 2-divider. This signal is mixed with another 7G signal for the first time. The mixed signal is filtered and then doubled again as the RF signal for the second mixing. The coupled path enters the next coupler. The signal is coupled by four couplers. The main path selects the 14G, 16G, 18G, 20G, and 22G signals respectively with different filters. After filtering, amplifying, and splitting, one group of signals enters the RF switch S1, and the other group of signals enters the RF switch S2. The signal passing through the RF switch S2 is divided by 2 and mixed with the RF signal of 12.5 - 13.5G for the second time to generate a signal of 1.5 - 5.5G. The DC - 2G / DC - 3G / DC - 4G / DC - 5.5G signals are selected by the switch filter U22. The signal passing through the RF switch S1 is amplified and then doubled. The 28 - 40G signal after filtering out the clutter is used as the local oscillator signal for the third mixing. This signal is mixed with the signal of 1.5 - 2.5G for the third time, and then the 22.5 - 26.5G / 26.5 - 30.5G / 30.5 - 34.5G / 34.5G - 38.5G / 38.5G - 42.5 signals are selected by the switch filter U14. After amplification and splitting, 5 signals (LO3-1, LO3-2, LO3-3, LO3-4, LO3-5) are output externally.

[0036] The above embodiments describe multiple specific implementation manners of the present utility model. However, those skilled in the art should understand that without departing from the principles and essence of the present utility model, various changes or modifications can be made to these implementation manners, but these changes and modifications all fall within the protection scope of the present utility model.

Claims

1. A local oscillator module circuit, characterized in that, Including frequency multiplier U1, comb spectrum generator U2, coupler U4, coupler U5, coupler U6, coupler U7, filter Z1, filter Z2, filter Z3, filter Z4, filter Z5, filter Z6, filter Z9, filter Z10, amplifier A1, amplifier A2, amplifier A3, amplifier A4, amplifier A5, amplifier A6, amplifier A7, amplifier A8, amplifier A9, amplifier A10, power divider U8, power divider U9, power divider U10, power divider U11, power divider U16, RF switch S1, RF switch S2, RF switch S3, mixer U13, mixer U19, mixer U21, frequency multiplier U12, frequency multiplier U20, frequency divider U13, frequency divider U15, frequency divider U17, switched filter U14, switched filter U22, phase-locked source U18, RF switch S4, RF switch S5, attenuator U33, amplifier A16, power divider U34, attenuator U35, amplifier A17, power divider U36, power divider U38 and attenuator U37; The input end of the frequency multiplier U1 is externally connected to a reference signal. The input end of the comb spectrum generator U2 is connected to the output end of the frequency multiplier U1. The output end of the comb spectrum generator U2 is connected to the input end of the coupler U4. The coupling end of the coupler U4, the filter Z1, the amplifier A1 and the input end of the power divider U8 are connected in series in sequence. The output end of the coupler U4 is connected to the input end of the coupler U5. The coupling end of the coupler U5, the filter Z2, the amplifier A2 and the input end of the power divider U9 are connected in series in sequence. The output end of the coupler U5 is connected to the input end of the coupler U6. The coupling end of the coupler U6, the filter Z3, the amplifier A3 and the input end of the power divider U10 are connected in series in sequence. The output end of the coupler U6 is connected to the input end of the coupler U7. The coupling end of the coupler U7, the filter Z4, the amplifier A4 and the input end of the power divider U11 are connected in series in sequence. The output end of the coupler U7, the filter Z5 and the amplifier A5 are connected in series in sequence; The first output end of the power divider U8 is connected to the input end of the frequency divider U15. The second output end of the power divider U8, the first output end of the power divider U9, the first output end of the power divider U10 and the first output end of the power divider U11 are respectively connected to the four moving ends of the RF switch S1 in one-to-one correspondence. The second output end of the power divider U9, the second output end of the power divider U10, the second output end of the power divider U11 and the output end of the amplifier A5 are respectively connected to the four moving ends of the RF switch S2 in one-to-one correspondence. The fixed end of the RF switch S1, the amplifier A6, the frequency multiplier U12, the filter Z6, the amplifier A7 and the LO end of the mixer U13 are connected in series in sequence. The fixed end of the RF switch S2, the frequency divider U13, the amplifier A10 and the LO end of the mixer U21 are connected in series in sequence; The output end of the frequency divider U15 is connected to the input end of the power divider U16. The first output end of the power divider U16, the amplifier A9, and the LO end of the mixer U19 are connected in series in sequence. The second output end of the power divider U16, the frequency divider U17, the phase-locked source U18, and the IF end of the mixer U19 are connected in series in sequence. The RF end of the mixer U19, the filter Z9, the frequency multiplier U20, the filter Z10, and the RF end of the mixer U21 are connected in series in sequence. The IF end of the mixer U21, the switched filter U22, and the IF end of the mixer U13 are connected in series in sequence. The RF end of the mixer U13, the switched filter U14, the amplifier A8, and the fixed end of the RF switch S3 are connected in series in sequence. The first moving end of the RF switch S3, the RF switch S4, the attenuator U33, the amplifier A16, and the input end of the power divider U34 are connected in series in sequence. The second moving end of the RF switch S3, the RF switch S5, the attenuator U35, the amplifier A17, and the input end of the power divider U36 are connected in series in sequence. The first output end of the power divider U36 is connected to the input end of the power divider U38. The second output end of the power divider U36 is connected to the input end of the attenuator U37. The two output ends of the power divider U34, the two output ends of the power divider U38, and the output end of the attenuator U37 are respectively used as signal output ends.

2. The local oscillator module circuit according to claim 1, wherein It further includes a phase-locked source U24, a power divider U25, an attenuator U26, an attenuator U27, an amplifier A12, an amplifier A13, a power divider U26, and a power divider U27. The input end of the phase-locked source U24 is externally connected to a reference signal. The output end of the phase-locked source U24 is connected to the input end of the power divider U25. The first output end of the power divider U25, the attenuator U26, the amplifier A12, and the input end of the power divider U26 are connected in series in sequence. The second output end of the power divider U25, the attenuator U27, the amplifier A13, and the input end of the power divider U27 are connected in series in sequence. The two output ends of the power divider U26 and the two output ends of the power divider U27 are respectively used as signal output ends.

3. The local oscillator module circuit according to claim 1, characterized in that It further includes a power divider U3, a filter Z7, an amplifier A11, a frequency multiplier U23, a filter Z8, a power divider U28, an attenuator U29, an amplifier A14, a power divider U31, an attenuator U30, an amplifier A15, and a power divider U32. The input end of the power divider U3 is connected to the output end of the comb spectrum generator U2. The first output end of the power divider U3 is connected to the input end of the coupler U4. The second output end of the power divider U3, the filter Z7, the amplifier A11, the frequency multiplier U23, the filter Z8, and the input end of the power divider U28 are connected in series in sequence. The first output end of the power divider U28 is connected to the input end of the attenuator U29, the amplifier A14, and the power divider U31. The second output end of the power divider U28 is connected to the input end of the attenuator U30, the amplifier A15, and the power divider U32. The two output ends of the power divider U31 and the two output ends of the power divider U32 are respectively used as signal output ends.

4. The local oscillator module circuit according to claim 1, wherein It further includes an adapter board U44, an FPGA, DCDC modules U39 and U40, and LDO modules U41, U42 and U43. The adapter board U44 is respectively connected to the FPGA, DCDC module U39, DCDC module U40 and LDO module U41. The DCDC module U39 is connected to the LDO module U42, and the DCDC module U40 is connected to the LDO module U43.

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